CN117667658A - Test program generating method and test program generating device - Google Patents

Abstract

The embodiment of the application provides a test program generating method and test program generating equipment, which respond to first operations on target instruction sets of a plurality of instruction sets, display all instructions in the target instruction sets, and the plurality of instruction sets are generated in advance through compiling operation processes of test calculation, test logic and/or test instruments. And then, responding to a second operation on the target instruction in the target instruction set, displaying a parameter interface, testing the target instruction by utilizing the target parameter after receiving the target parameter input by the parameter interface, and filling the target parameter into the target instruction to generate a target test program, wherein the target test program is used for testing the target electronic equipment. And generating a plurality of test programs in advance, and when a target function instruction is required to be tested, a tester only needs to complete the selection of the test instruction and the input of parameters according to the prompt of the graphical interface, so that the efficiency of generating the target test program is improved, and the test efficiency of the electronic equipment is further improved.

Description

Test program generating method and test program generating device

Technical Field

The present invention relates to the field of server technologies, and in particular, to a test program generating method and a test program generating device.

Background

After the server product is manufactured, a test program needs to be executed to perform automatic test, and whether the server product meets the requirement is judged according to the test result.

The test program of the server product is realized by writing codes by a software engineer using a programming tool, and then the development and the debugging of the test function are completed by using the test program. Currently, a set of corresponding test programs is usually written for each test item, resulting in low test efficiency.

Thus, how to improve the test efficiency of the server is an important issue at present.

Disclosure of Invention

The embodiment of the application provides a test program generation method and test program generation equipment, which improve the efficiency of generating test programs and further improve the test efficiency of electronic equipment.

In a first aspect, an embodiment of the present application provides a test program generating method, where the method includes:

displaying all instructions in a target instruction set of a plurality of instruction sets in response to a first operation on the target instruction set, each instruction set generated by compiling at least one of a test algorithm, test logic, and an operational process of a test instrument;

responding to a second operation of the target instruction in the target instruction set, and displaying a parameter interface;

And receiving target parameters input in the parameter interface, filling the target parameters into the target instructions, and generating a target test program, wherein the target test program is used for performing target test on target electronic equipment.

According to the test program generation method, all instructions of a target instruction set are displayed in response to first operations on the target instruction set in a plurality of instruction sets generated in advance, then a parameter interface is displayed in response to second operations on the target instructions in the target instruction set, target parameters input in the parameter interface are received, and the target parameters are filled into the target instructions to generate the target test program. Because the instruction set is a pre-generated test program comprising a test algorithm, test logic and/or an operation process of a test instrument, when a target function needs to be tested, a tester only needs to complete the selection of the test instruction and the input of parameters according to the prompt of the graphical interface, and can generate a corresponding test program without writing codes, and the grammar and writing format of code development are not required to be known, so that the efficiency of generating the target test program is improved, and the test efficiency of the electronic equipment is further improved.

Optionally, the responding to the first operation on the target instruction set in the plurality of instruction sets displays all instructions in the target instruction set, including:

and responding to a first operation of a target instruction set in a plurality of instruction sets, acquiring all instructions of the target instruction set and the identification of each instruction through an instruction description interface, and displaying the all instructions and the identification of each instruction.

According to the test program generation method provided by the embodiment, after the first operation on the target instruction set is received, the first operation is responded, all instructions in the target instruction set and the identification of each instruction are obtained through the instruction description interface, all instructions and the identification of each instruction are displayed, and therefore test programs corresponding to target functions can be selected by test staff according to the identification.

Optionally, the receiving the target parameter input at the parameter interface, filling the target parameter into the target instruction, and generating a target test program includes:

and receiving target parameters output by the parameter interface, acquiring the target instruction through an instruction calling interface, filling the target parameters into the target instruction, and generating a target test program.

According to the test program generation method provided by the embodiment, after the target parameters input in the parameter interface are received, the target instructions are acquired through the instruction calling interface, and the target parameters are filled into the target instructions, so that the target test program corresponding to the target function is generated.

Optionally, before responding to the first operation on the target instruction set of the plurality of instruction sets, the method further comprises:

and receiving a test program of at least one of an operation process, a test algorithm and test logic of the test instrument, and generating an instruction set corresponding to each test program.

According to the test program generation method provided by the embodiment, after the test program corresponding to the operation process of the test instrument, the test program corresponding to the test algorithm and/or the test program corresponding to the test logic are received, the instruction set corresponding to each test program is generated, so that the test program corresponding to the target function can be selected according to the instruction set.

Optionally, after generating the instruction set corresponding to each test program, the method further includes:

the method may include obtaining the plurality of instruction sets, altering one or more instruction sets of the plurality of instruction sets, or increasing instruction sets.

According to the test program generation method provided by the embodiment, the instruction set is changed or increased, so that the prestored instruction set can be suitable for testing more electronic equipment products.

Optionally, the method further comprises:

the target test program is sent to the target electronic equipment, and the target electronic equipment is controlled to perform target test by utilizing the target test program;

or controlling the target test program to perform target test on the target electronic equipment.

According to the test program generation method provided by the embodiment, after the target test program is generated, the target test program can be sent to the target electronic device, so that the target electronic device can perform target test by using the target test program or control the target test program to perform target test on the target electronic device, and the target test on the target electronic device is completed.

In a second aspect, an embodiment of the present application provides a test program generating apparatus, including: a processor, and a communication interface connected with the processor;

the processor is used for responding to a first operation of a target instruction set in a plurality of instruction sets, displaying all instructions in the target instruction set, responding to a second operation of the target instruction in the target instruction set, displaying a parameter interface, and receiving target parameters input through the parameter interface;

and acquiring the target parameters and the target instructions, and generating a target test program, wherein the target test program is used for performing target test on target electronic equipment.

The test program generating device provided by the embodiment of the application comprises a processor and a communication interface, wherein the processor is used for responding to first operations of a target instruction set in a plurality of instruction sets, displaying all instructions of the target instruction set, and generating each instruction in advance through compiling a test program corresponding to a test algorithm, a test program corresponding to test logic and/or a test program corresponding to an operation process of a test instrument. And then, the processor responds to the second operation of the target instruction in the target instruction set, displays a parameter interface, receives the target parameter input through the parameter interface, and fills the target parameter into the target instruction to generate a target test program, so that when the target electronic equipment is required to be subjected to target test, only the test instruction and the input parameter interface are required to be selected, the generation efficiency of the target test program is improved, and the test efficiency of the target electronic equipment is further improved.

Optionally, the processor is further configured to receive a test program corresponding to the test algorithm, a test program corresponding to the test logic, and/or a test program corresponding to an operation process of the test instrument, and generate an instruction set corresponding to each test program.

The test program generating device provided by the embodiment generates the instruction set corresponding to each test program after receiving the test program corresponding to the operation process of the test instrument, the test program corresponding to the test algorithm and/or the test program corresponding to the test logic, so that the test program corresponding to the target function can be selected according to the instruction set.

Optionally, the processor is further configured to obtain a plurality of the instruction sets, alter one or more instruction sets of the plurality of instruction sets, or increase an instruction set.

The test program generating device provided by the embodiment changes or increases the instruction set, so that the instruction set can be suitable for testing more electronic equipment products.

Optionally, the communication interface is configured to electrically connect with the target electronic device, so as to send the target test program to the target electronic device, and control the target electronic device to perform a target test by using the target test program;

or the communication interface is used for being electrically connected with the target electronic equipment and controlling the target test program to perform target test on the target electronic equipment.

The test program generating device provided by the embodiment sends the target test program to the target electronic device through the communication interface, and controls the target electronic device to perform target test by using the target test program or controls the target test program to perform target test on the target electronic device so as to complete target test on the target electronic device.

In a third aspect, an embodiment of the present application provides a computer, including a script click generating unit and a script debugging executing unit;

The script point selection generating unit is used for responding to a first operation on a target instruction set in a plurality of instruction sets, displaying all instructions in the target instruction set, and responding to a second operation on the target instruction in the target instruction set, displaying a parameter interface and receiving target parameters input through the parameter interface;

the script debugging execution unit is used for acquiring the target parameters and the target instructions, filling the target parameters into the target instructions, and generating a target test program, wherein the target test program is used for performing target test on target electronic equipment.

The computer provided by the embodiment of the application comprises a script clicking unit and a script debugging execution unit. The script clicking unit responds to a first operation on a target instruction set in a plurality of instruction sets, displays all instructions in the target instruction set, responds to a second operation on the target instructions in the target instruction set, displays a parameter interface, and receives target parameters input through the parameter interface. The script debugging execution unit acquires the target instruction and the target parameter, fills the target parameter into the target instruction, and generates the target test program, so that the target test program can be quickly generated when the target function is tested, and the test efficiency of the computer is further improved.

Optionally, the computer further includes: an instruction set generation unit;

the instruction set generating unit is used for receiving test programs corresponding to the test algorithm, test programs corresponding to the test logic and/or tests corresponding to the operation process of the test instrument, and generating instruction sets corresponding to each test program.

The computer provided in this embodiment further includes an instruction set generating unit, where the instruction set generating unit generates an instruction set corresponding to each test program after receiving a test program corresponding to an operation process of the test instrument, a test program corresponding to a test algorithm, and/or a test program corresponding to a test logic, so as to select a test program corresponding to a target function according to the instruction set.

Optionally, the computer further includes:

an instruction set dynamic loading unit, configured to obtain a plurality of instruction sets, change one or more instruction sets in the plurality of instruction sets, or increase an instruction set.

The computer provided by the embodiment further comprises an instruction set dynamic loading unit, and the instruction set dynamic loading unit can drink the instruction set or increase the instruction set, so that the prestored instruction set can be suitable for testing more electronic equipment products.

In response to a first operation on a target instruction set of a plurality of instruction sets, displaying all instructions in the target instruction set, wherein the plurality of instruction sets are generated in advance by compiling at least one of an operation process of a test instrument, a test algorithm and/or, test logic and an operation process of the test instrument. And then, in response to a second operation on the target instruction in the target instruction set, displaying a parameter interface so that the tester inputs the target parameters of the target instruction in the parameter interface. And after receiving the target parameters input in the parameter interface, testing the target instructions by utilizing the target parameters, filling the target parameters into the target instructions to generate a target test program, wherein the target test program is used for testing the target electronic equipment. Because a plurality of test programs including the operation process of the test instrument, the test algorithm and/or the test logic and/or the operation process of the test instrument are generated in advance before the electronic equipment is tested, when the target function instruction needs to be tested, a tester only needs to complete the selection of the test instruction and the input of parameters according to the prompt of the graphical interface, the corresponding test program can be generated without generating a code again, the grammar and the writing format for code development are not needed to be known, the test efficiency of generating the target test program is improved, and the test efficiency of the electronic equipment is further improved.

Drawings

These and other aspects, implementations, and advantages of the exemplary embodiments will become apparent from the following description of the embodiments, taken in conjunction with the accompanying drawings. It is to be understood that the specification and drawings are solely for purposes of illustration and not as a definition of the limits of the present application, for which reference should be made to the appended claims. Additional aspects and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. Furthermore, the aspects and advantages of the present application may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

Fig. 1 is a schematic view of a scenario of a test program generating method according to an embodiment of the present application;

FIG. 2 is a flowchart of a test program generating method according to an embodiment of the present application;

FIG. 3 is a schematic diagram of an interface for an instruction set provided in an embodiment of the present application;

FIG. 4 is a schematic diagram of an interface of a target instruction set according to an embodiment of the present application;

FIG. 5 is an interface schematic diagram of a parameter interface provided in an embodiment of the present application;

FIG. 6 is a flowchart of a test program generating method according to an embodiment of the present application;

FIG. 7 is a schematic diagram of a computer according to an embodiment of the present disclosure;

fig. 8 is a schematic structural diagram of a test program generating device according to an embodiment of the present application.

Detailed Description

The terminology used in the description section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application.

For ease of understanding, related art terms related to the embodiments of the present application are explained and explained first.

Functional test: and verifying each function of the product, and checking whether the product meets the function required by a user according to the function test cases by item test. Functional testing includes link testing, form testing, and the like.

And (3) link test: and testing whether all links are linked to the target page according to the indication, testing whether the linked page exists and testing whether an isolated page exists on the Web application system.

Form testing: users need to use form operations, such as user registration, login, etc., when submitting information to Web application administrators, and thus the integrity of the submitting operation needs to be tested to verify the correctness of the information submitted to the server.

Performance test: various performance of the system is tested by automated test tools simulating various normal, peak and abnormal load conditions. Performance testing includes load testing, pressure testing, and the like.

Load test: and determining the performance of the system under various working loads through load testing, and testing the change condition of various performance indexes of the system when the load is gradually increased.

And (3) pressure test: by determining a bottleneck or unacceptable performance point of a system, a test of the maximum level of service that the system can provide is obtained.

Automated testing: the software engineer writes test cases, runs the application program or the system under preset conditions, evaluates the running result, and the preset conditions comprise normal conditions and abnormal conditions.

After the server product is manufactured, a test program needs to be executed to perform automatic test, and whether the server product meets the requirement is judged according to the test result. Such as performance tests, functional tests, etc., whether the requirements are met.

The test program of the server product is realized by writing codes by a software engineer using a programming tool, and then the development and the debugging of the test function are completed by using the test program. Currently, a set of corresponding test programs is usually written for each test item, resulting in low test efficiency.

Therefore, a set of test programs can be written for the same series of server products, and then the test of different server products under the same series is completed by modifying the configuration parameters. However, the change of the configuration parameters can only be suitable for testing the same series of server products, the test of different series of server products cannot be adapted, and the test efficiency of the server products cannot be effectively improved because the test scheme of the same series of products cannot be adapted to the products with larger change.

Based on this, the present application provides a test program generating method, which responds to a first operation of a target instruction set of a plurality of instruction sets, and displays all instructions in the target instruction set, wherein the plurality of instruction sets are generated in advance through compiling at least one of a test algorithm, test logic and an operation process of a test instrument. And then, in response to a second operation on the target instruction in the target instruction set, displaying a parameter interface so that the tester inputs the target parameters of the target instruction in the parameter interface. And after receiving the target parameters input in the parameter interface, filling the target parameters into the target instructions to generate a target test program, wherein the target test program is used for testing the target electronic equipment. Because a plurality of test programs including test algorithms, test logic and/or operation processes of test instruments are generated in advance before the target electronic equipment is tested, when the target function is required to be tested, a tester only needs to complete selection of test instructions and input of parameters according to prompts of a graphical interface, the corresponding test programs can be generated without writing codes, grammar and writing formats for code development are not required to be known, and therefore efficiency of generating the target test programs is improved, and test efficiency of the electronic equipment is improved.

The test program generating method provided by the embodiment of the application is described in detail below through a specific implementation manner.

Fig. 1 is a schematic view of a scenario of a test program generating method according to an embodiment of the present application. The display interface of the computer 101 displays all instruction sets compiled in advance, the tester 102 clicks on a target instruction set of the plurality of instruction sets, and the computer 101 displays all instructions of the target instruction set on the display interface in response to the clicking operation of the tester 102 on the target instruction set. Then, the tester 102 clicks the target instruction on the display interface, and the computer 101 displays the parameter interface in response to the clicking operation of the tester on the target instruction. The tester 102 inputs the target parameters in the parameter interface, the computer 101 receives the target parameters, and fills the target parameters into the target instructions to generate a target test program, and the target test program is used for testing the target electronic equipment.

Fig. 2 is a flowchart of a test program generating method according to an embodiment of the present application, as shown in fig. 2, with a computer as an execution body, the method of the embodiment includes the following steps:

s101, responding to a first operation on a target instruction set in a plurality of instruction sets, and displaying all instructions in the target instruction set.

The plurality of instruction sets are generated in advance by compiling at least one of an operating procedure of the test instrument, a test algorithm, and test logic.

The test instrument may include an external test instrument in the testing process of the electronic device, and the external test instrument is used for assisting the testing of the electronic device. For example, during voltage testing of the server, the external test instrument may include a computer, multimeter, or the like. One test may require one or more test instruments, for example, one performance test may require one or more test instruments, and one functional test may require one or more instruments. The same test of different electronic devices may require the same or different test instruments, and different tests of one electronic device may also require the same or different test instruments.

Before the electronic equipment is tested, a software engineer compiles test programs corresponding to the operation processes of a plurality of test instruments on a computer by using programming software, and the computer places the test programs corresponding to the operation processes of each test instrument in different instruction sets, namely each instruction set comprises the test program corresponding to the operation process of one test instrument. Then only the corresponding instruction set needs to be obtained when the test program corresponding to the operation process of a certain test instrument needs to be obtained later. The file format of the instruction set may be dll format.

As an implementation, an identifier may be set for each instruction set of the test apparatus, where the identifier is used to indicate to which test apparatus the instruction set corresponds, for example, a name of the instruction set of the test apparatus is commanded to be the name, model, etc. of the test apparatus.

Test algorithms may include coordinated filtering algorithms, machine learning algorithms, etc., which refer to descriptions of specific problem solving processes, i.e., specific limited operational steps taken to solve a particular problem. Thus, the test programs of a plurality of test algorithms may be placed in different instruction sets, each instruction set including a test program of a test algorithm, respectively. Only the corresponding instruction set needs to be acquired when a certain problem needs to be solved later.

The test logic may reflect the order of the plurality of items to be tested by the test logic when the test logic includes the order of the plurality of items to be tested, for example. And respectively placing the test programs corresponding to different test logics in different instruction sets, wherein each instruction set comprises the test program of one test logic.

After generating the instruction set corresponding to the operation process of each test instrument, the instruction set corresponding to each test algorithm, and/or the instruction set of each test logic, if a certain test is required, a tester may perform a first operation on a target instruction set in a plurality of instruction sets, as shown in fig. 3. The number of target instruction sets may be one or more, and the first operation may include, for example, a click operation or a double click operation. The computer responds to a first operation of the tester on the target instruction set, displays all instructions in the target instruction set, and the first operation is used for triggering a display interface of the target instruction set, wherein the display interface is used for displaying all instructions in the target instruction set. When the number of the target instruction sets is plural, the tester may perform the first operation on each target instruction set, and the computer may display all the instructions in each target instruction set in response to the first operation of the tester on each target instruction set.

It should be noted that, since each instruction set corresponds to one test instrument, one test algorithm, and/or one test logic, one test instrument may be used for one or more test items, one test algorithm may be used for one or more test items, and one test logic may be used for one or more test items, each instruction set may correspond to one or more test items. Thus, an instruction may be understood as a test item, and all instructions in the target instruction set may be understood as all test items in the target instruction set, such as all test items that may use a target test instrument.

Fig. 4 is a display interface of a target instruction set provided in an embodiment of the present application, and referring to fig. 4, the target instruction set is, for example, a CAN protocol specification general rule, and the instructions in the target instruction set may include at least one of setting a timeout, setting a communication retry number, setting a protocol type, a single signal processing command, a single signal processing command_synthesis, writing module serial number information, reading module serial number information, writing module serial number information (two-dimensional barcode), reading module serial number information (two-dimensional barcode), writing electronic tag (rectifier), verifying electronic tag, starting heartbeat, stopping heartbeat, batch signal processing command (single shot multi-receipts), setting reservation data, returning data protocol type, writing module serial number information (two-dimensional barcode) 2, reading black box data, and batch signal processing command (single shot multi-receipts).

S102, responding to a second operation on the target instruction in the target instruction set, and displaying a parameter interface.

The computer receives a second operation of the tester on the target instructions in the target instruction set, wherein the second operation is used for triggering a parameter interface of the target instructions, and the second operation is, for example, a single-click operation or a double-click operation. The computer then displays a parameter interface for displaying the required parameter items of the target instruction, which may include one or more parameters, in response to a second operation of the target instruction by the tester. The target instruction may be any instruction in a target instruction set, and the target instruction may be understood as a basic test program required by the electronic device to perform a certain test.

Fig. 5 is a parameter interface of a target instruction provided in an embodiment of the present application, where the target instruction is, for example, a timeout, and the parameter interface includes five parameter items, namely, parameter 1, parameter 2, parameter 3, parameter 4, and parameter 5. The tester can fill in the target parameters corresponding to the various parameter items required by the target instruction in the parameter interface through a mouse or a keyboard.

S103, after receiving target parameters input in a parameter interface, filling the target parameters into a target instruction to generate a target test program.

After receiving target parameters input by a tester at a parameter interface, the computer fills the target parameters into target instructions, and as the target instructions are basic test programs required by the electronic equipment for performing target tests, the target parameters required by different electronic equipment for performing target tests are different, and when the target electronic equipment is tested, the target parameters corresponding to the target electronic equipment are required to be used for performing target tests, the target test programs generated after the target parameters are filled into the target instructions can be used for performing target tests corresponding to the target instructions on the target electronic equipment, and the target tests can be understood as testing target functions. The electronic device may be a server, a computer, etc.

For example, the target instruction is a basic test program corresponding to the voltage test, the target parameter may be a voltage range, the voltage range is filled into the target instruction, the test program corresponding to the voltage test may be generated, and the voltage detection may be performed on the server by using the test program corresponding to the voltage test. For example, the target instruction is a timeout setting, after a tester inputs a target parameter on a timeout setting parameter interface, a test program corresponding to the timeout setting may be generated, and then whether the timeout is set by the target server may be tested by using the test program corresponding to the timeout setting.

Alternatively, the target test program may be sent to the target electronic device, and the target electronic device is controlled to perform the target test by using the target test program after receiving the target test program. The target test program can also be controlled to perform target test on the target electronic equipment. The target test program is controlled to perform target test on the target electronic equipment by using the test computer to run the target test program and simulate the running process of the target electronic equipment so as to complete the target test on the target electronic equipment. Then, whether the target function of the target electronic device is normal or not can be determined according to the test result of the target test.

Alternatively, the test program generating method provided by the application can be executed through a graphical configuration tool in the computer, wherein the graphical configuration tool is image processing software in the computer.

According to the test program generation method, before the electronic equipment is tested, a plurality of instruction sets comprising the operation process, the test algorithm and/or the test logic of the test instrument are generated in advance, and when the target electronic equipment needs to be tested, a tester only needs to complete the selection of the test instruction and the input of parameters according to the prompt of the graphical interface, does not need to generate a corresponding test program again, and does not need to know the grammar and the writing format of code development, so that the test efficiency is improved.

Fig. 6 shows a flowchart of a test program generating method according to an embodiment of the present application. As shown in fig. 6, with a computer as an execution body, the method of the present embodiment may include the following steps:

s201, receiving a test program of at least one of an operation process, a test algorithm and test logic of the test instrument, and generating an instruction set corresponding to each test program.

The software engineer compiles a test program corresponding to the operation process of a plurality of test instruments, a test program corresponding to a plurality of test algorithms, a test program corresponding to a plurality of test logics, and the like, and stores the test program corresponding to the operation process of each test instrument, the test program corresponding to each test algorithm, and the test program corresponding to each test logic into the computer.

The computer receives the test program corresponding to the operation process of each test instrument and respectively places the test program in different instruction sets, receives the test program corresponding to each test algorithm and respectively places the test program in different instruction sets, receives the test program corresponding to each test logic and places the test program in different instruction sets, the operation process of each test instrument corresponds to one instruction set, each test algorithm corresponds to one instruction set, and each test logic corresponds to one instruction set.

S202, acquiring a plurality of instruction sets, changing one or more instruction sets in the plurality of instruction sets, or adding the instruction sets.

The computer can acquire configuration files of a plurality of instruction sets, for example, graphical configuration tool software in the computer can read the content of each instruction set configuration file when the computer is started, and one or more instruction sets are changed by changing the content of the configuration file, so that the prestored instruction sets can be suitable for testing more server products. For example, the configuration file corresponding to one or more instruction sets may be deleted to delete one or more instruction sets, the configuration file corresponding to one or more instruction sets may be modified to modify one or more instruction sets, or one or more instruction sets may be added.

For example, one or more instructions in an instruction set may also be altered, one or more instructions in an instruction set may be deleted, one or more instructions in an instruction set may be modified, one or more instructions in an instruction set may be added. For example, one or more instructions in the plurality of instruction sets may also be altered.

S203, in response to a first operation on a target instruction set of the plurality of instruction sets, displaying all instructions in the target instruction set.

When a test is required, the tester may perform a first operation on a target instruction set of the plurality of instruction sets, such as clicking or double clicking on the target instruction set. The computer is responsive to a first operation of the target instruction set by the tester for displaying all instructions in the target instruction set. Optionally, after receiving the first operation of the tester on the target instruction set, responding to the first operation on the target instruction set, acquiring all instructions of the target instruction set and the identification of each instruction through the instruction description interface, and displaying all instructions and the identification of each instruction so as to facilitate the subsequent selection of the target instruction according to the identification.

S204, responding to a second operation on the target instruction in the target instruction set, and displaying a parameter interface.

The tester performs a second operation on the target instruction in the target instruction set, such as a single click operation or a double click operation on the target instruction, and the computer responds to the second operation on the target instruction by the tester to display a parameter interface for displaying parameter items required by the target instruction.

S205, receiving target parameters input in a parameter interface, filling the target parameters into target instructions, and generating a target test program.

After receiving the target parameters of the target task input by the tester at the parameter interface, the target instruction can be acquired through the instruction calling interface, and the target parameters are filled into the target instruction to generate a target test program. Optionally, after receiving the target parameter, the target parameter may be stored in a target file, after obtaining the target instruction, the target file is parsed to obtain the target parameter, and the target parameter is filled in the target instruction to generate a target test program, where the target test program is used for performing a target test on the target electronic device.

According to the test program generation method, before the electronic equipment is tested, a plurality of instruction sets are generated in advance, each instruction set comprises a plurality of instructions, each instruction corresponds to one test program, when a target function needs to be tested, a target instruction is acquired from the instruction set, then the target test program corresponding to the target function can be generated only by filling target parameters into the target instruction, and the test efficiency is improved. And after the multiple instruction sets are generated, the multiple instruction sets can also be modified to accommodate testing requirements of more server products.

In other embodiments, the target test program may also be tested prior to testing the target electronic device to ensure the effectiveness of target testing the target electronic device with the target test program.

Fig. 7 shows a block diagram of a computer according to an embodiment of the present application. As shown in fig. 7, the computer of the present embodiment may include: a script click generation unit 103 and a script debugging execution unit 104.

The script point selection generating unit 103 is configured to display all instructions in a target instruction set in response to a first operation on the target instruction set in the plurality of instruction sets, and display a parameter interface in response to the first operation on the target instructions in the target instruction set, and receive target parameters input through the parameter interface. The script debugging executing unit 104 obtains a target instruction from a target instruction set generated in advance, the target instruction set being one instruction set or a plurality of instruction sets of a plurality of instruction sets generated in advance, each instruction set being generated by compiling a test algorithm, test logic and an operation process of a test instrument, the script debugging executing unit 104 also obtains a target parameter from the script clicking unit 103, fills the target parameter into the target instruction, and generates a target test program for performing a target test on a target electronic device.

Alternatively, the script click generating unit 103 may save the target parameters to the target file after receiving the target parameters. The script tunable execution unit 104 may parse the target file to obtain the target parameters after obtaining the target instruction, and populate the target parameters into the target instruction to generate the target test program.

The computer may further include an instruction set file generating unit 101, where the instruction set file generating unit 101 is configured to receive test programs corresponding to a plurality of test algorithms, test programs corresponding to a plurality of test logics, and/or test programs corresponding to operation procedures of a plurality of test instruments, generate an instruction set for the test programs corresponding to the operation procedures of each test instrument, generate an instruction set for the test programs corresponding to each test algorithm, and generate an instruction set for the test programs corresponding to each test logic. The computer may further include an instruction set dynamic loading unit 102, where the instruction set dynamic loading unit 102 is configured to obtain a plurality of instruction sets generated by the instruction set generating unit 101, change one or more instruction sets in the plurality of instruction sets, and may also increase the instruction sets, so as to adapt to test requirements of more server products.

Fig. 8 shows a schematic hardware structure of a test program generating device according to an embodiment of the present application. As shown in fig. 8, the test program generating device 20, for implementing the operations corresponding to the computer in any of the above method embodiments, the test program generating device may be a computing device such as a computer, a server, a tablet, a notebook, a mobile phone, etc., and the test program generating device 20 of this embodiment may include: a memory 21 and a communication interface 23.

A processor 22 for executing computer instructions to implement the test program generating method in the above-described embodiment. Reference may be made in particular to the relevant description of the embodiments of the method described above. The processor 22 may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the present invention may be embodied directly in a hardware processor for execution, or in a combination of hardware and software modules in a processor for execution.

The processor 22 displays all instructions in the target instruction set in response to a first operation on the target instruction set in the plurality of instruction sets, and displays a parameter interface in response to a second operation on the target instructions in the target instruction set, receiving target parameters input through the parameter interface. And acquiring target parameters and target instructions, and generating a target test program, wherein the target test program is used for performing target test on target electronic equipment. When the target test is required, a target instruction can be selected from the instruction set, and target parameters are filled into the target instruction set, so that a target test program corresponding to the target test is generated, the generation efficiency of the test program is improved, and the test efficiency of the electronic equipment is further improved.

Optionally, the processor 22 may further receive a test program corresponding to the test algorithm, a test program corresponding to the test logic, and/or a test program corresponding to an operation process of the test apparatus, and generate an instruction set corresponding to each test program, so that when the test target function is required, the corresponding test program may be obtained from the instruction set.

Optionally, the processor 22 may further obtain a plurality of instruction sets, change one or more instruction sets in the plurality of instruction sets, or increase the instruction sets, so as to increase the application range of the electronic device corresponding to the instruction sets.

The communication interface 23 may be connected to the processor 22, and the communication interface 23 may be further electrically connected to the target electronic device, so as to send the target test program to the target electronic device to control the target electronic device to perform the target test by using the target test program, and may be further used to control the target test program to perform the target test on the target electronic device.

The test program generating device may further include: a memory 21 for storing computer instructions. The Memory 21 may include a high-speed random access Memory (Random Access Memory, RAM), and may further include a Non-Volatile Memory (NVM), such as at least one magnetic disk Memory, and may also be a U-disk, a removable hard disk, a read-only Memory, a magnetic disk, or an optical disk. Alternatively, the memory 21 may be separate or integrated with the processor 22.

The test program generating device provided in this embodiment may be used to execute the above test program generating method, and its implementation manner and technical effects are similar, and this embodiment will not be repeated here.

The present application also provides a computer readable storage medium having stored therein computer instructions which, when executed by a processor, are adapted to carry out the methods provided by the various embodiments described above.

The present application also provides a computer program product comprising computer instructions stored in a computer readable storage medium. The computer instructions may be read from a computer-readable storage medium by at least one processor of the device, and executed by the at least one processor, cause the device to implement the methods provided by the various embodiments described above.

The embodiment of the application also provides a chip, which comprises a memory and a processor, wherein the memory is used for storing computer instructions, and the processor is used for calling and running the computer instructions from the memory, so that a device provided with the chip executes the method in various possible implementation manners.

In the description of the present application, it should be noted that, unless explicitly stated and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, indirectly connected through an intermediary, in communication between two elements, or in an interaction relationship between two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.

The references herein to devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application. In the description of the present application, the meaning of "a plurality" is two or more, unless specifically stated otherwise.

The terms first, second and the like in the description and in the claims of the present application and in the above-described figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be capable of operation in sequences other than those illustrated or described herein, for example. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims (10)

1. A test program generation method, the method comprising:

displaying all instructions in a target instruction set of a plurality of instruction sets in response to a first operation on the target instruction set, each instruction set generated by compiling at least one of a test algorithm, test logic, and an operational process of a test instrument;

responding to a second operation of the target instruction in the target instruction set, and displaying a parameter interface;

and receiving target parameters input in the parameter interface, filling the target parameters into the target instructions, and generating a target test program, wherein the target test program is used for performing target test on target electronic equipment.

2. The method of claim 1, wherein displaying all instructions in a target instruction set of a plurality of instruction sets in response to a first operation on the target instruction set, comprises:

and responding to a first operation of a target instruction set in a plurality of instruction sets, acquiring all instructions of the target instruction set and the identification of each instruction through an instruction description interface, and displaying the all instructions and the identification of each instruction.

3. The method of claim 1, wherein the receiving the target parameters entered at the parameter interface, populating the target instructions with the target parameters, and generating the target test program comprises:

and receiving target parameters input in the parameter interface, acquiring the target instruction through an instruction calling interface, filling the target parameters into the target instruction, and generating a target test program.

4. A method according to any of claims 1-3, wherein prior to responding to the first operation on the target instruction set of the plurality of instruction sets, the method further comprises:

and receiving a test program of at least one of an operation process, a test algorithm and test logic of the test instrument, and generating an instruction set corresponding to each test program.

5. The method of claim 4, wherein after generating the instruction set corresponding to each test program, the method further comprises:

the method may include obtaining the plurality of instruction sets, altering one or more instruction sets of the plurality of instruction sets, or increasing instruction sets.

6. A method according to any one of claims 1-3, characterized in that the method further comprises:

the target test program is sent to the target electronic equipment, and the target electronic equipment is controlled to perform target test by utilizing the target test program;

or controlling the target test program to perform target test on the target electronic equipment.

7. A test program generating apparatus, comprising: a processor, and a communication interface connected with the processor;

the processor is used for responding to a first operation of a target instruction set in a plurality of instruction sets, displaying all instructions in the target instruction set, and responding to a second operation of the target instruction in the target instruction set, displaying a parameter interface and receiving target parameters input through the parameter interface;

and acquiring the target parameters and the target instructions, and generating a target test program, wherein the target test program is used for performing target test on target electronic equipment.

8. The apparatus of claim 7, wherein the processor is further configured to receive a test program corresponding to a test algorithm, a test program corresponding to test logic, and/or a test program corresponding to an operating procedure of a test instrument, and generate an instruction set corresponding to each test program.

9. The apparatus of claim 8, wherein the processor is further configured to obtain a plurality of the instruction sets, alter one or more of the plurality of instruction sets, or increase an instruction set.

10. The device of any of claims 7-9, wherein the communication interface is configured to electrically connect with the target electronic device to send the target test program to the target electronic device, and control the target electronic device to perform a target test using the target test program;

or the communication interface is used for being electrically connected with the target electronic equipment and controlling the target test program to perform target test on the target electronic equipment.