CN109800155B - Method and device for testing QTE interlocking application software based on Probe - Google Patents

Method and device for testing QTE interlocking application software based on Probe Download PDF

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CN109800155B
CN109800155B CN201811563629.1A CN201811563629A CN109800155B CN 109800155 B CN109800155 B CN 109800155B CN 201811563629 A CN201811563629 A CN 201811563629A CN 109800155 B CN109800155 B CN 109800155B
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probe
test
testing
target
logic module
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CN109800155A (en
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王伟
郜春海
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Traffic Control Technology TCT Co Ltd
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Traffic Control Technology TCT Co Ltd
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Abstract

The embodiment of the invention discloses a method and a device for testing QTE interlocking application software based on probes. After the model generates codes, the relative path of each Probe is found through simulation operation. When a test script file for testing a target logic module is written in a QTE environment, intermediate variables output or input by the target logic module can be obtained through the relative paths of the probes, and any target logic module in the model can be tested through the intermediate variables. Compared with a method which can only test the whole model, the test of the logic modules in the model improves the coverage rate of the test of each logic branch of the model. On the other hand, the method greatly reduces the workload of writing the test script due to the reduction of the input amount.

Description

Method and device for testing QTE interlocking application software based on Probe
Technical Field
The embodiment of the invention relates to the technical field of software model testing, in particular to a method and a device for testing QTE interlocking application software based on Probe.
Background
An Application Development Environment with high security of SCADE (Safety-Critical Application Development Environment) provides a graphical Development mode based on a model, and covers the whole software Development process from requirement analysis to code realization. The SCADE development environment realizes an intuitive graphical demand modeling function, an automatic generation function of standard C codes and development documents based on the model, and a simulation verification and software test function based on the model. The rigorous modeling theory and the code generator KCG which is verified by high safety guarantee the high synchronization of software requirements and code products.
QTE (qualified Testing environment) is an important component in the Scade Life cycle and is used for Testing and verifying the Scade model. The QTE test is based on the model unit to compile a test script, and tests the model function by setting an input-check output mode, so that the QTE test has the characteristic of black box test. Meanwhile, the test script is executed to generate a model coverage rate and code coverage rate statistical file, so that the output of the white box test is achieved. The QTE test method is based on the test of model units, and tests a certain model by setting an input-check output mode, so that a test script aims at the input and the output of the model and does not concern intermediate variables. Therefore, when the coupling degree of each model in the system is low, the QTE testing method can well perform independent testing on each model.
However, when the coupling degree of each model in the system is high, the test case usually involves partial functions of multiple models, the QTE test method can only test with the top-level models of the models as test objects, the input amount involved is increased dramatically, the workload of writing test scripts is increased greatly, the error rate and the debugging difficulty are increased, and the readability and maintainability of the scripts are also reduced greatly. On the other hand, the QTE test cannot test some functional logic in the model with higher coupling.
In practical application, the inventor finds that the conventional QTE testing method cannot test a certain logic module in a model with higher coupling degree, on one hand, the complete testing of each logic module of the model cannot be realized, and on the other hand, the workload of compiling a testing script is larger because more input quantity is involved in the testing of the whole model.
Disclosure of Invention
The invention aims to solve the problems that the conventional QTE testing method cannot test a certain logic module in a model with higher coupling degree, on one hand, the complete testing of each logic module of the model cannot be realized, and on the other hand, the workload for writing a testing script is larger because more input quantity is involved in the whole testing of the model.
In view of the above technical problems, an embodiment of the present invention provides a test method for QTE interlocking application software based on Probe, including:
acquiring a relative path corresponding to each Probe filled in a target model corresponding to target application software; the Probe is added to each target logic module which needs to be subjected to intermediate variable testing in the target model;
under the QTE environment, compiling a test script file for testing each target logic module according to the input-output relationship among the target logic modules and the corresponding path of each Probe;
and executing the compiled test script file to obtain a test result for testing each target logic module, and outputting a test report generated by the test result.
The embodiment of the invention provides a test device for QTE interlocking application software based on Probe, which comprises:
the acquisition module is used for acquiring the relative path corresponding to each Probe filled in the target model corresponding to the target application software; the Probe is added to each target logic module which needs to be subjected to intermediate variable testing in the target model;
the generation module is used for compiling a test script file for testing each target logic module according to the input-output relationship among the target logic modules and the relative path corresponding to each Probe under the QTE environment;
and the test module is used for executing the compiled test script file, obtaining a test result for testing each target logic module and outputting a test report generated by the test result.
The embodiment provides an electronic device, including:
at least one processor, at least one memory, a communication interface, and a bus; wherein the content of the first and second substances,
the processor, the memory and the communication interface complete mutual communication through the bus;
the communication interface is used for information transmission between the electronic equipment and communication equipment of other electronic equipment;
the memory stores program instructions executable by the processor, the processor calling the program instructions to perform the method of any of the above.
The present embodiments provide a non-transitory computer-readable storage medium storing computer instructions that cause the computer to perform the method described above.
The embodiment of the invention provides a method and a device for testing QTE interlocking application software based on probes. After the model generates codes, the relative path of each Probe is found through simulation operation. When a test script file for testing a target logic module is written in a QTE environment, intermediate variables output or input by the target logic module can be obtained through the relative paths of the probes, and any target logic module in the model can be tested through the intermediate variables. Compared with a method which can only test the whole model, the test of the logic modules in the model improves the coverage rate of the test of each logic branch of the model. On the other hand, the method greatly reduces the workload of writing the test script due to the reduction of the input amount.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a development tool in a Scade development environment according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of a test method of a Probe-based QTE interlocking application software according to another embodiment of the invention;
FIG. 3 is a diagram illustrating relative paths for obtaining probes according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating the introduction of Probe relative paths into a test script according to one embodiment of the present invention;
FIG. 5 is a schematic diagram of managing test script files, as provided by one embodiment of the present invention;
FIG. 6 is a data flow diagram of a "transact ordinary route" model provided by one embodiment of the invention;
FIG. 7 is a block diagram of the testing device for the Probe-based QTE interlocking application software according to one embodiment of the invention;
fig. 8 is a block diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The application background of the method provided by the present invention is briefly introduced below, fig. 1 is a schematic diagram of development tools in the scope development environment provided in this embodiment, and referring to fig. 1, the development tools mainly included in the scope development environment include a scope Architecture, a scope LifeCycle, a scope Suite, and a scope Display. The Scade Architecture is used for carrying out requirement analysis, the Scade Display is used for providing a human-computer interaction interface, the Scade Suite provides a model creating environment, logical relations are established through logical symbols, and codes are generated in the Scade Suite. The Scade Life cycle provides various testing environments, for example, a testing script for testing a model can be written in a QTE environment, and the testing script is run to test the model. QTE is suitable for testing low-coupling, high-cohesion models.
Since the QTE is memorialized by setting input-check output to the model, the QTE can only be used to test the model as a whole or a module of the model with a low degree of coupling. For a high-coupling model, because input parameters cannot be set and output parameters cannot be acquired for a certain logic module, a test for the certain logic module in the model cannot be realized.
However, in the Simulator simulation environment in the Scade Suite, there is a Probe function, the Probe is used to monitor the variation of some variables in the simulation process, and the memory space of the Probe is not released after the simulation run is completed. The method provided by the application just utilizes the characteristic of the Probe, the Probe is injected to each logic module to be tested in the model, the input of the logic module is set through the Probe, the output of the logic module is obtained, and the test of the logic module is realized.
Fig. 2 is a schematic flowchart of a test method for Probe-based QTE interlocking application software provided in this embodiment, referring to fig. 2, where the method includes:
201: acquiring a relative path corresponding to each Probe filled in a target model corresponding to target application software; the Probe is added to each target logic module which needs to be subjected to intermediate variable testing in the target model;
202: under the QTE environment, compiling a test script file for testing each target logic module according to the input-output relationship among the target logic modules and the corresponding path of each Probe;
203: and executing the compiled test script file to obtain a test result for testing each target logic module, and outputting a test report generated by the test result.
The method provided by the embodiment is executed by the test equipment for testing the model. When a model is created in the Scade Suite environment, probes are filled in the logic module to be tested. When a code is generated by a model, the annotated Probe also generates the corresponding code. And finding the relative path of each Probe through simulation operation in the Scade Suite environment. Only through the relative path, the Probe can be controlled to acquire the intermediate variable of each logic module. Fig. 3 is a schematic diagram of the relative Path for obtaining the Probe provided in this embodiment, and in the process of simulation operation, the relative Path of the Probe can be read through the Path in the Properties of Pro _ switchbelongoverlapping corresponding to the Probe.
Since the intermediate variables of the target logic module need to be acquired through the relative paths of the probes, the relative paths of the probes need to be written into a test script file when the test script file for testing the target logic module is written. For example, fig. 4 is a schematic diagram of introducing Probe relative paths into a test script, and the contents in a solid box in the test script file shown in fig. 4 are the Probe relative paths.
Because the logic of the interlocking application software is complex, the Probe output of the test script file executed first may be used as the input of the subsequent test script file according to the logic time sequence, so the test script file of each Probe needs to be compiled according to the input-output relationship between each target logic module, and the test script files are sequentially arranged in the script control program Procedure according to the execution sequence of the test script files. Fig. 5 is a schematic diagram of managing test script files provided in this embodiment, and referring to fig. 5, the test script files (. sss files) are sequentially arranged in the Procedure and managed by uniform test case numbers. When testing, the testing of each target logic module can be realized only by starting the Procedure.
The method provided by the embodiment is equivalent to decoupling a complex model, so that the test of the QTE is not limited to a single model function. Meanwhile, when the scale of the target model is too large, the input quantity which is not concerned about can be avoided, only the scene which is fit with the current system test case is concerned about, and other scenes are ignored, so that the workload of script writing and the maintenance difficulty can be reduced, the time overhead of testing is reduced, and the testing efficiency is improved.
The embodiment provides a test method of QTE interlocking application software based on probes, and in the process of creating a target model, probes are added to target logic modules which need to be subjected to intermediate variable tests in advance. After the model generates codes, the relative path of each Probe is found through simulation operation. When a test script file for testing a target logic module is written in a QTE environment, intermediate variables output or input by the target logic module can be obtained through the relative paths of the probes, and any target logic module in the model can be tested through the intermediate variables. Compared with a method which can only test the whole model, the test of the logic modules in the model improves the coverage rate of the test of each logic branch of the model. On the other hand, the method greatly reduces the workload of writing the test script due to the reduction of the input amount.
Specifically, the process of testing a logic module in a model includes the following steps:
(1) under the Scade Suite environment, probes are added one by one at the positions of the system model where the intermediate variables need to be checked, and when the model generates codes, the probes are ensured to be generated correctly;
(2) entering a simulation tool Simulator under the condition of Scade Suite, running simulation after compiling is passed, tracking logic branches layer by layer, finding each previously annotated Probe, and acquiring a relative path of the Probe during compiling in the attribute of the Probe;
(3) writing the obtained relative path into a script under a QTE testing environment of the Scade Life cycle;
(4) adding model input under each scene in a test script, and adding test on a Probe expected output value;
(5) and arranging the written test script files in the script control program Procedure according to the logic time sequence, and executing the Procedure to realize the test of the logic module added with the Probe.
Further, on the basis of the foregoing embodiment, the acquiring a relative path corresponding to each Probe annotated in a target model corresponding to target application software includes:
under the Scade Suite environment, filling probes at the input and output positions of each target logic module, and taking a model obtained after filling the probes as the target model;
and after the target model generates codes, performing simulation operation in the Scade Suite environment, and searching a relative path corresponding to each Probe in the process of the simulation operation.
In the process of establishing the target model, probes are respectively injected into the input and the output of a target logic module which needs to be subjected to intermediate variable testing in the target model, after codes are generated, simulation operation is carried out, and a relative path corresponding to each Probe is obtained in the process of simulation operation.
The embodiment provides a method for testing QTE interlocking application software based on probes, which is used for acquiring a relative path corresponding to each Probe in a simulation operation process and is the basis for subsequently generating a corresponding test script file.
Further, on the basis of the above embodiment, in the QTE environment, writing a test script file for testing each target logic module according to the input-output relationship between each target logic module and the relative path corresponding to each Probe includes:
under the QTE environment, for each Probe, determining input data for testing in a test script file corresponding to the Probe according to set input parameters and input-output relations between target logic modules;
taking the relative path corresponding to the Probe as a path for reading an output value for testing the target logic module where the Probe is located, and setting an expected output value for testing the target logic module where the Probe is located;
and generating a test script file corresponding to the Probe according to the input data, the relative path and the expected output value corresponding to the Probe, and sequentially arranging the generated test script files in a script control program according to the input and output relation among the target logic modules.
The input data, i.e. the input values, for performing the test. The test script file corresponding to the Probe needs to include the relative path of the Probe, input data set for the tested logic module, or an expected output value.
Taking a system test case "transact a normal route" as an example, fig. 6 is a data flow diagram of a model of "transact a normal route" provided in this embodiment, and referring to fig. 6, the model related to the function of "transact a normal route" includes an "input processing module" and an "interlock logic processing module". Because the 'transacting of the ordinary route' is concerned about whether the route can be successfully established or not, and the related data is whether the final route state, the section state and the signal state are correct or not, and is not related to other data, the input of the whole 'top module' does not need to be set and all the outputs do not need to be checked. According to the model shown in fig. 6, only three inputs of the sub-module "input processing module, route data processing module, route transacting module" need to be set.
The embodiment provides a test method of QTE interlocking application software based on Probe, when a certain function needs to be tested, only certain logic modules need to be tested, and the method provided by the embodiment does not need to test the whole, so that the input quantity is greatly reduced, and the test efficiency is improved.
Further, on the basis of the foregoing embodiments, the executing the written test script file to obtain a test result for testing each target logic module, and outputting a test report generated from the test result includes:
and executing the test script file corresponding to each Probe through the script control program to obtain an output value corresponding to each Probe, obtaining a test result for testing the target logic module where the Probe is located according to the output value corresponding to each Probe and the set expected output value, generating a test report comprising the test result of each target logic module, and outputting the test report.
If the output value corresponding to the Probe meets the set expected output value, the test result is passed, otherwise, the test result is not passed. And generating a list according to the test result corresponding to each Probe to be used as a test report, and outputting the test report through a display device.
In the example shown in fig. 6, after three inputs of a submodule, namely an input processing module, a route data processing module and a route handling module, are set, intermediate variables (including a route state, a section state and a signal state) of the input processing module are acquired through probes, whether the intermediate variables meet expectations is checked, and at this time, after the input processing, the handling condition check should be a pass and the route handling state should be an initial route selection state.
Because the output of the sub-module of the input processing module, the route data processing module and the route transacting module is used as the input quantity of the interlocking logic processing module, the route logic processing module, the intermediate variable is obtained from the interlocking logic processing module and the route logic processing module after the intermediate variable of the input processing module is detected. Whether the route state is open, whether the section state is locked and whether the signal machine state is lightened are checked, namely whether the interlocking system can successfully establish the route after the command for transacting the route is input can be verified.
In addition, in the example shown in fig. 6, the handling of the interlock-related service may need to be completed through a plurality of software cycles, and when the device status is not satisfied, the system waits, and when the device status is satisfied, the system transitions between states including route initial selection, initial locking, unlocking, exception, and the like. A plurality of scripts are compiled, different inputs are used for representing the precondition of each route state transition, the Probe is used for obtaining the processed result, the output result of the function block under various scenes can be obviously simulated without checking irrelevant output, and the scripts are integrated together for simulating the state flow of the whole process of transacting business and verifying the correctness of the interlocking system function.
The embodiment provides a test method for QTE interlocking application software based on probes, which realizes the judgment of test results and the generation of test reports through expected output values set in test script files of the probes, and realizes the test of each logic module in a model.
Further, on the basis of the above embodiments, the method further includes:
for a relative path corresponding to any Probe, if the relative path of the Probe is a folder queried by the name of the Probe, the Probe cannot be used for testing a target logic module where the Probe is located, and marking the Probe.
If the Probe is found by name search, the obtained relative path will be incomplete and unusable.
Further, on the basis of the above embodiments, the compiler for compiling the test script file in the QTE environment is the same as the compiler in the scape Suite environment in which the target model is located.
The embodiment provides a test method of QTE interlocking application software based on probes, which is convenient for timely solving related problems by marking when detecting relative paths of unavailable probes, and meanwhile, the same compiler avoids errors in the test process and ensures that the test is smoothly carried out.
Taking the example shown in fig. 6 as an example, the command input stage needs to be processed in an "input processing module", which includes processing the interlock data, ZC data, VOBC data, mask gate data, LEU data, ATS data, and the like, where the interlock data includes 11 types of inputs such as route data, physical section data, and the like in the figure, includes 40 or more structure arrays, and outputs the processing results corresponding to these data by using more than 1000 variables. If the top module in the graph is used as a target model for testing, the input and output quantity is huge. In contrast, according to the method of the present embodiment, the set input amount and the intermediate amount of the test are less than 10% of the original amount, but the entire workload can be reduced by about 70% because of the work of filling the Probe and tracing the Probe path. And when the imported handwritten code exists in the model, because the imported module does not output in the model and only has intermediate variables, the Probe can be used for acquiring the intermediate variables for testing, so that the coverage rate of the test of each logic branch of the model by the use case is improved, and the test efficiency and the test completeness are remarkably improved.
Therefore, according to the method provided by the embodiment, by using the characteristic that the memory space of the Probe is not released immediately after the simulation execution, the same compiler is used for compiling the code generated by the model and the QTE script, the Probe is introduced into the QTE test script through the searched path information, and the corresponding test method is designed, so that the test flexibility is obviously improved.
On the other hand, when the model coupling degree is high, the top-level model is required to be used as a test object, a great amount of time is consumed for writing a case due to huge input and output quantity, and if the test object is the bottom-level model, the whole functionality of the module and the relevance among the bottom-level models are easily ignored. The method provided by the embodiment avoids fussy input setting and output checking, has the characteristics of black box testing and white box testing, is a highly flexible gray box testing scheme, and improves the efficiency and the coverage rate of QTE testing. Therefore, the method provided by the embodiment reduces the writing difficulty and complexity of the QTE script, increases the readability and maintainability of the script, and improves the testing efficiency and quality.
Fig. 7 shows a structural block diagram of a Probe-based QTE interlocking application software testing device according to an embodiment of the present invention, referring to fig. 7, the Probe-based QTE interlocking application software testing device according to the embodiment includes an obtaining module 701, a generating module 702, and a testing module 703, wherein,
an obtaining module 701, configured to obtain a relative path corresponding to each Probe that is injected in a target model corresponding to target application software; the Probe is added to each target logic module which needs to be subjected to intermediate variable testing in the target model;
a generating module 702, configured to compile a test script file for testing each target logic module according to the input/output relationship between each target logic module and the corresponding path of each Probe in the QTE environment;
the test module 703 is configured to execute the compiled test script file, obtain a test result for testing each target logic module, and output a test report generated from the test result.
The test device for the Probe-based QTE interlocking application software provided in this embodiment is suitable for the test method for the Probe-based QTE interlocking application software provided in the above embodiments, and is not described herein again.
The embodiment of the invention provides a QTE interlocking application software testing device based on probes, which is characterized in that in the process of establishing a target model, probes are added to target logic modules needing intermediate variable testing in advance. After the model generates codes, the relative path of each Probe is found through simulation operation. When a test script file for testing a target logic module is written in a QTE environment, intermediate variables output or input by the target logic module can be obtained through the relative paths of the probes, and any target logic module in the model can be tested through the intermediate variables. Compared with a method which can only test the whole model, the test of the logic modules in the model improves the coverage rate of the test of each logic branch of the model. On the other hand, the method greatly reduces the workload of writing the test script due to the reduction of the input amount.
Fig. 8 is a block diagram showing the structure of the electronic apparatus provided in the present embodiment.
Referring to fig. 8, the electronic device includes: a processor (processor)801, a memory (memory)802, a communication Interface (Communications Interface)803, and a bus 804;
wherein the content of the first and second substances,
the processor 801, the memory 802 and the communication interface 803 complete mutual communication through the bus 804;
the communication interface 803 is used for information transmission between the electronic device and communication devices of other electronic devices;
the processor 801 is configured to call program instructions in the memory 802 to perform the methods provided by the above-described method embodiments, including for example: acquiring a relative path corresponding to each Probe filled in a target model corresponding to target application software; the Probe is added to each target logic module which needs to be subjected to intermediate variable testing in the target model; under the QTE environment, compiling a test script file for testing each target logic module according to the input-output relationship among the target logic modules and the corresponding path of each Probe; and executing the compiled test script file to obtain a test result for testing each target logic module, and outputting a test report generated by the test result.
The present embodiments provide a non-transitory computer-readable storage medium storing computer instructions that cause the computer to perform the methods provided by the above method embodiments, for example, including: acquiring a relative path corresponding to each Probe filled in a target model corresponding to target application software; the Probe is added to each target logic module which needs to be subjected to intermediate variable testing in the target model; under the QTE environment, compiling a test script file for testing each target logic module according to the input-output relationship among the target logic modules and the corresponding path of each Probe; and executing the compiled test script file to obtain a test result for testing each target logic module, and outputting a test report generated by the test result.
The present embodiments disclose a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, enable the computer to perform the methods provided by the above-described method embodiments, for example, comprising: acquiring a relative path corresponding to each Probe filled in a target model corresponding to target application software; the Probe is added to each target logic module which needs to be subjected to intermediate variable testing in the target model; under the QTE environment, compiling a test script file for testing each target logic module according to the input-output relationship among the target logic modules and the corresponding path of each Probe; and executing the compiled test script file to obtain a test result for testing each target logic module, and outputting a test report generated by the test result.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
The above-described embodiments of the electronic device and the like are merely illustrative, where the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may also be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the embodiments of the present invention, and are not limited thereto; although embodiments of the present invention have been described in detail with reference to the foregoing embodiments, those skilled in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (9)

1. A test method of QTE interlocking application software based on Probe is characterized by comprising the following steps:
acquiring a relative path corresponding to each Probe filled in a target model corresponding to target application software; the Probe is added to each target logic module which needs to be subjected to intermediate variable testing in the target model;
under the QTE environment, compiling a test script file for testing each target logic module according to the input-output relationship among the target logic modules and the corresponding path of each Probe;
and executing the compiled test script file to obtain a test result for testing each target logic module, and outputting a test report generated by the test result.
2. The method according to claim 1, wherein the obtaining the relative path corresponding to each Probe annotated in the target model corresponding to the target application software comprises:
under the Scade Suite environment, filling probes at the input and output positions of each target logic module, and taking a model obtained after filling the probes as the target model;
and after the target model generates codes, performing simulation operation in the Scade Suite environment, and searching a relative path corresponding to each Probe in the process of the simulation operation.
3. The method according to claim 1, wherein in the QTE environment, writing a test script file for testing each target logic module according to the input-output relationship between each target logic module and the relative path corresponding to each Probe includes:
under the QTE environment, for each Probe, determining input data for testing in a test script file corresponding to the Probe according to set input parameters and input-output relations between target logic modules;
taking the relative path corresponding to the Probe as a path for reading an output value for testing the target logic module where the Probe is located, and setting an expected output value for testing the target logic module where the Probe is located;
and generating a test script file corresponding to the Probe according to the input data, the relative path and the expected output value corresponding to the Probe, and sequentially arranging the generated test script files in a script control program according to the input and output relation among the target logic modules.
4. The method of claim 3, wherein executing the written test script file to obtain test results for testing each target logic module, and outputting a test report generated from the test results comprises:
and executing the test script file corresponding to each Probe through the script control program to obtain an output value corresponding to each Probe, obtaining a test result for testing the target logic module where the Probe is located according to the output value corresponding to each Probe and the set expected output value, generating a test report comprising the test result of each target logic module, and outputting the test report.
5. The method of claim 2, further comprising:
for a relative path corresponding to any Probe, if the relative path of the Probe is a folder queried by the name of the Probe, the Probe cannot be used for testing a target logic module where the Probe is located, and the Probe is marked.
6. The method of claim 1, wherein a compiler used in the QTE environment to compile the test script file is the same as a compiler in the Scade Suite environment in which the target model resides.
7. A QTE interlocking application software testing device based on Probe is characterized by comprising:
the acquisition module is used for acquiring the relative path corresponding to each Probe filled in the target model corresponding to the target application software; the Probe is added to each target logic module which needs to be subjected to intermediate variable testing in the target model;
the generation module is used for compiling a test script file for testing each target logic module according to the input-output relationship among the target logic modules and the relative path corresponding to each Probe under the QTE environment;
and the test module is used for executing the compiled test script file, obtaining a test result for testing each target logic module and outputting a test report generated by the test result.
8. An electronic device, comprising:
at least one processor, at least one memory, a communication interface, and a bus; wherein the content of the first and second substances,
the processor, the memory and the communication interface complete mutual communication through the bus;
the communication interface is used for information transmission between the electronic equipment and the communication modules of other electronic equipment;
the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the method of any of claims 1-6.
9. A non-transitory computer-readable storage medium storing computer instructions that cause a computer to perform the method of any one of claims 1 to 6.
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