CN117666294A - Photoetching process optimization method and system for wafer - Google Patents

Photoetching process optimization method and system for wafer Download PDF

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Publication number
CN117666294A
CN117666294A CN202311672239.9A CN202311672239A CN117666294A CN 117666294 A CN117666294 A CN 117666294A CN 202311672239 A CN202311672239 A CN 202311672239A CN 117666294 A CN117666294 A CN 117666294A
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China
Prior art keywords
wafer
deviation
data
center
actual
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CN202311672239.9A
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Chinese (zh)
Inventor
魏猛
张爽
赵希晨
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Shenyang Tdsemi Co ltd
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Shenyang Tdsemi Co ltd
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Priority to CN202311672239.9A priority Critical patent/CN117666294A/en
Publication of CN117666294A publication Critical patent/CN117666294A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691—Handling of masks or workpieces
    • G03F7/70716—Stages
    • G03F7/70725—Stages control
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691—Handling of masks or workpieces
    • G03F7/70775—Position control, e.g. interferometers or encoders for determining the stage position
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

The application relates to the technical field of process optimization, and provides a photoetching process optimization method and system for a wafer. The method comprises the following steps: placing a wafer on a rotary platform, and acquiring actual position data of the wafer through a laser sensor; according to the preset ultraviolet lens center, combining the actual position data of the wafer to obtain actual offset data of the wafer; adjusting the position of the wafer according to the actual offset data of the wafer by the moving module to obtain wafer adjustment data; performing position comparison of the center of the preset ultraviolet lens on the wafer adjustment data according to a wafer correction formula to obtain comparison deviation; and feeding back the comparison deviation to carry out deviation correction, and starting the rotary platform to execute exposure of the photoetching process. The method solves the technical problems that in the prior art, the edging time is long, the solvent consumable cost is high, the photoresist trimming is irregular, the wafer defect is caused to influence the process yield, and the technical effects of improving the production efficiency and reducing the device cost are achieved.

Description

Photoetching process optimization method and system for wafer
Technical Field
The present disclosure relates to the field of process optimization, and in particular, to a method and a system for optimizing a photolithography process for a wafer.
Background
During the photolithography process, photoresist is spin coated on the wafer surface, above and below the wafer boundary
The surface is provided with photoresist accumulation; during the subsequent etching or ion implantation process, the photoresist accumulated on the wafer boundary is likely to collide with the mechanical operating arm of the wafer, thereby causing particle pollution; in the prior art, a conventional chemical edge removal method is to remove the photoresist on the edge of a wafer by spraying a solvent onto the edge of the wafer during the photoresist coating process. The method has the defects of long edge removing time, high solvent consumable cost and irregular photoresist edge cutting, and can cause wafer defects to influence the process yield
In summary, the prior art has the problems of long edge removing time, high solvent consumption cost, irregular photoresist edge cutting, and wafer defects affecting the process yield.
Disclosure of Invention
Accordingly, it is desirable to provide a photolithography process optimization method and system for wafers that can improve the production efficiency and reduce the device cost.
In a first aspect, the present application provides a lithographic process optimization method for a wafer, the method comprising: placing a wafer on a rotary platform, and acquiring actual position data of the wafer through a laser sensor; according to the preset ultraviolet lens center, combining the actual position data of the wafer to obtain actual offset data of the wafer; adjusting the position of the wafer according to the actual offset data of the wafer by the moving module to obtain wafer adjustment data; performing position comparison of the center of the preset ultraviolet lens on the wafer adjustment data according to a wafer correction formula to obtain comparison deviation; and feeding back the comparison deviation to carry out deviation correction, and starting the rotary platform to execute exposure of the photoetching process.
In a second aspect, the present application provides a lithographic process optimization system for a wafer, the system comprising: the wafer actual position data acquisition module is used for placing the wafer on the rotary platform and acquiring the wafer actual position data through the laser sensor; the wafer actual offset data acquisition module is used for acquiring wafer actual offset data according to the preset ultraviolet lens center and combining the wafer actual position data; the wafer adjustment data acquisition module is used for adjusting the position of the wafer according to the actual deviation data of the wafer through the moving module to acquire wafer adjustment data; the comparison deviation obtaining module is used for comparing the positions of the centers of the preset ultraviolet lenses with the wafer adjustment data according to a wafer correction formula to obtain comparison deviation; and the deviation correction module is used for feeding back the comparison deviation to carry out deviation correction and starting the rotary platform to execute exposure of the photoetching process.
One or more technical solutions provided in the present application have at least the following technical effects or advantages:
firstly, placing a wafer on a rotary platform, and acquiring actual position data of the wafer through a laser sensor; secondly, according to the preset ultraviolet lens center, combining the actual position data of the wafer to obtain actual offset data of the wafer; then, the position of the wafer is adjusted according to the actual offset data of the wafer through the moving module, and wafer adjustment data are obtained; then, according to a wafer correction formula, carrying out position comparison on the wafer adjustment data by the center of the preset ultraviolet lens to obtain comparison deviation; and finally, feeding back the comparison deviation to carry out deviation correction, and starting the rotary platform to execute exposure of the photoetching process. The method solves the technical problems that in the prior art, the edging time is long, the solvent consumable cost is high, the photoresist trimming is irregular, the wafer defect is caused to influence the process yield, and the technical effects of improving the production efficiency and reducing the device cost are achieved.
The foregoing description is merely an overview of the technical solutions of the present application, and may be implemented according to the content of the specification in order to make the technical means of the present application more clearly understood, and in order to make the above-mentioned and other objects, features and advantages of the present application more clearly understood, the following detailed description of the present application will be given.
Drawings
FIG. 1 is a flow diagram of a method for optimizing a lithographic process for a wafer in one embodiment;
FIG. 2 is a schematic flow chart of a photolithography process optimization method for a wafer according to an embodiment, wherein if the determination result is satisfied, the rotation stage is started to rotate;
FIG. 3 is a block diagram of a photolithography process optimization system for a wafer in one embodiment.
Reference numerals illustrate: the device comprises a wafer actual position data obtaining module 11, a wafer actual offset data obtaining module 12, a wafer adjustment data obtaining module, a comparison deviation obtaining module 14 and a deviation correcting module 15.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
As shown in fig. 1, the present application provides a method for optimizing a photolithography process for a wafer, wherein the method includes:
placing a wafer on a rotary platform, and acquiring actual position data of the wafer through a laser sensor;
the wafer refers to a silicon wafer used for manufacturing a silicon semiconductor circuit, the original material is silicon, high-purity polycrystalline silicon is dissolved and then is doped with silicon crystal seeds, then the silicon crystal seeds are slowly pulled out to form cylindrical monocrystalline silicon, and a silicon wafer, namely the wafer, is formed after a silicon crystal rod is ground, polished and sliced; the photoetching process is the most commonly used process in the manufacture of compound semiconductor devices, and is also one of the most critical processes; the pattern on the mask plate is transferred to the photoresist pattern on the surface of the substrate, and the general photoetching process flow comprises pretreatment, photoresist homogenizing, pre-baking, alignment exposure, development and post-baking, and the operation in the flow can be adjusted according to actual conditions; the photoetching process of the wafer is optimized, so that the shape and the size of the formed pattern of the wafer can be accurately controlled, and the generation of particle pollution is reduced. The technical effects of improving the production efficiency and reducing the cost of the device are achieved.
The wafer refers to a silicon wafer used for manufacturing a silicon semiconductor circuit, and particularly refers to a wafer which needs to be processed in the application; the rotating platform is a device for processing the wafer and is used for centering and orienting the silicon wafer by the edge exposure unit and matching with the edge exposure wafer prealignment unit; the laser sensor is a sensor for measuring by utilizing a laser technology and consists of a laser, a laser detector and a measuring circuit; the laser sensor is a novel measuring instrument, and has the advantages of capability of realizing non-contact remote measurement, high speed, high precision, large measuring range, strong light resistance, strong electric interference resistance and the like.
According to the preset ultraviolet lens center, combining the actual position data of the wafer to obtain actual offset data of the wafer;
the center of the ultraviolet lens is the center point of the ultraviolet exposure lens set by a worker, the wafer is placed on the rotating platform, the center point of the wafer is obtained according to the actual position data of the wafer, and then the distance difference between the center point of the wafer and the center point of the ultraviolet lens is obtained according to the center point of the wafer and the preset center of the ultraviolet lens, so that a cushion is provided for obtaining center offset data subsequently.
Acquiring the actual position data of the wafer, wherein the actual position data comprises the actual position of the center of the wafer;
and obtaining center offset data according to center comparison of the preset ultraviolet lens center and the actual position of the wafer center, wherein the center offset data comprises X-direction offset data and Y-direction offset data.
The actual position of the wafer center refers to the actual position of the center point of the wafer, and because the wafer itself has the requirement on cleanliness, an auxiliary line cannot be added to find the center point of the wafer, so that the actual position data of the wafer is obtained according to the laser sensor, and the actual position data of the wafer comprises the actual position of the wafer center; and (3) according to the center comparison of the preset ultraviolet lens center and the actual position of the wafer center, namely, according to the distance difference between the center point of the ultraviolet lens and the actual position of the wafer center, a plane rectangular coordinate system is established, the center point of the ultraviolet lens is marked as (0, 0), the actual position of the wafer center is (-3, -4), and the center offset data are the offset data in the X direction and the offset data in the Y direction are-3 and-4. And obtaining center offset data through center comparison of the preset ultraviolet lens center and the actual position of the wafer center, and providing data support for subsequent adjustment of the wafer position.
Adjusting the position of the wafer according to the actual offset data of the wafer by the moving module to obtain wafer adjustment data;
the moving module is a module for controlling the movement of the wafer; and moving the wafer according to the actual deviation data of the wafer, and adjusting the position of the wafer to enable the actual position of the center of the wafer to coincide with the center of the preset ultraviolet lens, so as to obtain wafer adjustment data. And by acquiring the wafer adjustment data, the actual position of the center of the wafer is overlapped with the center of the preset ultraviolet lens, so that a blanket is provided for wafer edge exposure.
Carrying out wafer position adjustment on the X-direction offset data through an X-direction moving module of the moving module;
carrying out wafer position adjustment on the Y-direction offset data through a Y-direction moving module of the moving module;
and combining the X-direction adjustment data and the Y-direction adjustment data of the wafer to obtain the wafer adjustment data.
The wafer is moved 3 along the X-axis direction by adjusting the wafer position according to the X-direction offset data of the moving module, for example, according to the X-direction offset data of-3; and carrying out wafer position adjustment on the Y-direction offset data through a Y-direction moving module of the moving module, for example, if the Y-direction offset data is-4, moving the wafer along the Y-axis direction by 4, obtaining the wafer adjustment data according to the X-direction adjustment data and the Y-direction adjustment data of the wafer, and overlapping the actual position of the center of the wafer with the center of the preset ultraviolet lens, so that the wafer position adjustment device can be used for centering and orienting a silicon wafer by an edge exposure unit and matching with an edge exposure wafer prealignment unit, and the device cost is reduced.
The wafer calibration formula is shown as follows:
wherein d is the comparison deviation, X is the X-direction adjustment data, Y is the Y-direction adjustment data, a is the position of the center of the preset ultraviolet lens in the X direction, and b is the position of the center of the preset ultraviolet lens in the Y direction.
The wafer correction formula is to calculate the distance between the preset ultraviolet lens center and the actual position of the wafer center according to the coordinates of the preset ultraviolet lens center and the actual position of the wafer center, wherein X is the X-direction adjustment data, Y is the Y-direction adjustment data, the position of the preset ultraviolet lens center in the X direction is the position of the preset ultraviolet lens center in the Y direction, and d is the distance between the preset ultraviolet lens center and the actual position of the wafer center. By obtaining the wafer correction formula, a foundation is provided for subsequent acquisition of comparison deviation.
Performing position comparison of the center of the preset ultraviolet lens on the wafer adjustment data according to a wafer correction formula to obtain comparison deviation;
deviation is commonly used in statistics to determine whether a measured value is bad, and precision is the degree of coincidence between multiple parallel measurements of a sample, expressed as deviation. The smaller the deviation is, the higher the precision of the measurement result is; and comparing the positions of the centers of the preset ultraviolet lenses according to the wafer adjustment data according to a wafer correction formula to obtain a deviation value of the position distance between the wafer adjustment data and the preset ultraviolet lens, correcting the deviation of the wafer according to the comparison deviation, and providing a cushion for optimizing the subsequent photoetching process.
And feeding back the comparison deviation to carry out deviation correction, and starting the rotary platform to execute exposure of the photoetching process.
The comparison deviation is sent to a control center for deviation correction, and when the center position of the wafer is subjected to deviation correction, the rotary platform can be started to execute exposure of a photoetching process; compared with the chemical trimming method, the wafer edge exposure method has the advantages of high production efficiency, low device cost, easy control of the process, regular and smooth trimming shape and the like.
As shown in fig. 2, extracting the comparison deviation for feedback, and performing deviation correction on the comparison deviation to obtain a correction deviation result;
judging whether the correction deviation result meets a preset deviation threshold value or not, and obtaining a judgment result;
and if the judging result is satisfied, starting the rotating platform to rotate.
The preset deviation threshold is set by a worker and is used for judging whether the comparison deviation accords with the preset deviation threshold, when the comparison deviation is smaller than the preset deviation threshold, the distance between the preset ultraviolet lens center and the actual position of the wafer center is negligible, and the fact that the preset ultraviolet lens center coincides with the actual position of the wafer center is judged, so that wafer edge exposure can be performed. And feeding back the comparison deviation, carrying out deviation correction on the comparison deviation to obtain a correction deviation result, namely obtaining the distance between the preset ultraviolet lens center and the actual position of the wafer center, setting a preset deviation threshold, judging whether the correction deviation result meets the preset deviation threshold according to the correction deviation result and the preset deviation threshold, and if the judgment result is met, starting the rotating platform to rotate to expose the wafer.
If the judgment result is not satisfied, carrying out iterative deviation correction on the correction deviation result to obtain an iterative correction deviation result;
and starting the rotating platform to rotate until the iterative correction deviation result meets the preset deviation threshold value.
If the correction deviation result does not meet the preset deviation threshold, judging that the actual positions of the preset ultraviolet lens center and the wafer center are not coincident, moving the wafer again according to the correction deviation result, repeating the operation until the correction deviation result meets the preset deviation threshold, judging that the preset ultraviolet lens center and the actual position of the wafer center are coincident, then starting the rotating platform to rotate, and rotating according to the rotating platform to expose the wafer. The method solves the technical problems that in the prior art, the edging time is long, the solvent consumable cost is high, the photoresist trimming is irregular, the wafer defect is caused to influence the process yield, and the technical effects of improving the production efficiency and reducing the device cost are achieved.
As shown in fig. 3, embodiments of the present application further provide a photolithography process optimization system for a wafer, the system comprising:
the wafer actual position data obtaining module 11, wherein the wafer actual position data obtaining module 11 is used for placing a wafer on a rotating platform and acquiring wafer actual position data through a laser sensor;
the wafer actual offset data obtaining module 12, wherein the wafer actual offset data obtaining module 12 is configured to obtain wafer actual offset data according to a preset ultraviolet lens center and in combination with the wafer actual position data;
the wafer adjustment data obtaining module 13, wherein the wafer adjustment data obtaining module 13 is used for obtaining wafer adjustment data by moving a module and adjusting the position of the wafer according to the actual wafer offset data;
the comparison deviation obtaining module 14 is configured to perform position comparison of the center of the preset ultraviolet lens on the wafer adjustment data according to a wafer calibration formula, so as to obtain a comparison deviation;
and the deviation correcting module 15 is used for feeding back the comparison deviation to correct the deviation, and starting the rotary platform to execute exposure of the photoetching process.
Further, the embodiment of the application further comprises:
the wafer center position obtaining module is used for acquiring and obtaining the actual position data of the wafer, including the actual position of the wafer center;
the center offset data acquisition module is used for acquiring center offset data according to center comparison of the preset ultraviolet lens center and the actual position of the wafer center, wherein the center offset data comprise X-direction offset data and Y-direction offset data.
Further, the embodiment of the application further comprises:
the wafer position adjusting module is used for adjusting the wafer position of the X-direction offset data through the X-direction moving module of the moving module;
the offset data adjusting module is used for adjusting the position of the wafer according to the Y-direction offset data through the Y-direction moving module of the moving module;
and the adjustment data combination module is used for combining the X-direction adjustment data and the Y-direction adjustment data of the wafer to obtain the wafer adjustment data.
Further, the embodiment of the application further comprises:
the wafer correction formula module is used for displaying the wafer correction formula as follows:
wherein d is the comparison deviation, X is the X-direction adjustment data, Y is the Y-direction adjustment data, a is the position of the center of the preset ultraviolet lens in the X direction, and b is the position of the center of the preset ultraviolet lens in the Y direction.
Further, the embodiment of the application further comprises:
the correction deviation result obtaining module is used for extracting the comparison deviation and feeding back the comparison deviation, and carrying out deviation correction on the comparison deviation to obtain a correction deviation result;
the judging result obtaining module is used for judging whether the correction deviation result meets a preset deviation threshold value or not to obtain a judging result;
and the rotating platform starting module is used for starting the rotating platform to rotate if the judging result is met.
Further, the embodiment of the application further comprises:
the iterative correction deviation result obtaining module is used for carrying out iterative deviation correction on the correction deviation result if the judgment result is not met, so as to obtain an iterative correction deviation result;
the preset deviation threshold value meeting module is used for starting the rotating platform to rotate until the iteration correction deviation result meets the preset deviation threshold value.
For specific embodiments of the photolithography process optimization system for a wafer, reference may be made to the above embodiments of the photolithography process optimization method for a wafer, and no further description is given here. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples merely represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the invention. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.

Claims (7)

1. A method for optimizing a lithographic process for a wafer, the method comprising:
placing a wafer on a rotary platform, and acquiring actual position data of the wafer through a laser sensor;
according to the preset ultraviolet lens center, combining the actual position data of the wafer to obtain actual offset data of the wafer;
adjusting the position of the wafer according to the actual offset data of the wafer by the moving module to obtain wafer adjustment data;
performing position comparison of the center of the preset ultraviolet lens on the wafer adjustment data according to a wafer correction formula to obtain comparison deviation;
and feeding back the comparison deviation to carry out deviation correction, and starting the rotary platform to execute exposure of the photoetching process.
2. The method of claim 1, wherein the obtaining the actual wafer offset data based on the predetermined ultraviolet lens center in combination with the actual wafer position data comprises:
acquiring the actual position data of the wafer, wherein the actual position data comprises the actual position of the center of the wafer;
and obtaining center offset data according to center comparison of the preset ultraviolet lens center and the actual position of the wafer center, wherein the center offset data comprises X-direction offset data and Y-direction offset data.
3. The method of claim 2, wherein the wafer adjustment data is obtained by moving the module to adjust the wafer position based on the actual wafer offset data, the method comprising:
carrying out wafer position adjustment on the X-direction offset data through an X-direction moving module of the moving module;
carrying out wafer position adjustment on the Y-direction offset data through a Y-direction moving module of the moving module;
and combining the X-direction adjustment data and the Y-direction adjustment data of the wafer to obtain the wafer adjustment data.
4. A method as claimed in claim 3, wherein the method further comprises:
the wafer calibration formula is shown as follows:
wherein d is the comparison deviation, X is the X-direction adjustment data, Y is the Y-direction adjustment data, a is the position of the center of the preset ultraviolet lens in the X direction, and b is the position of the center of the preset ultraviolet lens in the Y direction.
5. The method of claim 4, wherein the feeding back the alignment bias performs bias correction, and wherein the rotating stage is activated to perform exposure of the lithographic process, the method comprising:
extracting the comparison deviation for feedback, and carrying out deviation correction on the comparison deviation to obtain a correction deviation result;
judging whether the correction deviation result meets a preset deviation threshold value or not, and obtaining a judgment result;
and if the judging result is satisfied, starting the rotating platform to rotate.
6. The method of claim 5, wherein the method further comprises:
if the judgment result is not satisfied, carrying out iterative deviation correction on the correction deviation result to obtain an iterative correction deviation result;
and starting the rotating platform to rotate until the iterative correction deviation result meets the preset deviation threshold value.
7. A lithographic process optimization system for a wafer, the system comprising:
the wafer actual position data acquisition module is used for placing the wafer on the rotary platform and acquiring the wafer actual position data through the laser sensor;
the wafer actual offset data acquisition module is used for acquiring wafer actual offset data according to the preset ultraviolet lens center and combining the wafer actual position data;
the wafer adjustment data acquisition module is used for adjusting the position of the wafer according to the actual deviation data of the wafer through the moving module to acquire wafer adjustment data;
the comparison deviation obtaining module is used for comparing the positions of the centers of the preset ultraviolet lenses with the wafer adjustment data according to a wafer correction formula to obtain comparison deviation;
and the deviation correction module is used for feeding back the comparison deviation to carry out deviation correction and starting the rotary platform to execute exposure of the photoetching process.
CN202311672239.9A 2023-12-07 2023-12-07 Photoetching process optimization method and system for wafer Pending CN117666294A (en)

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CN117885958A (en) * 2024-03-15 2024-04-16 江苏福旭科技有限公司 Monocrystalline silicon stacking system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117885958A (en) * 2024-03-15 2024-04-16 江苏福旭科技有限公司 Monocrystalline silicon stacking system
CN117885958B (en) * 2024-03-15 2024-06-11 江苏福旭科技有限公司 Monocrystalline silicon stacking system

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