CN117650493B - Hot plug protection circuit for main board - Google Patents
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- CN117650493B CN117650493B CN202410127082.XA CN202410127082A CN117650493B CN 117650493 B CN117650493 B CN 117650493B CN 202410127082 A CN202410127082 A CN 202410127082A CN 117650493 B CN117650493 B CN 117650493B
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Abstract
The invention discloses a hot plug protection circuit of a main board, which comprises a sampling unit, a regulating unit and an output unit, wherein the sampling unit is connected with the regulating unit, and the regulating unit is connected with the output unit; the sampling unit is used for collecting current for board plugging, setting an initial constant signal and a variable signal of the regulation and control unit at the same time, and converting the variable signal into a protection signal to drive the regulation and control unit to regulate; the regulation and control unit sets a regulation and control interval based on the variable signal, sets an output threshold based on the initial constant signal, and outputs a pulse signal to the output unit, and the output unit performs current regulation.
Description
Technical Field
The invention relates to the technical field of power supply circuits, in particular to a hot plug protection circuit for a main board.
Background
The existing hot plug protection generally prevents noise and peak occurring in the plug process by adding a delay circuit at the front end of a circuit, but the protection is completed by judging the current magnitude in the mode, and when the current is in the protection period, noise interference is still caused by closing the current again after passing through an element loop, the detection precision is reduced, and the current can continue to be in the loop in the protection process, so that effective supply current cannot be provided.
Disclosure of Invention
Aiming at the technical problems, the invention aims to provide a hot plug protection circuit for a main board, which comprises a sampling unit, a regulating unit and an output unit, wherein the sampling unit is connected with the regulating unit, and the regulating unit is connected with the output unit; the sampling unit is used for collecting current for board plugging, setting an initial constant signal and a variable signal of the regulation and control unit, and converting the variable signal into a protection signal to drive the regulation and control unit to regulate; the regulation and control unit sets a regulation and control interval based on the variable signal, sets an output threshold based on the initial constant signal, and outputs a pulse signal to the output unit, and the output unit performs current regulation.
Further, the regulating unit comprises a first operational amplifier U1, a second operational amplifier U2, a third operational amplifier U3, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first triode Q1, a second triode Q2, a third triode Q3, a fourth triode Q4, a fifth MOS transistor Q5, a sixth triode Q6, a first capacitor C1 and a second capacitor C2, wherein the output end of the first operational amplifier U1 is connected with the base of the first triode Q1, the emitter of the first triode Q1 is connected with the output end of the second operational amplifier U2, one end of the first resistor R1, the base of the second triode Q2, the base of the third triode Q3, the collector of the second triode Q2 is connected with the emitter of the third triode Q3, the collector of the fourth triode Q4, the grid of the fifth MOS transistor Q5 and one end of the second resistor R2, the base electrode of the fourth triode Q4 is connected with one end of a third resistor R3, the other end of the third resistor R3 is connected with one end of the fourth resistor R4 and the drain electrode of a fifth MOS tube Q5, the other end of the fourth resistor R4 is connected with one end of a third triode Q3 collector electrode, a second triode Q2 emitter electrode, one end of a second capacitor C2 and the inverting end of a third operational amplifier U3, the output end of the third operational amplifier U3 is connected with the base electrode of a sixth triode Q6, the emitter electrode of the sixth triode Q6 is connected with one end of the fifth resistor R5, the other end of the fifth resistor R5 is connected with one end of the sixth resistor R6, one end of the first capacitor C1, the inverting end of the second operational amplifier U2 and the same-phase end of the first operational amplifier U1, the collector electrode of the fourth triode Q4, the sixth triode Q6 collector electrode is connected with a power supply, the inverting end of the first operational amplifier U1, the second operational amplifier U2 and the same-phase end of the third operational amplifier U3 are connected with a sampling unit, the inverting terminal of the first operational amplifier U1 and the non-inverting terminal of the second operational amplifier U2 are used for receiving variable signals, the non-inverting terminal of the third operational amplifier U3 is used for receiving constant signals, and the other end of the first capacitor C1, the other end of the first resistor R1, the other end of the second resistor R2, the source electrode of the fifth MOS tube Q5, the other end of the second capacitor C2, the other end of the sixth resistor R6 and the grounding terminal are connected.
Further, the sampling unit includes a fourth sampling chip U4, a fifth operational amplifier U5, a sixth signal source U6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth potentiometer R14, and a seventh triode Q7, one end of the seventh resistor R7 is connected with one end of the eighth resistor R8, the other end of the eighth resistor R8 is connected with one end of the ninth resistor R9, the ninth resistor R9 and the seventh resistor R7 are used for inputting variable signals to the modulation unit, the other end of the ninth resistor R9 is connected with one end of the tenth resistor R10 and the emitter of the seventh triode Q7, the other end of the tenth resistor R10 is connected with the IP+ pin of the fourth sampling chip U4, the VIOUT pin of the fourth sampling chip U4 is connected with one end of the eleventh resistor R11, the inverting end of the fifth operational amplifier U5, the fourth sampling chip U4 is used for converting variable signals into protection signals and inputting the protection signals to the inverting terminal of the fifth operational amplifier U5, the output terminal of the fifth operational amplifier U5 is connected with the base electrode of the seventh triode Q7, one end of the thirteenth resistor R13 and one end of the fourteenth potentiometer R14, the in-phase terminal of the fifth operational amplifier U5 is connected with one end of the twelfth resistor R12 and the VOUT pin of the sixth signal source U6, the VIN+ pin of the sixth signal source U6, the collector electrode of the seventh triode Q7, the VCC pin of the fourth sampling chip U4, the other end of the thirteenth resistor R13 and the power supply are connected, the GND pin of the sixth signal source U6, the SEL pin, the other end of the twelfth resistor R12, the other end of the eleventh resistor R11, the GND pin of the fourth sampling chip U4, the other end of the seventh resistor R7, the tap end of the fourteenth potentiometer R14 and the other end of the fourteenth potentiometer R14 are connected with the ground, the sixth signal source U6 and the twelfth resistor R12 are used for inputting constant signals to the regulation unit.
Further, the output unit includes eighth MOS pipe Q8, third electric capacity C3, first diode D1, first inductance L1, first link P1, second link P2, the output of first operational amplifier U1 in eighth MOS pipe Q8 grid and the regulation and control unit is connected for receiving pulse signal, eighth MOS pipe Q8 drain electrode and power connection, eighth MOS pipe Q8 source electrode and first inductance L1 one end, first diode D1 negative pole are connected, first inductance L1 other end and first link P1, third electric capacity C3 one end are connected, the third electric capacity C3 other end, first diode D1 positive pole, second link P2 and ground connection, first link P1 and second link P2 are the power supply.
Further, the sampling unit further includes a fourth capacitor C4, one end of the fourth capacitor C4 is connected to the TEMP pin of the sixth signal source U6, and the other end of the fourth capacitor C4 is connected to the ground terminal.
Further, the regulation and control unit further comprises a fifteenth resistor R15, one end of the fifteenth resistor R15 is connected with the inverting terminal of the third operational amplifier U3, and the other end of the fifteenth resistor R15 is connected with the grounding terminal.
Further, the device also comprises a delay unit, wherein the delay unit is connected in series between the sampling unit and the power supply.
Compared with the prior art, the invention has the beneficial effects that:
the hot plug protection is carried out through the pulse signal, the hot plug protection device has the functions of equal ratio output and bandwidth following, can prevent the stability influence caused by noise interference, can limit the protection function to be started under the condition of low power supply current, can automatically protect the high power supply current and the peak current in the plug process, and can provide safe maximum power supply current in the period.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following description will briefly explain the drawings needed in the prior art and the embodiments, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is an overall structure diagram provided by the present invention.
Fig. 2 is a circuit configuration diagram provided by the present invention.
Detailed Description
In order that the objects and advantages of the invention will become more readily apparent, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings, it being understood that the following text is only intended to describe one or more specific embodiments of the invention and is not intended to limit the scope of the invention as defined in the appended claims.
The sampling unit is used for collecting current in board plugging, but considering that protection is finished only by collecting the current and a controller adjusting area cannot be controlled, the initial constant signal and the variable signal are set for the adjusting and controlling unit at the same time of collecting, the variable signal is converted into the protection signal to be adjusted in the driving adjusting and controlling unit, the protection function is limited to be started under the condition that the power supply is in low power supply current, the peak current appearing in the high power supply current and plugging process is automatically adjusted and protected, the constant signal of the sampling unit is used as the common output threshold value of the sampling unit and the adjusting unit, the output threshold value table of the sampling unit is whether the current sampled at present exceeds the protection area, the threshold value of the adjusting unit is judged whether the sampled current is in the adjusting and controlling unit, so that the adjusting and controlling unit can control the output frequency and the bandwidth of the pulse signal according to the variable signal, namely the frequency and the bandwidth of the pulse signal are enabled to be changed along with the sampling current, noise interference is prevented, stability is increased, and the adjusting and controlling unit can finish current limiting when the signal is input to the output unit.
In the sampling unit, the sixth signal source U6 is configured to set a constant signal, the signal is fed back to the in-phase end of the fifth operational amplifier U5 through the sixth pin, the inverting end of the fifth operational amplifier U5 is connected to the VIOUT pin of the fourth sampling chip U4, and is converted into a voltage signal through the eleventh resistor R11, when the power supply current is low, the fifth operational amplifier U5 does not output, the seventh triode Q7 is biased through the thirteenth resistor R13 and the fourteenth potentiometer R14 and then is input to the ninth resistor R9, the eighth resistor R8 and the seventh resistor R7 to be divided, because the thirteenth resistor R13 and the fourteenth potentiometer R14 are used to remove the distortion area of the seventh triode Q7, the differential pressure between the connection ends of the eighth resistor R8 and the ninth resistor R9 and the connection ends of the eighth resistor R8 and the seventh resistor R7 is low, at this time, when the fifth operational amplifier U5 does not output, the voltage difference is fixed without current limitation, when the peak is coming, the current enters an amplifying state through a thirteenth resistor R13 and a fourteenth potentiometer R14, the emitter of the seventh triode Q7 is fed back to the inverting end of the fifth operational amplifier U5 through a tenth resistor R10 and a fourth sampling chip U4, the fifth operational amplifier U5 outputs, the seventh triode Q7 enters a saturated state, the emitter current of the seventh triode Q7 is determined by the collector and the base thereof, the base current is fixed, the voltage difference between the ends of the ninth resistor R9 and the seventh resistor R7 is increased to the maximum, the regulating unit limits the current based on the voltage difference, when the current gradually falls back, the voltage difference between the ends of the ninth resistor R9 and the seventh resistor R7 gradually decreases until the fifth operational amplifier U5 does not output any more, a loop is formed, the protection range can be enlarged or reduced by regulating the fourteenth potentiometer R14 at this time, the current can normally change in the non-protection range, that is to say, when the power supply current is low, the voltage difference between the connecting ends of the eighth resistor R8 and the ninth resistor R9 and the connecting ends of the eighth resistor R8 and the seventh resistor R7 is low and approaches to be fixed, and when the power supply current is high, the voltage difference between the connecting ends of the eighth resistor R8 and the ninth resistor R9 and the connecting ends of the eighth resistor R8 and the seventh resistor R7 is maximum, and the safe maximum power supply current is still provided in the protection range, and when the power supply current is lower than the maximum power supply current, the voltage difference gradually decreases, and the current normally changes.
In the regulation unit, the inverting terminal of the first operational amplifier U1 receives signals of the connecting ends of the eighth resistor R8 and the ninth resistor R9, the non-inverting terminal of the second operational amplifier U2 receives voltage signals of the connecting ends of the eighth resistor R8 and the seventh resistor R7, one path of the signals of the first operational amplifier U1 is connected with the output of the second operational amplifier U2 in parallel through the first triode Q1, the output of the second operational amplifier U2 is in an initial state, the third triode Q3 and the second triode Q2 are cut off, the emitter signal of the fourth triode Q4 is fed back to the second capacitor C2 through the base, the third resistor R3 and the fourth resistor R4, the fourth triode Q4 is conducted, the potential of the second capacitor C2 is pulled up, the signal after the fourth triode Q4 is conducted is fed back to the grid of the fifth MOS tube Q5 through the collector, the fifth MOS tube Q5 is conducted, the potential of the second capacitor C2 is then pulled down through the fourth resistor R4 and the fifth MOS tube Q5, at this time, the third operational amplifier U3 outputs a signal to turn on the sixth transistor Q6, the signal is input to the first capacitor C1 through the fifth resistor R5, the second operational amplifier U2 is turned off, the second transistor Q2 and the third transistor Q3 are turned on to pull up the second capacitor C2 again but lower than the voltage difference from the gate to the drain of the fifth MOS transistor Q5, the fifth MOS transistor Q5 is continuously turned on, when the potential rises to the first operational amplifier U1, the first transistor Q1 is turned on, the second transistor Q2 and the third transistor Q3 are turned off again, at this time, the potential of the second capacitor C2 is reduced by the fourth resistor R4 and the fifth MOS transistor Q5 loop, the current of the collector of the fourth transistor Q4 is reduced, the gate to the drain of the fifth MOS transistor Q5 is lower than the positive voltage difference of the conduction, the potential of the fifth MOS transistor Q5 is turned off, the second capacitor C2 is turned on to the highest, the third operational amplifier U3 is turned off, when the voltage difference changes, when the inverting terminal of the first operational amplifier U1 and the non-inverting terminal of the second operational amplifier U2 change, the frequency of the output of the first operational amplifier U1 and the frequency of the output of the second operational amplifier U2 change in equal ratio, and the output frequency changes based on the voltage difference between the connection end of the eighth resistor R8 and the ninth resistor R9 and the connection end of the eighth resistor R8 and the seventh resistor R7, namely, the lower the output frequency of the first operational amplifier U1 and the second operational amplifier U2 is, the larger the bandwidth is, and the smaller the bandwidth is, when the frequency is higher, the current limiting protection is completed by feeding back the signal output by the first operational amplifier U1 to the output unit.
In the output unit, the eighth MOS transistor Q8 is configured to receive the pulse signal output by the first operational amplifier U1, where the eighth MOS transistor Q8 is turned on when the first operational amplifier U1 outputs the pulse signal, the signal is fed back to the third capacitor C3 and the first connection terminal P1 through the first inductor L1, when the first operational amplifier U1 does not output the pulse signal, the first triode Q1 is turned off, the connection terminal of the first inductor L1 and the eighth MOS transistor Q8 is turned into a negative potential, and the first diode D1 freewheels and inputs the pulse signal to the first connection terminal P1 through the first inductor L1 and the first capacitor C1, thereby completing current limiting.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (5)
1. The hot plug protection circuit for the main board is characterized by comprising a sampling unit, a regulating unit and an output unit, wherein the sampling unit is connected with the regulating unit, and the regulating unit is connected with the output unit; the sampling unit is used for collecting current for board plugging, setting an initial constant signal and a variable signal of the regulation and control unit, and converting the variable signal into a protection signal to drive the regulation and control unit to regulate; the regulation and control unit sets a regulation and control interval based on the variable signal, sets an output threshold based on the initial constant signal, outputs a pulse signal to the output unit, and the output unit carries out current regulation;
the regulating unit comprises a first operational amplifier, a second operational amplifier, a third operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first triode, a second triode, a third triode, a fourth triode, a fifth MOS tube, a sixth triode, a first capacitor and a second capacitor, wherein the output end of the first operational amplifier is connected with the base electrode of the first triode, the emitting electrode of the first triode is connected with the output end of the second operational amplifier, one end of the first resistor, the base electrode of the second triode and the base electrode of the third triode are connected, the collecting electrode of the second triode is connected with the emitting electrode of the third triode, the collecting electrode of the fourth triode, the grid electrode of the fifth MOS tube and one end of the second resistor are connected, the base electrode of the fourth triode is connected with one end of the third resistor, the other end of the third resistor is connected with one end of the fourth resistor and the drain electrode of the fifth MOS tube, the other end of the fourth resistor is connected with the collector of the third triode, the emitter of the second triode, one end of the second capacitor and the inverting end of the third operational amplifier, the output end of the third operational amplifier is connected with the base of the sixth triode, the emitter of the sixth triode is connected with one end of the fifth resistor, the other end of the fifth resistor is connected with one end of the sixth resistor, one end of the first capacitor, the inverting end of the second operational amplifier and the non-inverting end of the first operational amplifier, the collector of the first triode, the emitter of the fourth triode, the collector of the sixth triode are connected with a power supply, the inverting end of the first operational amplifier, the non-inverting end of the second operational amplifier, the non-inverting end of the third operational amplifier and the sampling unit are connected, the inverting end of the first operational amplifier and the non-inverting end of the second operational amplifier are used for receiving variable signals, the non-inverting end of the third operational amplifier is used for receiving constant signals, the other end of the first capacitor, the other end of the first resistor, the other end of the second resistor, the source electrode of the fifth MOS tube, the other end of the second capacitor and the other end of the sixth resistor are connected with the grounding end;
the sampling unit comprises a fourth sampling chip, a fifth operational amplifier, a sixth signal source, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth potentiometer and a seventh triode, wherein one end of the seventh resistor is connected with one end of the eighth resistor, the other end of the eighth resistor is connected with one end of the ninth resistor, the ninth resistor and the seventh resistor are used for inputting variable signals to the regulation and control unit, the other end of the ninth resistor is connected with one end of the tenth resistor, an emitter of the seventh triode, the other end of the tenth resistor is connected with an IP+ input pin of the fourth sampling chip, a VIOUT output pin of the fourth sampling chip is connected with one end of the eleventh resistor and an inverting end of the fifth operational amplifier, the variable signals are converted into protection signals by the fourth sampling chip, the output end of the fifth operational amplifier is connected with a base of the seventh triode, one end of the thirteenth resistor, one end of the fourteenth potentiometer is connected with one end of the ninth resistor, the same phase end of the ninth resistor is connected with an output pin of the sixth signal source, the output pin of the VOUT signal source is connected with the output pin of the sixth signal source, the other end of the sixth signal source is connected with the other end of the power source, the power source is connected with the power source, and the power source is connected with the input end of the power source.
2. The motherboard hot plug protection circuit according to claim 1, wherein the output unit includes an eighth MOS transistor, a third capacitor, a first diode, a first inductor, a first connection end, and a second connection end, the gate of the eighth MOS transistor is connected to the output end of the first operational amplifier in the regulation unit, and is configured to receive a pulse signal, the drain of the eighth MOS transistor is connected to the power supply, the source of the eighth MOS transistor is connected to one end of the first inductor, the cathode of the first diode, the other end of the first inductor is connected to one end of the first connection end, the third capacitor is connected to one end of the third capacitor, the other end of the third capacitor, the anode of the first diode, the second connection end of the second connection end, and the ground end are power supply ends.
3. The hot plug protection circuit according to claim 1, wherein the sampling unit further comprises a fourth capacitor, one end of the fourth capacitor is connected to a TEMP pin of the sixth signal source, and the other end of the fourth capacitor is connected to a ground terminal.
4. The hot plug protection circuit according to claim 1, wherein the regulation unit further comprises a fifteenth resistor, one end of the fifteenth resistor is connected to the inverting terminal of the third operational amplifier, and the other end of the fifteenth resistor is connected to the ground terminal.
5. The motherboard hot plug protection circuit of claim 1 further comprising a delay unit, said delay unit being serially connected between the sampling unit and the power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410127082.XA CN117650493B (en) | 2024-01-30 | 2024-01-30 | Hot plug protection circuit for main board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410127082.XA CN117650493B (en) | 2024-01-30 | 2024-01-30 | Hot plug protection circuit for main board |
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| Publication Number | Publication Date |
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| CN117650493A CN117650493A (en) | 2024-03-05 |
| CN117650493B true CN117650493B (en) | 2024-04-05 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410127082.XA Active CN117650493B (en) | 2024-01-30 | 2024-01-30 | Hot plug protection circuit for main board |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6181030B1 (en) * | 1999-03-30 | 2001-01-30 | International Business Machines Corporation | Computer power supply system having switched remote voltage sensing and sense voltage averaging for hot pluggable adapter cards |
| CN1711665A (en) * | 2002-11-12 | 2005-12-21 | 半导体元件工业有限责任公司 | Integrated inrush current limiter circuit and method |
| CN103576000A (en) * | 2012-07-26 | 2014-02-12 | 鸿富锦精密工业（深圳）有限公司 | Inductance test circuit |
| CN106598189A (en) * | 2016-12-20 | 2017-04-26 | 郑州云海信息技术有限公司 | Hot plug power supply device, method and system |
| CN116643080A (en) * | 2023-05-11 | 2023-08-25 | 昆山迈致治具科技有限公司 | Pulse type direct current sampling and measuring device |
-
2024
- 2024-01-30 CN CN202410127082.XA patent/CN117650493B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6181030B1 (en) * | 1999-03-30 | 2001-01-30 | International Business Machines Corporation | Computer power supply system having switched remote voltage sensing and sense voltage averaging for hot pluggable adapter cards |
| CN1711665A (en) * | 2002-11-12 | 2005-12-21 | 半导体元件工业有限责任公司 | Integrated inrush current limiter circuit and method |
| CN103576000A (en) * | 2012-07-26 | 2014-02-12 | 鸿富锦精密工业（深圳）有限公司 | Inductance test circuit |
| CN106598189A (en) * | 2016-12-20 | 2017-04-26 | 郑州云海信息技术有限公司 | Hot plug power supply device, method and system |
| CN116643080A (en) * | 2023-05-11 | 2023-08-25 | 昆山迈致治具科技有限公司 | Pulse type direct current sampling and measuring device |
Non-Patent Citations (1)
| Title |
|---|
| 基于AT96总线的热插拔设计;伍巧凤等;《仪器仪表用户》;20190630;第26卷(第6期);第89-91页 * |
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