CN117641952A - Perovskite passivation method based on low-temperature process and laminated solar cell - Google Patents

Perovskite passivation method based on low-temperature process and laminated solar cell Download PDF

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CN117641952A
CN117641952A CN202311428279.9A CN202311428279A CN117641952A CN 117641952 A CN117641952 A CN 117641952A CN 202311428279 A CN202311428279 A CN 202311428279A CN 117641952 A CN117641952 A CN 117641952A
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perovskite
layer
passivation
preparing
transport layer
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段磊平
张瑜
易海芒
请求不公布姓名
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Shenzhen Heijing Optoelectronic Technology Co ltd
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Shenzhen Heijing Optoelectronic Technology Co ltd
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Abstract

The application provides a perovskite passivation method based on a low-temperature process and a laminated solar cell, which comprise the following steps: preparing a hole transport layer on the surface of the crystalline silicon bottom cell; preparing a perovskite absorption layer on the surface of the hole transport layer to prepare a perovskite film substrate; performing low-temperature cooling treatment on the perovskite film substrate; preparing a perovskite passivation layer on the surface of the perovskite film substrate; preparing an electron transport layer on the surface of the perovskite passivation layer; preparing a buffer layer on the surface of the electron transport layer; and preparing a perovskite electrode layer on the surface of the buffer layer. The perovskite film forming characteristics are not changed through low-temperature cooling treatment, and the high-quality perovskite film is reserved; the perovskite passivation layer can be prepared on the surface of the perovskite film substrate and the grain boundary in the perovskite film, and meanwhile, the interface passivation of the perovskite film layer with high quality and the passivation of the grain boundary in the perovskite film layer are finished, so that the photoelectric conversion efficiency and the stability of the laminated solar cell can be improved.

Description

Perovskite passivation method based on low-temperature process and laminated solar cell
Technical Field
The application belongs to the technical field of solar cells, and particularly relates to a perovskite passivation method based on a low-temperature process and a laminated solar cell.
Background
At present, the preparation technology of the crystalline silicon/perovskite laminated solar cell is to stack perovskite materials and crystalline silicon materials together to form a heterojunction, and the crystalline silicon/perovskite laminated solar cell with high photoelectric conversion efficiency is prepared by utilizing the wide band gap, high absorption coefficient and high carrier mobility of the perovskite materials, the stability and good electron transmission performance of the crystalline silicon materials.
However, in the crystalline silicon/perovskite stacked solar cell, the perovskite absorption layer is prone to surface or interface defects, which may cause a large amount of non-radiative recombination, resulting in a decrease in the photoelectric conversion efficiency and stability of the stacked solar cell. In the specific wide bandgap perovskite light absorbing layer required for stacked solar cells, the characteristic photo-induced phase separation phenomenon also promotes more defects in the thin film, thereby affecting efficiency and stability.
In order to solve the above problems, interface passivation is generally adopted, but most passivation methods are based on the upper surface or the lower surface of the perovskite film, and although the defects on the interface of the perovskite film and other films can be effectively passivated, the passivating agent on the upper surface and the lower surface is difficult to permeate into the perovskite film, and the effect on the grain boundary defects in the perovskite polycrystalline film is poor. For crystalline silicon/perovskite stacked solar cells, the required perovskite thin film thickness is often higher than for a common perovskite single cell. The passivation method has the advantages that more crystal boundary defects in the thin film are more difficult to passivate, the passivation effect on the internal defects of the thick perovskite thin film is lacking, and the photoelectric conversion efficiency and the stability of the crystalline silicon/perovskite laminated solar cell are difficult to further improve. Also, a method of directly adding a passivating agent to a perovskite precursor solution, although capable of passivating grain boundary defects inside a perovskite polycrystalline thin film to some extent, also changes the intrinsic characteristics of the perovskite precursor solution to some extent, such as viscosity, stoichiometric balance, boiling point, etc., which may cause the perovskite film forming characteristics to change. The perovskite precursor solution containing the passivating agent is used for preparing the film, so that the high-quality perovskite film is difficult to form while the grain boundary is passivated.
Disclosure of Invention
An object of the embodiments of the present application is to provide a perovskite passivation method and a stacked solar cell based on a low temperature process, so as to solve the problems existing in the related art: surface or interface defects generated in the perovskite absorption layer cause problems of degradation in photoelectric conversion efficiency and stability of the stacked solar cell.
In order to achieve the above purpose, the technical scheme adopted in the embodiment of the application is as follows:
in one aspect, a perovskite passivation method based on a low temperature process is provided, comprising a crystalline silicon bottom cell and a perovskite top cell, wherein the perovskite top cell comprises a hole transport layer, a perovskite absorption layer, a perovskite passivation layer, an electron transport layer, a buffer layer and a perovskite electrode layer; the perovskite passivation method based on the low-temperature process comprises the following steps:
preparing the hole transport layer on the surface of the crystalline silicon bottom cell;
preparing the perovskite absorption layer on the surface of the hole transport layer to prepare a perovskite film substrate;
performing low-temperature cooling treatment on the perovskite film substrate, and controlling the temperature of the perovskite film substrate to be cooled to between-30 ℃ and 0 ℃;
preparing the perovskite passivation layer on the surface of the perovskite film substrate after being subjected to low-temperature cooling treatment;
preparing the electron transport layer on the surface of the perovskite passivation layer;
preparing the buffer layer on the surface of the electron transport layer;
and preparing the perovskite electrode layer on the surface of the buffer layer.
In one embodiment, the step of cryogenically cooling the perovskite thin film substrate to control the temperature of the perovskite thin film substrate to be between-30 ℃ and 0 ℃ comprises: and carrying out low-temperature cooling treatment on the perovskite film substrate by adopting a liquid nitrogen cooling method.
In one embodiment, in the step of preparing the hole transport layer on the surface of the crystalline silicon bottom cell: uniformly coating the hole transport layer dispersion liquid on the surface of the crystalline silicon bottom battery by adopting a spin coating method, and carrying out annealing treatment after spin coating; or,
and placing the crystalline silicon bottom battery in a magnetron sputtering device by adopting a magnetron sputtering method to prepare the hole transport layer.
In one embodiment, in the step of preparing the perovskite absorption layer on the surface of the hole transport layer to prepare the perovskite thin film substrate: preparing a perovskite precursor solution, and uniformly coating the perovskite precursor solution on the surface of the hole transport layer; performing dynamic spin coating by using an antisolvent, and performing annealing treatment after spin coating is finished; or,
preparing the perovskite precursor solution, and uniformly coating the perovskite precursor solution on the surface of the hole transport layer; performing dynamic spin coating by using an antisolvent, performing flash evaporation treatment after spin coating, and performing annealing treatment after flash evaporation; or,
and preparing perovskite precursor powder, and evaporating the perovskite precursor powder to the surface of the hole transport layer to prepare the perovskite absorption layer.
In one embodiment, in the step of preparing the perovskite passivation layer on the surface of the perovskite thin film substrate after being subjected to the low-temperature cooling treatment: preparing passivation layer dispersion liquid, uniformly coating the passivation layer dispersion liquid on the surface of the perovskite absorption layer after low-temperature cooling treatment, dissolving propylenediamine iodine in an organic solvent, performing ultrasonic dissolution and spin coating, and performing annealing treatment after spin coating is finished; or,
and spraying the passivation layer dispersion liquid on the surface of the perovskite absorption layer, and performing annealing treatment after the spraying is finished to prepare the perovskite passivation layer.
In one embodiment, in the step of preparing the electron transport layer on the surface of the perovskite passivation layer: uniformly coating the electron transport layer dispersion liquid on the surface of the perovskite passivation layer by adopting a spin coating method; or,
evaporating an electron transport layer material to the surface of the perovskite passivation layer by adopting an evaporation method to prepare the electron transport layer.
In one embodiment, in the step of preparing the buffer layer on the surface of the electron transport layer: depositing an electron transport layer material on the surface of the electron transport layer by using atomic deposition equipment by adopting an atomic deposition method; or,
evaporating the electron transport layer modification layer material to the surface of the electron transport layer by adopting an evaporation method to prepare the buffer layer.
In one embodiment, the low temperature process based perovskite passivation method further comprises the steps of:
preparing an antireflection layer on the surface of the perovskite electrode layer;
the step of preparing the anti-reflection layer on the surface of the perovskite electrode layer is located after the step of preparing the perovskite electrode layer on the surface of the buffer layer.
In one embodiment, the anti-reflection layer is prepared by a magnetron sputtering method or an evaporation method.
On the other hand, a laminated solar cell is provided, and the perovskite passivation method based on the low-temperature process provided by any embodiment is adopted for preparation; the laminated solar cell comprises a crystalline silicon bottom cell and a perovskite top cell;
the crystalline silicon bottom battery comprises a crystalline silicon electrode layer, a P-type substrate doping layer arranged on the surface of the crystalline silicon electrode layer, a substrate bottom passivation layer arranged on the surface of the P-type substrate doping layer, a silicon substrate arranged on the surface of the substrate bottom passivation layer, a substrate surface passivation layer arranged on the surface of the silicon substrate, an N-type substrate doping layer arranged on the surface of the substrate surface passivation layer and a tunneling layer arranged on the surface of the N-type substrate doping layer;
the perovskite top battery comprises a hole transmission layer arranged on the surface of the tunneling layer, a perovskite absorption layer arranged on the surface of the hole transmission layer, a perovskite passivation layer arranged on the surface of the perovskite absorption layer, an electron transmission layer arranged on the surface of the perovskite passivation layer, a buffer layer arranged on the surface of the electron transmission layer, a perovskite electrode layer arranged on the surface of the buffer layer and an antireflection layer arranged on the surface of the perovskite electrode layer.
The perovskite passivation method based on the low-temperature process and the laminated solar cell provided by the embodiment of the application have the following beneficial effects: according to the perovskite film substrate, low-temperature cooling treatment is carried out on the perovskite film substrate, on one hand, compared with a traditional method of adding a passivating agent into a perovskite precursor solution, the perovskite passivating method avoids the change of the intrinsic characteristics of the passivating agent to the perovskite precursor solution, does not change the film forming characteristics of the perovskite, and retains a high-quality perovskite film; on the other hand, the perovskite passivation layer can be prepared on the surface of the perovskite film substrate and the grain boundary in the perovskite film, and meanwhile, the interface passivation of the perovskite film layer with high quality and the passivation of the grain boundary in the perovskite film layer are finished, so that the photoelectric conversion efficiency and the stability of the laminated solar cell can be improved.
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In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that are required for the description of the embodiments or exemplary techniques will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic structural diagram of a stacked solar cell according to an embodiment of the present disclosure;
fig. 2 is a schematic flow chart of a perovskite passivation method based on a low temperature process according to an embodiment of the present application.
Wherein, each reference numeral in the figure mainly marks:
1. a crystalline silicon bottom cell; 11. a crystalline silicon electrode layer; 111. a first metal electrode layer; 112. a first transparent electrode layer; 12. a P-type substrate doping layer; 13. a passivation layer on the bottom surface of the substrate; 14. a silicon substrate; 15. a passivation layer on the surface of the substrate; 16. an N-type substrate doping layer; 17. a tunneling layer;
2. perovskite top cells; 21. a hole transport layer; 22. a perovskite absorber layer; 23. a perovskite passivation layer; 24. an electron transport layer; 25. a buffer layer; 26. a perovskite electrode layer; 261. a second transparent electrode layer; 262. a second metal electrode layer; 27. an anti-reflection layer.
Description of the embodiments
In order to make the technical problems, technical schemes and beneficial effects to be solved by the present application more clear, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
It will be understood that when an element is referred to as being "mounted" or "disposed" on another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise. The meaning of "a number" is one or more than one unless specifically defined otherwise.
In the description of the present application, it should be understood that the terms "center," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate orientations or positional relationships that are based on the orientation or positional relationships shown in the drawings, merely to facilitate description of the present application and simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present application.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.
Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrase "in one embodiment" or "in some embodiments" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
At present, the perovskite absorption layer 22 in the crystalline silicon/perovskite-based stacked solar cell is prone to generate surface or interface defects, causing a large amount of non-radiative recombination, thus causing problems of reduced photoelectric conversion efficiency and stability performance of the stacked solar cell. The traditional passivation method is prepared on the upper surface of the perovskite film, so that the perovskite film is difficult to infiltrate into the interior of the perovskite film to passivate grain boundary defects. While the method of adding the passivating agent into the perovskite precursor solution can realize the passivation of the internal grain boundary of the perovskite film, the perovskite film forming characteristic can be changed, and the perovskite film with low quality can be formed.
Based on the above, the embodiment of the application provides a perovskite passivation method based on a low-temperature process and a stacked solar cell to solve the above problems. For convenience of description, a specific structure of the stacked solar cell will be described in detail.
Referring to fig. 1, the stacked solar cell includes a crystalline silicon bottom cell 1 and a perovskite top cell 2 disposed above the crystalline silicon bottom cell 1. The crystalline silicon bottom cell 1 comprises a crystalline silicon electrode layer 11, a P-type substrate doping layer 12 arranged on the surface of the crystalline silicon electrode layer 11, a substrate bottom passivation layer 13 arranged on the surface of the P-type substrate doping layer 12, a silicon substrate 14 arranged on the surface of the substrate bottom passivation layer 13, a substrate surface passivation layer 15 arranged on the surface of the silicon substrate 14, an N-type substrate doping layer 16 arranged on the surface of the substrate surface passivation layer 15 and a tunneling layer 17 arranged on the surface of the N-type substrate doping layer 16.
The perovskite top cell 2 includes a hole transport layer 21 provided on the surface of the tunneling layer 17, a perovskite absorption layer 22 provided on the surface of the hole transport layer 21, a perovskite passivation layer 23 provided on the surface of the perovskite absorption layer 22, an electron transport layer 24 provided on the surface of the perovskite passivation layer 23, a buffer layer 25 provided on the surface of the electron transport layer 24, a perovskite electrode layer 26 provided on the surface of the buffer layer 25, and an antireflection layer 27 provided on the surface of the perovskite electrode layer 26. The perovskite passivation layer 23 may separate the perovskite absorption layer 22 from the electron transport layer 24, avoiding interactions. The electron transport layer 24 plays an important role in transporting electrons, blocking electron-hole recombination, and the like. The buffer layer 25 may separate the electron transport layer 24 from the perovskite electrode layer 26, avoiding interference with each other. The anti-reflection layer 27 can enhance the absorptivity of the stacked solar cell to sunlight, and improve the operation stability.
In one embodiment, referring to fig. 1, the crystalline silicon electrode layer 11 includes a first metal electrode layer 111 and a first transparent electrode layer 112; the first transparent electrode layer 112 is disposed on the surface of the first metal electrode layer 111, and the P-type doped substrate layer 12 is disposed on the surface of the first transparent electrode layer 112. With this structure, the charge collection efficiency can be improved by the first metal electrode layer 111 and the first transparent electrode layer 112, which contributes to improvement of the fill factor and stability of the stacked solar cell.
In one embodiment, referring to fig. 1, perovskite electrode layer 26 includes a second transparent electrode layer 261 and a second metal electrode layer 262; the second transparent electrode layer 261 is disposed on the surface of the buffer layer 25, the second metal electrode layer 262 is disposed on the surface of the second transparent electrode layer 261, and the anti-reflection layer 27 is disposed on the surface of the second metal electrode layer 262. With this structure, the charge collection efficiency can be improved by the second metal electrode layer 262 and the second transparent electrode layer 261, which contributes to improvement of the fill factor and stability of the stacked solar cell.
In one embodiment, referring to fig. 1, a crystalline silicon bottom cell 1 is disposed in series with a perovskite top cell 2. In this structure, the crystalline silicon bottom cell 1 can absorb the infrared light which cannot be utilized by the perovskite top cell 2, so as to realize the conversion from ultraviolet light to visible light or near infrared light, improve the light absorption performance of the laminated solar cell, and further improve the photoelectric conversion efficiency.
Specifically, referring to fig. 1, the specific structure of the stacked solar cell provided in the embodiment of the present application is as follows, in order from bottom to top: the first metal electrode layer 111, the first transparent electrode layer 112, the P-type base doping layer 12, the base bottom passivation layer 13, the silicon substrate 14, the base surface passivation layer 15, the N-type base doping layer 16, the tunneling layer 17, the hole transport layer 21, the perovskite absorption layer 22, the perovskite passivation layer 23, the electron transport layer 24, the buffer layer 25, the second transparent electrode layer 261, the second metal electrode layer 262, and the antireflection layer 27. The stacked solar cell is prepared by a perovskite passivation method based on a low temperature process, and referring to fig. 2, a detailed description will be given of the perovskite passivation method based on a low temperature process. The perovskite passivation method based on the low-temperature process comprises the following steps:
and S1, preparing a hole transport layer 21 on the surface of the crystalline silicon bottom cell 1. Specifically, a hole transport layer 21 is prepared on the surface of the tunneling layer 17 of the crystalline silicon bottom cell 1.
S2, preparing a perovskite absorption layer 22 on the surface of the hole transport layer 21 to prepare the perovskite film substrate. The crystalline silicon bottom cell 1, the hole transport layer 21 and the perovskite absorption layer 22 are combined to form a perovskite thin film substrate.
S3, performing low-temperature cooling treatment on the perovskite film substrate, and controlling the temperature of the perovskite film substrate to be between-30 ℃ and 0 ℃. Specifically, the perovskite film substrate is subjected to low-temperature cooling treatment by adopting a liquid nitrogen cooling method.
S4, preparing a perovskite passivation layer 23 on the surface of the perovskite film substrate after being subjected to low-temperature cooling treatment.
And S5, preparing an electron transport layer 24 on the surface of the perovskite passivation layer 23.
And S6, preparing a buffer layer 25 on the surface of the electron transport layer 24.
And S7, preparing a perovskite electrode layer 26 on the surface of the buffer layer 25.
Specifically, the manufacturing steps for preparing the laminated solar cell by using the perovskite passivation method based on the low-temperature process are described in detail with reference to the specific structure of the laminated solar cell, and the specific steps are as follows:
step one: a base bottom passivation layer 13 and a P-type base doped layer 12 are sequentially prepared on the bottom surface of the silicon substrate 14, and a base surface passivation layer 15 and an N-type base doped layer 16 are sequentially prepared on the surface of the silicon substrate 14.
Step two: a first transparent electrode layer 112 is prepared on the bottom surface of the P-type base doping layer 12. Optionally, the sample wafer is placed in a magnetron sputtering device by using a magnetron sputtering method, an Indium Tin Oxide (ITO) target is arranged, and the power is controlled between 50W and 200W. Specifically, in the present example, the control power was 60W, the running time was 1.5h, and the film thickness was 100nm.
Step three: a first metal electrode layer 111 is prepared on the bottom surface of the first transparent electrode layer 112. Optionally, the prepared substrate sample is placed on a mask plate by an evaporation method, and is placed in a chamber of an evaporator, wherein the evaporation vacuum degree is 5 multiplied by 10 -5 Pa-2×10 -4 Pa, the evaporation temperature is 500-2000 ℃, and the evaporation rate is 0.1A/S-5A/S. Specifically, in the examples of the present application, the vapor deposition vacuum degree was 2×10 -4 And (3) performing evaporation in Pa, adjusting the evaporation voltage to the evaporation temperature, controlling the evaporation rate to be 2.5A/S, and evaporating silver on the layer film with the thickness of 200nm.
Step four: a tunneling layer 17 is prepared on the surface of the N-type base doping layer 16. Alternatively, the tunneling layer 17 may be prepared using an atomic deposition method, a magnetron sputtering method, or a wet chemical method. Specifically, in the embodiment of the application, a magnetron sputtering method can be utilized, a sample wafer is placed in a magnetron sputtering device after being placed in a mask, the power is controlled to be 60W, the running time is 1h, and the thickness of a layer film is 40nm.
Step five: a hole transport layer 21 is prepared on the surface of the tunneling layer 17. Wherein the hole transport layer 21 may be poly [ bis (4-phenyl) (2, 4, 6-trimethylphenyl) amine](PTAA), poly-3-hexylthiophene (P3 HT), nickel oxide (NiOx), molybdenum trioxide (MoO) 3 ) At least one of copper iodide (CuI) and copper thiocyanate (CuSCN).
Alternatively, the hole transport layer 21 dispersion may be uniformly coated on the surface of the tunneling layer 17 by spin coating at 1000rpm to 5000rpm for 10s to 100s. And after spin coating, carrying out annealing operation, wherein the annealing temperature is 300-600 ℃, and the annealing time is 10-50 min.
Alternatively, a magnetron sputtering method can be adopted, and the prepared substrate is placed in a magnetron sputtering device, and the power is controlled to be 30W-90W.
In the embodiment of the application, the sample wafer is treated by a spin coating method for 15min by adopting a UV-Ozone (ultraviolet Ozone cleaner), a dispersion liquid of the hole transport layer 21 is prepared, 0.05mol of NiOx powder is weighed and dissolved in 1ml of ultrapure water, and ultrasonic vibration is performed for 20min. The hole transport layer 21 dispersion was uniformly applied to the surface of the sample wafer at a spin-coating speed of 2000rpm for 40 seconds and the amount of solution was 100ul. And after spin coating, carrying out annealing operation, wherein the annealing temperature is 450 ℃, the annealing time is 30min, and the thickness is about 20nm.
Step six: a perovskite absorption layer 22 is prepared on the surface of the hole transport layer 21.
Alternatively, a spin coating method may be employed to prepare a perovskite precursor solution, uniformly coat the perovskite precursor solution on the surface of the hole transport layer 21, and then use an antisolvent for dynamic spin coating at 1200rpm-6000rpm for 20s-120s and for 10s-50s after the start of the spin speed. And after spin coating, carrying out annealing operation, wherein the annealing temperature is 50-150 ℃ and the annealing time is 5-40 min. Wherein the dissolving solvent of the perovskite precursor solution comprises at least one of Dimethylformamide (DMF), G-butyrolactone (GBL), dimethyl sulfoxide (DMSO) and N, N-Dimethylacetamide (DMA), and the solvent ratio is 0-3: between 10 and 7. The antisolvent may include at least one of toluene (Tol), chlorobenzene (CB), ethyl Acetate (EA).
Alternatively, a flash evaporation method may be used to prepare the perovskite precursor solution, and the perovskite precursor solution is uniformly coated on the surface of the hole transport layer 21, with a spin speed of 1000rpm to 6000rpm and a spin time of 20s to 120s. And (3) after spin coating, performing flash evaporation operation, wherein the flash evaporation time is 10s-60s, the flash evaporation temperature is 0-100 ℃, and after the flash evaporation is finished, performing annealing treatment, the annealing temperature is 50-150 ℃ and the annealing time is 5-40 min.
Alternatively, a perovskite precursor powder may be prepared by vapor deposition, the perovskite precursor powder is evaporated onto the surface of the hole transport layer 21, and the vapor deposition vacuum degree is 1-3×10 -4 The evaporation temperature is 200 ℃ to 700 ℃ between Pa.
Wherein the perovskite precursor solution may be ABX 3 The structural perovskite is regulated by stoichiometric ratio and dissolved with organic solvent, and the concentration is between 1.5M and 2M. Wherein ABX 3 In the structural perovskite, the A position is an organic cation, including CH 3 NH 3 + (MA + )、NH 2 CH=NH 2 + (FA + )、CH 3 CH 2 NH 3 + Or Cs + At least one of (a) and (b); the B position is a metal cation including Pb 2 + 、Sn 2+ At least one of (a) and (b); x is a halogen anion including F - 、Cl - 、Br - 、I - At least one of them.
Embodiments of the present application may employ a flash evaporation process to prepare the perovskite absorber layer 22. Specifically, a perovskite precursor solution was prepared, and 1.7M perovskite powder was weighed and dissolved in 1ml of DMF (N, N-Dimethylformamide, N-Dimethylformamide) and DMSO (Dimethyl sulfoxide ) solvents at a solvent ratio of 8:2, magnetically stirring for 30min, then placing the sample on a spin Tu Yi base, setting the spin speed to 3500rpm, the spin time to 30s, and the solution amount of the perovskite precursor solution to 120ul, and coating the sample on the surface of the sample. After spin coating, placing the sample on a flash evaporation table, setting the flash evaporation time to be 30s, setting the flash evaporation temperature to be 30 ℃, and carrying out annealing treatment after the flash evaporation is finished, wherein the annealing temperature is 100 ℃, the annealing time is 15min, and the thickness is about 500 nm.
Wherein the crystalline silicon bottom cell 1, the hole transport layer 21 and the perovskite absorption layer 22 are combined to form a perovskite thin film substrate. After the perovskite absorption layer 22 is prepared, performing low-temperature cooling treatment on the perovskite film substrate, immersing the perovskite film substrate into liquid nitrogen for cooling, wherein the immersion time is 0-1000s, and controlling the temperature of the perovskite film substrate to be cooled to-30-0 ℃. In the examples herein, the perovskite thin film substrate was immersed in liquid nitrogen for 60 seconds and the perovskite thin film substrate was cooled to 0 degrees.
Step seven: a perovskite passivation layer 23 is prepared on the surface of the perovskite absorption layer 22. Wherein the perovskite passivation layer 23 may be propylenediamine iodine, including but not limited to at least one of propylenediamine bromine (PDADBr), butylmonoamine chloride (BACl), butylamine bromide (BABr), butylamine iodide (BAI), N-dimethyl-1, 3-propylenediamine hydrochloride (DMePDADCl), dodecylenediamine bromine (DDDADBr); but may also be magnesium fluoride including, but not limited to, at least one of lithium fluoride (LiF), sodium fluoride (NaF).
Alternatively, a passivation layer dispersion may be prepared and uniformly coated on the surface of the perovskite absorption layer 22 using spin coating, and propylenediamine iodine is dissolved in an organic solvent including, but not limited to, methanol, ethanol or isopropanol, subjected to ultrasonic dissolution and spin coating, and the propylenediamine iodine concentration is 0.1mg/ml to 6mg/ml, the ultrasonic time is 0 to 30 minutes, the spin coating rotational speed is 1000rpm to 7000rpm, and the spin coating time is 20s to 120s. And after spin coating, carrying out annealing operation, wherein the annealing temperature is 40-160 ℃, and the annealing time is 5-40 min.
Alternatively, the passivation layer dispersion may be sprayed onto the surface of the perovskite absorption layer 22 using a spraying method at a rate of 0 to 100cm/s; and after the spraying is finished, carrying out annealing operation, wherein the annealing temperature is 20-170 ℃ and the annealing time is 0-30min.
Specifically, in the embodiment of the present application, the passivation layer dispersion is uniformly coated on the surface of the perovskite absorption layer 22 by spin coating, and propylenediamine iodine is dissolved in an organic solvent including, but not limited to, methanol, ethanol or isopropanol, and is subjected to ultrasonic dissolution and spin coating, wherein the propylenediamine iodine concentration is 0.5mg/ml, the ultrasonic time is 30min, the spin coating rotational speed is 6000rpm, and the spin coating time is 60s. And after spin coating, carrying out annealing operation, wherein the annealing temperature is 100 ℃, and the annealing time is 10min.
Step eight: an electron transport layer 24 is prepared on the surface of the perovskite passivation layer 23. Wherein the electron transport layer 24 is zinc oxide (ZnO), tin dioxide (SnO) 2 ) Titanium dioxide (TiO) 2 )、[6,6]Phenyl C61 methyl butyrate (PC) 61 BM), carbon 60 (C 60 ) At least one of 2, 9-dimethyl-4, 7-diphenyl-1, 10-phenanthroline (BCP).
Alternatively, the electron transport layer 24 dispersion may be uniformly coated on the surface of the perovskite passivation layer 23 using a spin coating method at 500rpm to 4000rpm for 10s to 80s.
Alternatively, the electron transport layer 24 material may be evaporated onto the surface of the perovskite passivation layer 23 by a vapor deposition method having a vacuum degree of 5×10 -5 Pa-5×10 -4 Pa, the evaporation temperature is 100-400 ℃, and the evaporation rate is 0.05A/S-1A/S.
Specifically, the embodiment of the application can adopt an evaporation method, a substrate sample is placed on a mask plate, and the mask plate is placed into a chamber of an evaporator, and the vacuum degree to be evaporated is 1×10 -4 Evaporating under Pa, adjusting evaporating voltage to evaporating temperature, controlling evaporating rate to 0.1-0.15A/S, and collecting C 60 Evaporating to a thickness of 20nm on the layer film.
Step nine: a buffer layer 25 is prepared on the surface of the electron transport layer 24. Wherein the buffer layer 25 is zinc oxide (ZnO) or tin dioxide (SnO 2 ) Titanium dioxide (TiO) 2 ) At least one of them. The thickness of the buffer layer 25 may range from 0 to 30nm.
Alternatively, the electron transport layer 24 material may be deposited onto the surface of the electron transport layer 24 using atomic deposition, with a deposition vacuum of 0-1×10 4 Pa, the temperature of a deposition pipeline is between 50 ℃ and 150 ℃, and the temperature of a deposition chamber is 40 DEG C-150℃。
Alternatively, the electron transport layer 24 modifying layer material may be evaporated onto the surface of the electron transport layer 24 by evaporation with a vacuum of 6X10 -5 Pa-4×10 -4 Pa, the evaporation temperature is 100-500 ℃, and the evaporation rate is 0.05A/S-1A/S.
Specifically, the atomic deposition method can be adopted in the embodiment of the application, and the vacuum degree of the atomic deposition equipment is set to be 0.5X10 4 Pa, the temperature of a deposition pipeline is between 60 ℃, the temperature of a deposition chamber is 70 ℃, snO is obtained 2 Evaporating to a thickness of 15nm on the layer film.
Step ten: a second transparent electrode layer 261 is prepared on the surface of the buffer layer 25. Alternatively, a transparent electrode material may be sputtered onto the surface of the buffer layer 25 using a magnetron sputtering method, with a power of 30W to 200W being controlled. The transparent electrode material may be evaporated onto the surface of the buffer layer 25 by vapor deposition with a vacuum degree of 1×10 -5 Pa-5×10 -4 Pa, the evaporation temperature is 1000-2000 ℃, and the evaporation rate is 0.05A/S-3A/S.
Specifically, in the embodiment of the present application, a magnetron sputtering method may be used, similar to the preparation method for preparing the first transparent electrode layer 112 in the second step, an IZO (Indium Zinc Oxide ) target is set, the power is controlled to be 50W, the running time is 1h, and the thickness of the layer film is 100nm.
Step eleven: a second metal electrode layer 262 is prepared on the surface of the second transparent electrode layer 261. Specifically, similar to the preparation of the first metal electrode layer 111, only the mask is inconsistent, and the thickness is 100nm. The second metal electrode layer 262 is at least one of silver (Ag), gold (Au), copper (Cu), aluminum (Al), and carbon (C).
Step twelve: s8, preparing an antireflection layer 27 on the surface of the perovskite electrode layer 26, wherein the step S8 is positioned after the step S7. Alternatively, the preparation can be performed by a magnetron sputtering method and an evaporation method. Specifically, the preparation of the anti-reflective layer 27 according to the embodiment of the present application is similar to the preparation of the perovskite passivation layer 23, the evaporation rate is controlled to be 2 a/S, and magnesium fluoride is evaporated onto the layer film to a thickness of 100nm. Wherein the anti-reflection layer 27 can be magnesium fluoride, lithium fluoride (LiF), sodium fluoride (NaF), oxygenSilicon carbide (SiO) 2 ) At least one of them.
The first transparent electrode layer 112 and the second transparent electrode layer 261 are at least one of Indium Tin Oxide (ITO), indium Zinc Oxide (IZO), and zinc aluminum oxide (AZO). The thicknesses of the hole transport layer 21, the perovskite absorption layer 22, the electron transport layer 24, the second transparent electrode layer 261, the second metal electrode layer 262, and the antireflection layer 27 may range from 1nm to 600nm.
In order to verify the performance of the stacked solar cell prepared by the perovskite passivation method based on the low temperature process provided in the embodiment of the present application, six sets of experiments are provided for comparative demonstration, namely, the first embodiment, the second embodiment and the first to fourth comparative embodiments.
An embodiment one provides a stacked solar cell manufactured by a perovskite passivation method based on a low temperature process, wherein the low temperature cooling process parameters used in the step six are as follows: the cooling time was 60s and the cooling temperature was 0 ℃.
Embodiment II provides a laminated solar cell prepared by a perovskite passivation method based on a low temperature process, which is different from embodiment I in that: the cryogenically cooled process parameters used in step six are different. The cooling time for example two was 120s and the cooling temperature was-30 ℃.
Comparative example one provides a laminated solar cell prepared by a perovskite passivation method based on a low temperature process, which is different from example one in that: the cryogenically cooled process parameters used in step six are different. The cooling time of comparative example one was 300s and the cooling temperature was-60 ℃.
The second comparative example provides a laminated solar cell prepared by a perovskite passivation method based on a low temperature process, which is different from the first example in that: the cryogenically cooled process parameters used in step six are different. The cooling time of comparative example II was 300s and the cooling temperature was-100 ℃.
Comparative example three provides a tandem solar cell prepared based on conventional methods, differing from example one in that: in step six, no cryogenically cooled process is used.
Comparative example four provides a tandem solar cell prepared based on a method of adding a passivating agent to a perovskite precursor solution, differing from example one in that: in step six, no cryogenically cooled process is used. To the perovskite precursor solution was added 0.5mol/mL of propylenediamine iodine.
Six groups of samples are subjected to a comparison experiment, a standard solar light intensity calibration is carried out by using a solar simulator, and the area of the sample is 1.0cm 2 The laminated solar cell of (2) was subjected to an IV test for a long period of time, the initial voltage was set to 1.95V, the cut-off voltage was set to 0V, and the measurement range was set to 100mA, and the test results are shown in the following table.
From the comparison of the above tables, it can be seen that:
1. comparative analysis of example one, example two, comparative example one and comparative example two, the optimum temperature for the low temperature process was-30 ℃. This is because the second embodiment has higher photoelectric conversion efficiency and open circuit voltage, and shows that the second embodiment has better passivation effect and lower defect density. Meanwhile, the second embodiment has lower efficiency attenuation rate, and the passivation effect at the temperature is optimal due to side reaction.
2. The second comparative example has the highest efficiency attenuation rate and the lowest photoelectric conversion efficiency, and reflects that the temperature of the low-temperature process is reduced to minus 100 ℃ to cause absolute damage to the laminated solar cell.
3. Under the condition of optimizing low temperature, the open circuit voltage and the photoelectric conversion efficiency of the second embodiment are obviously higher than those of the third and fourth embodiments.
4. According to the perovskite passivation method based on the low-temperature process, under the condition that the film forming property of perovskite from a precursor solution to a film is not changed and a high-quality perovskite film is reserved, high-quality perovskite film interface passivation and perovskite film internal grain boundary passivation are finished simultaneously.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic of each process, and should not limit the implementation process of the embodiment of the present application in any way.
The foregoing description of the preferred embodiments is merely exemplary in nature and is in no way intended to limit the invention, since it is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

Claims (10)

1. The perovskite passivation method based on the low-temperature process is characterized by comprising a crystalline silicon bottom cell and a perovskite top cell, wherein the perovskite top cell comprises a hole transport layer, a perovskite absorption layer, a perovskite passivation layer, an electron transport layer, a buffer layer and a perovskite electrode layer; the perovskite passivation method based on the low-temperature process comprises the following steps:
preparing the hole transport layer on the surface of the crystalline silicon bottom cell;
preparing the perovskite absorption layer on the surface of the hole transport layer to prepare a perovskite film substrate;
performing low-temperature cooling treatment on the perovskite film substrate, and controlling the temperature of the perovskite film substrate to be cooled to between-30 ℃ and 0 ℃;
preparing the perovskite passivation layer on the surface of the perovskite film substrate after being subjected to low-temperature cooling treatment;
preparing the electron transport layer on the surface of the perovskite passivation layer;
preparing the buffer layer on the surface of the electron transport layer;
and preparing the perovskite electrode layer on the surface of the buffer layer.
2. The low temperature process-based perovskite passivation method as claimed in claim 1, wherein the step of subjecting the perovskite thin film substrate to a low temperature cooling treatment controls the temperature of the perovskite thin film substrate between-30 ℃ and 0 ℃ comprises: and carrying out low-temperature cooling treatment on the perovskite film substrate by adopting a liquid nitrogen cooling method.
3. The low temperature process-based perovskite passivation method as claimed in claim 1, wherein in the step of preparing the hole transport layer on the surface of the crystalline silicon bottom cell: uniformly coating the hole transport layer dispersion liquid on the surface of the crystalline silicon bottom battery by adopting a spin coating method, and carrying out annealing treatment after spin coating; or,
and placing the crystalline silicon bottom battery in a magnetron sputtering device by adopting a magnetron sputtering method to prepare the hole transport layer.
4. The low temperature process-based perovskite passivation method as claimed in claim 1, wherein in the step of preparing the perovskite absorption layer on the surface of the hole transport layer to prepare the perovskite thin film substrate: preparing a perovskite precursor solution, and uniformly coating the perovskite precursor solution on the surface of the hole transport layer; performing dynamic spin coating by using an antisolvent, and performing annealing treatment after spin coating is finished; or,
preparing the perovskite precursor solution, and uniformly coating the perovskite precursor solution on the surface of the hole transport layer; performing dynamic spin coating by using an antisolvent, performing flash evaporation treatment after spin coating, and performing annealing treatment after flash evaporation; or,
and preparing perovskite precursor powder, and evaporating the perovskite precursor powder to the surface of the hole transport layer to prepare the perovskite absorption layer.
5. The low temperature process-based perovskite passivation method as claimed in claim 1, wherein in the step of preparing the perovskite passivation layer on the surface of the perovskite thin film substrate after the low temperature cooling treatment: preparing passivation layer dispersion liquid, uniformly coating the passivation layer dispersion liquid on the surface of the perovskite absorption layer after low-temperature cooling treatment, dissolving propylenediamine iodine in an organic solvent, performing ultrasonic dissolution and spin coating, and performing annealing treatment after spin coating is finished; or,
and spraying the passivation layer dispersion liquid on the surface of the perovskite absorption layer, and performing annealing treatment after the spraying is finished to prepare the perovskite passivation layer.
6. The low temperature process-based perovskite passivation method as claimed in claim 1, wherein in the step of preparing the electron transport layer on the surface of the perovskite passivation layer: uniformly coating the electron transport layer dispersion liquid on the surface of the perovskite passivation layer by adopting a spin coating method; or,
evaporating an electron transport layer material to the surface of the perovskite passivation layer by adopting an evaporation method to prepare the electron transport layer.
7. The low temperature process-based perovskite passivation method as claimed in claim 1, wherein in the step of preparing the buffer layer on the surface of the electron transport layer: depositing an electron transport layer material on the surface of the electron transport layer by using atomic deposition equipment by adopting an atomic deposition method; or,
evaporating the electron transport layer modification layer material to the surface of the electron transport layer by adopting an evaporation method to prepare the buffer layer.
8. A low temperature process based perovskite passivation method as claimed in any one of claims 1 to 7, further comprising the steps of:
preparing an antireflection layer on the surface of the perovskite electrode layer;
the step of preparing the anti-reflection layer on the surface of the perovskite electrode layer is located after the step of preparing the perovskite electrode layer on the surface of the buffer layer.
9. The low temperature process-based perovskite passivation method as claimed in claim 8, wherein: the anti-reflection layer is prepared by a magnetron sputtering method or an evaporation method.
10. A laminated solar cell characterized in that: a perovskite passivation method based on a low temperature process according to any one of claims 1 to 9; the laminated solar cell comprises a crystalline silicon bottom cell and a perovskite top cell;
the crystalline silicon bottom battery comprises a crystalline silicon electrode layer, a P-type substrate doping layer arranged on the surface of the crystalline silicon electrode layer, a substrate bottom passivation layer arranged on the surface of the P-type substrate doping layer, a silicon substrate arranged on the surface of the substrate bottom passivation layer, a substrate surface passivation layer arranged on the surface of the silicon substrate, an N-type substrate doping layer arranged on the surface of the substrate surface passivation layer and a tunneling layer arranged on the surface of the N-type substrate doping layer;
the perovskite top battery comprises a hole transmission layer arranged on the surface of the tunneling layer, a perovskite absorption layer arranged on the surface of the hole transmission layer, a perovskite passivation layer arranged on the surface of the perovskite absorption layer, an electron transmission layer arranged on the surface of the perovskite passivation layer, a buffer layer arranged on the surface of the electron transmission layer, a perovskite electrode layer arranged on the surface of the buffer layer and an antireflection layer arranged on the surface of the perovskite electrode layer.
CN202311428279.9A 2023-10-31 2023-10-31 Perovskite passivation method based on low-temperature process and laminated solar cell Pending CN117641952A (en)

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