CN117608425A

CN117608425A - Array substrate and display panel

Info

Publication number: CN117608425A
Application number: CN202311521952.3A
Authority: CN
Inventors: 周志超; 谭志威
Original assignee: TCL Huaxing Photoelectric Technology Co Ltd
Current assignee: TCL Huaxing Photoelectric Technology Co Ltd
Priority date: 2023-11-14
Filing date: 2023-11-14
Publication date: 2024-02-27

Abstract

The application provides an array substrate and display panel, array substrate includes first substrate and arranges the light sensor on first substrate, array substrate still includes first insulating layer and shading layer, first insulating layer sets up in the one side that light sensor kept away from first substrate, the shading layer sets up in one side that light sensor was kept away from to first insulating layer, light sensor includes photosensitive element, the shading layer is provided with first opening in the position that corresponds photosensitive element, first opening runs through the shading layer, every light sensor homoenergetic is through the certain interval of first opening detection its top, the interval intercrossing that light sensor can be detected forms overlap interval, every overlap interval has its one-to-one light sensor array response, when waiting to discern the object and be in the different positions of light sensor top, can arouse the light sensor array response rather than one-to-one, with the technical problem of alleviating the spatial position that current non-contact type control display screen can not discern the object and locate.

Description

Array substrate and display panel

Technical Field

The application relates to the technical field of display, in particular to an array substrate and a display panel.

Background

The light sensor array is integrated in the display screen, so that the traditional touch control type screen can be upgraded into a non-touch control type screen. The non-contact control display screen has obvious advantages in the aspects of virus protection, functional diversity, equipment service life and the like. However, such a non-contact operated display screen does not recognize the spatial position of the object.

Disclosure of Invention

The application provides an array substrate and a display panel to alleviate the technical problem that the existing non-contact control display screen can not discern the spatial position that the object is located.

In order to solve the problems, the technical scheme provided by the application is as follows:

the embodiment of the application provides an array substrate, it includes first substrate and array arrangement be in light sensor on the first substrate, array substrate still includes:

a first insulating layer disposed on a side of the light sensor away from the first substrate; and

the shading layer is arranged on one side of the first insulating layer, which is far away from the light sensor;

the light sensor comprises a light sensing element, and a first opening is formed in the position, corresponding to the light sensing element, of the light shielding layer, and penetrates through the light shielding layer.

In the array substrate provided by the embodiment of the application, the array substrate further includes a first input electrode, the first input electrode is located between the light shielding layer and the first insulating layer, the first opening exposes a part of the first input electrode, and the first input electrode is electrically connected with the photosensitive element.

In the array substrate provided in the embodiment of the present application, the array substrate further includes:

a second insulating layer covering the light sensor;

the first bridge electrode is arranged on one side, far away from the light sensor, of the second insulating layer, the first insulating layer covers the first bridge electrode and the second insulating layer, and the first input electrode is electrically connected with the light sensing element through the first bridge electrode.

In the array substrate provided in the embodiment of the present application, the photosensitive element includes a first electrode, a photosensitive layer, and a second electrode that are stacked, where the first electrode is located at a side of the second electrode away from the first substrate, and the first input electrode is electrically connected to the first electrode;

the light sensor further includes a first transistor electrically connected to the light sensing element, the first transistor being electrically connected to the second electrode.

In the array substrate provided in the embodiment of the present application, the orthographic projection of the first opening on the first substrate falls within the range of orthographic projection of the photosensitive element on the first substrate.

In the array substrate provided by the embodiment of the application, the array substrate further includes a plurality of sub-pixels arranged on the first substrate in an array manner, a gap is formed between two adjacent sub-pixels, and the light sensor is located in at least part of the gap.

In the array substrate provided in the embodiment of the present application, each sub-pixel includes a second transistor and a pixel electrode electrically connected to the second transistor, where the second transistor and the first transistor are disposed in the same layer, and the pixel electrode and the first input electrode are disposed in the same layer;

the first transistor and the second transistor are arranged corresponding to the shading layer, the shading layer is further provided with a second opening at a position corresponding to the pixel electrode, and the second opening exposes part of the pixel electrode.

In the array substrate provided in the embodiment of the present application, the sub-pixel further includes a second bridge electrode, where the pixel electrode is electrically connected to the second transistor through the second bridge electrode, and the second bridge electrode is disposed on the same layer as the first bridge electrode.

In the array substrate provided by the embodiment of the application, the first transistor and the second transistor each include a first gate, an active layer, a second gate, a source and a drain, and the first gate is disposed on one side of the first substrate; the array substrate further includes:

a first gate insulating layer covering the first gate electrode and the first substrate, the active layer being disposed on the first gate insulating layer;

a second gate insulating layer covering the active layer and the first gate insulating layer, the second gate being disposed on the second gate insulating layer;

a third insulating layer covering the second gate electrode and the second gate insulating layer, the source electrode and the drain electrode being disposed on the third insulating layer;

the source electrode, the drain electrode and the photosensitive element are arranged on the same layer.

The embodiment of the application also provides a display panel, which comprises the array substrate of one of the embodiments.

The beneficial effects of this application are: the application provides an among array substrate and the display panel, array substrate includes first substrate and array arrangement are in light sensor on the first substrate, array substrate still includes first insulating layer and shading layer, and first insulating layer sets up light sensor array response rather than one-to-one is kept away from one side of first substrate, the shading layer sets up first insulating layer is kept away from one side of light sensor, light sensor includes photosensitive element, the shading layer is in corresponding light sensor's position is provided with first opening, first opening runs through the shading layer, every light sensor homoenergetic is through the certain interval of first opening detection its top, and the interval intercrossing that light sensor can be surveyed forms overlap interval, and every overlap interval has its one-to-one light sensor array response, when waiting to discern the object and be in the different positions of light sensor top, can arouse with its one-to-one light sensor array response to waiting to discern the object projection to produce the light sensor array response on the light sensor, has realized that the object that waits to discern the object projection to take turns to the position to judge the light sensor array response, has realized the distance to wait to distinguish the object relative to realize the current position of light sensor array and has controlled the space.

Drawings

In order to more clearly illustrate the embodiments or the technical solutions in the prior art, the following description will briefly introduce the drawings that are needed in the embodiments or the description of the prior art, it is obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic top view of an array substrate according to an embodiment of the present application.

Fig. 2 is a schematic diagram of a partial cross-sectional structure of an array substrate according to an embodiment of the present application.

Fig. 3 is a schematic diagram of a light sensor according to an embodiment of the present application to identify a spatial position of an object to be identified.

Fig. 4 is a schematic diagram of a partial cross-sectional structure of a display panel according to an embodiment of the present application.

Fig. 5 is a schematic diagram of preparing a sub-pixel and a first gate of a light sensor on a first substrate according to an embodiment of the present application.

Fig. 6 is a schematic diagram of an active layer fabricated on the structure of fig. 5.

Fig. 7 is a schematic diagram of a second gate fabricated on the structure of fig. 6.

Fig. 8 is a schematic illustration of the preparation of a third insulating layer over the structure of fig. 7.

Fig. 9 is a schematic diagram of preparing source, drain, and second electrodes on the structure of fig. 8.

Fig. 10 is a schematic diagram of the structurally prepared photosensitive layer and first electrode of fig. 9.

Fig. 11 is a schematic illustration of the fabrication of a second insulating layer over the structure of fig. 10.

Fig. 12 is a schematic illustration of the fabrication of a first bridging electrode and a second bridging electrode on the structure of fig. 11.

Fig. 13 is a schematic illustration of the preparation of a first insulating layer over the structure of fig. 12.

Fig. 14 is a schematic view of the first input electrode and pixel electrode fabricated on the structure of fig. 13.

Fig. 15 is a schematic view of a light shielding layer prepared over the structure of fig. 14.

Detailed Description

The following description of the embodiments refers to the accompanying drawings, which illustrate specific embodiments that can be used to practice the present application. The directional terms mentioned in this application, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], etc., are only referring to the directions of the attached drawings. Accordingly, directional terminology is used to describe and understand the application and is not intended to be limiting of the application. In the drawings, like elements are designated by like reference numerals. In the drawings, the thickness of some layers and regions are exaggerated for clarity of understanding and ease of description. I.e., the size and thickness of each component shown in the drawings are arbitrarily shown, but the present application is not limited thereto.

Aiming at the problem that the existing non-contact control display screen can not identify the spatial position of an object, the inventor of the application finds that: mainly due to the fact that the magnitude and the characteristics of the photoelectric response of the light sensor in the non-contact controlled display screen are not quantitatively related to the distance between the object to be identified and the display screen. Specifically, when the projection of the object to be identified under illumination is detected by the light sensor on the display screen, different photoelectric responses are generated in the illumination area and the shadow area. Such a photoelectric response will inherit the characteristics of the object itself to be identified, thereby identifying the shape of the object to be identified. However, the magnitude and characteristics of the photoelectric response of the light-sensitive sensor are not quantitatively related to the distance of the object to be recognized from the display screen, so that it becomes difficult to further recognize the spatial position where the object to be recognized is located.

For this reason, the inventors of the present application have proposed an array substrate and a display panel to solve the above-mentioned problems.

Referring to fig. 1 to 3, fig. 1 is a schematic top view of an array substrate according to an embodiment of the present application, fig. 2 is a schematic partial cross-sectional structure of the array substrate according to an embodiment of the present application, and fig. 3 is a schematic principle diagram of identifying a spatial position of an object to be identified by a light sensor according to an embodiment of the present application. Referring to fig. 1, an array substrate 100 includes a first substrate 10, and a plurality of sub-pixels SP and a plurality of light sensors 20 arrayed on the first substrate 10. A gap is formed between adjacent sub-pixels SP, and the photo-sensor 20 is positioned in a portion of the gap of the sub-pixels SP.

Optionally, the sub-pixels SP include a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B, the red sub-pixel R, the green sub-pixel G, and the blue sub-pixel B are sequentially arranged along the first direction X, and the red sub-pixel R, the green sub-pixel G, and the blue sub-pixel B are all arranged in columns along the second direction Y. The first direction X and the second direction Y are different, for example, the first direction X is a row direction, the second direction Y is a column direction, and the first direction X is perpendicular to the second direction Y. The light sensor 20 is located in a gap between two adjacent sub-pixels SP in the column direction.

Of course, the present application is not limited thereto, and the light sensor 20 of the present application may be disposed in a gap between two adjacent sub-pixels SP in the row direction. In addition, the number of the light sensors 20 may be equal to the number of the sub-pixels SP, that is, each of the sub-pixels SP corresponds to one of the light sensors 20. In other embodiments, the number of the light sensors 20 may be smaller than the number of the sub-pixels SP, that is, a plurality of the sub-pixels SP corresponds to one light sensor 20.

Referring to fig. 2, the array substrate 100 further includes a first insulating layer 11 and a light shielding layer 30 disposed at a side of the light sensor 20 remote from the first substrate 10. The light shielding layer 30 is disposed on a side of the first insulating layer 11 away from the light sensor 20. The light sensor 20 includes a photosensitive element 21, and the light shielding layer 30 is provided with a first opening 301 at a position corresponding to the photosensitive element 21, and the first opening 301 penetrates the light shielding layer 30. The shape of the first opening 301 matches the shape of the photosensitive element 21, and the front projection of the first opening 301 on the first substrate 10 falls within the range of the front projection of the photosensitive element 21 on the first substrate 10, so that the light passing through the first opening 301 can reach the photosensitive element 21.

In this way, each light sensor 20 can detect a certain section above the light sensor 20 through the first opening 301, the sections detected by the light sensors 20 are mutually intersected to form an overlapped section, each overlapped section is provided with a light sensor 20 array response corresponding to one of the overlapped sections, when the object 600 to be identified is positioned at different positions above the light sensors 20, the light sensor 20 array response corresponding to one of the overlapped sections is caused, and therefore the distance between the object and the light sensor 20 array can be judged by utilizing the array photoelectric response generated by the projection of the object 600 to be identified on the light sensor 20 array, so that the detection of the spatial position of the object 600 to be identified is realized, and the technical problem that the existing non-contact control display screen cannot identify the spatial position of the object is solved.

Alternatively, the first insulating layer 11 includes an organic planarization layer, that is, the first insulating layer 11 is a planarization layer formed of an organic material to planarize the surface of the light sensor 20 and protect the light sensor 20. Furthermore, the first insulating layer 11 is also used to form a certain height difference between the photo sensor 20 and the first opening 301. For example, the material of the first insulating layer 11 is any one of styrene, polycycloolefin, epoxy negative photoresist, and polydimethylsiloxane. The light shielding layer 30 is used for shielding some components on the array substrate 100, and the material of the light shielding layer 30 includes any one of black polyimide, black polydimethylsiloxane, epoxy negative photoresist, polydimethylsiloxane and other light shielding materials with light shielding function.

The array substrate 100 further includes a first input electrode 41, the first input electrode 41 is located between the light shielding layer 30 and the first insulating layer 11, the first opening 301 exposes a portion of the first input electrode 41, and the first input electrode 41 is electrically connected to the photosensitive element 21. The first input electrode 41 is used for providing a driving signal to the photosensitive element 21. The material of the first input electrode 41 includes a transparent conductive material such as Indium Tin Oxide (ITO) to avoid affecting the light transmittance of the first opening 301.

The array substrate 100 further includes a second insulating layer 12 and a first bridge electrode 51. The second insulating layer 12 covers the light sensor 20. The first bridge electrode 51 is disposed on a side of the second insulating layer 12 away from the light sensor 20, the first insulating layer 11 covers the first bridge electrode 51 and the second insulating layer 12, and the first input electrode 41 is electrically connected to the light sensing element 21 through the first bridge electrode 51. The second insulating layer 12, in cooperation with the first insulating layer 11, can better planarize the surface of the light sensor 20, and by adjusting the thicknesses of the second insulating layer 12 and the first insulating layer 11, the distance between the first opening 301 and the photosensitive element 21 can be better adjusted, so that the recognition range of the photosensitive element 21 can be better adjusted.

Alternatively, the material of the second insulating layer 12 is different from the material of the first insulating layer 11, and the material of the second insulating layer 12 includes an inorganic material such as silicon oxide, silicon nitride, or the like. The first bridge electrode 51 may be a single layer of metal simple substance of molybdenum, copper, aluminum, titanium, niobium, nickel or molybdenum titanium, molybdenum niobium, molybdenum nickel alloy, or a combined stack of any of the above metals or alloys.

Specifically, a first via hole 111 is disposed on the first insulating layer 11, and the first via hole 111 penetrates through the first insulating layer 11 and exposes a portion of the first bridge electrode 51. The first input electrode 41 is electrically connected to the first bridge electrode 51 through the first via hole 111. The light shielding layer 30 is further filled in the first via hole 111 and covers the first input electrode 41 in the first via hole 111. The first bridge electrode 51 is electrically connected to the photosensitive element 21 through a via hole of the second insulating layer 12.

The photosensitive element 21 includes a first electrode 211, a photosensitive layer 212, and a second electrode 213 that are stacked, the photosensitive layer 212 being located between the first electrode 211 and the second electrode 213. The first electrode 211 is located at a side of the second electrode 213 remote from the first substrate 10, and the first input electrode 41 is electrically connected to the first electrode 211. The material of the first electrode 211 includes a transparent conductive material such as indium tin oxide, so as to avoid affecting the light recognition of the photosensitive element. The photosensitive layer 212 may be one of intrinsic hydrogenated amorphous silicon, phosphorus doped hydrogenated amorphous silicon, boron doped hydrogenated amorphous silicon, fluorine doped amorphous silicon, or a stack of any two or three thereof. Alternatively, the photosensitive layer 212 may include a semiconductor layer provided in a multi-layered stack, for example, the photosensitive layer 212 may include an intrinsic semiconductor layer and P-type and N-type semiconductor layers located at both sides of the intrinsic semiconductor layer. The second electrode 213 may be a single layer of metal simple substance of molybdenum, copper, aluminum, titanium, niobium, nickel or molybdenum titanium, molybdenum niobium, molybdenum nickel alloy, or a combination stack of any of the above metals or alloys.

The light sensor 20 further includes a first transistor T1 electrically connected to the light sensing element 21, and the first transistor T1 is electrically connected to the second electrode 213. The first transistor T1 includes a first gate electrode G1, an active layer AS, a second gate electrode G2, and source and drain electrodes S and D. The second electrode 213 is electrically connected to the source S or the drain D of the first transistor T1, and in this embodiment, the second electrode 213 is electrically connected to the drain D of the first transistor T1.

The array substrate 100 further includes a buffer layer 13 between the first transistor T1 and the first substrate 10. The buffer layer 13 may prevent unwanted impurities or contaminants (e.g., moisture, oxygen, etc.) from diffusing from the first substrate 10 into devices that may be damaged by such impurities or contaminants, while also providing a planar top surface. Alternatively, the buffer layer 13 may be silicon nitride (SiNx), silicon oxide (SiOx), or a stack of silicon nitride and silicon oxide. In addition, the buffer layer 13 may be formed of a plurality of layers having different refractive indexes for scattering external light incident from the outside.

Specifically, the array substrate 100 further includes a first gate insulating layer 14, a second gate insulating layer 15, and a third insulating layer 16. The first gate electrode G1 is disposed on one side of the first substrate 10, more specifically, the first gate electrode G1 is disposed on the buffer layer 13, the first gate insulating layer 14 covers the first gate electrode G1 and the buffer layer 13, and the active layer AS is disposed on the first gate insulating layer 14.

Alternatively, the first gate G1 may be a single layer formed by a metal simple substance of molybdenum, copper, aluminum, titanium, niobium, nickel, or a molybdenum titanium, molybdenum niobium, molybdenum nickel alloy, or a combined stack of any of the above metals or alloys. The first gate insulating layer 14 may be a single layer of silicon nitride, silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, scandium zirconium oxide, or the like, or a stacked layer of any two or three thereof. The material of the active layer AS is a metal oxide semiconductor material, for example, the metal oxide semiconductor material may be one of zinc oxide, zinc oxynitride, tin oxide, indium oxide, gallium oxide, copper oxide, bismuth oxide, indium zinc oxide, zinc tin oxide, aluminum tin oxide, indium gallium zinc oxide, indium tin zinc oxide, aluminum indium tin zinc oxide, zinc sulfide, barium titanate, strontium titanate, and lithium niobate.

The second gate insulating layer 15 covers the active layer AS and the first gate insulating layer 14, and the second gate electrode G2 is disposed on the second gate insulating layer 15. The material of the second gate insulating layer 15 may be the same as that of the first gate insulating layer 14, and the material of the second gate G2 may be the same as that of the first gate G1.

The third insulating layer 16 covers the second gate electrode G2 and the second gate insulating layer 15, and the source electrode S and the drain electrode D are disposed on the third insulating layer 16. The second insulating layer 12 covers the source electrode S, the drain electrode D, and the photosensitive element 21. The material of the third insulating layer 16 may be the same as the material of the first gate insulating layer 14. The material of the source electrode S and the drain electrode D may be the same as the material of the second electrode 213.

Optionally, the source S and the drain D are arranged in the same layer as the photosensitive element 21. Specifically, the source electrode S and the drain electrode D are disposed in the same layer as the second electrode 213 of the photosensitive element 21, and the second electrode 213 may be integrally formed with the drain electrode D.

It should be noted that the term "same layer setting" in the present application refers to that, in a preparation process, a film layer formed by the same material is subjected to patterning treatment to obtain at least two different structures, and the at least two different structures are set in the same layer. For example, in this embodiment, the second electrode 213 and the source electrode S are formed by patterning the same conductive film layer, and the second electrode 213 and the source electrode S are disposed on the same layer.

Further, each of the sub-pixels SP includes a second transistor T2 and a pixel electrode PE electrically connected to the second transistor T2, the second transistor T2 and the first transistor T1 are arranged in the same layer, and the pixel electrode PE is arranged in the same layer as the first input electrode 41. The first transistor T1 and the second transistor T2 are disposed corresponding to the light shielding layer, the light shielding layer 30 is further provided with a second opening 302 at a position corresponding to the pixel electrode PE, and the second opening 302 exposes a portion of the pixel electrode PE.

Optionally, the subpixel SP further includes a second bridge electrode 52, and the pixel electrode PE is electrically connected to the second transistor T2 through the second bridge electrode 52, where the second bridge electrode 52 is disposed in the same layer as the first bridge electrode 51.

Specifically, a second via 112 is further disposed on the first insulating layer 11, and the second via 112 penetrates through the first insulating layer 11 and exposes a portion of the second bridge electrode 52. The pixel electrode PE is electrically connected to the second bridge electrode 52 through the second via 112. The light shielding layer 30 is further filled in the second via 112 and covers the pixel electrode PE in the second via 112. The second bridge electrode 52 is electrically connected to the second transistor T2 through a via hole of the second insulating layer 12.

The second transistor T2 also includes a first gate electrode G1, an active layer AS, a second gate electrode G2, and a source electrode S and a drain electrode D, where each film layer of the second transistor T2 is disposed in the same layer AS each film layer of the first transistor T1. The array substrate 100 further includes a second input electrode 42 and a third input electrode 43, the second input electrode 42 is electrically connected to the second gate G2 of the first transistor T1, and the third input electrode 43 is electrically connected to the second gate G2 of the second transistor T2. The second input electrode 42 and the third input electrode 43 are each arranged in the same layer as the source S.

The principle of the light-sensitive sensor 20 to recognize the spatial position of the object 600 to be recognized will be specifically described below.

Referring to fig. 3, a plurality of the photo sensors 20 are arranged in an array, and the photo sensors a, b, c, d, e, f are arranged at six intervals as shown in fig. 3. Each light sensor 20 can detect a certain interval above the first opening 301 on the light shielding layer 30, and the detection view angles of each light sensor 20 are the same. The sections detectable by the photo sensor 20 intersect with each other to form an overlapping section, such as the overlapping section bc, abc, abcd shown in fig. 3, and the overlapping section bc is the overlapping section formed by the intersection of the sections detectable by the photo sensor b and the photo sensor c. Each overlap interval has a one-to-one correspondence to its array response of light sensors 20. When the object 600 to be identified is located at a different position above the light sensor 20, an array response of the light sensor 20 is caused to correspond to it one-to-one. Therefore, the distance between the object and the array of the light sensor 20 can be judged by utilizing the array photoelectric response generated by the projection of the object 600 to be identified on the array of the light sensor 20, so that the detection of the spatial position of the object 600 to be identified is realized, and the technical problem that the existing non-contact control display screen cannot identify the spatial position of the object is solved.

Specifically, when the object 600 to be identified is at the initial position M1, the object 600 to be identified shields the light sensor a, b, c, d, e, f, and no response of the light sensor 20 to the external light source is generated, which can be recorded asWhen the object 600 to be identified is at the second position M2, the height of the second position M2 from the initial position M1 is H1, the object 600 to be identified will block the light sensor b, c, d, e, and the light sensors a, f respond to the external light source, and this state can be recorded as ∈>When the object 600 to be identified is at the third position M3, the height of the third position M3 from the initial position M1 is H2, the object 600 to be identified will block the light sensors c and d, and the light sensor a, b, e, f will respond to the external light source, and this state can be recorded as ∈>

When the processor reads the three different response states of the array of the light sensors 20 on the array substrate 100, the processor can be used to infer three different heights of the object 600 to be identified relative to the array substrate 100, so that the distance between the object and the array of the light sensors 20 can be determined by using the array photoelectric response generated by the projection of the object 600 to be identified onto the array of the light sensors 20, so as to realize the detection of the spatial position of the object 600 to be identified. Similarly, the array of light sensors 20 also produces different responses as the object 600 moves side-to-side or back-and-forth. Since these responses are one-to-one. By using this principle, the actual spatial position of the object 600 to be identified with respect to the array substrate 100 can be determined.

Based on the same inventive concept, the embodiments of the present application also provide a display panel 1000, where the display panel 1000 includes the array substrate 100 of one of the foregoing embodiments, and the display panel 1000 includes an organic light emitting diode display panel 1000, a liquid crystal display panel 1000, and the like. The embodiment of the present application takes the display panel 1000 as an example of the liquid crystal display panel 1000.

Referring to fig. 1 to fig. 4, fig. 4 is a schematic diagram illustrating a partial cross-sectional structure of a display panel 1000 according to an embodiment of the disclosure. Referring to fig. 4, the display panel 1000 includes an array substrate 100 and a color film substrate 200 disposed opposite to each other. The color film substrate 200 is located at a side of the light shielding layer 30 on the array substrate 100 away from the first substrate 10. The color film substrate 200 includes a second substrate 60, a color film layer 61 and a common electrode 62 layer disposed on the second substrate 60. The color film layer 61 is located between the second substrate 60 and the common electrode 62 layer, and the common electrode 62 is located at one side of the second substrate 60 close to the array substrate 100. The material of the second substrate 60 may be the same as the material of the first substrate 10.

The display panel 1000 further includes liquid crystal molecules 70 and support columns 80 between the array substrate 100 and the color film substrate 200. The support columns 80 are used for controlling the gap between the array substrate 100 and the color film substrate 200. The liquid crystal molecules 70 deflect under the electric fields of the pixel electrode PE and the common electrode 62 to regulate the amount of light transmitted.

In an embodiment, the present embodiment further provides a method for manufacturing an array substrate 100, please refer to fig. 1 to 15, fig. 5 is a schematic diagram of manufacturing a sub-pixel SP and a first gate G1 of a photo sensor 20 on a first substrate 10, fig. 6 is a schematic diagram of manufacturing an active layer AS on the structure of fig. 5, fig. 7 is a schematic diagram of manufacturing a second gate G2 on the structure of fig. 6, fig. 8 is a schematic diagram of manufacturing a third insulating layer 16 on the structure of fig. 7, fig. 9 is a schematic diagram of manufacturing a source S, a drain D, and a second electrode 213 on the structure of fig. 8, fig. 10 is a schematic diagram of manufacturing a photosensitive layer 212 and a first electrode 211 on the structure of fig. 9, fig. 11 is a schematic diagram of manufacturing a second insulating layer 12 on the structure of fig. 10, fig. 12 is a schematic diagram of manufacturing a first bridge electrode 51 and a second bridge electrode 52 on the structure of fig. 11, fig. 13 is a schematic diagram of manufacturing a first insulating layer 11 on the structure of fig. 12, fig. 14 is a schematic diagram of manufacturing a first insulating layer 16 on the structure of fig. 13 is a schematic diagram of manufacturing a first electrode 14 on the structure of fig. 13 and a second electrode 213 on the structure of fig. 15 is a schematic diagram of fig. 30.

Referring to fig. 5, a first substrate 10 is provided, a buffer layer 13 is deposited on the first substrate 10, a metal thin film is deposited on the buffer layer 13, a first gate G1 of a first transistor T1 of a photo sensor 20 and a first gate G1 of a second transistor T2 of a sub-pixel SP are formed by patterning the metal thin film using a photolithography process and an etching process, and a first gate insulating layer 14 is deposited on the first gate G1 and the buffer layer 13.

Referring to fig. 6, a semiconductor thin film is deposited on the first gate insulating layer 14, patterned using a photolithography process and an etching process to form an active layer AS of a first transistor T1 of the photo sensor 20 and an active layer AS of a second transistor T2 of the sub-pixel SP, and a second gate insulating layer 15 is deposited on the active layer AS and the first gate insulating layer 14.

Referring to fig. 7, a metal film is deposited on the second gate insulating layer 15, and the metal film is patterned using a photolithography process and an etching process to form a second gate G2 of the first transistor T1 of the photo sensor 20 and a second gate G2 of the second transistor T2 of the sub-pixel SP.

Referring to fig. 8, a third insulating layer 16 is deposited on the second gate electrode G2 for the active layer AS. The third insulating layer 16 is patterned using a photolithography process and a dry etching process to form a plurality of vias.

Referring to fig. 9, a metal film is deposited on the third insulating layer 16, and the metal film is patterned using a photolithography process and an etching process to form the source S and the drain D of the first transistor T1 of the photo sensor 20, the second electrode 213 of the photo sensor element 21, the source S and the drain D of the second transistor T2 of the sub-pixel SP, the second input electrode 42, and the third input electrode 43.

Referring to fig. 10, a semiconductor thin film and a transparent conductive thin film are deposited on the second electrode 213, and after two photolithography processes and etching processes, the first electrode 211 of the photosensitive element 21 is formed, and then the photosensitive layer 212 of the photosensitive element 21 is formed.

Referring to fig. 11, the photosensitive element 21, the source electrode S, the drain electrode D, the second input electrode 42, the third input electrode 43, and the third insulating layer 16 are deposited with a second insulating layer 12, and the second insulating layer 12 is patterned using a photolithography process and a dry etching process to form a plurality of vias.

Referring to fig. 12, a metal film is deposited on the second insulating layer 12, and the metal film is patterned using a photolithography process and an etching process to form a first bridge electrode 51 and a second bridge electrode 52.

Referring to fig. 13, a first insulating layer 11 is coated on the first bridge electrode 51, the second bridge electrode 52, and the second insulating layer 12, and the first insulating layer 11 is patterned using an exposure and development process to form a first via 111 and a second via 112. The coating process can be any one of spin coating, knife coating, spray coating, dip-coating and ink-jet printing, and the exposure wave band used in the exposure process can be any one of extreme ultraviolet light, deep ultraviolet light, visible light, electron beam and ion beam.

Referring to fig. 14, a transparent conductive film is deposited on the first insulating layer 11, and the transparent conductive film is patterned using a photolithography process and an etching process to form a first input electrode 41 and a pixel electrode PE.

Referring to fig. 15, a light shielding layer 30 is coated on the first input electrode 41, the pixel electrode PE, and the first insulating layer 11, and the light shielding layer 30 is patterned using an exposure and development process to form a first opening 301 and a second opening 302. The coating process can be any one of spin coating, knife coating, spray coating, dip-coating and ink-jet printing, and the exposure wave band used in the exposure process can be any one of extreme ultraviolet light, deep ultraviolet light, visible light, electron beam and ion beam.

As can be seen from the above embodiments:

the application provides an among array substrate and the display panel, array substrate includes first substrate and array arrangement are in the light sensor on the first substrate, array substrate still includes first insulating layer and shading layer, and first insulating layer sets up light sensor array response rather than one side of first substrate is kept away from to the light shading layer sets up first insulating layer is kept away from one side of light sensor, light sensor includes photosensitive element, the shading layer is in the correspondence light sensor's position is provided with first opening, first opening runs through the shading layer, every light sensor homoenergetic is through the certain interval of first opening detection its top, and interval intercrossing that light sensor can be surveyed forms overlap interval, and every overlap interval has its one-to-one light sensor array response, when waiting to discern the object and be in the different position of light sensor top, can arouse rather than one-to-one light sensor array response to waiting to discern the object projection to produce the light sensor array response, and the position that the light sensor produced on the object projection that awaits the recognition has realized that the object projection is to wait to take turns to the position the object response of light sensor array, has realized the non-contact with the existing technology of the object that the position of the sensor array is difficult to control the position of the sensor.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.

The foregoing embodiments of the present application have been described in detail, and specific examples have been employed herein to illustrate the principles and embodiments of the present application, the above embodiments being provided only to assist in understanding the technical solutions of the present application and their core ideas; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. An array substrate, characterized by including first substrate and array arrangement is at the light sensor on the first substrate, array substrate still includes:

2. The array substrate of claim 1, further comprising a first input electrode between the light shielding layer and the first insulating layer, the first opening exposing a portion of the first input electrode, the first input electrode being electrically connected to the photosensitive element.

3. The array substrate of claim 2, further comprising:

a second insulating layer covering the light sensor;

4. The array substrate of claim 3, wherein the photosensitive element comprises a first electrode, a photosensitive layer, and a second electrode that are stacked, the first electrode being located on a side of the second electrode away from the first substrate, the first input electrode being electrically connected to the first electrode;

5. The array substrate according to claim 1, wherein an orthographic projection of the first opening on the first substrate falls within a range of an orthographic projection of the photosensitive element on the first substrate.

6. The array substrate according to any one of claims 1 to 5, further comprising a plurality of sub-pixels arrayed on the first substrate with a gap between two adjacent sub-pixels, the light sensor being located in at least a part of the gap.

7. The array substrate according to claim 6, wherein each of the sub-pixels includes a second transistor and a pixel electrode electrically connected to the second transistor, the second transistor and the first transistor being disposed in the same layer, the pixel electrode being disposed in the same layer as the first input electrode;

8. The array substrate of claim 7, wherein the sub-pixel further comprises a second bridge electrode, the pixel electrode is electrically connected to the second transistor through the second bridge electrode, and the second bridge electrode is disposed in the same layer as the first bridge electrode.

9. The array substrate of claim 7, wherein the first transistor and the second transistor each comprise a first gate, an active layer, a second gate, and source and drain electrodes, the first gate being disposed on one side of the first substrate; the array substrate further includes:

10. A display panel comprising the array substrate according to any one of claims 1 to 9.