CN117595842A - Differential signal comparison method, differential signal comparison device and sensor - Google Patents
Differential signal comparison method, differential signal comparison device and sensor Download PDFInfo
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- CN117595842A CN117595842A CN202410076859.4A CN202410076859A CN117595842A CN 117595842 A CN117595842 A CN 117595842A CN 202410076859 A CN202410076859 A CN 202410076859A CN 117595842 A CN117595842 A CN 117595842A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
Abstract
The invention provides a differential signal comparison method, a differential signal comparison device and a differential signal sensor. The method comprises the following steps: confirming the directional input of the differential signal; comparing the differential signals to correspondingly acquire high or low electric signals; the high or low electrical signal is differentially compared to the reference threshold electrical signal and the output logic toggles when equal to the reference threshold electrical signal. The device comprises two homonymous terminals, a heteronymous terminal, a comparison circuit and a differential comparison circuit. The sensor comprises a comparing means. Compared with the prior art, the invention utilizes the complementarity of the differential signals, realizes the function of comparing the differential signals by using a single comparison device and a single reference threshold electric signal, effectively solves the problems of complex structure, high cost and high power consumption caused by adopting a plurality of comparison devices, simultaneously avoids introducing additional non-ideal influences such as signal distortion, mismatch, noise, delay and the like, and improves the reliability. In addition, the problem of asymmetric positive/negative inversion points of the differential signal due to the introduction of multiple reference thresholds and/or comparators is avoided.
Description
Technical Field
The present invention relates to the field of signal processing technologies, and in particular, to a differential signal comparing method, a differential signal comparing device, and a differential signal sensor.
Background
In the comparison of the differential mode component of the fully differential signal and the reference threshold electric signal, the differential signal is input into a group of differential signalsAnd) The output is a logic signal. When the differential mode component (+)>) The output logic toggles when the absolute value of (a) is equal to the reference threshold electrical signal.
In the prior art, the comparison of the differential mode component of the differential signal and the reference threshold electric signal generally comprises the following two comparison modes:
one is to use two operational amplifiers to respectively divide the differential signalsIs->Is converted into two signals to ground in inverse relation>Is->Wherein->=/>-/>,/>=/>-/>. If the operational amplifier is powered by a single power supply,is->Are all greater than 0. If the operational amplifier is powered by dual power supplies, +.>Is->Or may be smaller than 0; further, the two signals to ground are +.>Is->Respectively with reference threshold electric signal V REF,DM Comparing, correspondingly obtaining output ∈>Is->The method comprises the steps of carrying out a first treatment on the surface of the Then the final output +.>。
Alternatively, the differential signal is passed through two comparatorsAnd->Respectively with two different reference threshold electric signals Is->Comparing and obtaining the output +.>Is->The method comprises the steps of carrying out a first treatment on the surface of the Then the final output +.>. Wherein (1)>Representing the common mode voltage of the differential signal, ">Representing the differential mode voltage of the differential signal,indicating the desired differential mode signal inversion threshold.
However, the two comparison modes adopt a plurality of operational amplifiers and comparators, so that the circuit structure is complex, the corresponding circuit area is large, the cost is high, the power consumption is large, and additional non-ideal effects such as signal distortion, mismatch, noise, delay and the like can be introduced. In addition, the introduction of multiple reference threshold electrical signals or comparators can cause asymmetry in the positive/negative inversion points of the differential mode signal.
Disclosure of Invention
The invention aims to solve the technical problems existing in the prior art and provides a differential signal comparison method, a differential signal comparison device and a differential signal sensor.
In order to solve the above-mentioned technical problems, the present invention provides a method for comparing differential signals, which includes:
confirming a directional input of the differential signal, wherein the directional input comprises a positive input or a negative input;
comparing two electric signals of the differential signals, and correspondingly acquiring a high electric signal or a low electric signal in the two electric signals according to the positive input or the negative input;
And performing differential comparison on the high electric signal or the low electric signal and a reference threshold electric signal, and outputting logic inversion when the high electric signal or the low electric signal is equal to the reference threshold electric signal.
Further, the high electric signal or the low voltage signal is differentially compared with a reference threshold electric signal, and when the high electric signal or the low electric signal is equal to the reference threshold electric signal, the output logic inversion specifically comprises:
carrying out differential comparison on the high electric signal or the low electric signal and a reference threshold electric signal to obtain a corresponding electric difference value;
amplifying the electric difference value to obtain an inverse amplified electric difference value inverse to the electric difference value;
performing inverse logic processing on the inverse amplified electric difference value to obtain an amplified electric difference value;
the output logic toggles when the amplified electrical difference is equal to zero.
Further, the differential comparison between the high electric signal or the low electric signal and the reference threshold electric signal is performed, and the corresponding electric difference value is obtained, which comprises:
copying the high electric signals to form corresponding high-copy electric signals;
performing differential comparison on the high-replication electric signal and a reference threshold electric signal to obtain an electric difference value; or alternatively
And performing differential comparison on the high electric signal or the low electric signal and a reference threshold electric signal to obtain a corresponding electric difference value, wherein the differential comparison comprises the following steps:
copying the reference threshold electrical signal to form a reference threshold copy electrical signal;
and carrying out differential comparison on the low electric signal and the reference threshold value copy electric signal to obtain an electric difference value.
Further, the high electric signal or the low electric signal is differentially compared with a reference threshold electric signal, when the high electric signal or the low electric signal is equal to the reference threshold electric signal, in output logic inversion, when the direction input of the differential signal is positive input and the corresponding reference threshold electric signal is negative input, the reference threshold electric signal is the sum of the common mode voltage signal of the differential signal and one half of expected differential signal inversion threshold signals.
Further, the high electrical signal or the low electrical signal is differentially compared with a reference threshold electrical signal, when the high electrical signal or the low electrical signal is equal to the reference threshold electrical signal, in output logic inversion, when the direction input of the differential signal is negative input and the corresponding reference threshold electrical signal is positive input, the reference threshold electrical signal is the difference between the common mode voltage signal of the differential signal and one half of the expected differential signal inversion threshold.
The invention also provides a device for comparing differential signals, which comprises:
the system comprises at least two homonymous terminals for accessing differential signals and at least one heteronymous terminal for accessing reference threshold electric signals;
the comparison circuit is connected with the at least two homonymous terminals and is used for comparing the two electric signals of the differential signal so as to output a high electric signal of the two electric signals or output a low electric signal of the two electric signals;
and the differential comparison circuit is connected with the comparison circuit and the at least one synonym end and is used for differentially comparing the high electric signal with a reference threshold electric signal or differentially comparing the low electric signal with the reference threshold electric signal, and when the high electric signal or the low electric signal is equal to the reference threshold electric signal, the output logic is turned over.
Further, the differential comparison circuit includes:
the differential comparison sub-circuit is connected with the comparison circuit and the at least one synonym end and is used for differentially comparing the high electric signal or the low electric signal with the reference threshold electric signal so as to output a corresponding electric difference value;
the amplifying circuit is electrically connected with the differential comparison sub-circuit and is used for amplifying the electric difference value to output an inverse amplified electric difference value inverse to the electric difference value;
And the inverting logic circuit is electrically connected with the amplifying circuit and is used for inverting logic to process the inverse amplifying electric difference value to form an amplifying electric difference value, and when the amplifying electric difference value is equal to zero, the amplifying electric difference value is enabled to be logically inverted and output.
Further, the comparing device comprises a power supply end; the comparison circuit comprises a first MOS tube and a second MOS tube;
the at least two homonymous terminals are positive input terminals, and the corresponding at least one heteronymous terminal is a negative input terminal; the grid electrode of the first MOS tube is connected with one of the at least two homonymous ends, and the source electrode is grounded; the grid electrode of the second MOS tube is connected with the other of the at least two homonymous ends, and the source electrode is grounded; the drain electrode of the first MOS tube and the drain electrode of the second MOS tube are both connected with the differential comparison circuit; or (b)
The at least two homonymous terminals are negative input terminals, and the corresponding at least one heteronymous terminal is a positive input terminal; the grid electrode of the first MOS tube is connected with one of the at least two homonymous terminals, and the source electrode of the first MOS tube is connected with the power supply terminal; the grid electrode of the second MOS tube is connected with the other of the at least two homonymous ends, and the source electrode of the second MOS tube is connected with the power supply end; the drain electrode of the first MOS tube and the drain electrode of the second MOS tube are both connected with the differential comparison circuit.
Further, the comparison device also comprises a power end, a voltage output end and a current mirror; the comparison circuit comprises a first MOS tube and a second MOS tube; the current mirror comprises a third MOS tube and a fourth MOS tube, and the differential comparison sub-circuit comprises a comparison output end and a fifth MOS tube; the amplifying circuit comprises a sixth MOS tube and a current source; the inverting logic circuit includes an inverter;
the at least two homonymous terminals are positive input terminals, and the corresponding at least one heteronymous terminal is a negative input terminal; the comparison output end is connected with the drains of the first MOS tube and the second MOS tube; the source electrode of the third MOS tube is connected with the power supply end, the drain electrode of the third MOS tube is connected with the comparison output end, and the grid electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube and is connected with the drain electrode of the third MOS tube; the source electrode of the fourth MOS tube is connected with the power supply end; the grid electrode of the fifth MOS tube is connected with the at least one synonym end, the source electrode of the fifth MOS tube is grounded, and the drain electrode of the fifth MOS tube is connected with the drain electrode of the fourth MOS tube; the source electrode of the sixth MOS tube is connected with the power supply end, the grid electrode of the sixth MOS tube is connected between the drain electrode of the fifth MOS tube and the drain electrode of the fourth MOS tube, and the drain electrode of the sixth MOS tube is grounded through the current source; the input end of the inverter is connected between the drain electrode of the sixth MOS tube and the current source, and the output end of the inverter is connected with the voltage output end; or (b)
The at least two homonymous terminals are negative input terminals, and the corresponding at least one heteronymous terminal is a positive input terminal; the comparison output end is connected with the drains of the first MOS tube and the second MOS tube; the source electrode of the third MOS tube is grounded, the drain electrode of the third MOS tube is connected with the drain electrode of the fifth MOS tube, and the grid electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube and is in short circuit with the drain electrode of the third MOS tube; the source electrode of the fourth MOS tube is grounded, and the drain electrode of the fourth MOS tube is connected with the drain electrodes of the first MOS tube and the second MOS tube; the grid electrode of the fifth MOS tube is connected with the at least one synonym end, and the source electrode of the fifth MOS tube is connected with the power supply end; the source electrode of the sixth MOS tube is grounded, and the grid electrode of the sixth MOS tube is connected with the drain electrode of the fourth MOS tube; one end of the current source is connected with the power supply end, and the other end of the current source is connected with the drain electrode of the sixth MOS tube; the input end of the inverter is connected between the drain electrode of the sixth MOS tube and the current source, and the output end of the inverter is connected with the voltage output end.
The invention also provides a sensor which comprises the differential signal comparison device, and the comparison device adopts the differential signal comparison method.
The beneficial effects of the invention are as follows: the two electric signals of the differential signals are compared to obtain a high electric signal or a low electric signal in the two electric signals, and the high electric signal or the low electric signal is correspondingly converted into a high voltage equivalent signal or a low voltage equivalent signal, so that the finally obtained high electric signal or the low electric signal is only related to the absolute value of the differential mode component of the differential signal and is irrelevant to the polarity of the differential mode component, differential comparison can be realized by setting a single reference threshold electric signal, and when the high electric signal or the low electric signal is equal to the reference threshold electric signal, the output logic is inverted. Therefore, compared with the prior art, the invention utilizes the complementarity of the differential signals, realizes the function of comparing the differential signals by using a single comparison device and a single reference threshold electric signal, effectively solves the problems of complex structure, high cost and high power consumption caused by adopting a plurality of amplifiers and/or comparators, simultaneously avoids introducing additional non-ideal influences such as signal distortion, mismatch, noise, delay and the like, simplifies the complexity of a circuit and improves the reliability. In addition, the single reference threshold electric signal is adopted, so that the problem of asymmetrical positive/negative inversion points of the differential signal caused by introducing a plurality of reference thresholds and/or comparators is avoided.
Additional aspects of the invention and advantages thereof will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a step diagram of a method for comparing differential signals according to an embodiment of the present invention;
FIG. 2 is a waveform diagram of a differential signal, a common mode component and a reference threshold electrical signal according to the comparison method of differential signals provided by the present invention;
FIG. 3 is a waveform diagram of another differential signal, common mode component and reference threshold electrical signal of the differential signal comparing method according to the present invention;
FIG. 4 is a waveform diagram of an output logic flip of the differential signal comparison method according to the present invention;
FIG. 5 is a step S3 diagram of a method for comparing differential signals according to one embodiment shown in FIG. 1;
FIG. 6 is a step S31 diagram of a comparison method of the differential signals shown in FIG. 5;
FIG. 7 is a step S31 diagram of another method for comparing differential signals shown in FIG. 5;
FIG. 8 is a schematic diagram of a comparison device for differential signals according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of a differential signal comparing apparatus according to another embodiment of the present invention;
FIG. 10 is a block diagram of a differential signal comparing apparatus according to an embodiment of the present invention;
FIG. 11 is a block diagram of a differential signal comparing device according to another embodiment of the present invention;
FIG. 12 is a specific circuit diagram of the differential signal comparing device of the embodiment shown in FIG. 11;
fig. 13 is a specific circuit diagram of a comparison device for differential signals according to another embodiment shown in fig. 11.
Detailed Description
Other advantages and effects of the present disclosure will become readily apparent to those skilled in the art from the following disclosure, which describes embodiments of the present disclosure by way of specific examples. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present disclosure. The disclosure may be embodied or practiced in other different specific embodiments, and details within the subject specification may be modified or changed from various points of view and applications without departing from the spirit of the disclosure. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. All other embodiments, which can be made by one of ordinary skill in the art without inventive effort, based on the embodiments in this disclosure are intended to be within the scope of this disclosure.
It is noted that various aspects of the embodiments are described below within the scope of the following claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present disclosure, one skilled in the art will appreciate that one aspect described herein may be implemented independently of any other aspect, and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented and/or a method practiced using any number of the aspects set forth herein. In addition, such apparatus may be implemented and/or such methods practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.
Fig. 1 is a flowchart of a comparison method of differential signals according to an embodiment of the present invention. As shown in fig. 1, the method includes:
in step S1, directional inputs of the differential signals are confirmed, including positive or negative inputs.
In this embodiment, the directional inputs of the two electrical signals of the differential signal are the same-directional inputs, i.e., positive inputs or negative inputs.
And S2, comparing the two electric signals of the differential signal, and correspondingly acquiring a high electric signal or a low electric signal in the two electric signals according to the positive input or the negative input. When the directional input of the differential signal is the forward input, the high electric signal, that is, the larger of the two electric signals is obtained after comparing the two electric signals of the differential signal. When the directional input of the differential signal is negative input, the two electrical signals of the differential signal are compared, and then a low electrical signal, that is, the smaller of the two electrical signals is obtained.
Specifically, as shown in FIG. 2, the two electrical signals of the differential signal are two electrical signals with equal amplitude and opposite phase, respectively=/>+/>，/>=/>-/>. Wherein (1)>As a common-mode component of the differential signal,is the differential mode component of the differential signal. In this embodiment, the directional inputs of the two electrical signals of the differential signal are both positive inputs, for +.>And->Comparing, during the first half period of the two electrical signals, < >>Is greater than->Then obtain a high electrical signal of +.>=/>+/>The method comprises the steps of carrying out a first treatment on the surface of the In the second half period of the two electrical signals, +.>Is greater than->Then obtain a high electrical signal of +.>=/>-。
As shown in fig. 3, the directional inputs of the two electrical signals of the differential signal are both negative inputs, pair And->Comparing, during the first half period of the two electrical signals, < >>Less than->Then obtain a low electrical signal of +.>=/>-/>The method comprises the steps of carrying out a first treatment on the surface of the In the second half period of the two electrical signals, +.>Less than->Then obtain a low electrical signal of +.>=/>+/>。
In addition, the obtained high or low electric signal is converted into a high or low voltage equivalent signal, so that the finally obtained high or low electric signal is related to the absolute value of the differential mode component of the differential signal only, and is independent of the polarity of the differential mode component, i.e., the obtained high electric signal is=/>+/>Or +.>=/>-And the low electric signal obtained is +.>=/>-/>Or +.>=/>+/>。
With continued reference to fig. 1, step S3, the high electrical signal or the low electrical signal is differentially compared with a reference threshold electrical signal, and when the high electrical signal or the low electrical signal is equal to the reference threshold electrical signal, the output logic is flipped.
Specifically, in the step S3, the direction inputs of the two electric signals in the differential signal are both positive inputs, and the obtained high electric signal is applied to the first half period of the two electric signals=/>+/>Further comparing with the preset reference threshold electric signal, when the high electric signal is ++as shown in FIG. 2 and FIG. 4>=/>+/>When the reference threshold electric signal is equal to the reference threshold electric signal, the output logic of the VOUT is reversed, namely, the high electric signal +. >The intersection with the reference threshold electrical signal is the starting point of the logic inversion, and the high electrical signal obtained above is +.>=/>-/>Further comparing with the preset reference threshold electric signal, when the high electric signal is ++as shown in FIG. 3 and FIG. 4>=/>-/>When the reference threshold electric signal is equal to the reference threshold electric signal, the output logic of the VOUT is reversed, namely, the high electric signal +.>The intersection with the reference threshold electrical signal is the starting point of the logic flip.
In some embodiments, when the direction input of the differential signal is positive input and the corresponding reference threshold electric signal is negative input, the two electric signals of the differential signal are compared to obtain a high electric signal of the two electric signals, which can be expressed as max=/>+/>When the reference threshold electric signal is set, the common mode voltage is +.>Is added with a preset value +.>Can realize the inversion of output logic when the high electric signal is equal to the reference threshold electric signal, namely the common-mode voltage signal of which the reference threshold electric signal is a differential signal>Toggling a threshold signal with one-half of a desired differential signalAnd (3) summing. The reference threshold electrical signal is formulated as +.>。
The direction inputs of the two electric signals of the differential signal are negative inputs, and the obtained low electric signal is used in the first half period of the two electric signals =/>-/>When the low electric signal is +.>=/>-/>When the reference threshold electric signal is equal, the VOUT output logic is reversed, namely, the low electric signal +.>The intersection with the reference threshold electrical signal is the starting point of the logic inversion, and the low electrical signal obtained above is applied during the second half period of the two electrical signals>=/>+/>Compared with a preset reference threshold electric signal, when the low electric signal +>=/>+/>When the reference threshold electric signal is equal, the VOUT output logic is reversed, namely, the low electric signal +.>The intersection with the reference threshold electrical signal is the starting point of the logic flip.
In some embodiments, when the direction input of the differential signal is negative input and the corresponding reference threshold electric signal is positive input, the two electric signals of the differential signal are compared, and after the low electric signal of the two electric signals is obtained, the signal can be expressed as min=/>-/>When the reference threshold electric signal is set, at the common mode voltage +.>Subtracting a preset value +.>The output logic is inverted when the low electric signal is equal to the reference threshold electric signal, namely the common-mode voltage signal of which the reference threshold electric signal is a differential signal >Inversion threshold signal from one half of desired differential signal +.>And (3) a difference. The reference threshold electrical signal is formulated as +.>。
In this embodiment, by comparing two electrical signals of the differential signal, a high electrical signal or a low electrical signal of the two electrical signals is obtained and is converted into a high voltage equivalent signal or a low voltage equivalent signal, so that the finally obtained high electrical signal or low electrical signal is only related to the absolute value of the differential mode component of the differential signal and is irrelevant to the polarity of the differential mode component, therefore, differential comparison can be achieved by setting a single reference threshold electrical signal, and when the high electrical signal or the low electrical signal is equal to the reference threshold electrical signal, the output logic is inverted. Thus, compared with the existing scheme, the embodiment utilizes the complementarity of the differential signals, and realizes the differential signal comparison function by adopting a single differential comparison process and a single reference threshold electric signal, thereby effectively solving the problem of complex comparison process caused by adopting a plurality of differential comparison processes and a plurality of reference threshold electric signals, avoiding introducing additional non-ideal influences such as signal distortion, mismatch, noise, delay and the like, and being beneficial to simplifying the complexity and improving the reliability of the differential comparison method.
In some embodiments, the high electrical signal or the low electrical signal is differentially compared with a reference threshold electrical signal, and when the high electrical signal or the low electrical signal is equal to the reference threshold electrical signal, the output logic is inverted, as shown in fig. 5, specifically including:
step S31, the high electric signal or the low electric signal is subjected to differential comparison with a reference threshold electric signal to obtain a corresponding electric difference value; step S32, amplifying the electric difference value to obtain an inverse amplified electric difference value inverse to the electric difference value; step S33, carrying out inverse logic processing on the inverse amplified electric difference value to obtain an amplified electric difference value; step S34, outputting a logic flip when the amplified difference is equal to zero.
The two electrical signals of the differential signal are initially voltage signals. In this embodiment, the obtained high-voltage signal or low-voltage signal, that is, the high-voltage signal or low-voltage signal, is further compared with the reference threshold electrical signal in a differential manner, and a voltage difference exists between the high-voltage signal or the low-voltage signal and the reference threshold electrical signal, so that a corresponding voltage difference is generated. Further, in order to facilitate transmission and processing of the electric signal, the obtained voltage difference is amplified, and accordingly an inverse amplified voltage difference inverse to the voltage difference is obtained. Further, the reverse amplified voltage difference is inverted, and at this time, the forward amplified voltage difference, that is, the amplified voltage difference obtained after the differential comparison between the high voltage signal or the low voltage signal and the reference threshold electric signal is obtained. Finally, the output logic toggles when the amplified voltage difference is equal to zero, i.e., when the high voltage signal or the low voltage signal is equal to the reference threshold electrical signal as described above.
In some embodiments, after the corresponding voltage difference is generated, the voltage difference is converted into a current difference and converted into a voltage difference again.
In some embodiments, the differential comparison between the high electrical signal or the low electrical signal and the reference threshold electrical signal is performed to obtain a corresponding electrical difference value, as shown in fig. 6, including:
step 311a, copying the high electrical signal to form a corresponding high copy electrical signal; and step 312a, performing differential comparison on the high-replication electric signal and a reference threshold electric signal to obtain an electric difference value.
In this embodiment, when the directional inputs of the two electrical signals of the differential signal are both forward inputs, the high electrical signal is duplicated at this time to form a high duplicated electrical signal, so as to ensure that the obtained high electrical signal is constant, so that the obtained high electrical signal is further compared with the reference threshold electrical signal in a differential manner, thereby obtaining an electrical difference value.
In some embodiments, the differential comparison between the high electrical signal or the low electrical signal and the reference threshold electrical signal is performed to obtain a corresponding electrical difference value, as shown in fig. 7, including: step 311b, copying the reference threshold electrical signal to form a reference threshold copy electrical signal; and step 312b, performing differential comparison on the low electric signal and the reference threshold replica electric signal to obtain an electric difference value.
In this embodiment, when the direction inputs of the two electrical signals of the differential signal are both negative inputs, the reference threshold electrical signal is duplicated at this time to form the reference threshold duplicated electrical signal, so as to ensure that the reference threshold electrical signal is constant, so that the reference threshold electrical signal is further compared with the low electrical signal in a differential manner, and thus a corresponding electrical difference value is obtained.
The invention also provides a device 1 for comparing differential signals. The comparison device 1 is integrated into a single comparator, and the comparison of differential signals is realized by adopting three input ends. Specifically, as shown in fig. 8, two of the three input terminals are positive input terminals, and the other input terminal is negative input terminal. As shown in fig. 9, two of the three input terminals may be negative input terminals, and the other input terminal may be positive input terminal. The above-described method of comparing differential signals is applied to the comparison apparatus 1.
Specifically, as shown in fig. 10, the comparison device 1 includes: at least two homonymous terminals 2, at least one heteronymous terminal 3, a comparison circuit 4 and a differential comparison circuit 5. Wherein at least two are identical toThe name end 2 is used for accessing differential signals, namely, respectively accessing=/>+，/>=/>-/>. At least one nominated terminal 3 is used for accessing the reference threshold electric signal. The comparison circuit 4 is connected to the at least two homonymous terminals 2 and is used for comparing two electrical signals of the differential signal so as to output a high electrical signal of the two electrical signals or output a low electrical signal of the two electrical signals. The differential comparison circuit 5 is connected to the comparison circuit 4 and the at least one synonym terminal 3, and is configured to differentially compare the high electrical signal with a reference threshold electrical signal, or differentially compare the low electrical signal with a reference threshold electrical signal, and output logic is inverted when the high electrical signal or the low electrical signal is equal to the reference threshold electrical signal.
In this embodiment, the comparing circuit 4 is configured to compare the magnitudes of two electrical signals of the differential signal, and output the larger electrical signal, i.e. the high electrical signal, or output the smaller electrical signal, i.e. the low electrical signal, according to the condition of the input in the corresponding direction. Under the condition that at least two homonymous terminals 2 are positive input terminals and at least one homonymous terminal is negative input terminal, the differential comparison circuit 5 carries out differential comparison on a high electric signal and a reference threshold electric signal, and when the high electric signal is equal to the reference threshold electric signal, the output logic is turned over; or, when at least two homonymous terminals 2 are negative input terminals and at least one homonymous terminal is positive input terminal, the differential comparison circuit 5 compares the low electric signal with the reference threshold electric signal in a differential mode, and when the low electric signal is equal to the reference threshold electric signal, the output logic is inverted. Therefore, compared with the prior art, the invention utilizes the complementarity of the differential signals, realizes the function of comparing the differential signals by using a single comparison device and a single reference threshold electric signal, effectively solves the problems of complex structure, high cost and high power consumption caused by adopting a plurality of amplifiers and/or comparators, simultaneously avoids introducing additional non-ideal influences such as signal distortion, mismatch, noise, delay and the like, simplifies the complexity of a circuit and improves the reliability. In addition, the single reference threshold electric signal is adopted, so that the problem of asymmetrical positive/negative inversion points of the differential signal caused by introducing a plurality of reference thresholds and/or comparators is avoided.
In some embodiments, as shown in fig. 11, the differential comparing circuit 5 includes: a differential comparison sub-circuit 6, an amplifying circuit 7 and an inverting logic circuit 8. The differential comparison sub-circuit 6 is connected with the comparison circuit 4 and the at least one synonym terminal 3, and is used for differentially comparing the high electric signal or the low electric signal with the reference threshold electric signal so as to output a corresponding electric difference value. The amplifying circuit 7 is electrically connected to the differential comparing sub-circuit and is used for amplifying the electric difference value to output an inverse amplified electric difference value inverse to the electric difference value. The inverting logic circuit 8 is electrically connected to the amplifying circuit 7, and is configured to process the inverted amplified electrical difference value by inverting logic to form an amplified electrical difference value, and when the amplified electrical difference value is equal to zero, enable the amplified electrical difference value to be output in a logic inversion manner.
In this embodiment, the above-mentioned high electrical signal or low electrical signal is further differentially compared with the reference threshold electrical signal by the differential comparing sub-circuit 6, and the high electrical signal or the low electrical signal has an electrical difference with the reference threshold electrical signal, so that a corresponding electrical difference is generated. Further, in order to facilitate transmission and processing of the electric signal, the electric difference is amplified by the amplifying circuit 7, and accordingly, an inverse amplified electric difference inverse to the electric difference is obtained. The reverse amplified electric difference value is inverted through the reverse logic circuit 8, and the forward amplified electric difference value is obtained at this time, that is, the amplified electric difference value obtained after the difference comparison between the high electric signal or the low electric signal and the reference threshold electric signal. Finally, the output logic toggles when the amplified electrical difference is equal to zero, i.e., when the high or low electrical signal is equal to the reference threshold electrical signal as described above.
As shown in fig. 12, in some embodiments, the comparing device 1 includes a power supply terminal VCC; the comparison circuit 4 comprises a first MOS tube M1 and a second MOS tube M2; when the at least two homonymous terminals 2 are positive input terminals and the at least one heteronymous terminal 3 is negative input terminal, the grid electrode of the first MOS tube M1 is connected with one of the at least two homonymous terminals 2, and the source electrode is grounded; the grid electrode of the second MOS tube M2 is connected with the other one of the at least two homonymous terminals 2, and the source electrode is grounded; the drain electrode of the first MOS tube M1 and the drain electrode of the second MOS tube M2 are both connected with the differential comparison circuit 5.
In this embodiment, the first MOS transistor M1 and the second MOS transistor M2 are alternatively turned on, and are both NMOS transistors. When the voltage of the input end of the first MOS tube M1 is higher than that of the input end of the second MOS tube M2, the first MOS tube M1 is turned on, the second MOS tube M2 is turned off, and otherwise, the first MOS tube M1 is turned off, and the second MOS tube M2 is turned on. The comparison structure formed by the first MOS tube M1 and the second MOS tube M2 can realize differential comparison of two electric signals of differential signals, so that a high electric signal in the two electric signals is obtained.
In some embodiments, the comparing device 1 further comprises a voltage output VOUT and a current mirror 9; the current mirror 9 includes a third MOS transistor M3 and a fourth MOS transistor M4. The differential comparing sub-circuit 6 comprises a comparing output a, i.e. the output of the comparing circuit 4, and a fifth MOS transistor M5. The comparison output end A and the fifth MOS tube M5 form a differential structure, and the first MOS tube M1, the second MOS tube M2 and the fifth MOS tube M5 form a differential structure. The amplifying circuit 7 comprises a sixth MOS tube M6 and a current source I; the inverting logic circuit 8 includes an inverter 10.
Specifically, a source electrode of the third MOS transistor M3 is connected to the power supply terminal VCC, a drain electrode of the third MOS transistor M3 is connected to drain electrodes of the first MOS transistor M1 and the second MOS transistor M2, and a gate electrode of the third MOS transistor M3 is connected to a gate electrode of the fourth MOS transistor M4 and to a drain electrode of the third MOS transistor M3; the source electrode of the fourth MOS tube M4 is connected with the power supply end VCC; the grid electrode of the fifth MOS tube M5 is connected with the at least one synonym end 3, the source electrode of the fifth MOS tube M5 is grounded, and the drain electrode of the fifth MOS tube M5 is connected with the drain electrode of the fourth MOS tube M4; the source electrode of the sixth MOS tube M6 is connected with the power supply end VCC, the grid electrode of the sixth MOS tube M6 is connected between the drain electrode of the fifth MOS tube M5 and the drain electrode of the fourth MOS tube M4, and the drain electrode of the sixth MOS tube M6 is grounded through the current source I; the input end of the inverter 10 is connected between the drain electrode of the sixth MOS transistor M6 and the current source I, and the output end is connected to the voltage output end VOUT.
In this embodiment, the current mirror 9 is used for copying a first current in the first MOS transistor M1 in the on state or for copying a second current in the second MOS transistor M2 in the on state. When the gate potential of the sixth MOS transistor is the intermediate potential, the current of the third MOS transistor M3 is equal to the current of the fourth MOS transistor M4, so that the current of the fourth MOS transistor M4 is compared with the current of the fifth MOS transistor M5, that is, the first current or the second current is compared with the current of the fifth MOS transistor M5. If the current in the fourth MOS transistor M4 is greater than the current in the fifth MOS transistor M5, and due to the parasitic capacitance of the sixth MOS transistor M6, the gate voltage of the sixth MOS transistor M6 is increased, and conversely, the gate voltage of the sixth MOS transistor M6 is decreased. Further, the output is converted into a logic level output after amplification by the sixth MOS transistor M6 and reverse processing by the inverter 10. In addition, since the drain voltage of the sixth MOS transistor M6 is opposite to the gate voltage, the voltage outputted from the voltage output terminal VOUT is identical to the gate voltage of the sixth MOS transistor M6 after the drain voltage is inverted through the inverter 10.
In this embodiment, the current mirror 9 copies the current mirror image of the first MOS transistor M1 or the second MOS transistor M2 in the on state to the fourth MOS transistor M4, so that a current difference is formed between the current mirror image and the current of the fifth MOS transistor M5, thereby affecting the change of the gate voltage of the sixth MOS transistor M6, and then performing logic output through the inverter 10. In this embodiment, the comparing device 1 further comprises a first tail current source. First tail current source->One end of the fifth MOS tube M5 is connected with the source electrode of the first MOS tube M1, the source electrode of the second MOS tube M2 and the source electrode of the fifth MOS tube M5, and the other end of the fifth MOS tube M5 is grounded. First tail current source->More current flows into the side of the input voltage where the input voltage is higher for forming a current difference. I.e. the first tail current source +.>When the first MOS tube M1 is conducted and the formed high electric signal is larger than the reference threshold electric signal, more flows to the first MOS tube M1, otherwise, when the formed high electric signal is smaller than the reference threshold electric signal, more flows to the fifth MOS tube M5, so that a voltage difference is formed between the first MOS tube M1 and the fifth MOS tube M5.
As can be seen from fig. 2, in the present embodiment, the voltage of the larger signal in the differential signal is higher in the first half period of the two electric signals=/>+/>And reference threshold electrical signal->Comparing at +. >When the voltage is equal to the reference threshold electric signal, the voltage output terminal VOUT outputs a logic level. In the second half period of the two electrical signals, the voltage of the larger signal of the differential signal +.>=-/>And reference threshold electrical signal->Comparing at +.>When the voltage is equal to the reference threshold electric signal, the voltage output terminal VOUT outputs a logic level. Therefore, the comparison device 1 in the application only adopts 6 MOS tubes, 1 current source and 1 inverter 10, has a simple structure, only introduces 1 reference threshold electric signal, and ensures the symmetry of the positive/negative turning point of the differential mode signal. Compared with the prior art adopting a plurality of amplifiers and/or comparators, the cost, the area and the power consumption are effectively reduced, and fewer devices are adopted, so that the undesirable effects such as additional signal distortion, mismatch, noise, delay and the like are not introduced.
As shown in fig. 13, in some embodiments, when the at least two homonymous terminals 2 are negative input terminals and the at least one heteronymous terminal 3 is a positive input terminal, the gate of the first MOS transistor M1 is connected to one of the at least two homonymous terminals 2, and the source is connected to the power supply terminal VCC; the grid electrode of the second MOS tube M2 is connected with the other one of the at least two homonymous terminals 2, and the source electrode is connected with the power supply terminal VCC; the drain electrode of the first MOS tube M1 and the drain electrode of the second MOS tube M2 are both connected with the differential comparison circuit 5.
The difference between this embodiment and the above embodiment is that the gate of the first MOS transistor M1 and the gate of the second MOS transistor M2 are respectively connected to at least two negative input ends, and are PMOS transistors. When the voltage of the input end of the first MOS tube M1 is higher than that of the input end of the second MOS tube M2, the second MOS tube M2 is turned on, the first MOS tube M1 is turned off, and otherwise, the second MOS tube M2 is turned off, and the first MOS tube M1 is turned on. The comparison structure formed by the first MOS tube M1 and the second MOS tube M2 can realize differential comparison of two electric signals of differential signals, so that a low electric signal in the two electric signals is obtained.
In some embodiments, the source of the third MOS transistor M3 is grounded, the drain of the third MOS transistor M3 is connected to the drain of the fifth MOS transistor M5, and the gate of the third MOS transistor M3 is connected to the gate of the fourth MOS transistor M4 and to the drain of the third MOS transistor M3; the source electrode of the fourth MOS tube M4 is grounded, and the drain electrode of the fourth MOS tube M4 is connected with the drain electrodes of the first MOS tube M1 and the second MOS tube M2; the grid electrode of the fifth MOS tube M5 is connected with the at least one synonym terminal 3, and the source electrode of the fifth MOS tube M5 is connected with the power supply terminal VCC; the source electrode of the sixth MOS tube M6 is grounded, and the grid electrode of the sixth MOS tube M6 is connected with the drain electrode of the fourth MOS tube M4; one end of the current source I is connected with the power supply end VCC, and the other end of the current source I is connected with the drain electrode of the sixth MOS tube M6; the input end of the inverter 10 is connected between the drain electrode of the sixth MOS transistor M6 and the current source I, and the output end is connected to the voltage output end VOUT.
In this embodiment, the current mirror 9 is used for copying the current of the fifth MOS transistor M5. When the gate potential of the sixth MOS transistor M6 is the intermediate potential, the current of the third MOS transistor M3 is equal to the current of the fourth MOS transistor M4, so that the current of the fourth MOS transistor M4 is compared with the current of the first MOS transistor M1 or the second MOS transistor M2, that is, the current of the fifth MOS transistor M5 is compared with the first current or the second current. If the current in the fourth MOS transistor M4 is greater than the current in the first MOS transistor M1 or the second MOS transistor M2, the gate voltage of the sixth MOS transistor M6 increases, whereas the gate voltage of the sixth MOS transistor M6 decreases. Further, the output is converted into a logic level output after amplification by the sixth MOS transistor M6 and reverse processing by the inverter 10.
In this embodiment, the current mirror 9 copies the current mirror image of the fifth MOS transistor M5 to the fourth MOS transistor M4, so that a current difference is formed between the current mirror image and the current of the first MOS transistor M1 or the current of the second MOS transistor M2, and the current difference is further converted into a voltage difference, thereby affecting the change of the gate voltage of the sixth MOS transistor M6, and then the current mirror image is logically output through the inverter 10. Thus, the present embodiment can achieve the same technical effects as the above embodiments by changing the connection structure of the circuit, which is beneficial to diversification of the connection mode of the circuit structure.
As can be seen from fig. 3, in the present embodiment, the smaller signal of the differential signals is the first half period of the two electrical signalsVoltage of (2)=/>-/>And reference threshold electrical signal->Comparing at +.>When the voltage is equal to the reference threshold electric signal, the voltage output terminal VOUT outputs a logic level. In the second half period of the two electrical signals, the voltage of the smaller signal of the differential signal +.>=+/>And reference threshold electrical signal->Comparing at +.>When the voltage is equal to the reference threshold electric signal, the voltage output terminal VOUT outputs a logic level. Therefore, compared with the prior art adopting a plurality of amplifiers and/or comparators, the circuit structure is complex, the cost is high, the power consumption is high, fewer devices are adopted, the introduction of additional non-ideal influences such as signal distortion, mismatch, noise, delay and the like is avoided, and the circuit reliability is improved. Furthermore, the comparison device 1 of the present application introduces only a single reference threshold electric signal, and can avoid the problem of the asymmetry of the positive/negative inversion points of the differential signal caused by introducing a plurality of reference threshold electric signals.
The invention also provides a sensor comprising the device 1 for comparing differential signals.
The foregoing description of the preferred embodiments of the invention is not intended to limit the invention to the precise form disclosed, and any such modifications, equivalents, and alternatives falling within the spirit and scope of the invention are intended to be included within the scope of the invention.
Claims (10)
1. A method for comparing differential signals, comprising:
confirming a directional input of the differential signal, wherein the directional input comprises a positive input or a negative input;
comparing two electric signals of the differential signals, and correspondingly acquiring a high electric signal or a low electric signal in the two electric signals according to the positive input or the negative input;
and performing differential comparison on the high electric signal or the low electric signal and a reference threshold electric signal, and outputting logic inversion when the high electric signal or the low electric signal is equal to the reference threshold electric signal.
2. The comparison method according to claim 1, characterized in that the differential comparison of the high or low electrical signal with a reference threshold electrical signal, when the high or low electrical signal is equal to the reference threshold electrical signal, the output logic flip comprises:
carrying out differential comparison on the high electric signal or the low electric signal and a reference threshold electric signal to obtain a corresponding electric difference value;
amplifying the electric difference value to obtain an inverse amplified electric difference value inverse to the electric difference value;
performing inverse logic processing on the inverse amplified electric difference value to obtain an amplified electric difference value;
The output logic toggles when the amplified electrical difference is equal to zero.
3. The comparison method according to claim 2, wherein the differential comparison of the high or low electrical signal with a reference threshold electrical signal to obtain a corresponding electrical difference value comprises:
copying the high electric signals to form corresponding high-copy electric signals;
performing differential comparison on the high-replication electric signal and a reference threshold electric signal to obtain an electric difference value; or alternatively
And performing differential comparison on the high electric signal or the low electric signal and a reference threshold electric signal to obtain a corresponding electric difference value, wherein the differential comparison comprises the following steps:
copying the reference threshold electrical signal to form a reference threshold copy electrical signal;
and carrying out differential comparison on the low electric signal and the reference threshold value copy electric signal to obtain an electric difference value.
4. The comparison method according to claim 1, wherein the high electrical signal or the low electrical signal is differentially compared with a reference threshold electrical signal, and in output logic inversion when the high electrical signal or the low electrical signal is equal to the reference threshold electrical signal, when the direction input of the differential signal is a positive input and the corresponding reference threshold electrical signal is a negative input, the reference threshold electrical signal is a sum of a common mode voltage signal of the differential signal and a half desired differential signal inversion threshold signal.
5. The comparison method according to claim 1, wherein the high electrical signal or the low electrical signal is differentially compared with a reference threshold electrical signal, and in output logic inversion when the high electrical signal or the low electrical signal is equal to the reference threshold electrical signal, when the direction input of the differential signal is negative input and the corresponding reference threshold electrical signal is positive input, the reference threshold electrical signal is a difference between a common mode voltage signal of the differential signal and a half expected differential signal inversion threshold.
6. A differential signal comparing apparatus, comprising:
the system comprises at least two homonymous terminals for accessing differential signals and at least one heteronymous terminal for accessing reference threshold electric signals;
the comparison circuit is connected with the at least two homonymous terminals and is used for comparing the two electric signals of the differential signal so as to output a high electric signal of the two electric signals or output a low electric signal of the two electric signals;
and the differential comparison circuit is connected with the comparison circuit and the at least one synonym end and is used for differentially comparing the high electric signal with a reference threshold electric signal or differentially comparing the low electric signal with the reference threshold electric signal, and when the high electric signal or the low electric signal is equal to the reference threshold electric signal, the output logic is turned over.
7. The comparing device of claim 6, wherein the differential comparing circuit comprises:
the differential comparison sub-circuit is connected with the comparison circuit and the at least one synonym end and is used for differentially comparing the high electric signal or the low electric signal with the reference threshold electric signal so as to output a corresponding electric difference value;
the amplifying circuit is electrically connected with the differential comparison sub-circuit and is used for amplifying the electric difference value to output an inverse amplified electric difference value inverse to the electric difference value;
and the inverting logic circuit is electrically connected with the amplifying circuit and is used for inverting logic to process the inverse amplifying electric difference value to form an amplifying electric difference value, and when the amplifying electric difference value is equal to zero, the amplifying electric difference value is enabled to be logically inverted and output.
8. The comparison device of claim 6, wherein the comparison device comprises a power supply terminal; the comparison circuit comprises a first MOS tube and a second MOS tube;
the at least two homonymous terminals are positive input terminals, and the corresponding at least one heteronymous terminal is a negative input terminal; the grid electrode of the first MOS tube is connected with one of the at least two homonymous ends, and the source electrode is grounded; the grid electrode of the second MOS tube is connected with the other of the at least two homonymous ends, and the source electrode is grounded; the drain electrode of the first MOS tube and the drain electrode of the second MOS tube are both connected with the differential comparison circuit; or (b)
The at least two homonymous terminals are negative input terminals, and when the corresponding at least one heteronymous terminal is a positive input terminal; the grid electrode of the first MOS tube is connected with one of the at least two homonymous terminals, and the source electrode of the first MOS tube is connected with the power supply terminal; the grid electrode of the second MOS tube is connected with the other of the at least two homonymous ends, and the source electrode of the second MOS tube is connected with the power supply end; the drain electrode of the first MOS tube and the drain electrode of the second MOS tube are both connected with the differential comparison circuit.
9. The comparison device of claim 7, further comprising a power supply terminal, a voltage output terminal, and a current mirror; the comparison circuit comprises a first MOS tube and a second MOS tube; the current mirror comprises a third MOS tube and a fourth MOS tube, and the differential comparison sub-circuit comprises a comparison output end and a fifth MOS tube; the amplifying circuit comprises a sixth MOS tube and a current source; the inverting logic circuit includes an inverter;
the at least two homonymous terminals are positive input terminals, and the corresponding at least one heteronymous terminal is a negative input terminal; the comparison output end is connected with the drains of the first MOS tube and the second MOS tube; the source electrode of the third MOS tube is connected with the power supply end, the drain electrode of the third MOS tube is connected with the comparison output end, and the grid electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube and is connected with the drain electrode of the third MOS tube; the source electrode of the fourth MOS tube is connected with the power supply end; the grid electrode of the fifth MOS tube is connected with the at least one synonym end, the source electrode of the fifth MOS tube is grounded, and the drain electrode of the fifth MOS tube is connected with the drain electrode of the fourth MOS tube; the source electrode of the sixth MOS tube is connected with the power supply end, the grid electrode of the sixth MOS tube is connected between the drain electrode of the fifth MOS tube and the drain electrode of the fourth MOS tube, and the drain electrode of the sixth MOS tube is grounded through the current source; the input end of the inverter is connected between the drain electrode of the sixth MOS tube and the current source, and the output end of the inverter is connected with the voltage output end; or (b)
The at least two homonymous terminals are negative input terminals, and when the corresponding at least one heteronymous terminal is a positive input terminal; the comparison output end is connected with the drains of the first MOS tube and the second MOS tube; the source electrode of the third MOS tube is grounded, the drain electrode of the third MOS tube is connected with the drain electrode of the fifth MOS tube, and the grid electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube and is in short circuit with the drain electrode of the third MOS tube; the source electrode of the fourth MOS tube is grounded, and the drain electrode of the fourth MOS tube is connected with the comparison output end; the grid electrode of the fifth MOS tube is connected with the at least one synonym end, and the source electrode of the fifth MOS tube is connected with the power supply end; the source electrode of the sixth MOS tube is grounded, and the grid electrode of the sixth MOS tube is connected with the drain electrode of the fourth MOS tube; one end of the current source is connected with the power supply end, and the other end of the current source is connected with the drain electrode of the sixth MOS tube; the input end of the inverter is connected between the drain electrode of the sixth MOS tube and the current source, and the output end of the inverter is connected with the voltage output end.
10. A sensor comprising a comparison device of differential signals according to any of the preceding claims 6-9, said comparison device employing a method of comparing differential signals according to any of the preceding claims 1-5.
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