CN117595804A - Broadband high-efficiency power amplifier for improving phase linearity - Google Patents

Broadband high-efficiency power amplifier for improving phase linearity Download PDF

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Publication number
CN117595804A
CN117595804A CN202311589484.3A CN202311589484A CN117595804A CN 117595804 A CN117595804 A CN 117595804A CN 202311589484 A CN202311589484 A CN 202311589484A CN 117595804 A CN117595804 A CN 117595804A
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China
Prior art keywords
series
stage
matching network
transistor
circuit
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CN202311589484.3A
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Inventor
张巍
刘宪锁
伍园
陶洪琪
夏德娇
吴瑞南
陶海阳
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CETC 55 Research Institute
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CETC 55 Research Institute
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Priority to CN202311589484.3A priority Critical patent/CN117595804A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/213—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38—Impedance-matching networks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Abstract

The invention discloses a broadband high-efficiency power amplifier for improving phase linearity, which comprises an input matching network, a first-stage transistor unit, a first-stage interstage matching network, a second-stage transistor unit, a second-stage interstage matching network, a final-stage transistor unit and an output matching network which are sequentially connected, wherein the first-stage transistor, the second-stage transistor, the input matching network, the first-stage interstage matching network and the second-stage interstage matching network are used for realizing the improvement of the phase linearity of an integral power amplifier circuit by carrying out group delay modulation, adjusting phase envelope and compensating the phase change of the final-stage transistor and the output matching network. The invention can control the phase linearity in the full frequency band of the power amplifier within +/-3 degrees and ensure that the power efficiency deterioration amplitude is not more than 1 percent.

Description

Broadband high-efficiency power amplifier for improving phase linearity
Technical Field
The invention relates to the technical field of radio frequency monolithic microwave integrated circuits, in particular to a broadband high-efficiency power amplifier for improving phase linearity.
Background
The broadband power MMIC (monolithic microwave integrated circuit) device is widely applied to systems of modern radars, instruments and meters and the like by the advantages of small volume, high power, good consistency, high reliability and the like. The method not only makes the key index requirements of efficiency, power, noise and the like higher and higher, but also focuses more and more on the increasing bandwidth because the phase linearity of the power amplifying device can influence the imaging precision of the radar.
The power amplifier operates in saturation, the drain voltage is substantially unchanged, the load output voltage is limited, and AM-AM (amplitude modulation-amplitude modulation) and AM-PM (amplitude modulation-phase modulation) distortions occur, i.e. compression occurs in both phase and amplitude, and a nonlinear phase shift appears in phase. The energy storage element inductance L and the capacitor C exist in the power amplifier circuit, and the impedance of the inductance L and the impedance of the capacitor C are related to frequency, so that the source impedance and the load impedance of the amplifier also change with the frequency. Therefore, the phase distortion degree of each frequency point in the band is different, and the difference value of the nonlinear phase shift of different frequency points in the band is called as phase linearity.
Conventional approaches to improving the phase linearity of a power amplifier generally require additional circuitry or functional blocks to adjust the phase linearity. The cost is higher, the structure is more complex, the original circuit is changed greatly, and the integration is not facilitated and the miniaturization of MMIC devices is realized.
Disclosure of Invention
The invention aims to: the invention aims to provide a method for improving the phase linearity index of a broadband high-efficiency power amplifier, which utilizes the group delay characteristics of a transistor and a filtering matching network to realize the mutual cancellation of the inter-stage phase nonlinearity of reactive three-stage amplification topology so as to improve the phase linearity of the broadband power amplifier.
The technical scheme is as follows: the broadband high-efficiency power amplifier comprises an input matching network, a first-stage transistor, a first-stage interstage matching network, a second-stage transistor, a second-stage interstage matching network, a final-stage transistor and an output matching network which are sequentially connected, wherein the first-stage transistor, the second-stage transistor, the input matching network, the first-stage interstage matching network and the second-stage interstage matching network are used for adjusting phase envelopes and compensating phase changes of the final-stage transistor and the output matching network through group delay modulation, so that the phase linearity of the whole power amplifier circuit is improved.
Further, the input matching network is composed of a T-shaped attenuation circuit and a first-stage transistor input matching circuit which are sequentially connected, the first-stage inter-stage matching network is composed of a first-stage transistor output matching circuit, a first series RLC resonant circuit and a second-stage transistor input matching circuit which are sequentially connected, the second-stage inter-stage matching network is composed of a second-stage transistor output matching circuit, a second series RLC resonant circuit and a third-stage transistor input matching circuit which are sequentially connected, and the output matching network is composed of a third-stage transistor output matching circuit and a blocking capacitor which are sequentially connected.
Further, the T-shaped attenuation circuit is composed of a first/second series resistor, a parallel resistor and a parallel microstrip, one end of the first series resistor is connected with an input end, and the other end of the first series resistor is respectively connected with the second series resistor and the parallel resistor; the parallel microstrip is connected with the parallel resistor in series, and the other end of the second series resistor is connected with the input matching circuit of the first-stage transistor; and adjusting standing waves and gains of the input matching network and modulating group delay characteristics of the input matching network by adjusting the first series resistor and the parallel resistor.
Further, the first series RLC resonant circuit is composed of a third series resistor, a first series microstrip and a first/second/third series capacitor, one end of the first series capacitor is connected with the output matching circuit of the first-stage transistor, and the other end of the first series capacitor is respectively connected with the first series microstrip and the third series capacitor; the second series capacitor is connected with the first series microstrip in series, the third series resistor is connected with the third series capacitor in series, and the other end of the second series capacitor and the other end of the third series resistor are connected with the second-stage transistor input matching circuit; the third series resistor and the first series microstrip and the first/second/third series capacitor are adjusted, the gain flatness of the first-stage interstage matching network and the group delay characteristic of the first-stage interstage matching network are adjusted, wherein the group delay absolute value of the first-stage interstage matching network can be reduced by adjusting the third series resistor, the negative protrusion of the group delay envelope of the fixed resonance frequency point can be realized by adjusting the first series microstrip and the first/second/third series capacitor, and then the adjustment of the phase envelope of the first-stage interstage matching network is realized.
Further, the second series RLC resonant circuit is formed by a fourth series resistor, a second series microstrip and a fourth/fifth/sixth series capacitor, one end of the fourth series capacitor is connected with the output matching circuit of the second stage transistor, the other end of the fourth series capacitor is connected with the second series microstrip and the sixth series capacitor respectively, the fifth series capacitor is connected with the second series microstrip in series, the fourth series resistor is connected with the sixth series capacitor in series, and the other end of the fifth series capacitor and the other end of the fourth series resistor are both connected with the input matching circuit of the third stage transistor; the gain flatness of the second-stage inter-stage matching network and the group delay characteristic of the modulated second-stage inter-stage matching network are adjusted by adjusting a fourth series resistor, a second series microstrip and a fourth/fifth/sixth series capacitor in the second series RLC resonant circuit, wherein the adjustment of the fourth series resistor can reduce the absolute value of the group delay of the second-stage inter-stage matching network, the adjustment of the second series microstrip and the fourth/fifth/sixth series capacitor can realize the negative protrusion of the group delay envelope of a fixed resonance frequency point, and then the adjustment of the phase envelope of the second-stage inter-stage matching network is realized; meanwhile, parameters of various components in the second series RLC resonant circuit are required to be adjusted, so that the second series RLC resonant circuit is ensured to be matched with the input matching circuit of the third-stage transistor.
Further, the physical structure type of each transistor unit is a junction field effect transistor, a metal-oxide-semiconductor field effect transistor, a heterojunction field effect transistor, a bipolar junction transistor or a heterojunction bipolar transistor.
Compared with the prior art, the invention has the following remarkable effects:
according to the invention, the group delay envelope of the front two-stage amplifying circuit is adjusted by optimizing the parameter values of the T-shaped attenuator in the input matching network and the passive elements of the RLC resonant circuits in the first and second-stage interstage matching networks without adjusting the final stage matching state of the traditional high-efficiency power amplifier, so that the phase nonlinearity of the final stage tube core is compensated and the phase linearity index of the whole power amplifier is improved on the basis of ensuring no obvious deterioration of efficiency; compared with the existing phase linearization technology, the method does not need to add additional circuits or functional modules, does not increase the cost of products, and has strong operability; in the working frequency range, the internal phase linearity of the power amplifier in the whole frequency band is controlled within +/-3 degrees, and the power efficiency deterioration amplitude is ensured not to exceed 1 percent.
Drawings
FIG. 1 is a schematic diagram of phase nonlinear characteristic analysis according to the present invention;
FIG. 2 is a schematic circuit diagram of the present invention;
FIG. 3 is a schematic diagram of a nonlinear phase compensation simulation of the present invention;
FIG. 4 is a schematic diagram showing the comparison of the phase linearity of the power amplifier circuit before and after improvement;
FIG. 5 is a schematic diagram showing the comparison of the power added efficiency before and after the improvement of the phase linearity of the power amplifying circuit.
Detailed Description
The invention is described in further detail below with reference to the drawings and the detailed description.
The invention relates to a method for improving the phase linearity index of a broadband high-efficiency power amplifier, which is applied to a monolithic integrated circuit or a hybrid integrated circuit and improves the phase nonlinearity of the broadband high-efficiency power amplifier by a method of complementation of phase envelopes of a front-stage amplifying circuit, an interstage amplifying circuit and a final-stage amplifying circuit.
The method for improving the phase linearity index of the broadband high-efficiency power amplifier is further described in detail based on the development of the broadband high-efficiency GaN power amplifier with the relative bandwidth of 57%.
As shown in fig. 1, the broadband high-efficiency high-phase linearity power amplifier in the present embodiment includes an input matching network 101, a first stage transistor 105, a first stage inter-stage matching network 102, a second stage transistor 106, a second stage inter-stage matching network 103, a final stage transistor 107, and an output matching network 104, which are connected in order.
The input matching network 101 is composed of a T-shaped attenuation circuit 201 and a first stage transistor input matching circuit 202 which are connected in sequence, wherein the T-shaped attenuation circuit 201 and an input end RF in And (5) connection. The first-stage inter-stage matching network 102 is composed of a first-stage transistor output matching circuit 203, a first series RLC resonant circuit 204, and a second-stage transistor input matching circuit 205 which are sequentially connected, and the second-stage inter-stage matching network 103 is composed of a second-stage transistor output matching circuit 206, a second series RLC resonant circuit 207, and a third-stage transistor input matching circuit 208 which are sequentially connected. The output matching network 104 is composed of a third transistor output matching circuit 209 and a blocking capacitor 237 which are connected in turn, the blocking capacitor 237 and the output terminal RF out And (5) connection.
The final stage transistor 107 and the output matching network 104 play a decisive role in the efficiency of the whole circuit, and in order to ensure the efficiency of the whole circuit, the high-efficiency matching state of the final stage transistor 107 and the output matching network 104 is kept unchanged.
Group delay modulation is performed through the first-stage transistor 105, the second-stage transistor 106, the input matching network 101 and the first-stage/second-stage interstage matching networks (102 and 103), phase envelopes are adjusted, phase nonlinearities of the final-stage transistor 107 and the output matching network 104 are compensated, and phase linearity of the whole power amplifier circuit is improved. The phase linearity in the bandwidth of the power amplifier is controlled within + -3 DEG on the basis of ensuring that the performance of the additional efficiency is not significantly deteriorated and that the envelope is kept substantially uniform.
The T-shaped attenuation circuit 201 is composed of a first/second series resistor (211, 212), a parallel resistor 213 and a parallel microstrip 221, wherein one end of the first series resistor 211 is connected with an input end RF in The other ends are respectively connected withA second series resistor 212 and a parallel resistor 213 are connected; the parallel microstrip 221 is connected in series with a parallel resistor 213, and the other end of the second series resistor 212 is connected to the first stage transistor input matching circuit 202. The first series resistor 211 and the parallel resistor 213 in the T-shaped attenuation circuit 201 are adjusted, so that standing waves and gains of the input matching network 101 can be improved, group delay characteristics of the input matching network 101 can be effectively modulated, the protruding amplitude of the high-frequency group delay envelope can be effectively reduced, and adjustment of the phase envelope can be realized.
The first series RLC resonant circuit 204 is composed of a third series resistor 214, a first series microstrip 222 and first/second/third series capacitors (231, 232, 233), one end of the first series capacitor 231 is connected with the first stage transistor output matching circuit 203, and the other end is respectively connected with the first series microstrip 222 and the third series capacitor 233; the second series capacitor 323 is connected in series with the first series microstrip 222, the third series resistor 214 is connected in series with the third series capacitor 233, and the other end of the second series capacitor 323 and the other end of the third series resistor 214 are both connected with the second stage transistor input matching circuit 205. Adjusting the third series resistance 214, the first series microstrip 222, and the first/second/third series capacitance (231, 232, 233) in the series RLC resonant circuit 204 not only improves the gain flatness of the first stage inter-stage matching network 102, but also effectively modulates the group delay characteristics of the first stage inter-stage matching network 102: the third series resistor 214 is adjusted to reduce the absolute value of the group delay of the first-stage interstage matching network 102, and the first series microstrip 222 and the first/second/third series capacitors (231, 232, 233) are adjusted to achieve negative protrusion of the group delay envelope of the fixed resonant frequency point, so as to achieve adjustment of the phase envelope of the first-stage interstage matching network 102.
The second series RLC resonant circuit 207 is composed of a fourth series resistor 215, a second series microstrip 223, and fourth/fifth/sixth series capacitors (234, 235, 236), one end of the fourth series capacitor 234 is connected to the second-stage transistor output matching circuit 206, the other end is connected to the second series microstrip 223 and the sixth series capacitor 236, the fifth series capacitor 235 is connected in series with the second series microstrip 223, the fourth series resistor 215 is connected in series with the sixth series capacitor 236, and the other end of the fifth series capacitor 235 and the other end of the fourth series resistor 215 are connected to the third-stage transistor input matching circuit 208. Adjusting the fourth series resistance 215, the second series microstrip 223, and the fourth/fifth/sixth series capacitance (234, 235, 236) in the second series RLC resonant circuit 207 not only improves the gain flatness of the second stage inter-stage matching network 103, but also effectively modulates the group delay characteristics of the second stage inter-stage matching network 103: the adjustment of the fourth series resistor 215 can reduce the absolute value of group delay, the adjustment of the second series microstrip 223 and the fourth/fifth/sixth series capacitors (234, 235, 236) can realize negative protrusion of the group delay envelope of the fixed resonance frequency point, and then the adjustment of the phase envelope of the second-stage inter-stage matching network 103 is realized, and meanwhile, parameters of each component in the second series RLC resonant circuit (207) need to be adjusted, so that the adaptation of the second series RLC resonant circuit (207) and the third-stage transistor input matching circuit (208) is ensured, the input impedance of the final-stage transistor unit (107) is well matched, and the integral power and efficiency characteristics of the power amplifier are ensured.
In this embodiment, the physical structure type of the transistor is a junction field effect transistor, a metal-oxide-semiconductor field effect transistor, a heterojunction field effect transistor, a bipolar junction transistor, or a heterojunction bipolar transistor.
The power amplifying circuit is realized in the form of a monolithic integrated circuit or a hybrid integrated circuit.
Comprehensively considering phase linearity, operating frequency, bandwidth, power, efficiency, consistency, yield, cost, are fabricated in a suitable semiconductor technology using GaAs or GaN materials as substrates, but are not limited thereto.
In this embodiment, simulation results of the power amplification circuit for amplifying the nonlinear phase envelope at the final stage, amplifying the nonlinear phase envelope at the first two stages, and amplifying the nonlinear phase envelope as a whole are shown in fig. 3. As can be seen from fig. 3, in the working frequency range, the phase envelope of the final-stage amplifying circuit and the phase envelope of the first two-stage amplifying circuit are complementary, and the two are mutually offset, so that the phase of the whole circuit of the amplifier is smaller and is controlled to be between-3 degrees and 3 degrees. The phase linearity before improvement is compared with that before improvement, as shown in figure 4, the phase linearity before improvement is +/-9 degrees, and after improvement is +/-3 degrees, so that the improvement effect is obvious. In this embodiment, the comparison test results of the power added efficiency before and after the phase nonlinearity improvement are shown in fig. 5. As can be seen from fig. 5, the power added efficiency envelope is substantially consistent across the operating frequency range.

Claims (6)

1. A broadband high-efficiency power amplifier for improving phase linearity, comprising an input matching network (101), a first stage transistor (105), a first stage inter-stage matching network (102), a second stage transistor (106), a second stage inter-stage matching network (103), a final stage transistor (107) and an output matching network (104) which are connected in sequence, characterized in that:
the first-stage transistor (105), the second-stage transistor (106), the input matching network (101), the first-stage interstage matching network (102) and the second-stage interstage matching network (103) are used for adjusting phase envelopes and compensating phase changes of the final-stage transistor (107) and the output matching network (104) through group delay modulation, so that the phase linearity of the whole power amplifier circuit is improved.
2. The broadband high efficiency power amplifier of claim 1, wherein the input matching network (101) is composed of a T-type attenuation circuit (201) and a first stage transistor input matching circuit (202) connected in sequence, the first stage inter-stage matching network (102) is composed of a first stage transistor output matching circuit (203), a first series RLC resonant circuit (204), and a second stage transistor input matching circuit (205) connected in sequence, the second stage inter-stage matching network (103) is composed of a second stage transistor output matching circuit (206), a second series RLC resonant circuit (207), and a third stage transistor input matching circuit (208) connected in sequence, and the output matching network (104) is composed of a third stage transistor output matching circuit (209) and a blocking capacitor (237) connected in sequence.
3. A wideband high efficiency power amplifier with improved phase linearity as recited in claim 2, being characterized byCharacterized in that the T-shaped attenuation circuit (201) is composed of a first/second series resistor (211, 212), a parallel resistor (213) and a parallel microstrip (221), one end of the first series resistor (211) is connected with an input end (RF) in ) The other end is respectively connected with a second series resistor (212) and a parallel resistor (213); the parallel microstrip (221) is connected with the parallel resistor (213) in series, and the other end of the second series resistor (212) is connected with the first-stage transistor input matching circuit (202); by adjusting the first series resistance (211) and the parallel resistance (213), the standing wave and gain of the input matching network (101) and the group delay characteristics of the modulation input matching network (101) are adjusted.
4. The wideband high efficiency power amplifier of claim 2, wherein the first series RLC resonant circuit (204) is formed by a third series resistor (214), a first series microstrip (222) and first/second/third series capacitors (231, 232, 233), one end of the first series capacitor (231) is connected to the first stage transistor output matching circuit (203), and the other end is connected to the first series microstrip (222) and the third series capacitor (233), respectively; the second series capacitor (323) is connected with the first series microstrip (222) in series, the third series resistor (214) is connected with the third series capacitor (233) in series, and the other end of the second series capacitor (323) and the other end of the third series resistor (214) are connected with the second-stage transistor input matching circuit (205); the third series resistor (214), the first series microstrip (222) and the first/second/third series capacitors (231, 232, 233) are adjusted, the gain flatness of the first-stage inter-stage matching network (102) and the group delay characteristic of the first-stage inter-stage matching network (102) are adjusted, wherein the group delay absolute value of the first-stage inter-stage matching network (102) can be reduced by adjusting the third series resistor (214), the group delay envelope negative-going protrusion of a fixed resonance frequency point can be realized by adjusting the first series microstrip (222) and the first/second/third series capacitors (231, 232, 233), and then the adjustment of the phase envelope of the first-stage inter-stage matching network (102) is realized.
5. The broadband high efficiency power amplifier according to claim 2, wherein the second series RLC resonant circuit (207) is formed by a fourth series resistor (215), a second series microstrip (223) and fourth/fifth/sixth series capacitors (234, 235, 236), one end of the fourth series capacitor (234) is connected to the second stage transistor output matching circuit (206), the other end is connected to the second series microstrip (223) and the sixth series capacitor (236), respectively, the fifth series capacitor (235) is connected in series with the second series microstrip (223), the fourth series resistor (215) is connected in series with the sixth series capacitor (236), and the other end of the fifth series capacitor (235) and the other end of the fourth series resistor (215) are connected to the third stage transistor input matching circuit (208); the gain flatness of the second-stage inter-stage matching network (103) and the group delay characteristic of the modulated second-stage inter-stage matching network (103) are adjusted by adjusting a fourth series resistor (215), a second series microstrip (223) and a fourth/fifth/sixth series capacitor (234, 235, 236) in the second series RLC resonant circuit (207), wherein the adjustment of the fourth series resistor (215) can reduce the absolute value of the group delay of the second-stage inter-stage matching network (103), and the adjustment of the second series microstrip (223) and the fourth/fifth/sixth series capacitor (234, 235, 236) can realize the negative protrusion of the group delay envelope of a fixed resonance frequency point, so as to realize the adjustment of the phase envelope of the second-stage inter-stage matching network (103); and meanwhile, parameters of components in the second series RLC resonant circuit (207) need to be adjusted, so that the second series RLC resonant circuit (207) is matched with the third-stage transistor input matching circuit (208).
6. The wideband high efficiency power amplifier of any one of claims 1 to 5, wherein each transistor has a physical structure of the type of junction field effect transistor, metal-oxide-semiconductor field effect transistor, heterojunction field effect transistor, bipolar junction transistor or heterojunction bipolar transistor.
CN202311589484.3A 2023-11-24 2023-11-24 Broadband high-efficiency power amplifier for improving phase linearity Pending CN117595804A (en)

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Application Number Priority Date Filing Date Title
CN202311589484.3A CN117595804A (en) 2023-11-24 2023-11-24 Broadband high-efficiency power amplifier for improving phase linearity

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Application Number Priority Date Filing Date Title
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CN117595804A true CN117595804A (en) 2024-02-23

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