CN117595793A - Oscillator and phase-locked loop - Google Patents
Oscillator and phase-locked loop Download PDFInfo
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Abstract
Embodiments of the present application relate to an oscillator and a phase locked loop, including: the oscillating circuit comprises an acoustic wave resonator chip and a tuning module which are connected in series, wherein the tuning module is used for providing a variable capacitor, and the oscillating circuit tunes the oscillating frequency of the oscillator through the variable capacitor; and one end of the active module is connected with one end of the oscillating circuit, and the other end of the active module is connected with the other end of the oscillating circuit to form a positive feedback loop, so that the oscillator oscillates. Thereby, the tuning capability of the oscillator is achieved and the oscillator has low phase noise.
Description
Technical Field
The present disclosure relates to the field of communications technologies, and in particular, to an oscillator and a phase-locked loop.
Background
A phase locked loop (Phase Locked Loop, PLL) can be used to extract a clock from a received digital signal and recover clock synchronization of data, and is widely used in the fields of modems, fiber optic communications, and the like. The phase-locked loop circuit generally consists of a phase detector, a loop filter, a control voltage source and an oscillator. A phase locked loop is a system for frequency tracking and control, the basic principle of which is to compare an input signal with a reference signal and then adjust the frequency of an oscillator so that an output signal remains synchronized with the input signal. Therefore, in order to achieve frequency tracking and tuning, the oscillator needs to have tunable capabilities.
The oscillator widely used in the phase-locked loop circuit at present is an LC oscillator, but with the development of technology, the whole system of the phase-locked loop has more strict requirements on phase noise, and inductance and capacitance elements in the LC oscillator are inevitably affected by noise sources such as thermal noise, shot noise and the like, so that higher phase noise is generated.
Therefore, it is a problem in the art to have an oscillator with low phase noise while ensuring that the oscillator is tunable.
Disclosure of Invention
In view of the above, the embodiments of the present application provide an oscillator and a phase locked loop to solve at least one of the problems in the background art.
In a first aspect, embodiments of the present application provide an oscillator, including:
an oscillation circuit including an acoustic wave resonator chip and a tuning module connected in series, the tuning module for providing a variable capacitance by which the oscillation circuit tunes an oscillation frequency of the oscillator;
and one end of the active module is connected with one end of the oscillating circuit, and the other end of the active module is connected with the other end of the oscillating circuit to form a positive feedback loop, so that the oscillator oscillates.
Optionally, the acoustic wave resonator chip includes an acoustic wave resonator and an integrated capacitor integrated with the acoustic wave resonator;
the acoustic wave resonator includes a second electrode, a piezoelectric layer, and a first electrode stacked on a substrate;
the integrated capacitor comprises the first electrode, a dielectric layer and a capacitor upper electrode, wherein the dielectric layer is positioned between the first electrode and the capacitor upper electrode;
wherein the projection of the upper electrode of the capacitor on the substrate at least partially overlaps with the projection of the first electrode on the substrate.
Optionally, the acoustic wave resonator chip includes a signal input terminal and a signal output terminal; wherein,
the second electrode is used as a signal input end, and the upper electrode of the capacitor is used as a signal output end, so that the acoustic wave resonator and the integrated capacitor are connected in series; or alternatively, the first and second heat exchangers may be,
the second electrode is used as a signal input end, and the first electrode is used as a signal output end, so that the acoustic wave resonator and the integrated capacitor are connected in parallel.
Optionally, the tuning module includes a digitally controlled capacitor, where the digitally controlled capacitor includes a first capacitor connection end, a second capacitor connection end, and a plurality of digitally controlled capacitor units connected in parallel between the first capacitor connection end and the second capacitor connection end, and each of the digitally controlled capacitor units includes an NMOS switch tube and a capacitor; wherein,
the source electrode of the NMOS switch tube is connected with the second capacitor connecting end, the grid electrode of the NMOS switch tube is used for receiving an externally input level signal, the drain electrode of the NMOS switch tube is connected with one end of the capacitor, and the other end of the capacitor is connected with the first capacitor connecting end.
Optionally, the active module includes a first active unit and a second active unit; wherein the first active cell comprises a first transistor; the second active cell includes a second transistor;
one end of the oscillating circuit is connected with the source electrode of the first transistor, the other end of the oscillating circuit is connected with the source electrode of the second transistor, and the drain electrode of the first transistor is connected with the gate electrode of the second transistor to form a positive feedback loop.
Optionally, the first transistor comprises a common gate transistor; the second transistor includes a source follower transistor.
Optionally, the first active unit further comprises a first load resistor; the second active cell further comprises a second load resistor;
one end of the first load resistor is connected with the source electrode of the first transistor, and the other end of the first load resistor is grounded;
one end of the second load resistor is connected with the source electrode of the second transistor, and the other end of the second load resistor is grounded;
the first load resistor and the second load resistor are used for adjusting a reference potential of the oscillating circuit.
Optionally, the first active unit further includes a drain load circuit, where the drain load circuit is connected to the drain of the first transistor, and provides a load resistor for the drain of the first transistor, so that the first transistor can implement an amplifying function.
Optionally, the drain load circuit comprises an LC parallel resonant circuit having an oscillation frequency related to an oscillation frequency of the acoustic wave resonator.
Optionally, the second active unit further includes a regulation circuit, where the regulation circuit is connected to the gate of the second transistor, and the regulation circuit is used to regulate a static operating point of the second transistor.
Optionally, the regulation circuit includes a first regulation resistor, a second regulation resistor and a first regulation capacitor;
one end of the first regulating capacitor is connected with the drain electrode of the first transistor, and the other end of the first regulating capacitor is connected with the grid electrode of the second transistor;
one end of the first regulating resistor is connected with the drain electrode of the second transistor, and the other end of the first regulating resistor is connected with the grid electrode of the second transistor;
one end of the second regulating resistor is grounded, and the other end of the second regulating resistor is connected with the grid electrode of the second transistor.
In a second aspect, embodiments of the present application further provide a phase locked loop, including: an oscillator as claimed in any one of the preceding first aspects.
The oscillator and the phase-locked loop provided by the embodiment of the application have the following beneficial effects:
according to the embodiment of the application, the acoustic wave resonator and the tuning module are connected in series to form the oscillating circuit, and the active module is connected with two ends of the oscillating circuit to form a positive feedback loop. The acoustic wave resonator has low phase noise and low power consumption, so that the oscillator can provide a low phase noise reference clock with low power consumption, and the acoustic wave resonator has small volume, good semiconductor process compatibility and is beneficial to improving the miniaturization of the radio frequency front end; the variable capacitor provided by the tuning module influences the oscillation frequency generated by the oscillation circuit, so that the tunable capability of the oscillator is realized; the active module causes the oscillator to oscillate, making the device efficient. Under the synergistic effect of the acoustic wave resonator, the tuning module and the active module, the tuning capability of the oscillator is realized, and the oscillator has low phase noise.
Additional aspects and advantages of the application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the application.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute an undue limitation to the application. In the drawings:
fig. 1 is a block diagram of an oscillator according to an embodiment of the present application;
FIG. 2 is a schematic cross-sectional view of an acoustic wave resonator chip according to an embodiment of the present disclosure;
FIG. 3 is a modified Butterworth model of an acoustic wave resonator;
FIG. 4 is a graph of frequency-impedance response of an acoustic wave resonator;
FIG. 5 is a schematic diagram of an oscillator according to an embodiment of the present disclosure;
FIG. 6 is an equivalent circuit diagram of an acoustic wave resonator chip according to an embodiment of the present application;
FIG. 7 is a schematic cross-sectional view of an acoustic wave resonator chip according to another embodiment of the present disclosure;
FIG. 8 is a schematic cross-sectional view of an acoustic wave resonator chip according to yet another embodiment of the present disclosure;
FIG. 9 is an equivalent circuit diagram of an acoustic wave resonator chip according to yet another embodiment of the present application;
fig. 10 is a circuit diagram of a digitally controlled capacitor according to an embodiment of the present disclosure;
FIG. 11 is a tuning plot of variable capacitance provided in accordance with one embodiment of the present application;
FIG. 12 is a tuning graph of an oscillator according to one embodiment of the present application;
Detailed Description
In order to make the technical solution and the beneficial effects of the present invention more obvious and understandable, the technical solution in the embodiments of the present application will be clearly and completely described by way of example only, and it is obvious that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that the terms "first," "second," and the like, as used herein, may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element. For example, a first resistance may be referred to as a second resistance, and similarly, a second resistance may be referred to as a first resistance, without departing from the scope of the present application. Both the first resistor and the second resistor are resistors, but they are not the same resistor. When "first" is described, it does not necessarily mean that "second" is present; and when "second" is discussed, it does not necessarily mean that the first element, component, region, layer or section is present. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The meaning of "a plurality of" is two or more, unless specifically defined otherwise. It will be further understood that the terms "comprises" and "comprising," when used in this specification, specify the presence of stated features, but do not preclude the presence or addition of one or more other features. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
It is to be understood that in the context of this application "connected" means that the connected end and the connected end have electrical signals or data transfer to each other, and can be understood as "electrically connected", "communicatively connected" or the like. In the context of this application, "a is directly connected to B" means that no other components than wires are included between a and B.
First, referring to fig. 1, an embodiment of the present application provides an oscillator, including:
an oscillation circuit 400, the oscillation circuit 400 including an acoustic wave resonator chip 100 and a tuning module 200 connected in series, the tuning module 200 for providing a variable capacitance by which the oscillation circuit 400 tunes an oscillation frequency of the oscillator;
and an active module 300, wherein one end of the active module 300 is connected with one end of the oscillating circuit 400, and the other end of the active module 300 is connected with the other end of the oscillating circuit 400 to form a positive feedback loop, so that the oscillator oscillates.
As can be appreciated, in the embodiment of the present application, the acoustic wave resonator chip 100 and the tuning module 200 are connected in series to form the oscillating circuit 400, and the active module 300 is connected to two ends of the oscillating circuit 400 to form a positive feedback loop. The acoustic wave resonator chip 100 has low phase noise and low power consumption, so that an oscillator can provide a low phase noise reference clock with low power consumption, and the acoustic wave resonator chip 100 has small volume, good semiconductor process compatibility and is beneficial to improving the miniaturization of the radio frequency front end; the variable capacitance provided by the tuning module 200 affects the oscillation frequency generated by the oscillation circuit 400, so as to realize the tunability of the oscillator; the active module 300 causes the oscillator to oscillate, making the device efficient. Under the synergistic effect of the acoustic wave resonator chip 100, the tuning module 200, and the active module 300, the tuning capability of the oscillator is realized, and the oscillator has low phase noise.
Optionally, referring to fig. 2, the acoustic wave resonator chip 100 includes an acoustic wave resonator 110 and an integrated capacitor 120 integrated with the acoustic wave resonator 110; the acoustic wave resonator 110 includes a second electrode 112, a piezoelectric layer 113, and a first electrode 114 stacked on a substrate 111; the integrated capacitor 120 comprises a first electrode 114, a dielectric layer 121 and a capacitor upper electrode 122, and the dielectric layer 121 is positioned between the first electrode 114 and the capacitor upper electrode 122; wherein the projection of the capacitive upper electrode 122 onto the substrate 111 at least partially overlaps the projection of the first electrode 114 onto the substrate 111.
It will be appreciated that the acoustic wave resonator 110 has a series resonant frequency and a parallel resonant frequency, and that the series resonant frequency and the parallel resonant frequency of the acoustic wave resonator 110 can be effectively changed by the integrated capacitor 120 integrated with the acoustic wave resonator 110, while further reducing the influence of noise on the device.
Optionally, the acoustic wave resonator comprises a bulk acoustic wave resonator and/or a surface acoustic wave resonator.
The acoustic wave resonator in the embodiment of the present application is specifically exemplified by a film acoustic wave resonator (Film BulkAcoustic Resonator, FBAR).
Referring to fig. 2, the acoustic wave resonator 110 includes a second electrode 112, a piezoelectric layer 113, and a first electrode 114 stacked on a substrate 111.
In this embodiment, the substrate 111 may be any suitable semiconductor substrate, such as a bulk silicon substrate, which may also be at least one of the following mentioned materials: siGe, siC, siGeC, tnAs, gaAs, inP or other group III and V compound semiconductors, including multilayer structures formed of these semiconductors, or silicon-on-insulator (SOI), silicon germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI), or Double polished silicon wafer (Double Side PolishedWafers, DSP), or ceramic substrates such as alumina, quartz, or glass substrates.
The material of the second electrode 112 is a conductive material or a semiconductor material. The conductive material may be a metal material having conductive properties, for example: one or more of Al, cu, pt, au, ir, os, re, pd, rh, ru, mo and W; the semiconductor material may be Si, ge, siGe, siC or SiGeC, etc.
The material of the piezoelectric layer 113 may be aluminum nitride, zinc oxide, lead zirconate titanate (PZT), lithium niobate, or the like, and optionally, may be doped with a proportion of rare earth element impurities such as scandium, erbium, yttrium, lanthanum, or the like.
The material of the first electrode 114 may be the same as that of the second electrode 112, and will not be described here. Of course, the present application does not exclude the case where the first electrode 114 is made of a material different from that of the second electrode 112.
Optionally, acoustic wave resonator 110 further comprises a cavity 115 between substrate 111 and second electrode 112.
Referring to FIG. 3, R in the modified Butterworth model of acoustic wave resonator (Modified ButterworthVan Dyke, MBVD) s 、R 0 、R m 、C 0 、C m And L m Is an electrical parameter of the acoustic wave resonator. R is R m 、C m And L m Describing the motion resonance caused by the piezoelectric effect of the piezoelectric layer 113, C 0 Representing parasitic capacitance of the piezoelectric layer 113, the first electrode 114, and the second electrode 112, R 0 Parasitic resistance R representing the piezoelectric layer 113, the upper electrode 500, and the lower electrode 600 s Representing the resistance of the first electrode 114 and the second electrode 112. The electrical parameters of the acoustic wave resonator 110 are related to the piezoelectric layer 114, the first electrode 114 and the second electrode 112, i.e. it is understood that the electrical parameters of the acoustic wave resonator 110 are determined by their own physical properties.
Referring to fig. 4, the acoustic wave resonator has two resonance frequency points, and the lower resonance frequency is the series resonance frequency f s The resonance point has the lowest acoustic impedance, and the signal can completely pass through; the higher frequency is the parallel resonance frequency f p The resonance point has the highest acoustic impedance and the signal cannot pass.
MBVD reflects the acoustic-electric properties of an acoustic resonator as an equivalent circuit model of the acoustic resonator. The series resonant frequency f of the acoustic wave resonator can be calculated according to the electrical parameters in MBVD s And a parallel resonant frequency f p . The electrical parameters of the acoustic wave resonator are self-containedThe physical properties of the body are determined, and thus, the series resonance frequency f is obtained without changing the physical properties of the acoustic wave resonator s And a parallel resonant frequency f p No change can occur.
With continued reference to fig. 2, the integrated capacitor 120 includes a first electrode 114, a dielectric layer 121, and a capacitor top electrode 122, where the dielectric layer 121 is located between the first electrode 114 and the capacitor top electrode 122, and a projection of the capacitor top electrode 122 on the substrate 111 at least partially overlaps a projection of the first electrode 114 on the substrate 111.
The series resonant frequency and the parallel resonant frequency of the acoustic wave resonator 110 are changed by the integration capacitor 120, and the influence of noise is further reduced. As can be appreciated, the tuning module 200 is connected in series with the acoustic wave resonator chip 100, and the variable capacitance provided by the tuning module 200 affects the oscillation frequency generated by the oscillation circuit 400, so as to realize the tunability of the oscillator. The integrated capacitance 120 in the acoustic wave resonator chip 100 further enhances the tuning effect of the oscillation frequency.
It will be appreciated that the capacitance of the integrated capacitor 120 is determined by the thickness and material of the dielectric layer 121 and the area where the first electrode 114, the dielectric layer 121 and the upper capacitor electrode 122 overlap.
Alternatively, the projection of the capacitive upper electrode 122 onto the substrate 111 overlaps with the projection of the first electrode 114 onto the substrate 111; alternatively, the projection of the capacitive upper electrode 122 onto the substrate 111 completely overlaps the projection of the first electrode 114 onto the substrate 111. The integrated capacitance 120 can adjust the capacitance value by the size of the coverage area and provide a larger capacitance value when fully covered.
Alternatively, the height distance between the capacitor upper electrode 122 and the first electrode 114 in the thickness direction of the substrate is in the range of 10nm to 100 μm. The integrated capacitor 120 may adjust the capacitance value by the height distance and provide a larger capacitance value when the height distance is smaller.
It will be appreciated that the capacitance value of the integrated capacitor 120 in the acoustic wave resonator chip 100 is a fixed value when the acoustic wave resonator chip 100 is applied in the oscillating circuit 400.
In this embodiment, the material of the upper capacitor electrode 122 may be the same as that of the second electrode 112, which is not described here. Of course, the present application does not exclude the case where the upper capacitor electrode 122 is made of a material different from that of the second electrode 112.
In this embodiment, the dielectric layer 121 may include air or a dielectric material, and the dielectric material may be silicon nitride (SiN), silicon oxide (SiOx), silicon oxynitride (SiON), TEOS, or the like.
Referring to fig. 5, the acoustic wave resonator chip 100 includes a signal input terminal 140 and a signal output terminal 150.
As an alternative embodiment, referring to fig. 2, 5 and 6, the second electrode 112 serves as the signal input terminal 140, and the capacitor upper electrode 122 serves as the signal output terminal 150, so that the acoustic wave resonator 110 and the integrated capacitor 120 are connected in series.
It can be appreciated that by integrating the capacitor 120 in series with the acoustic wave resonator 110, the series resonant frequency of the acoustic wave resonator 110 can be effectively changed so that the series resonant frequency is shifted to a high frequency position, thereby enhancing the tuning effect of the oscillation frequency and reducing the influence of noise.
Optionally, the acoustic wave resonator chip 100 further includes a lead 130, where the lead 130 is electrically connected to the upper capacitive electrode 122 for leading out the upper capacitive electrode. It will be appreciated that in this embodiment, the signal output 150 may be a lead 130.
Referring to fig. 7, as an alternative embodiment, the first electrode 114 includes a first protruding structure 1141 and a first recessed structure 1142. The first bump structure 1141 and the first recess structure 1142 can effectively suppress lateral diffusion of the acoustic wave, reflect the acoustic wave back to the effective resonator region, thereby reducing energy loss, and improve Q value and performance of the acoustic wave resonator chip 100. It will be appreciated that fig. 7 only schematically illustrates a cross-sectional structure of an acoustic wave resonator chip in which the acoustic wave resonator 110 and the integrated capacitor 120 are connected in series, and similarly, in an acoustic wave resonator chip in which the acoustic wave resonator 110 and the integrated capacitor 120 are connected in parallel, the first electrode 114 may also include a first bump structure 1141 and a first recess structure 1142.
In this particular embodiment, dielectric layer 121 further includes a first dielectric layer 1211 and a second dielectric layer 1212.
The material of the first dielectric layer 1211 includes air or a dielectric material, which may be silicon nitride (SiN), silicon oxide (SiOx), silicon oxynitride (SiON), TEOS, or the like.
The material of the second dielectric layer 1212 may be the same as that of the first dielectric layer 1211, and detailed description thereof will be omitted herein. Of course, the present application does not exclude the case where the second dielectric layer 1212 is made of a different material than the first dielectric layer 1211.
It will be appreciated that, as another alternative embodiment, the capacitor upper electrode 122 includes a second bump structure (not shown) and a second recess structure (not shown). The second convex structure and the second concave structure can effectively inhibit the lateral diffusion of the sound wave, reflect the sound wave back to the effective resonator area, thereby reducing the energy loss, improving the Q value and improving the performance of the sound wave resonator chip 100.
Optionally, at least one of the first electrode 114 and the upper capacitor electrode 122 includes a convex structure and a concave structure. Further, the first electrode 114 and the capacitor upper electrode 122 each include a convex structure and a concave structure. Thus, the energy loss can be reduced more effectively, and the performance of the acoustic wave resonator chip 100 can be improved.
As yet another alternative embodiment, referring to fig. 5, 8 and 9, the second electrode 112 is a signal input terminal, and the first electrode 114 is a signal output terminal, so that the acoustic wave resonator 110 and the integrated capacitor 120 are connected in parallel.
It can be appreciated that by integrating the capacitor 120 in parallel with the acoustic wave resonator 110, the parallel resonant frequency of the acoustic wave resonator 110 can be effectively changed, thereby enhancing the tuning effect of the oscillation frequency and reducing the influence of noise.
Optionally, referring to fig. 8, the acoustic wave resonator chip 100 further includes a lead 130, where the lead 130 is electrically connected to the upper capacitor electrode 122, and the lead 130 penetrates the piezoelectric layer 113 to be electrically connected to the second electrode 112. Thus, the capacitive upper electrode 122 and the second electrode 112 are electrically connected by the lead 130, and parallel connection of the acoustic wave resonator 110 and the integrated capacitor 120 is achieved.
Further, the lead 130 is electrically connected to the second electrode 112 through a conductive via (not shown) penetrating the piezoelectric layer 113.
In this embodiment, the material of the conductive via (not shown in the figure) may include a metal having good conductivity, specifically, copper, for example.
It will be appreciated that when the frequency of the acoustic wave resonator is less than f s Or greater than f p The acoustic wave resonator is capacitive when it operates in this frequency range and can be considered a capacitor; when the frequency of the acoustic wave resonator is f s To f p In between, the acoustic wave resonator is inductive, and the acoustic wave resonator operating in this frequency range can be regarded as an inductor, and the inductance value can be obtained by measuring and calculating the electrical parameters in MBVD.
In this embodiment, when the frequency of the acoustic wave resonator chip is between its own series resonant frequency and parallel resonant frequency, the acoustic wave resonator chip is inductive, so that the acoustic wave resonator chip operating in this frequency range can be regarded as an inductor, and is used as an inductance in the oscillating circuit, and the inductance value can also be obtained by measuring and calculating the electrical parameters in the equivalent circuit model of the acoustic wave resonator chip.
Oscillation frequency f=1/[ 2pi (L s C u ) 1/2 ]，L s C is the inductance of the oscillating circuit 400 u Is the capacitance of the oscillating circuit 400. Referring to fig. 1, an oscillating circuit 400 is formed by connecting an acoustic wave resonator chip 100 and a tuning module 200 in series, the acoustic wave resonator chip 100 provides an inductance for the oscillating circuit 400, and the tuning module 200 provides a variable capacitance for the oscillating circuit 400. It is understood that the oscillation circuit 400 in which the acoustic wave resonator chip 100 and the tuning module 200 are connected in series may be equivalent to one LC resonance circuit, and the oscillation frequency of the oscillator is determined by the resonance frequency of the LC resonance circuit. Thus, L s It can be understood that the inductance, C, provided by the acoustic wave resonator chip 100 u It is understood that the variable capacitance provided by the tuning module 200.
It will be appreciated that to achieve tuning capability of the oscillator, the capacitance C of the oscillating circuit 400 may be adjusted by u The oscillation frequency generated by the oscillation circuit 400 can be influenced by changing the oscillation frequency within a certain range according to actual needs, so that the oscillation frequency can be changed within a certain range, and tuning of the oscillation frequency is realized. And at L s For a constant value which can be obtained by measurement and calculation, according to C u The accurate value of the oscillation frequency of the oscillator can be calculated.
In the art, oscillators can be classified into several types, depending on the physical quantity used for tuning, voltage controlled oscillators (Voltage Controlled Oscillator, VCO), current controlled oscillators (Current Controlled Oscillator, CCO) and digital controlled oscillators (Digitally Controlled Oscillator, DCO). The VCO controls the output frequency of the oscillator by means of a voltage-tuning, varactor diode or other like control device. CCO then changes the resonator characteristic frequency by current controlling the magnetic field. DCO uses switching techniques to adjust the capacitance and inductance combinations of the resonant circuit to achieve tuning of the oscillator frequency. The tuning capability of the oscillator is achieved by the variable capacitance provided by the tuning module 200, and the oscillator in this embodiment can be understood as belonging to one type of numerically controlled oscillator.
Referring to fig. 10, optionally, the tuning module 200 includes a digitally controlled capacitor, the digitally controlled capacitor includes a first capacitor connection terminal 220, a second capacitor connection terminal 230, and a plurality of digitally controlled capacitor units 210 connected in parallel between the first capacitor connection terminal 220 and the second capacitor connection terminal 230, each of the digitally controlled capacitor units 210 includes an NMOS switch tube 211 and a capacitor 212; the source of the NMOS switch 211 is connected to the second capacitor connection terminal 230, the gate of the NMOS switch 211 is configured to receive an externally input level signal, the drain of the NMOS switch 211 is connected to one end of the capacitor 212, and the other end of the capacitor 212 is connected to the first capacitor connection terminal 220.
It will be appreciated that in practical applications, if a large-size varactor is used as the tuning module 200 to provide the variable capacitance, the quality factor of the large-size varactor tends to be poor, thereby deteriorating the phase noise of the oscillator. Therefore, the effect on the oscillator phase noise can be reduced by providing a digitally controlled capacitor of variable capacitance with the NMOS switch 211.
As can be understood, when the externally input level signal is at a high level, the gate voltage of the NMOS switch tube 211 is made to be greater than the source voltage of the NMOS switch tube 211, the NMOS switch tube 211 is turned on, and the capacitor 212 is connected to the circuit; when the externally input level signal is at a low level, the gate voltage of the NMOS switch 211 is smaller than the source voltage of the NMOS switch 211, the NMOS switch 211 is turned off, and the capacitor 212 is not connected to the circuit. Thus, the level signal controls the switching of the NMOS switching transistor 211 to control the capacitance value provided by the digitally controlled capacitance unit 210. The digitally controlled capacitor has a plurality of digitally controlled capacitor units 210, and the variable capacitance C provided by the digitally controlled capacitor can be obtained by controlling a plurality of NMOS switch tubes 211 u Is not limited in terms of the range of (a).
As a specific embodiment, there are 8 digitally controlled capacitance units in a digitally controlled capacitor, which may be referred to as an 8-bit digitally controlled capacitor. It is understood that an 8-bit digitally controlled capacitor may be referred to in the art as a 3-bit digitally controlled capacitor. Referring to FIG. 11, the capacitance of the capacitor is 100fF, and C is when an NMOS switch tube 211 is turned on u At 100fF, when the NMOS switch tube 211 is all open, C u 800fF. C (C) u As the number of switches turned on increases, C u Is in the tuning range of 100fF to 800fF.
Referring to FIG. 12, at C u At 100fF, the oscillation frequency of the oscillator is 1.953GHz; at C u At 800fF, the oscillator frequency was 1.921GHz. Oscillation frequency of oscillator along with C u The oscillation frequency of the oscillator ranges from 1.921GHz to 1.953GHz, i.e. the oscillator has a relative tuning range of 1.65%.
Alternatively, referring to fig. 5, the first capacitor connection end 220 is an end of the adjusting module 220 connected in series with the acoustic resonator chip 100, and the second capacitor connection end 230 is an end of the oscillating circuit 400 close to the tuning module 200. It should be understood that fig. 5 only schematically illustrates one connection manner of the first capacitor connection terminal 220 and the second capacitor connection terminal 230 in the oscillating circuit 400, and in practical applications, the second capacitor connection terminal 230 may also be an end of the adjusting module 220 connected in series with the acoustic wave resonator chip 100, and the first capacitor connection terminal 220 is an end of the oscillating circuit 400 near the tuning module 200. The connection manner of the first capacitor connection terminal 220 and the second capacitor connection terminal 230 in the oscillating circuit 400 is not particularly limited in this embodiment.
With continued reference to fig. 5, the active module 300 includes a first active unit 310 and a second active unit 320; wherein the first active cell 310 includes a first transistor 311; the second active cell 320 includes a second transistor 321; one end of the oscillating circuit 400 is connected to the source of the first transistor 311, the other end of the oscillating circuit 400 is connected to the source of the second transistor 321, and the drain of the first transistor 311 is connected to the gate of the second transistor 321, forming a positive feedback loop. Thus, the connection of the first active cell 310 and the second active cell 320 is achieved by the connection of the drain of the first transistor 311 with the gate of the second transistor 321, so that the signal is enhanced and self-oscillation is formed by the positive feedback loop formed by the first transistor 311 and the second transistor 321.
Optionally, the first transistor 311 comprises a common gate transistor; the second transistor 321 includes a source follower transistor. It will be appreciated that the common gate transistor may be considered an in-phase amplifier and the source follower transistor may be considered an in-phase amplifier, whereby a positive feedback loop may be formed by the common gate transistor and the source follower transistor.
Referring to fig. 5, the first active unit 310 further includes a first load resistor 312; the second active cell 320 further includes a second load resistor 322; one end of the first load resistor 312 is connected with the source electrode of the first transistor 311, and the other end of the first load resistor 312 is grounded; one end of the second load resistor 322 is connected with the source electrode of the second transistor 321, and the other end of the second load resistor 322 is grounded; the first load resistor 312 and the second load resistor 322 are used to adjust the reference potential of the oscillating circuit 400.
As will be appreciated, the oscillating circuit 400 oscillates up and down around the reference potential. If both ends of the oscillating circuit 400 are directly grounded, that is, the reference point of the oscillating circuit 400 is 0V, experiments show that the oscillating circuit 400 cannot vibrate downwards, and the device is invalid. Therefore, the reference potential of the oscillation circuit 400 needs to be raised so that the device can oscillate. The reference voltage of the oscillating circuit 400 is determined by the voltages across the first load resistor 312 and the second load resistor 322, and thus, in practical applications, the reference voltage of the oscillating circuit 400 can be changed by changing the resistance values of the first load resistor 312 and the second load resistor 322.
With continued reference to fig. 5, the first active unit 310 further includes a drain load circuit 313, where the drain load circuit 313 is connected to the drain of the first transistor 311, and provides a load resistor for the drain of the first transistor 311 to enable the first transistor 311 to implement an amplifying function.
It will be appreciated that the load resistor functions to convert the current output by the first transistor 311 into a voltage, thereby achieving voltage amplification. If there is no load resistance, even if the current of the first transistor 311 is large, the amplified voltage cannot be obtained, and the output voltage is close to zero, i.e., there is no amplification effect. Accordingly, the drain load circuit 313 allows the amplification function of the first transistor 311 to be realized.
Optionally, the drain load circuit 313 includes a drain load resistor. Thus, the drain load resistor directly provides the load resistor for the drain of the first transistor 311, so that the amplifying function of the first transistor 311 can be realized.
Further, the drain load circuit 313 includes an LC parallel resonant circuit, the oscillation frequency of which is correlated with the oscillation frequency of the acoustic wave resonator chip 100.
The LC parallel resonant circuit can be equivalently a load resistor, and the resistance value of the LC parallel resonant circuit is larger at the resonance point of the LC parallel resonant circuit. Since the load resistor functions to convert the current output from the first transistor 311 into a voltage, voltage amplification is achieved, and the larger the resistor, the larger the amplification factor of the first transistor 311. Accordingly, the LC parallel resonant circuit can increase the gain of the first transistor 311. Meanwhile, the LC parallel resonance circuit can avoid voltage drop and noise caused by drain load resistance, and can increase the spectral purity of the oscillator.
It will be appreciated that the oscillation frequency of the LC parallel resonant circuit is related to the oscillation frequency of the acoustic wave resonator chip 100, and the influence of the LC parallel resonant circuit on the oscillation frequency of the oscillator can be reduced. In practical applications, the oscillation frequency of the LC parallel resonant circuit is related to the oscillation frequency of the acoustic wave resonator chip 100, and may be specifically: the oscillation frequency of the LC parallel resonant circuit is the same as that of the acoustic wave resonator chip 100.
Referring to fig. 5, the second active unit 320 further includes a regulating circuit 323, the regulating circuit 323 is connected to the gate of the second transistor 321, and the regulating circuit 323 is configured to regulate a static operating point of the second transistor 321. The quiescent operating point is one of the important concepts of an amplifying circuit, which determines the performance of the amplifying circuit. If the static operating point is set higher, saturation distortion may occur when amplifying the signal; if the static operating point setting is low, cut-off distortion may occur when amplifying the signal. The second transistor 321 can reach the normal working state better through the regulating circuit 323.
Optionally, the regulation circuit 323 includes a first regulation resistor 3232, a second regulation resistor 3233, and a first regulation capacitor 3231; one end of the first regulating capacitor 3231 is connected with the drain electrode of the first transistor 311, and the other end of the first regulating capacitor 3231 is connected with the gate electrode of the second transistor 321; one end of the first regulating resistor 3232 is connected with the drain electrode of the second transistor 321, and the other end of the first regulating resistor 3232 is connected with the gate electrode of the second transistor 321; one end of the second regulating resistor 3233 is grounded, and the other end of the second regulating resistor 3233 is connected to the gate of the second transistor 321. In practical applications, the static operating voltage of the second transistor 321 can be better adjusted by changing the resistance value of the first adjusting resistor 3232, the resistance value of the second adjusting resistor 3233, and the capacitance value of the first adjusting capacitor 3231.
The embodiment of the application also provides a phase-locked loop, which comprises the oscillator in any embodiment.
It should be noted that the oscillator embodiment provided in the present application is the same concept as the phase-locked loop embodiment; the features of the embodiments described in the present invention may be combined arbitrarily without any conflict.
It should be understood that the above examples are illustrative and are not intended to encompass all possible implementations encompassed by the claims. Various modifications and changes may be made in the above embodiments without departing from the scope of the disclosure. Likewise, the various features of the above embodiments may be combined arbitrarily to form further embodiments of the application that may not be explicitly described. Thus, the above examples merely represent several embodiments of the present application and do not limit the scope of protection of the patent of the present application.
Claims (12)
1. An oscillator, comprising:
an oscillation circuit including an acoustic wave resonator chip and a tuning module connected in series, the tuning module for providing a variable capacitance by which the oscillation circuit tunes an oscillation frequency of the oscillator;
and one end of the active module is connected with one end of the oscillating circuit, and the other end of the active module is connected with the other end of the oscillating circuit to form a positive feedback loop, so that the oscillator oscillates.
2. The oscillator of claim 1, wherein the acoustic wave resonator chip comprises an acoustic wave resonator and an integrated capacitance integrated with the acoustic wave resonator;
the acoustic wave resonator includes a second electrode, a piezoelectric layer, and a first electrode stacked on a substrate;
the integrated capacitor comprises the first electrode, a dielectric layer and a capacitor upper electrode, wherein the dielectric layer is positioned between the first electrode and the capacitor upper electrode;
wherein the projection of the upper electrode of the capacitor on the substrate at least partially overlaps with the projection of the first electrode on the substrate.
3. The oscillator of claim 2, wherein the acoustic wave resonator chip includes a signal input and a signal output; wherein,
the second electrode is used as a signal input end, and the upper electrode of the capacitor is used as a signal output end, so that the acoustic wave resonator and the integrated capacitor are connected in series; or,
the second electrode is used as a signal input end, and the first electrode is used as a signal output end, so that the acoustic wave resonator and the integrated capacitor are connected in parallel.
4. The oscillator of claim 1, wherein the tuning module comprises a digitally controlled capacitor comprising a first capacitive connection, a second capacitive connection, and a plurality of digitally controlled capacitive cells connected in parallel between the first capacitive connection and the second capacitive connection, each of the digitally controlled capacitive cells comprising an NMOS switch tube and a capacitor; wherein,
the source electrode of the NMOS switch tube is connected with the second capacitor connecting end, the grid electrode of the NMOS switch tube is used for receiving an externally input level signal, the drain electrode of the NMOS switch tube is connected with one end of the capacitor, and the other end of the capacitor is connected with the first capacitor connecting end.
5. The oscillator of claim 1, wherein the active module comprises a first active unit and a second active unit; wherein the first active cell comprises a first transistor; the second active cell includes a second transistor;
one end of the oscillating circuit is connected with the source electrode of the first transistor, the other end of the oscillating circuit is connected with the source electrode of the second transistor, and the drain electrode of the first transistor is connected with the gate electrode of the second transistor to form a positive feedback loop.
6. The oscillator of claim 5, wherein the first transistor comprises a common-gate transistor; the second transistor includes a source follower transistor.
7. The oscillator of claim 5, wherein the first active cell further comprises a first load resistor; the second active cell further comprises a second load resistor;
one end of the first load resistor is connected with the source electrode of the first transistor, and the other end of the first load resistor is grounded;
one end of the second load resistor is connected with the source electrode of the second transistor, and the other end of the second load resistor is grounded;
the first load resistor and the second load resistor are used for adjusting a reference potential of the oscillating circuit.
8. The oscillator of claim 5, wherein the first active cell further comprises a drain load circuit coupled to the drain of the first transistor, the drain of the first transistor being provided with a load resistor that enables the first transistor to perform an amplification function.
9. The oscillator of claim 8, wherein the drain load circuit comprises an LC parallel resonant circuit having an oscillation frequency related to an oscillation frequency of the acoustic wave resonator.
10. The oscillator of claim 5, wherein the second active cell further comprises a regulation circuit coupled to the gate of the second transistor, the regulation circuit configured to regulate a quiescent operating point of the second transistor.
11. The oscillator of claim 10, wherein the regulation circuit comprises a first regulation resistor, a second regulation resistor, and a first regulation capacitor;
one end of the first regulating capacitor is connected with the drain electrode of the first transistor, and the other end of the first regulating capacitor is connected with the grid electrode of the second transistor;
one end of the first regulating resistor is connected with the drain electrode of the second transistor, and the other end of the first regulating resistor is connected with the grid electrode of the second transistor;
one end of the second regulating resistor is grounded, and the other end of the second regulating resistor is connected with the grid electrode of the second transistor.
12. A phase locked loop, comprising: an oscillator as claimed in any one of claims 1 to 11.
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| CN202311757700.0A CN117595793A (en) | 2023-12-19 | 2023-12-19 | Oscillator and phase-locked loop |
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| CN202311757700.0A CN117595793A (en) | 2023-12-19 | 2023-12-19 | Oscillator and phase-locked loop |
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