CN117594624A - Image sensor and manufacturing method thereof - Google Patents

Image sensor and manufacturing method thereof Download PDF

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Publication number
CN117594624A
CN117594624A CN202410078072.1A CN202410078072A CN117594624A CN 117594624 A CN117594624 A CN 117594624A CN 202410078072 A CN202410078072 A CN 202410078072A CN 117594624 A CN117594624 A CN 117594624A
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isolation
substrate
layer
semiconductor material
material layer
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CN117594624B (en
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陈维邦
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Nexchip Semiconductor Corp
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Nexchip Semiconductor Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14625Optical elements or arrangements associated with the device
    • H01L27/14627Microlenses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1464Back illuminated imager structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685Process for coatings or optical elements

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The invention discloses an image sensor and a manufacturing method thereof, which belong to the technical field of semiconductors, wherein the image sensor comprises: a substrate having opposed first and second surfaces; a shallow trench isolation structure extending from the second surface into the substrate; the isolation layer is arranged in the substrate and is contacted with one end of the shallow trench isolation structure in the substrate; an isolation doped region extending from the first surface to the isolation layer, the isolation doped region being obtained by doping and etching the substrate; the photoelectric sensing areas are arranged between the isolation doping areas, and the bottoms of the photoelectric sensing areas are in contact with the substrate; and a grid structure arranged on the isolation doped region. The image sensor and the manufacturing method thereof provided by the invention simplify the manufacturing process and improve the yield and quality of the image sensor.

Description

Image sensor and manufacturing method thereof
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to an image sensor and a manufacturing method thereof.
Background
The image sensor is a device for converting an optical signal into an electrical signal, and is widely used in fields such as photography and security systems, smart phones, facsimile machines, scanners, and medical electronics. Among them, the back-illuminated (Back Side Illumination, BSI) image sensor has advantages of higher sensitivity, better wiring layout, and allowing high-speed recording, and is applied in the field with high pixel performance requirement of the image sensor. In the back-illuminated image sensor, isolation is required between adjacent photoelectric sensing areas, the existing isolation structure has complex manufacturing process, and the problems of substrate damage, crosstalk phenomenon and the like can be caused, so that the quality of the image sensor is reduced.
Disclosure of Invention
The invention aims to provide an image sensor and a manufacturing method thereof, and the image sensor and the manufacturing method thereof can simplify the manufacturing process and improve the yield and quality of the image sensor.
In order to solve the above technical problems, the present invention provides an image sensor, at least comprising:
a substrate having opposed first and second surfaces;
a shallow trench isolation structure extending from the second surface into the substrate;
the isolation layer is arranged in the substrate and is contacted with one end of the shallow trench isolation structure in the substrate;
an isolation doped region extending from the first surface to the isolation layer, the isolation doped region being obtained by doping and etching the substrate;
the photoelectric sensing areas are arranged between the isolation doping areas, and the bottoms of the photoelectric sensing areas are in contact with the substrate; and
and the grid structure is arranged on the isolation doped region.
In an embodiment of the present invention, the isolation doped region and the shallow trench isolation structure are disposed on two sides of the isolation layer correspondingly.
In an embodiment of the present invention, the ion doping type of the isolation doped region is opposite to that of the photo sensing region.
In an embodiment of the present invention, a width of the grid structure is less than or equal to a width of the isolation doped region.
In an embodiment of the invention, the image sensor further includes a light filtering structure, the light filtering structure is disposed on the photo-sensing area, and a top of the light filtering structure is in an arc shape protruding outwards.
The invention also provides a manufacturing method of the image sensor, which at least comprises the following steps:
providing a substrate having opposite first and second surfaces;
forming shallow trench isolation structures in the substrate, wherein the shallow trench isolation structures extend into the substrate from the second surface;
forming an isolation layer in the substrate, wherein the isolation layer is contacted with one end of the shallow trench isolation structure in the substrate;
forming an isolation doped region within the substrate, the isolation doped region extending from the first surface into the substrate;
forming a plurality of photoelectric sensing areas between the isolation doped areas, wherein the bottoms of the photoelectric sensing areas are in contact with the substrate; and
and forming a grid structure on the isolation doped region.
In an embodiment of the present invention, the manufacturing method further includes:
implanting first ions into the substrate from the first surface after the shallow trench isolation structure is formed, so as to form an oxygen-containing layer;
performing heat treatment on the substrate, wherein oxygen ions in the oxygen-containing layer react with the substrate to form the isolation layer;
implanting second ions into the substrate from the first surface to form a doped layer, wherein the doped layer is in contact with the isolation layer; and
and etching part of the doped layer and the isolation layer to form the isolation doped region and the groove.
In an embodiment of the present invention, the method for manufacturing the photo-sensing region includes:
growing a first semiconductor material layer in the trench and on the isolation doped region, wherein the thickness of the first semiconductor material layer on the trench sidewall is less than one half of the trench width;
forming a second semiconductor material layer on the first semiconductor material layer, wherein the second semiconductor material layer protrudes from the first surface on the upper surface in the groove; and
and flattening the first semiconductor material layer and the second semiconductor material layer, and forming the photoelectric sensing region in the groove.
In an embodiment of the present invention, the first semiconductor material layer and the second semiconductor material layer are doped with ions of the same type, and the relative atomic mass of the doped ions in the second semiconductor material layer is greater than the relative atomic mass of the doped ions in the second semiconductor material layer.
In an embodiment of the present invention, the doping concentration of the second semiconductor material layer is greater than the doping concentration of the first semiconductor material layer.
In summary, the present invention provides an image sensor and a manufacturing method thereof, and by improving the structure and the manufacturing method of the image sensor, the unexpected effect of the present application is that the manufacturing process can be simplified, the manufacturing process can be reduced, the production efficiency of enterprises can be improved, and the production cost can be saved. The method can simplify the etching process, does not need high-precision etching equipment, saves the etching cost, reduces etching damage and reduces dark current. The leakage can be prevented, the power consumption of the image sensor is reduced, and the efficiency is improved. The damage of ion implantation to the photoelectric sensing region can be avoided, the quality of the photoelectric sensing region is improved, and the crosstalk phenomenon is restrained. The photoelectric sensing area with the concentration gradient can be formed, so that reflection and refraction of light rays are increased, the photoelectric reaction efficiency of the image sensor is improved, and the imaging quality of the image sensor is improved.
Of course, it is not necessary for any one product to practice the invention to achieve all of the advantages set forth above at the same time.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a substrate and forming a metal layer on a second surface of the substrate in an embodiment.
FIG. 2 is a schematic illustration of an oxygen-containing layer formed in a substrate in one embodiment.
FIG. 3 is a schematic diagram of forming an isolation layer in a substrate in one embodiment.
FIG. 4 is a schematic illustration of forming a doped layer in a substrate in one embodiment.
FIG. 5 is a schematic diagram illustrating a first photoresist layer formed on a doped layer in an embodiment.
FIG. 6 is a schematic illustration of an embodiment of etching a doped layer to form isolation doped regions and trenches.
Figure 7 is a schematic diagram of a semiconductor material layer grown within a trench in one embodiment.
FIG. 8 is a schematic diagram illustrating formation of a photo-sensing region in an embodiment.
FIG. 9 is a schematic illustration of forming an oxide layer and a layer of grid material on a first surface of a substrate in one embodiment.
FIG. 10 is a schematic diagram of a grid structure formed on a first surface of a substrate in one embodiment.
FIG. 11 is a schematic diagram of an image sensor according to an embodiment.
Description of the reference numerals:
10. a substrate; 101. a first surface; 102. a second surface; 103. a doped layer; 11. shallow trench isolation structures; 12. a gate dielectric layer; 13. an etch stop layer; 14. a dielectric layer; 15. an isolation layer; 151. an oxygen-containing layer; 16. a first photoresist layer; 161. a first opening; 17. isolating the doped region; 171. a groove; 18. a layer of semiconductor material; 181. a first semiconductor material layer; 182. a second semiconductor material layer; 19. a photo-electric sensing region; 21. an oxide layer; 211. a first oxide layer; 212. a second oxide layer; 213. a third oxide layer; 22. a layer of grill material; 221. a first layer of grill material; 222. a second layer of grill material; 23. a grid structure; 20. a gate structure; 201. a connection structure; 202. a metal layer; 301. a blue filter; 302. a green filter; 303. a red filter.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
In the present invention, it should be noted that, as terms such as "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., appear, the indicated orientation or positional relationship is based on that shown in the drawings, only for convenience of description and simplification of the description, and does not indicate or imply that the indicated apparatus or element must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like, as used herein, are used for descriptive and distinguishing purposes only and are not to be construed as indicating or implying a relative importance.
Referring to fig. 1 to 10, an image sensor is obtained by providing a method for manufacturing an image sensor according to the present invention, wherein the image sensor includes a substrate 10, and the substrate 10 has a first surface 101 and a second surface 102 opposite to each other. A shallow trench isolation structure 11 is disposed on the second surface 102 of the substrate 10, an isolation doped region 17 is disposed on the first surface 101 of the substrate 10, and the shallow trench isolation structure 11 is disposed corresponding to the isolation doped region 17. Isolation doped regions 17 are formed between the photo-sensing regions 19 for isolation between the photo-sensing regions 19, and a grating structure 23 is formed on the isolation doped regions 17. The isolation doped region 17 is obtained by doping and etching the substrate 10, and the photoelectric sensing region 19 is obtained by epitaxial growth, so that the manufacturing process can be simplified, the manufacturing process can be reduced, the production efficiency of enterprises can be improved, and the production cost can be saved. Meanwhile, damage to the photoelectric sensing area caused by etching and ion implantation is reduced, dark current and crosstalk phenomena are reduced, and the performance of the photodiode is improved.
Referring to fig. 1, in an embodiment of the present invention, a substrate 10 is made of any suitable semiconductor material, such as a substrate of sapphire, silicon wafer, silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), or silicon germanium (GeSi), and includes a stacked structure of these semiconductors, or is made of silicon on insulator, silicon germanium on insulator, or the like, which can be specifically selected according to the manufacturing requirements of the image sensor. In this embodiment, the substrate 10 is, for example, a silicon wafer semiconductor substrate, and the substrate 10 may be an undoped substrate or a doped substrate. In this embodiment, the substrate 10 is, for example, a P-type silicon substrate, and the thickness of the substrate 10 is not particularly limited, and is selected according to the manufacturing requirements. For convenience of description, a side of the substrate 10 on which the grating structure is provided is defined as a first surface 101, and a side opposite to the first surface 101 is defined as a second surface 102.
Referring to fig. 1, in an embodiment of the present invention, a shallow trench isolation structure 11 is disposed in a substrate 10, and the shallow trench isolation structure 11 extends from a second surface 102 of the substrate 10 into the substrate 10. Specifically, a first patterned photoresist layer (not shown) is formed on the second surface 102 of the substrate 10 to define the location of the shallow trench. And quantitatively removing the exposed part of the substrate 10 of the first patterned photoresist layer by using the first patterned photoresist layer as a mask and adopting a dry etching mode, a wet etching mode or an etching mode combining the dry etching mode and the wet etching mode to obtain a shallow trench (not shown in the figure). After the shallow trench is formed, an isolation medium, such as an insulating material such as silicon oxide, is deposited in the shallow trench. And a planarization process such as chemical mechanical polishing (Chemical Mechanical Polishing, CMP) is performed to planarize the top of the isolation medium, thereby forming a plurality of shallow trench isolation structures 11. In this embodiment, the depth of the shallow trench isolation structure 11 is less than one third of the thickness of the substrate 10.
Referring to fig. 1, in an embodiment of the present invention, after forming the shallow trench isolation structure 11, a gate dielectric layer 12, a gate structure 20, a dielectric layer 14, a metal connection structure, and the like are formed on the second surface 102 of the substrate 10. The gate dielectric layer 12 is disposed on the second surface 102, the gate structures 20 are disposed on the gate dielectric layer 12 at intervals, the gate dielectric layer 12 is, for example, silicon dioxide or a low dielectric constant material, the gate structures 20 are, for example, polysilicon gate structures, the gate dielectric layer 12 is, for example, formed by thermal oxidation or chemical vapor deposition (Chemical Vapor Deposition, CVD), and the gate structures 20 are, for example, formed by chemical vapor deposition. An etch stop layer 13 is disposed on the gate dielectric layer 12 and between the gate structures 20, and the etch stop layer 13 is, for example, silicon carbonitride or silicon nitride, and is formed by chemical vapor deposition or physical vapor deposition (Physical Vapor Deposition, PVD), etc. After forming the etch stop layer 13, a dielectric layer 14 is formed on the etch stop layer 13, the dielectric layer 14 is etched to form a plurality of openings, and a conductive material, such as titanium/titanium nitride and tungsten metal, is deposited within the openings to form the connection structure 201. A metal layer 202 is formed on the dielectric layer 14, the metal layer 202 and the connection structure 201 forming a metal connection structure. In other embodiments, two or more metal layers 202 may be provided, and adjacent metal layers 202 are isolated by a dielectric layer 14 and connected by a connection structure 201. The specific thicknesses of the gate dielectric layer 12, the gate structure 20, the etch stop layer 13, and the dielectric layer 14 are not limited, and are selected according to the manufacturing requirements during the manufacturing process.
Referring to fig. 1 to 3, in an embodiment of the present invention, after forming the dielectric layer 14 and the metal connection structure on the second surface 102 of the substrate 10, a carrier wafer (carrier wafer) is bonded, the bonded wafer is flipped over and thinned to the first surface 101 of the substrate 10, and first ions, such as oxygen ions, are implanted into the substrate 10 from the first surface 101 of the substrate 10 to form the oxygen-containing layer 151. The oxygen-containing layer 151 contacts with one end of the shallow trench isolation structure 11 in the substrate 10, and the thickness of the oxygen-containing layer 151 is, for example, 5nm to 10nm. After the oxygen-containing layer 151 is formed, the substrate 10 is subjected to a heat treatment, for example, in an inert gas or nitrogen atmosphere, and oxygen ions in the oxygen-containing layer 151 react with the substrate 10 at 900 ℃ to 1100 ℃ to generate silicon oxide, that is, the isolation layer 15 is formed.
Referring to fig. 3 to 4, in an embodiment of the present invention, after forming the isolation layer 15, a second ion, such as a P-type ion of boron (B), gallium (Ga) or indium (In), is implanted from the first surface 101 of the substrate 10 into the substrate 10, and the doped layer 103 is formed In the substrate 10. Wherein the second ions are implanted, for example, by ion implantation or solid phase diffusion. In the present embodiment, the doped layer 103 is obtained by ion implantation, for example, and the ion implantation direction is perpendicular to the first surface 101 of the substrate 10. In the process of forming the doped layer 103, the doped layer 103 is formed on one side of the isolation layer 15 by taking the isolation layer 15 as a boundary, that is, the doped layer 103 contacts with the isolation layer 15, and the doped layer 103 and the shallow trench isolation structure 11 are respectively located on two sides of the isolation layer 15. In the present embodiment, the doping concentration of the second ion in the doped layer 103 is, for example, 3×10 14 atoms/cm 2 ~5×10 15 atoms/cm 2 . In other embodiments, the doping concentration of doped layer 103 may be flexibly selected according to the manufacturing requirements.
Referring to fig. 4 to 5, in an embodiment of the present invention, after forming the doped layer 103, a first photoresist layer 16 is formed on the first surface 101 of the substrate 10, and a plurality of first openings 161 are formed on the first photoresist layer 16 through processes such as exposure and development, wherein the first openings 161 expose the substrate 10 between adjacent shallow trench isolation structures 11 to define a photosensitive region.
Referring to fig. 5 to fig. 6, in an embodiment of the present invention, after forming a plurality of first openings 161 on the first photoresist layer 16, using the first photoresist layer 16 as a mask, part of the doped layer 103 and the isolation layer 15 at the bottom are removed by dry etching, wet etching or an etching process combining the dry etching and the wet etching, and specifically, the doped layer 103 and the isolation layer 15 at the bottom exposed by the first openings 161 are removed to form trenches 171. In the present embodiment, the trench 171 is obtained by dry etching, for example, and the dry etching gas includes chlorine (Cl) 2 ) Carbon tetrafluoride (CF) 4 ) Hexafluoroethane (C) 2 F 6 ) Trifluoromethane (CHF) 3 ) Difluoromethane (CH) 2 F 2 ) Nitrogen trifluoride (NF) 3 ) Sulfur hexafluoride (SF) 6 ) Or hydrogen bromide (HBr), etc. The shape of the groove 171 is, for example, rectangular, trapezoid, or the like, and the present invention is not particularly limited. During the etching process, isolation layer 15 within trench 171 is etched, i.e., trench 171 exposes substrate 10, and a subsequent layer of semiconductor material 18 is formed on substrate 10.
Referring to fig. 5 and 6, in an embodiment of the present invention, after forming the trench 171, the doped layer 103 remains on both sides of the trench 171, and the remaining doped layer 103 is defined as the isolation doped region 17. Wherein. The isolation doped region 17 is located on the shallow trench isolation structure 11 and is disposed corresponding to the shallow trench isolation structure 11. The isolation doped regions 17 are arranged at two sides of the groove 171 to serve as the isolation function of the photoelectric sensing region formed later, namely the function equivalent to the deep groove isolation structure, but the manufacturing process is simple, the isolation doped regions 17 and the groove 171 are obtained through one-step etching, the deep groove isolation structure is prevented from being manufactured, the deep groove is not required to be formed through etching first, the substrate between the deep groove isolation structures is removed through etching again after the deep groove isolation structure is formed through depositing isolation medium, the manufacturing process is simplified, the manufacturing process is reduced, the production efficiency of enterprises is improved, and the production cost is saved. Meanwhile, the isolation doped region 17 is formed by the method provided by the application, so that the high depth-to-width ratio etching process can be avoided when the deep trench is formed, the etching process is simplified, high-precision etching equipment is not needed, the etching cost is saved, the etching damage is reduced, and the isolation effect of the isolation doped region 17 is improved.
Referring to fig. 6 and 7, in an embodiment of the present invention, after forming the trench 171, the semiconductor material layer 18 is grown in the trench 171, and the present invention does not limit the number of layers of the semiconductor material layer 18, and by forming multiple layers of the semiconductor material layer 18, the doping concentration on the substrate surface can be increased, and the photoelectric reaction efficiency of the photosensitive region can be improved. In one embodiment of the present invention, the semiconductor material layer 18 is, for example, 2-5 layers. In the present embodiment, the semiconductor material layer 18 includes, for example, a first semiconductor material layer 181 and a second semiconductor material layer 182, wherein the first semiconductor material layer 181 is disposed on the sidewalls and bottom of the trench 171 and the isolation doped region 17, and the second semiconductor material layer 182 is disposed on the first semiconductor material layer 181.
Referring to fig. 7, in an embodiment of the present invention, the first semiconductor material layer 181 and the second semiconductor material layer 182 are doped with impurity ions of the same type, and the doping type is opposite to that of the isolation doped region 17. The impurity ions are, for example, N-type ions such As phosphorus (P), arsenic (As), or antimony (Sb). In the present embodiment, the impurity ions in the first semiconductor material layer 181 are, for example, phosphorus ions, and the doping concentration of the phosphorus ions is, for example, 1×10 14 atoms/cm 2 ~5×10 15 atoms/cm 2 . The impurity ions in the second semiconductor material layer 182 are, for example, arsenic ions, and the doping concentration of the arsenic ions is, for example, 1×10 15 atoms/cm 2 ~9×10 15 atoms/cm 2 . And the concentration of doped ions in the second semiconductor material layer 182 is greater than that in the first semiconductor material layer 181, so as to form a photoelectric sensing region with a concentration gradient, thereby improving the photoelectric reaction efficiency of the image sensor. And the relative atomic mass of the doped ions in the second semiconductor material layer 182 is greater than that of the doped ions in the first semiconductor material layer 181, i.e. the relative atomic mass of the doped ions in the later formed semiconductor material layer is increased, so as to improve the doping concentration at the center of the first surface 101, avoid the problem of smaller surface doping concentration caused by only doping phosphorus ions with smaller doping mass in the semiconductor material layer, and control the concentration of the doped ions on the first surface 101 to be larger, thereby improving the quality of the image sensor. In other embodiments, the greater the relative atomic mass of the dopant ions in the multiple layers of semiconductor material 18, and in the later formed layers of semiconductor material.
Referring to fig. 6 to 7, in an embodiment of the present invention, the first semiconductor material layer 181 and the second semiconductor material layer 182 are formed by, for example, epitaxial growth, and are formed by, for example, molecular beam epitaxy (Molecular Beam Epitaxy, MBE) or Metal-organic chemical vapor deposition (Metal-organic Chemical Vapor Deposition, MOCVD). Wherein, when forming the first semiconductor material layer 181, a reactant and a doping source are introduced, wherein the reactant comprises at least one of silane, disilane, trichlorosilane, dichlorosilane or tetraethoxysilane, for example, and the doping source comprises at least one of phosphine or phosphine, for example, and the volume ratio of the doping source to the reactant is (0.01-0.2): 1, for example. In other embodiments, other reactants and dopant sources may be employed as raw materials to form the first semiconductor material layer 181. In forming the second semiconductor material layer 182, a dopant and a dopant source are introduced, the dopant source includes at least one of arsine or arsine, for example, the reactant includes at least one of silane, disilane, trichlorosilane, dichlorosilane, monochlorosilane, methylsilane, silicon tetrachloride or tetraethoxysilane, for example, and a volume ratio of the dopant source to the dopant source is (0.01-0.2): 1, for example. In other embodiments, the second semiconductor material layer 182 may be formed using its dopant source and reactant as raw materials. The growth rate of the first semiconductor material layer 181 is different at different positions, the thickness of the first semiconductor material layer 181 at the bottom of the trench 171 is greater than the thickness of the first semiconductor material layer 181 at the side wall of the trench 171, and the thickness of the first semiconductor material layer 181 at the side wall of the trench 171 is less than one half of the width of the trench 171, and the thickness of the first semiconductor material layer 181 at the bottom of the trench 171 is, for example, one third to one half of the depth of the recess, so as to ensure that the first semiconductor material layer 181 does not close the opening of the trench 171, and ensure the growth of the second semiconductor material layer 182. When the second semiconductor material layer 182 is generated, an upper surface of the second semiconductor material layer 182 within the trench 171 is ensured to protrude from the first surface 101 of the substrate 10.
Referring to fig. 7 to 8, in an embodiment of the present invention, after forming the semiconductor material layer 18, a planarization process is performed, for example, by removing the first semiconductor material layer 181 and the second semiconductor material layer 182 on the first surface 101 through chemical mechanical polishing, which includes the semiconductor material layer 18 partially over-polished in the recess. The first semiconductor material layer 181 and the second semiconductor material layer 182 in the grooves are defined as the photoelectric sensing region 19, namely, the photoelectric sensing region 19 is formed by an epitaxial method, so that the damage of high implantation energy to the substrate when ions are implanted into the substrate can be avoided, the quality of the photoelectric sensing region 19 is improved, and the crosstalk phenomenon is restrained. And the bottom of the photoelectric sensing region 19 is contacted with the substrate 10, and the bottom of the isolation doping region 17 is kept with the isolation layer 15, so that electric leakage can be prevented, and meanwhile, the power consumption of the image sensor is reduced, and the efficiency is improved.
Referring to fig. 8 to 9, in an embodiment of the invention, after forming the photo-sensing region 19, an oxide layer 21 and a grid material layer 22 are formed on the isolation doped region 17 and the photo-sensing region 19, and the grid material layer 22 is disposed on the oxide layer 21. In this embodiment, the oxide layer 21 includes a first oxide layer 211, a second oxide layer 212, and a third oxide layer 213, where the first oxide layer 211 is disposed on the isolation doped region 17 and the photo-sensing region 19, the second oxide layer 212 is disposed on the first oxide layer 211, and the third oxide layer 213 is disposed on the second oxide layer 212. The first oxide layer 211 is, for example, an alumina layer with a high dielectric constant, and the thickness of the first oxide layer 211 is, for example, 65 a to 85 a, specifically, 70 a, 75 a, 80 a, or the like. The second oxide layer 212 is, for example, a tantalum oxide layer with a high dielectric constant, and the thickness of the second oxide layer 212 is, for example, 500 a to 600 a, specifically, 520 a, 550 a, 570 a, etc. The third oxide layer 213 is, for example, a silicon dioxide layer, and the thickness of the third oxide layer 213 is, for example, 1800 a to 2000 a, specifically, 1800 a, 1900 a or 2000 a. And a plurality of oxide layers are arranged, and complete multi-layer isolation is formed around the photoelectric sensing areas, so that crosstalk between adjacent photoelectric sensing areas 19 is prevented, and the imaging quality of the image sensor is improved.
Referring to fig. 8 to 9, in an embodiment of the present invention, the grating material layer 22 includes a first grating material layer 221 and a second grating material layer 222, the first grating material layer 221 is disposed on the third oxide layer 213, and the second grating material layer 222 is disposed on the first grating material layer 221. In the present embodiment, the first grating material layer 221 is, for example, a metal aluminum layer, and the thickness of the first grating material layer 221 is, for example, 2000 a to 2500 a, the second grating material layer 222 is, for example, a silicon dioxide layer, and the thickness of the second grating material layer 222 is, for example, 6000 a to 7000 a. The thickness of the oxide layer 21 and the grid material layer 22 can be adjusted as required by a person skilled in the art.
Referring to fig. 9 to 10, in an embodiment of the present invention, after forming the oxide layer 21 and the grating material layer 22, the grating material layer 22 and the oxide layer 21 are etched to form a grating structure 23. Specifically, a second patterned photoresist layer (not shown) is formed on the grating material layer 22 to locate the grating structure 23. The second patterned photoresist layer is used as a mask, for example, the exposed grating material layer 22 and the oxide layer 21 of the second patterned photoresist layer are removed by dry etching, wet etching or a combination of dry etching and wet etching, so as to form a grating structure 23, the grating structure 23 is disposed on the isolation doped region 17, and the two sides of the grating structure 23 expose the photo-sensing region 19. In the present embodiment, the grating structure 23 is located on the isolation doped region 17, and the width of the grating structure 23 is equal to the width of the isolation doped region 17, and two sides of the grating structure 23 are aligned with two sides of the isolation doped region 17. In other embodiments, the width of the grating structure 23 is smaller than the width of the isolation doped region 17, for example.
Referring to fig. 10 to 11, in an embodiment of the invention, after the grid structures 23 are formed, a filtering structure is formed on the photo-sensing regions 19 between adjacent grid structures 23, and the filtering structure is located on the photo-sensing regions 19. The filter structure comprises a plurality of color filters, for example, and the plurality of color filters form a color filter array. Each color filter corresponds to one photo-sensing region 19. In this embodiment, the filtering structure may at least include color filters of three primary colors, such as blue filter 301, green filter 302 and red filter 303, and the color filters may be arranged in any suitable combination. For example, the blue filter 301, the green filter 302, and the red filter 303 may be staggered. A transparent filter sheet may be further disposed, and the blue filter 301, the green filter 302, the red filter 303, and the transparent filter sheet may be staggered. The color filter may be a polymeric material such as a negative photoresist based on an acrylic polymer, and may contain a color dye. After the formation of the grating structures 23, the color filters may be vacuum evaporated directly between adjacent grating structures 23. After the light passes through the color filter, the color can be changed, and the high transmittance of a certain wave band (color) is maintained, so that the photoelectric conversion effect is enhanced.
Referring to fig. 11, in an embodiment of the invention, the top of the optical filtering structure is in an arc shape protruding outwards, so that incident light can be focused on the photoelectric sensing area, and the curvature of the surface of the optical filtering structure can be changed according to the light focusing requirement, so as to improve the light sensing efficiency. After the filter structure is formed, the microlens structure can be formed on the filter structure, and the microlens structure can be formed by selecting any mode for forming the microlens structure. The number of the photo-sensing regions and the number of the filtering structures can be set according to practical requirements, which is only an example in the present embodiment.
In summary, the present invention provides an image sensor and a method for manufacturing the same, and by improving the structure and the method for manufacturing the image sensor, the unexpected effect of the present invention is that the formation of the isolation doped region by doping can avoid the formation of the deep trench isolation structure, thereby simplifying the manufacturing process, reducing the manufacturing process, improving the production efficiency of enterprises, and saving the production cost. The method can simplify the etching process, does not need high-precision etching equipment, saves the etching cost, reduces etching damage and reduces dark current. The grooves and the isolation doped regions are obtained synchronously, so that the cost is reduced, the isolation layers are removed by etching, electric leakage can be prevented, the power consumption of the image sensor is reduced, and the efficiency is improved. By growing multiple semiconductor material layers, the damage of ion implantation to the photoelectric sensing region is avoided, the quality of the photoelectric sensing region is improved, and the crosstalk phenomenon is inhibited. The doping concentrations in the semiconductor material layers are different to form a photoelectric sensing region with a concentration gradient, so that reflection and refraction of light are increased, photoelectric reaction efficiency of the image sensor is improved, and imaging quality of the image sensor is improved.
The embodiments of the invention disclosed above are intended only to help illustrate the invention. The examples are not intended to be exhaustive or to limit the invention to the precise forms disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best understand and utilize the invention. The invention is limited only by the claims and the full scope and equivalents thereof.

Claims (10)

1. An image sensor, comprising at least:
a substrate having opposed first and second surfaces;
a shallow trench isolation structure extending from the second surface into the substrate;
the isolation layer is arranged in the substrate and is contacted with one end of the shallow trench isolation structure in the substrate;
an isolation doped region extending from the first surface to the isolation layer, the isolation doped region being obtained by doping and etching the substrate;
the photoelectric sensing areas are arranged between the isolation doping areas, and the bottoms of the photoelectric sensing areas are in contact with the substrate; and
and the grid structure is arranged on the isolation doped region.
2. The image sensor of claim 1, wherein the isolation doped regions are disposed on opposite sides of the isolation layer corresponding to the shallow trench isolation structures.
3. The image sensor of claim 1, wherein the isolation doped region is of an opposite ion doping type than the photo sensing region.
4. The image sensor of claim 1, wherein a width of the grating structure is less than or equal to a width of the isolation doped region.
5. The image sensor of claim 1, further comprising a filter structure disposed on the photo-sensing region, wherein a top of the filter structure is in an outwardly convex arc shape.
6. A method for manufacturing an image sensor, comprising at least the steps of:
providing a substrate having opposite first and second surfaces;
forming shallow trench isolation structures in the substrate, wherein the shallow trench isolation structures extend into the substrate from the second surface;
forming an isolation layer in the substrate, wherein the isolation layer is contacted with one end of the shallow trench isolation structure in the substrate;
forming an isolation doped region within the substrate, the isolation doped region extending from the first surface into the substrate;
forming a plurality of photoelectric sensing areas between the isolation doped areas, wherein the bottoms of the photoelectric sensing areas are in contact with the substrate; and
and forming a grid structure on the isolation doped region.
7. The method of manufacturing an image sensor of claim 6, further comprising:
implanting first ions into the substrate from the first surface after the shallow trench isolation structure is formed, so as to form an oxygen-containing layer;
performing heat treatment on the substrate, wherein oxygen ions in the oxygen-containing layer react with the substrate to form the isolation layer;
implanting second ions into the substrate from the first surface to form a doped layer, wherein the doped layer is in contact with the isolation layer; and
and etching part of the doped layer and the isolation layer to form the isolation doped region and the groove.
8. The method for manufacturing an image sensor according to claim 7, wherein the method for manufacturing a photo-sensing region comprises:
growing a first semiconductor material layer in the trench and on the isolation doped region, wherein the thickness of the first semiconductor material layer on the trench sidewall is less than one half of the trench width;
forming a second semiconductor material layer on the first semiconductor material layer, wherein the second semiconductor material layer protrudes from the first surface on the upper surface in the groove; and
and flattening the first semiconductor material layer and the second semiconductor material layer, and forming the photoelectric sensing region in the groove.
9. The method of claim 8, wherein the first semiconductor material layer and the second semiconductor material layer are doped with ions of a same type, and wherein the relative atomic mass of the doped ions in the second semiconductor material layer is greater than the relative atomic mass of the doped ions in the second semiconductor material layer.
10. The method of claim 8, wherein the second semiconductor material layer has a doping concentration greater than a doping concentration of the first semiconductor material layer.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118231435A (en) * 2024-05-24 2024-06-21 合肥晶合集成电路股份有限公司 Image sensor and method for manufacturing same
CN118231433A (en) * 2024-05-22 2024-06-21 合肥晶合集成电路股份有限公司 Image sensor and method for manufacturing same
CN118281025A (en) * 2024-06-03 2024-07-02 合肥晶合集成电路股份有限公司 Image sensor and manufacturing method thereof

Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007027321A (en) * 2005-07-14 2007-02-01 Renesas Technology Corp Method of manufacturing element isolator and method of manufacturing semiconductor device
US20120319230A1 (en) * 2011-06-20 2012-12-20 Chia-Ying Liu Etching narrow, tall dielectric isolation structures from a dielectric layer
US20120319242A1 (en) * 2011-06-20 2012-12-20 Duli Mao Dopant Implantation Hardmask for Forming Doped Isolation Regions in Image Sensors
US20150028402A1 (en) * 2013-07-23 2015-01-29 Taiwan Semiconductor Manufacturing Co., Ltd. Photodiode gate dielectric protection layer
CN104425526A (en) * 2013-09-03 2015-03-18 台湾积体电路制造股份有限公司 Mechanisms for forming image-sensor device with deep-trench isolation structure
CN204632760U (en) * 2015-05-28 2015-09-09 格科微电子(上海)有限公司 Adopt the imageing sensor of deep trench isolation
US20160204158A1 (en) * 2015-01-12 2016-07-14 United Microelectronics Corp. Complementary metal oxide semiconductor image sensor device and method of forming the same
US20190140006A1 (en) * 2017-11-09 2019-05-09 Taiwan Semiconductor Manufacturing Co., Ltd. Image sensor device and method for forming the same
CN110190080A (en) * 2019-06-06 2019-08-30 德淮半导体有限公司 Imaging sensor and forming method thereof
CN113113433A (en) * 2020-04-24 2021-07-13 台湾积体电路制造股份有限公司 Image sensor and forming method thereof
DE102020124105A1 (en) * 2020-04-24 2021-10-28 Taiwan Semiconductor Manufacturing Co. Ltd. REAR DEEP DITCH INSULATION STRUCTURE FOR AN IMAGE SENSOR
CN114639692A (en) * 2020-12-16 2022-06-17 三星电子株式会社 Image sensor and method for manufacturing the same
CN116314229A (en) * 2023-03-31 2023-06-23 合肥晶合集成电路股份有限公司 Image sensor and manufacturing method thereof
CN116646366A (en) * 2023-07-17 2023-08-25 合肥晶合集成电路股份有限公司 Image sensor and manufacturing method thereof

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007027321A (en) * 2005-07-14 2007-02-01 Renesas Technology Corp Method of manufacturing element isolator and method of manufacturing semiconductor device
US20120319230A1 (en) * 2011-06-20 2012-12-20 Chia-Ying Liu Etching narrow, tall dielectric isolation structures from a dielectric layer
US20120319242A1 (en) * 2011-06-20 2012-12-20 Duli Mao Dopant Implantation Hardmask for Forming Doped Isolation Regions in Image Sensors
US20150028402A1 (en) * 2013-07-23 2015-01-29 Taiwan Semiconductor Manufacturing Co., Ltd. Photodiode gate dielectric protection layer
CN104425526A (en) * 2013-09-03 2015-03-18 台湾积体电路制造股份有限公司 Mechanisms for forming image-sensor device with deep-trench isolation structure
US20160204158A1 (en) * 2015-01-12 2016-07-14 United Microelectronics Corp. Complementary metal oxide semiconductor image sensor device and method of forming the same
CN204632760U (en) * 2015-05-28 2015-09-09 格科微电子(上海)有限公司 Adopt the imageing sensor of deep trench isolation
US20190140006A1 (en) * 2017-11-09 2019-05-09 Taiwan Semiconductor Manufacturing Co., Ltd. Image sensor device and method for forming the same
CN110190080A (en) * 2019-06-06 2019-08-30 德淮半导体有限公司 Imaging sensor and forming method thereof
CN113113433A (en) * 2020-04-24 2021-07-13 台湾积体电路制造股份有限公司 Image sensor and forming method thereof
DE102020124105A1 (en) * 2020-04-24 2021-10-28 Taiwan Semiconductor Manufacturing Co. Ltd. REAR DEEP DITCH INSULATION STRUCTURE FOR AN IMAGE SENSOR
CN114639692A (en) * 2020-12-16 2022-06-17 三星电子株式会社 Image sensor and method for manufacturing the same
CN116314229A (en) * 2023-03-31 2023-06-23 合肥晶合集成电路股份有限公司 Image sensor and manufacturing method thereof
CN116646366A (en) * 2023-07-17 2023-08-25 合肥晶合集成电路股份有限公司 Image sensor and manufacturing method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118231433A (en) * 2024-05-22 2024-06-21 合肥晶合集成电路股份有限公司 Image sensor and method for manufacturing same
CN118231435A (en) * 2024-05-24 2024-06-21 合肥晶合集成电路股份有限公司 Image sensor and method for manufacturing same
CN118231435B (en) * 2024-05-24 2024-08-16 合肥晶合集成电路股份有限公司 Image sensor and method for manufacturing same
CN118281025A (en) * 2024-06-03 2024-07-02 合肥晶合集成电路股份有限公司 Image sensor and manufacturing method thereof

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