CN117573151A - Method for burning data in flash memory of RISC-V DSP chip, chip - Google Patents
Method for burning data in flash memory of RISC-V DSP chip, chip Download PDFInfo
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Abstract
The embodiment of the application provides a method and a chip for burning data in a flash memory of a RISC-V DSP chip, wherein the method comprises the following steps: storing target data to be burnt into a flash memory into a memory on a chip, wherein the memory is a random access memory; a program for importing the flash memory data is burnt into the memory in the debugging stage; and reading the target data from the memory by running the program for importing the flash memory data and burning the target data into the flash memory. By adopting the embodiment of the application, the programming speed of the FLASH on the chip is improved and the interface of the upper computer is unified.
Description
Technical Field
The present application relates to the field of on-chip data writing, and in particular, embodiments of the present application relate to a method and a chip for writing data in a flash memory of a RISC-V DSP chip.
Background
The related art manner of writing data into the FLASH memory FLASH on the chip is shown in fig. 1, a writing instruction is sent to the PC end in fig. 1, and the data is written into the FLASH memory FLASH on the chip by connecting the simulator with the RISC-V DSP chip (namely, a digital chip based on a fifth generation reduced instruction set) in fig. 1 where the FLASH memory FLASH to be written is located.
It is to be understood that the writing mode of fig. 1 is to configure the chip FLASH parameters through the DEBUG interface on the chip, and directly operate the on-chip FLASH of the chip through the DEBUG interface, so as to achieve the purpose of writing the FLASH.
Disclosure of Invention
The embodiment of the application aims to provide a method and a chip for burning data in a FLASH memory of a RISC-V DSP chip, and the adoption of the embodiment of the application promotes the burning speed of FLASH on a chip and unifies an upper computer interface.
In a first aspect, an embodiment of the present application provides a method for writing data in a flash memory of a RISC-V DSP chip, the method comprising: storing target data to be burnt into a flash memory into a memory on a chip, wherein the memory is a random access memory; a program for importing the flash memory data is burnt into the memory in the debugging stage; and reading the target data from the memory by running the program for importing the flash memory data and burning the target data into the flash memory.
According to some embodiments of the present invention, a program for executing the writing of FLASH data (i.e. a program for importing the FLASH data) is stored in the memory of the same chip in advance, and then the data required to be written into the FLASH is written into the FLASH by running the program in the memory, so that the processing speed of writing the data into the on-chip FLASH is obviously improved.
In some embodiments, the storing the target data to be burned into the flash memory into the memory on the chip includes: and programming the target data into the fixed address of the memory on the chip.
According to the method and the device for writing the target data in the FLASH memory, the target data are pre-written in the fixed address of the memory, so that the program for importing the FLASH memory data stored in the memory can read the data which need to be written in the FLASH memory from the fixed address, the execution speed of the program for importing the FLASH memory data is improved, protocol analysis can be carried out on the fixed address, and the upper computer can write codes and issue the data conveniently.
In some embodiments, the program for importing flash data is at least used to implement writing and erasing operations on the flash memory.
The program for importing FLASH memory data provided by some embodiments of the present application is used to implement writing and erasing operations on FLASH on the same chip.
In some embodiments, the method further comprises, prior to burning the target data into the flash memory: acquiring a storage address of the target data in the flash memory; confirming that historical data stored in the storage address needs to be erased; and performing an erase operation on the history data.
Before writing target data to be burned into FLASH, the program for importing FLASH data in some embodiments of the present application needs to confirm whether the data in the corresponding storage address needs to be erased, so as to improve the universality of the technical scheme.
In some embodiments, the target data is from a client; the method further comprises, before burning the target data into the flash memory: receiving verification data from the client; and confirming that the target data stored in the memory passes CRC according to the check data.
Some embodiments of the present application further verify the target data written into the memory with the aid of the program for importing the FLASH memory data, so as to ensure accuracy of the data finally burnt on the FLASH.
In some embodiments, after the burning the target data into the flash memory, the method further comprises: comparing whether each data stored in the flash memory is consistent with the corresponding data in the memory one by one; if the comparison results are consistent, returning prompt information of successful burning; if the comparison result corresponding to at least one data is inconsistent, returning a recording failure prompt message.
The program for importing FLASH data in some embodiments of the present application further has a technical purpose of verifying whether the data burned into FLASH is accurate.
In some embodiments, after confirming that the recording failure prompt information is received, the recording operation is performed again to the flash memory by executing the program for importing flash memory data again.
The program for importing the flash memory data according to some embodiments of the present application may be loaded and executed again after the burning failure.
In a second aspect, some embodiments of the present application provide a chip comprising: the system comprises a memory, a processor and a flash memory, wherein the memory is configured to store a program for importing flash memory data and to store target data to be burned into the flash memory in a debugging stage; the processor is configured to load and run the program for importing the flash memory data in the memory in the debugging stage, and read the target data from the memory and write the target data into the flash memory by executing the program for importing the flash memory data; the flash memory is configured to receive and store the burned target data.
In a third aspect, some embodiments of the present application provide an electronic device comprising a chip, an input unit and an output unit as described in the second aspect.
In a fourth aspect, some embodiments of the present application provide a burning system, the burning system comprising: the client device is configured to provide target data to be burnt into the flash memory and a program for importing the flash memory data; an emulator configured to connect with the client device and receive the target data and the program that imported flash data; and the chip of the second aspect, and the memory of the chip is connected with the simulator through a first interface to receive the target data through the first interface and store the target data in a fixed address, and the program for importing the flash memory data is stored on the memory in the chip through the first interface, and the flash memory of the chip is connected and communicated with the memory of the chip.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a system architecture of on-chip FLASH recording data according to the related art provided in the embodiments of the present application;
fig. 2 is a system architecture of on-chip FLASH recording data according to an embodiment of the present application;
FIG. 3 is a second system architecture for on-chip FLASH recording of data according to an embodiment of the present invention;
FIG. 4 is a flowchart of a method for writing data in a flash memory of a RISC-V DSP chip according to one embodiment of the present application;
fig. 5 is a schematic diagram of a chip according to an embodiment of the present application;
FIG. 6 is a second flowchart of a method for writing data in a flash memory of a RISC-V DSP chip according to one embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
RAM (Random Access Memory), random access memory. An internal memory, also called memory, that exchanges data directly with the CPU. It can be read and written at any time and is fast, usually as a temporary data storage medium for an operating system or other running program, and RAM cannot retain data when power is turned off. RAM can be further divided into two major categories, static RAM (SRAM) and Dynamic RAM (DRAM).
It will be understood that, in the technical manner of fig. 1, the speed of writing the FLASH memory on the chip is slower (this is because the clock is slow through the debug interface in the prior art), in order to increase the speed of writing the FLASH memory on the chip, in the embodiment of the present application, a primary BootLoader (i.e. a program for importing the FLASH memory data) is written into the RAM of the memory on the chip before writing the FLASH memory, and the primary BootLoader can implement writing and erasing of the FLASH memory, and after the program for importing the FLASH memory data is written into the memory, the target data to be written into the FLASH memory on the chip is written into the fixed address of the RAM of the chip; and then, reading target data in the RAM by the primary BootLoader, and programming the target data into a FLASH address corresponding to the chip. The clock of the chip can be configured with higher frequency (for example, the clock is adjusted to the limit frequency of the read-write FLASH of the core) when the primary BootLoader operates, so that the chip operates under the high-frequency clock, and the FLASH speed of the read-write chip can be effectively improved.
It is to be understood that when the RISC-V DSP chip is used to write FLASH, different writing algorithms are required to be matched according to the FLASH attribute and the chip characteristic, and because the program for importing FLASH data to be written in the chip memory is introduced in the embodiment of the present application, the interface of the host computer connected to the FLASH is unified, the time required for adapting the host computer to a new chip is reduced, when the chip FLASH is written, the data is issued to the RAM of the chip where the FLASH is located, and then the issued data is uniformly processed (for example, the data is analyzed, the FLASH is erased and checked) by the primary BootLoader, and corresponding writing functions (two functions, one for writing and one for erasing) are executed according to the functions, so that the speed of writing is improved, and the speed of supporting the chip is improved.
Referring to fig. 2, fig. 2 is a system for burning data for on-chip FLASH according to some embodiments of the present application, where the system includes: the PC client 200, the emulator 300 and the chip 100 for writing flash data, wherein the chip comprises a flash memory 120 and a memory 110 for writing.
Unlike fig. 1, in which target data is directly written into the FLASH memory, in fig. 2, the target data to be written into the FLASH memory is stored in the memory 110 of the chip 100, then the program for importing the FLASH memory data stored in the memory 110 is executed to read the target data from the memory, and then the target data is written into the FLASH memory 120.
It will be understood that, the PC client first sends the target data (i.e. the data to be burned into the FLASH memory 120) to the memory 110 on the chip, and compared with directly burning the target data into the FLASH memory, the data transmission speed is significantly increased, and then the processing speed of reading the target data from the memory 110 and burning the target data into the FLASH memory 120 of the chip is further increased by executing the program for importing the FLASH data stored in the memory on the same chip, thereby increasing the speed of burning the data into the FLASH memory FLASH of the chip 100.
As shown in fig. 3, unlike fig. 2, the chip 100 of fig. 2 is instantiated as a RISC-V-based DSP chip in fig. 3, and the FLASH data is imported as a primary BootLoader in fig. 3, and fig. 3 is located in a FLASH module of the RISC-V DSP chip, i.e., a FLASH memory. The transmitted data of fig. 3 is the target data that needs to be written into the FLASH on the RISC-V DSP chip.
That is, as shown in fig. 3, some embodiments of the present application are directed to a FLASH fast programming method for a RISC-V DSP chip, which includes a primary BootLoader stored on the chip and a RISC-V chip DEBUG interface, where the primary BootLoader is used for receiving and processing data issued by an upper computer, performing responsibilities such as programming FLASH, and the RISC-V chip DEBUG is used for controlling the chip by the PC end (resetting the chip, running the primary BootLoader, suspending the kernel, etc.), and data interaction between the PC end and the primary BootLoader (data to be programmed, running results, etc.).
Compared with the related technology such as fig. 1, the embodiment of the application increases the primary BootLoader (i.e. the program for importing the FLASH memory data) to transfer the data, the chip clock can be configured on a higher frequency in this way, meanwhile, the RAM writing speed is further improved under the high-speed clock, the time required by the data in transmission is greatly reduced (this is because the primary BootLoader reads the data through the kernel, the speed of the kernel reading the data is far higher than the debuge interface speed), the communication efficiency is improved, the primary BootLoader analyzes the data after the data transmission is finished (the analysis can judge whether the corresponding instruction belongs to erasure or writing), the CRC check is needed to ensure the accuracy of the data after the analysis, the chip writing target FLASH is started according to the analyzed data after the check is finished, the chip writing FLASH is started through the RAM writing when the data communication is finished, the chip kernel clock is started to the highest clock allowed by the FLASH writing FLASH when the primary BootLoader operates, the chip executing the chip writing FLASH communication speed is improved, the chip writing time is shortened, and the FLASH writing speed is further improved.
A method for burning data in a flash memory of a RISC-VDSP chip according to some embodiments of the present application is exemplarily described below with reference to fig. 4.
As shown in fig. 4, an embodiment of the present application provides a method for burning data in a flash memory of a RISC-V DSP chip, the method comprising: s101, storing target data to be burnt into a flash memory into a memory on a chip, wherein the memory is a random access memory; s102, in a debugging stage (namely, a program in a chip is debugged on line through an upper computer, and the upper computer can see various data of the chip), a program for importing flash memory data is burnt into the memory; s103, reading the target data from the memory by running the program for importing the flash memory data and burning the target data into the flash memory.
It is to be understood that in some embodiments of the present application, the program for executing the writing of FLASH data (i.e., the program for importing FLASH data) is stored in the memory of the same chip in advance, and then the data to be written into the FLASH is written into the FLASH by running the program in the memory, so that the processing speed of writing the data into the on-chip FLASH is obviously improved.
For example, in some embodiments of the present application, S101 illustratively includes: and programming the target data into the fixed address of the memory on the chip. According to the method and the device for importing the FLASH memory data, the target data are pre-burnt in the fixed address of the memory, so that the program which is stored in the memory and is imported into the FLASH memory data can read the data which need to be burnt in the FLASH from the fixed address, and the execution speed of the program which is imported into the FLASH memory data is improved. BootLoader is also written in a fixed address.
For example, in some embodiments of the present application, the program for importing flash data is at least used to implement writing and erasing operations on the flash memory. The program for importing FLASH memory data provided by some embodiments of the present application is used to implement writing and erasing operations on FLASH on the same chip.
For example, in some embodiments of the present application, before the target data is burned into the flash memory, the method further includes: acquiring a storage address of the target data in the flash memory; confirming that historical data stored in the storage address needs to be erased; and performing an erase operation on the history data. Before writing target data to be burned into FLASH, the program for importing FLASH data in some embodiments of the present application needs to confirm whether the data in the corresponding storage address needs to be erased, so as to improve the universality of the technical scheme.
For example, in some embodiments of the present application, the target data is from a client; the method further comprises, before burning the target data into the flash memory: receiving verification data from the client; and confirming that the target data stored in the memory passes CRC according to the check data. Some embodiments of the present application further verify the target data written into the memory with the aid of the program for importing the FLASH memory data, so as to ensure accuracy of the data finally burnt on the FLASH.
For example, in some embodiments of the present application, after the burning the target data into the flash memory, the method further comprises: comparing whether each data stored in the flash memory is consistent with the corresponding data in the memory one by one; if the comparison results are consistent, returning prompt information of successful burning; if the comparison result corresponding to at least one data is inconsistent, returning a recording failure prompt message. The program for importing FLASH data in some embodiments of the present application further has a technical purpose of verifying whether the data burned into FLASH is accurate.
For example, in some embodiments of the present application, after the recording failure prompt information is confirmed to be received, the recording operation is performed again to the flash memory by executing the program for importing flash memory data again. The program for importing the flash memory data according to some embodiments of the present application may be loaded and executed again after the burning failure.
As shown in fig. 5, in some embodiments of the present application, a program for importing flash data is written into the first storage space 111 of the memory 110, and target data that needs to be written into the flash memory is written into the fixed address storage space of the memory 110. Then, the program for importing the flash memory data stored in the first storage space 11 is executed by the processor in the debugging stage to read the target data from the fixed address storage space by the program and burn the target data into the flash memory 120. The program for importing the FLASH memory data can realize the writing and erasing operation of the FLASH.
As shown in fig. 6, an embodiment of the present application provides a method for burning data in a flash memory of a RISC-V DSP chip, the method comprising:
and firstly, judging whether to download a primary BootLoader (i.e. a program for importing flash memory data), if so, executing a third step, and if not, executing a second step.
And secondly, programming a primary BootLoader, namely programming the program in the memory.
And thirdly, writing data (namely target data) into the fixed RAM address, namely storing the data which needs to be written into the FLASH at the fixed address of the memory.
Fourth, CRC checks the data, and verifies whether the data written into the fixed address in the memory is accurate.
And fifthly, operating a primary BootLoader.
And sixthly, performing CRC (cyclic redundancy check), namely verifying the accuracy of target data written into the memory according to a check code from the client by running a primary BootLoader.
And sixthly, writing the FLASH, namely writing the target data passing the CRC into the FLASH.
And seventh, comparing whether the data in the RAM and the data in the FLASH are consistent, if so, executing the eighth step, otherwise, executing the ninth step.
And eighth step, returning a success signal and ending.
And ninth, returning a failure signal and ending.
That is, when writing FLASH, some embodiments of the present application first detect whether the chip downloads the primary BootLoader, if not, download the primary BootLoader first, write the target data to be written into the FLASH into the fixed area in the RAM after the downloading is finished, and perform CRC check on the target data to ensure the accuracy of the data, then run the primary BootLoader, first perform data check and compare the CRC check value, if the data correctly starts writing FLASH, compare the RAM with the data in the FLASH after the writing is finished, ensure the accuracy of the writing data, and if the comparison result is consistent, return the success signal FLASH writing end, otherwise return the failure signal FLASH writing end.
Compared with the related technical scheme, the embodiment of the application is converted from a direct programming FLASH mode into a first programming RAM, and the primary BootLoader writes data from the core RAM into the chip FLASH, so that the programming speed is improved according to the attribute difference between the RAM and the FLASH.
It is easy to understand that, by adopting the embodiment of the application to burn and write the speed to promote, the embodiment of the application adopts the mode of first burning and writing the data into the RAM and then burning and writing the data in the RAM into the FLASH by the primary BootLoader according to the difference between the RAM and the FLASH, and the burn and write speed can be improved by several times. The upper computer unified interface can realize unified programming of different chip FLASH interfaces, is convenient for supporting the programming of a new chip FLASH, not only greatly improves the programming speed, but also can effectively shorten the supporting time of the chip.
That is, on one hand, some embodiments of the present application use a primary BootLoader (i.e. a program for importing FLASH data) to write FLASH, so as to increase the writing speed: 1) Firstly, programming the RAM, and programming FLASH by a primary BootLoader; 2) The chip clock can be configured on a higher baud rate by adopting a primary BootLoader programming mode. On the other hand, by adopting some embodiments of the application, the interface of the upper computer can be unified, and the supporting speed of the upper computer on the chip is improved.
As shown in fig. 5, some embodiments of the present application provide a chip comprising: the device comprises a memory 110, a processor 130 and a flash memory 120, wherein the memory is configured to store a program for importing flash memory data and to store target data to be burned into the flash memory in a debugging stage; the processor is configured to load and run the program for importing the flash memory data in the memory in the debugging stage, and read the target data from the memory and write the target data into the flash memory by executing the program for importing the flash memory data; the flash memory is configured to receive and store the burned target data.
Some embodiments of the present application provide an electronic device including a chip, an input unit, and an output unit as shown in fig. 5.
As shown in fig. 2, some embodiments of the present application provide a burning system, including: the client device, i.e. the PC 200, is configured to provide target data to be burned into the flash memory and a program for importing the flash memory data; an emulator 300 configured to connect with the client device and receive the target data and the program of importing flash data; and a chip 100 (chip shown in fig. 5), wherein the memory of the chip is connected with the simulator through a first interface to receive the target data through the first interface and store the target data in a fixed address, the program for importing the flash memory data is stored on the memory of the chip through the first interface, and the flash memory of the chip is connected with the memory of the chip for communication.
In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other manners as well. The apparatus embodiments described above are merely illustrative, for example, flow diagrams and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, the functional modules in the embodiments of the present application may be integrated together to form a single part, or each module may exist alone, or two or more modules may be integrated to form a single part.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing is merely exemplary embodiments of the present application and is not intended to limit the scope of the present application, and various modifications and variations may be suggested to one skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application. It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Claims (10)
1. A method of burning data in a flash memory of a RISC-V DSP chip, the method comprising:
storing target data to be burnt into a flash memory into a memory on a chip, wherein the memory is a random access memory;
a program for importing the flash memory data is burnt into the memory in the debugging stage;
and reading the target data from the memory by running the program for importing the flash memory data and burning the target data into the flash memory.
2. The method of claim 1, wherein storing the target data to be burned into the flash memory into the on-chip memory comprises:
and programming the target data into the fixed address of the memory on the chip.
3. The method of claim 2, wherein the program for importing flash data is at least for performing writing and erasing operations on the flash memory.
4. The method of claim 3, wherein the method further comprises, prior to burning the target data into the flash memory:
acquiring a storage address of the target data in the flash memory;
confirming that historical data stored in the storage address needs to be erased;
and performing an erase operation on the history data.
5. The method of claim 4, wherein the target data is from a client;
the method further comprises, before burning the target data into the flash memory:
receiving verification data from the client;
and confirming that the target data stored in the memory passes CRC according to the check data.
6. The method of any of claims 1-5, wherein after the burning the target data into the flash memory, the method further comprises:
comparing whether each data stored in the flash memory is consistent with the corresponding data in the memory one by one;
if the comparison result is consistent, returning prompt information of successful burning;
if at least one data is inconsistent, returning a recording failure prompt message.
7. The method of claim 6, wherein after confirming receipt of the recording failure prompt message, recording operation is performed again to the flash memory by executing the program for importing flash memory data again.
8. A chip, the chip comprising: memory, a processor, and a flash memory, wherein,
the memory is configured to store a program for importing flash memory data and to store target data to be burned into the flash memory in a debugging stage;
the processor is configured to load and run the program for importing the flash memory data in the memory in the debugging stage, and read the target data from the memory and write the target data into the flash memory by executing the program for importing the flash memory data;
the flash memory is configured to receive and store the burned target data.
9. An electronic device comprising the chip of claim 8, an input unit, and an output unit.
10. A burning system, comprising:
the client device is configured to provide target data to be burnt into the flash memory and a program for importing the flash memory data;
an emulator configured to connect with the client device and receive the target data and the program that imported flash data; and
the chip of claim 8, wherein the memory of the chip is coupled to the emulator through a first interface to receive the target data through the first interface and store the target data in a fixed address, and the program to import flash data is stored on the memory of the chip through the first interface, and the flash memory of the chip is coupled in communication with the memory of the chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311535703.XA CN117573151A (en) | 2023-11-17 | 2023-11-17 | Method for burning data in flash memory of RISC-V DSP chip, chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311535703.XA CN117573151A (en) | 2023-11-17 | 2023-11-17 | Method for burning data in flash memory of RISC-V DSP chip, chip |
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| CN117573151A true CN117573151A (en) | 2024-02-20 |
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| CN (1) | CN117573151A (en) |
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