CN117559960A - Anti-aliasing filter - Google Patents

Abstract

An anti-aliasing filter (100) is provided, comprising a separate anti-aliasing filter circuit (200) with a first setting, the first setting being an integer not smaller than one; the anti-aliasing filter circuit (200) comprises an impedance matching circuit (300) for performing impedance matching with an input analog signal, and an active filter circuit (400) for performing anti-aliasing filtering on the impedance-matched analog signal; and the bias adjusting circuit (500) is used for carrying out bias zeroing on the analog signal output by the active filter circuit (400). The anti-aliasing filter (100) provided by the application can obtain the anti-aliasing filters (100) with different bandwidths and cut-off frequencies by replacing the resistor and the capacitor in the active filter circuit (400), and can adapt to the anti-aliasing requirement of electromagnetic compatibility test of the induction coil; the impedance matching requirement of different types of induction coils can also be adapted by changing and adjusting the resistance value of the first resistor R1 of the impedance matching circuit according to the known impedance of the induction coils.

Description

Anti-aliasing filter

Technical Field

The invention belongs to the technical field of electromagnetic compatibility testing of annular induction coils, and particularly relates to an anti-aliasing filter.

Background

Taking the evaluation of electromagnetic compatibility test of a counter and a vehicle in the field of rail transit as an example. The frequency band tested by the axle counter is 10kHz-1.3MHz as known from the standard EN 50592-2016. If there is no suitable anti-aliasing filter between the test antenna and the data acquisition device during the test, aliasing may occur due to insufficient sampling frequency of the data acquisition device, resulting in inaccurate test results. The axle counter is used for detecting whether the train axle occupies a track section, and compared with a track circuit, the axle counter has the advantages of being free from the influence of track line conditions, free from track cutting and track insulation, suitable for long track sections and the like. However, with the popularization and promotion of the axle counter in a track ground signal system and the development trend of high voltage, high power and high switching rate of electrified vehicles, the electromagnetic facultative problem between the two is increasingly serious. European EUREMCO project research and release standards of EN 50238-3, EN 50617, EN50592 and the like prescribe relevant test methods and specific limit requirements for the magnetic field disturbance of a vehicle to a shaft counter.

The standard EN50592 indicates, among other things, that the front end of the acquisition device requires an anti-aliasing filter in the test method, which eliminates the effect of aliasing on the test results from the anti-aliasing effect. The frequency band of the electromagnetic compatibility test of the axle counter and the vehicle is 10kHz-1.3MHz, so that the cut-off frequency of the anti-aliasing filter is at least 1.3MHz, and the anti-aliasing filter has larger attenuation at the frequency point of 3MHz. Anti-aliasing filters are typically integrated within the acquisition device, but are popular. The cut-off frequency of the anti-aliasing filter in the acquisition equipment is generally set to be half of the maximum sampling rate, and aiming at the frequency requirement of the electromagnetic compatibility test of the axle counter and the vehicle, the anti-aliasing filter integrated in the acquisition equipment cannot eliminate the aliasing phenomenon. In addition, the general anti-aliasing low-pass passive filter cannot meet the test requirement, because the test antenna is calibrated under the condition that the terminal resistor is 50Ω, and the passive filter cannot perform impedance matching, which affects the test result and conclusion.

Disclosure of Invention

In order to solve the above problems, the present application provides an anti-aliasing filter, which can obtain anti-aliasing filters with different bandwidths and cut-off frequencies, has lower attenuation in the passband range, has larger attenuation in the stopband range, and adapts to the impedance matching requirements of induction coils of different types.

In a first aspect, the present application provides an anti-aliasing filter (100) comprising a separate anti-aliasing filter circuit (200) with a first setting, the first setting being an integer not less than one; the anti-aliasing filter circuit (200) comprises an impedance matching circuit (300) for performing impedance matching with an input analog signal, and an active filter circuit (400) for performing anti-aliasing filtering on the impedance-matched analog signal; and the bias adjusting circuit (500) is used for carrying out bias zeroing on the analog signal output by the active filter circuit (400).

In some embodiments, the impedance matching circuit (300) includes a first resistor (R1), a first end of the first resistor (R1) being grounded, a second end of the first resistor (R1) being connected to an output (V1) of the impedance matching circuit (300) and an analog signal input (Vin) for inputting an analog signal.

In some embodiments, when the order of the active filter circuit (400) is even, the active filter circuit (400) includes a second-order active low-pass filter circuit module (420), and the second-order active low-pass filter circuit module (420) includes a second set value, which is an integer not less than one, that is sequentially connected in series.

In some embodiments, when the order of the active filter circuit (400) is an odd number, the active filter circuit (400) includes a first-order active low-pass filter circuit (410) and a second-order active low-pass filter circuit module (420) sequentially connected in series, and the second-order active low-pass filter circuit module (420) includes a third set value, which is an integer not less than zero, of the second-order active low-pass filter circuits sequentially connected in series.

In some embodiments, the bias adjustment circuit (500) includes an adjustable resistor (Rc 1), a second order active low pass filter circuit (510), and a subtraction circuit (520), wherein:

-a first input of the subtracting circuit (520) is connected to an output (V2) of the active filter circuit (400); a second input end of the subtracting circuit (520) is connected with an output end of the second-order active low-pass filter circuit (510); the output end of the subtracting circuit (520) is connected with an analog signal output end (Vout) for outputting an analog signal;

the active arm pin of the adjustable resistor (Rc 1) is connected with the input end of the second-order active low-pass filter circuit (510); a first fixed pin of the adjustable resistor (Rc 1) is connected with an upper limit voltage end (VCC) of the adjustable bias voltage; the second fixed pin of the adjustable resistor (Rc 1) is connected with a lower limit voltage end (VEE) of the adjustable bias voltage.

In some embodiments, the second order active low pass filter circuit (510) comprises a fourth operational amplifier (U4), a seventh resistor (R7), and a fourth capacitor (C4), wherein:

a first end of the seventh resistor (R7) is connected to a movable arm pin of the adjustable resistor (Rc 1); -a second terminal of the seventh resistor (R7) is connected to the non-inverting input terminal of the fourth operational amplifier (U4) and to the first terminal of the fourth capacitor (C4);

the first end of the fourth capacitor (C4) is also connected with the non-inverting input end of the fourth operational amplifier (U4); a second terminal of the fourth capacitor (C4) is grounded;

the output end of the fourth operational amplifier (U4) is connected with the inverting input end of the fourth operational amplifier (U4) and the second input end of the subtracting circuit (520).

In some embodiments, the subtracting circuit (520) includes a fifth resistor (R5), a sixth resistor (R6), an eighth resistor (R8), a ninth resistor (R9), and a third operational amplifier (U3), wherein:

a first end of the fifth resistor (R5) is connected with an output end (V2) of the active filter circuit (400); -a second end of the fifth resistor (R5) is connected to the non-inverting input of the third operational amplifier (U3) and to the first end of the sixth resistor (R6);

the first end of the sixth resistor (R6) is also connected with the non-inverting input end of the third operational amplifier (U3); a second end of the sixth resistor (R6) is grounded;

-the non-inverting input of the third operational amplifier (U3) is connected to the first end of the eighth resistor (R8) and to the first end of the ninth resistor (R9); the output end of the third operational amplifier (U3) is connected with the second end of the ninth resistor (R9) and the analog signal output end (Vout);

a second end of the eighth resistor (R8) is connected to an output end of the second first-order active low-pass filter circuit (510).

In some embodiments, the active filter circuit (400) comprises the first-order active low-pass filter circuit (410) and the second-order active low-pass filter circuit module (420) connected in series, the second-order active low-pass filter circuit module (420) comprising three of the second-order active low-pass filter circuits connected in series in turn.

In some embodiments, the first-order active low-pass filter circuit (410) includes a first operational amplifier (U1), a second resistor (R2), and a first capacitor (C1), wherein:

-a first end of the second resistor (R2) is connected to an output (V1) of the impedance matching circuit (300); -a second terminal of the second resistor (R2) is connected to the non-inverting input terminal of the first operational amplifier (U1) and to the first terminal of the first capacitor (C1); a second terminal of the first capacitor (C1) is grounded;

the non-inverting input end of the first operational amplifier (U1) is also connected with the first end of the first capacitor (C1); the output end of the first operational amplifier (U1) is connected with the inverting input end of the first operational amplifier (U1) and the input end of the second-order active low-pass filter circuit module (420).

In some embodiments, the second order active low pass filter circuit comprises a second operational amplifier (U2), a third resistor (R3), a fourth resistor (R4), a second capacitor (C2), and a third capacitor (C3), wherein:

-the non-inverting input of the second operational amplifier (U2) is connected to the first end of the fourth resistor (R4) and to the first end of the second capacitor (C2); the inverting input end of the second operational amplifier (U2) is connected with the output end of the second operational amplifier (U2); the output end of the second operational amplifier (U2) is also connected with the output end of the second-order active low-pass filter circuit and the first end of the third capacitor (C3);

a second terminal of the second capacitor (C3) is grounded; -a second end of the fourth resistor (R4) is connected to a second end of the third capacitor (C3) and to a first end of the third resistor (R3); a second end of the third resistor (R3) is connected to an input end of the second-order active low-pass filter circuit.

The active filter circuit (400) in the anti-aliasing filter (100) provided by the application is used as an independent and discrete module, and the anti-aliasing filter (100) with different bandwidths and cut-off frequencies can be obtained by replacing the resistor and the capacitor in the active filter circuit (400), so that the anti-aliasing filter has lower attenuation in a passband range and larger attenuation in a stopband range. Therefore, the anti-aliasing requirement of electromagnetic compatibility test of the induction coil can be met. In addition, the anti-aliasing filter (100) provided by the application can also be used for adjusting the resistance value of the first resistor (R1) of the impedance matching circuit (300) according to the impedance of the known induction coil, so as to adapt to the impedance matching requirement of induction coils of different types.

Drawings

The scope of the present disclosure may be better understood by reading the following detailed description of exemplary embodiments in conjunction with the accompanying drawings. The drawings included herein are:

fig. 1 is a schematic circuit schematic diagram of an anti-aliasing filter according to a first embodiment of the present disclosure;

fig. 2 is a schematic circuit diagram of an anti-aliasing filter circuit according to an embodiment of the present disclosure;

fig. 3 is a schematic circuit diagram of an impedance matching circuit according to a first embodiment of the present disclosure;

fig. 4 is a schematic circuit diagram of an active filter circuit according to a first embodiment of the present disclosure;

fig. 5 is a schematic circuit diagram of an active filter circuit according to a first embodiment of the present disclosure;

FIG. 6 is a schematic circuit diagram of a bias adjustment circuit according to an embodiment of the present disclosure;

fig. 7 is a schematic circuit diagram of a 7-stage active filter circuit according to a second embodiment of the present disclosure;

FIG. 8 is a schematic diagram of the magnetic field strength result of the non-added anti-aliasing filter according to the second embodiment of the present application at the 1.13MHz operating frequency point;

fig. 9 is a schematic diagram of a magnetic field strength result of the non-added anti-aliasing filter provided in the second embodiment of the present application at an operating frequency point of 1.035 MHz;

FIG. 10 is a schematic diagram of a result of increasing the magnetic field strength of the anti-aliasing filter at an operating frequency point of 1.13MHz according to the second embodiment of the present application;

fig. 11 is a schematic diagram of a result of increasing the magnetic field strength of the anti-aliasing filter at an operating frequency point of 1.13MHz according to the second embodiment of the present application.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the present application will be described in further detail with reference to the accompanying drawings, and the described embodiments should not be construed as limiting the present application, and all other embodiments obtained by those skilled in the art without making any inventive effort are within the scope of the present application.

In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is to be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments and can be combined with one another without conflict.

If a similar description of "first\second\third" appears in the application document, the following description is added, in which the terms "first\second\third" are merely distinguishing between similar objects and do not represent a particular ordering of the objects, it being understood that the "first\second\third" may be interchanged in a particular order or precedence, where allowed, so that the embodiments of the application described herein can be implemented in an order other than that illustrated or described herein.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of the present application only and is not intended to be limiting of the present application.

Example 1

The principles and features of the present application are described below with reference to the drawings, the examples are illustrated for the purpose of explanation only and are not intended to limit the scope of the present application.

Fig. 1 is a schematic circuit diagram of an anti-aliasing filter 100 according to the present embodiment. As shown in fig. 1, the anti-aliasing filter 100 includes a first set-point anti-aliasing filter circuit 200, and each of the independent anti-aliasing filter circuits 200 corresponds to an independent anti-aliasing filter channel. The first set value is an integer not smaller than one. Each set of the anti-aliasing filter circuits 200 receives an analog signal output from an analog signal output channel. The anti-aliasing filter 100 receives the analog signals output from the CH1 to CHn analog signal output ports, that is, the anti-aliasing filter 100 includes n anti-aliasing filter circuits 200, and each anti-aliasing filter circuit 200 correspondingly receives the analog signal output from one analog signal output port. As shown in fig. 2, the anti-aliasing filter circuit 200 includes an impedance matching circuit 300, an active filter circuit 400, and a bias adjustment circuit 500, wherein: the impedance matching circuit 300 is configured to perform impedance matching with an input analog signal; the active filter circuit 400 is configured to perform anti-aliasing filtering on the analog signal after impedance matching; the bias adjustment circuit 500 is configured to bias and zero the analog signal output by the active filter circuit 400. In some embodiments, the resistors included in the antialiasing filter 100 all employ chip resistors and the capacitors included all employ chip capacitors.

As shown in fig. 3, the impedance matching circuit 300 includes a first resistor R1, a first end of the first resistor R1 is grounded, and a second end of the first resistor R1 is connected to an output terminal V1 of the impedance matching circuit 300 and an analog signal input terminal Vin for inputting an analog signal. The impedance matching circuit 300 is used for performing impedance matching with the test antenna, so that the test data and the test result are more accurate. Assuming that the test antenna is calibrated at an impedance of X ohms, the impedance matching circuit 300 matching X ohms, i.e., the first resistor R1 has a resistance value of X ohms. For example, in the axle counter test system, the test antenna has an impedance of 50 ohms, and then the impedance matching circuit 300 of 50 ohms is adopted, that is, the resistance value of the first resistor R1 is 50 ohms.

The active filter circuit 400 is mainly configured to perform anti-aliasing filtering on the analog signal output by the impedance matching circuit 300. A set of resistors R and capacitors C is considered as a first order, and a filtering effect is achieved by using independent operational amplifiers, matched resistors and capacitors, and the active filter circuit 400 has an order of N. In some embodiments, the operational amplifier in the active filter circuit 400 uses an OPA2690 operational amplifier chip, and two independent operational amplifiers are integrated inside the OPA2690 operational amplifier chip.

In some embodiments, when the order N of the active filter circuit 400 is an even number, as shown in fig. 4, the active filter circuit 400 includes a second-order active low-pass filter circuit module 420, and the second-order active low-pass filter circuit module 420 includes a second set value M, where the second set value is an integer not less than one, and the second set value M is sequentially connected in series. I.e. at this point, n=2×m. The second-order active low-pass filter circuit includes a second operational amplifier U2, a third resistor R3, a fourth resistor R4, a second capacitor C2, and a third capacitor C3. Wherein the non-inverting input terminal of the second operational amplifier U2 is connected to the first terminal of the fourth resistor R4 and the first terminal of the second capacitor C2; the inverting input end of the second operational amplifier U2 is connected with the output end of the second operational amplifier U2; the output end of the second operational amplifier U2 is also connected with the output end of the second-order active low-pass filter circuit and the first end of the third capacitor C3; the second end of the second capacitor C2 is grounded; a second end of the fourth resistor R4 is connected to a second end of the third capacitor C3 and a first end of the third resistor R3; a second end of the third resistor R3 is connected to an input end of the second-order active low-pass filter circuit.

In some embodiments, when the order N of the active filter circuit 400 is odd, as shown in fig. 5, the active filter circuit 400 includes a first-order active low-pass filter circuit 410 and a second-order active low-pass filter circuit module 420 connected in series. An output terminal of the second-order active low-pass filter circuit module 420 is connected to an output terminal V2 of the active filter circuit 400. The first-order active low-pass filter circuit 410 is connected to the output terminal V1 of the impedance matching circuit 300. In the active filter circuit 400, each set of resistors and capacitors represents a first order. The second-order active low-pass filter circuit module 420 includes a third set value M' of second-order active low-pass filter circuits connected in series in sequence. Wherein the third set value M' is an integer not less than zero. I.e., the active filter circuit 400 has a total of M' +1 operational amplifier chips. Wherein the first-order active low-pass filter circuit 410 is connected to a set of resistors and capacitors; the second-order active low-pass filter circuit is connected with two groups of resistors R and C. The active filter circuit 400 has a relation n=1+2×m'. The first-order active low-pass filter circuit 410 includes a first operational amplifier U1, a second resistor R2, and a first capacitor C1. Wherein a first end of the second resistor R2 is connected to the output end V1 of the impedance matching circuit 300; the second end of the second resistor R2 is connected to the non-inverting input end of the first operational amplifier U1 and the first end of the first capacitor C1. The second end of the first capacitor C1 is grounded. The non-inverting input end of the first operational amplifier U1 is also connected with the first end of the first capacitor C1; the output end of the first operational amplifier U1 is connected to the inverting input end of the first operational amplifier U1 and the input end of the second-order active low-pass filter circuit module 420.

The bias adjustment circuit 500 is configured to bias and zero the analog signal output by the active filter circuit 400. As shown in fig. 6, the bias adjustment circuit 500 includes an adjustable resistor Rc1, a second order active low pass filter circuit 510, and a subtracting circuit 520. Wherein a first input terminal of the subtracting block 520 is connected to the output terminal V2 of the active filter block 400; a second input terminal of the subtracting block 520 is connected to an output terminal of the second-order active low-pass filter block 510; an output terminal of the subtracting circuit 520 is connected to an analog signal output terminal Vout for outputting an analog signal. The active arm pin of the adjustable resistor Rc1 is connected with the input end of the second-order active low-pass filter circuit 510; the first fixed pin of the adjustable resistor Rc1 is connected with an upper limit voltage end VCC of the adjustable bias voltage; the second fixed pin of the adjustable resistor Rc1 is connected with a lower limit voltage end VEE of the adjustable bias voltage. After the analog signal is anti-aliasing filtered by the active filter circuit 400, the output analog signal is biased to a certain extent due to the offset voltage of the operational amplifier in the active filter circuit 400. If such a bias is to be counteracted, the bias adjustment circuit 500 is required to adjust, in particular by adjusting the resistance value of the adjustable resistor Rc1 in the bias adjustment circuit 500, so as to counteract the existing dc bias.

The second-order active low-pass filter circuit 510 includes a fourth operational amplifier U4, a seventh resistor R7, and a fourth capacitor C4. Wherein a first end of the seventh resistor R7 is connected to the movable arm pin of the adjustable resistor Rc 1; the second terminal of the seventh resistor R7 is connected to the non-inverting input terminal of the fourth operational amplifier U4 and to the first terminal of the fourth capacitor C4. The first end of the fourth capacitor C4 is also connected with the non-inverting input end of the fourth operational amplifier U4; the second terminal of the fourth capacitor C4 is grounded. The output terminal of the fourth operational amplifier U4 is connected to the inverting input terminal of the fourth operational amplifier U4 and the second input terminal of the subtracting block 520. In some embodiments, the fourth operational amplifier U4 employs an LMV641 operational amplifier chip.

The subtracting circuit 520 includes a fifth resistor R5, a sixth resistor R6, an eighth resistor R8, a ninth resistor R9, and a third operational amplifier U3. Wherein a first end of the fifth resistor R5 is connected to the output end V2 of the active filter circuit 400; the second end of the fifth resistor R5 is connected to the non-inverting input of the third operational amplifier U3 and to the first end of the sixth resistor R6. The first end of the sixth resistor R6 is also connected with the non-inverting input end of the third operational amplifier U3; the second end of the sixth resistor R6 is grounded. The non-inverting input terminal of the third operational amplifier U3 is connected to the first terminal of the eighth resistor R8 and the first terminal of the ninth resistor R9; the output end of the third operational amplifier U3 is connected to the second end of the ninth resistor R9 and the analog signal output end Vout. A second terminal of the eighth resistor R8 is connected to the output terminal of the second-order active low-pass filter circuit 510. In some embodiments, the third operational amplifier U3 employs an OPA820 op-amp chip.

The active filter circuit 400 in the anti-aliasing filter 100 provided by the present embodiment is used as a separate and discrete module, and the anti-aliasing filter 100 with different bandwidths and cut-off frequencies can be obtained by replacing the resistor and the capacitor in the active filter circuit 400, so that the attenuation in the passband range is lower, and the attenuation in the stopband range is larger. Therefore, the anti-aliasing requirement of electromagnetic compatibility test of the induction coil can be met. In addition, the anti-aliasing filter 100 provided in the present application can also adjust the resistance value of the first resistor R1 of the impedance matching circuit 300 according to the impedance of the known induction coil, so as to adapt to the impedance matching requirement of different types of induction coils.

Example two

Taking the axle counter and the electromagnetic compatibility test evaluation of the vehicle in the rail traffic field as an example. In the process of testing the axle counter, channels in three magnetic field directions of the high-frequency antenna X, Y, Z and channels in three magnetic field directions of the low-frequency antenna X, Y, Z are required to be collected simultaneously. In addition, the frequency band tested by the axle counter is 10kHz-1.3MHz as known from the standard EN 50592-2016. The cut-off frequency of the anti-aliasing filter 100 should be 1.3MHz and there should be a large attenuation around 3MHz. If there is no suitable anti-aliasing filter 100 between the test antenna and the data acquisition device during the test, aliasing may occur due to insufficient sampling frequency of the data acquisition device, resulting in inaccurate test results.

In order to adapt to the test condition requirement of the axle counter, based on the first embodiment, the anti-aliasing filter 100 in the present embodiment includes 6 groups of independent anti-aliasing filter circuits 200, so as to implement simultaneous filtering of 6 channels, thereby meeting the requirement of simultaneous acquisition of channels requiring three magnetic field directions of the high-frequency antenna X, Y, Z and channels requiring three magnetic field directions of the low-frequency antenna X, Y, Z in the axle counter test process. In addition, the active filter circuit 400 adopts a 7-order active filter circuit to realize attenuation of signals above 1.3MHz and has a large attenuation of about 40dB at 3MHz, so that the test working condition can be accurately tested.

Specifically, as shown in fig. 7, the specific circuit of the active filter circuit 400 includes the first-order active low-pass filter circuit 410 and the second-order active low-pass filter circuit module 420 connected in series.

The first-order active low-pass filter circuit 410 includes a first operational amplifier U1, a second resistor R2, and a first capacitor C1. Wherein a first end of the second resistor R2 is connected to the output end V1 of the impedance matching circuit 300; the second end of the second resistor R2 is connected to the non-inverting input end of the first operational amplifier U1 and the first end of the first capacitor C1. The second end of the first capacitor C1 is grounded. The non-inverting input end of the first operational amplifier U1 is also connected with the first end of the first capacitor C1; the output end of the first operational amplifier U1 is connected to the inverting input end of the first operational amplifier U1 and the input end of the second-order active low-pass filter circuit module 420.

The second-order active low-pass filter circuit module 420 includes three second-order active low-pass filter circuits, which are sequentially connected in series, and are a first second-order active low-pass filter circuit 421, a second-order active low-pass filter circuit 422, and a third second-order active low-pass filter circuit 423, respectively.

The first second order active low pass filter circuit 421 includes a twenty first operational amplifier U21, a thirty first resistor R31, a forty first resistor R41, a twenty first capacitor C21, and a thirty first capacitor C31. Wherein the non-inverting input terminal of the twenty-first operational amplifier U21 is connected to the first terminal of the forty-first resistor R41 and the first terminal of the twenty-first capacitor C21; an inverting input end of the twenty-first operational amplifier U21 is connected with an output end of the twenty-first operational amplifier U21; the output terminal of the twenty-first operational amplifier U21 is further connected to the input terminal of the second active low-pass filter circuit 222 and the first terminal of the thirty-first capacitor C31. A second terminal of the twenty-first capacitor C21 is grounded; a second terminal of the forty-first resistor R41 is connected to a second terminal of the thirty-first capacitor C31 and a first terminal of the thirty-first resistor R31; a second terminal of the thirty-first resistor R31 is connected to an output terminal of the first-order active low-pass filter circuit 410.

The second order active low pass filter circuit 422 includes a twenty-second operational amplifier U22, a thirty-second resistor R32, a forty-second resistor R42, a twenty-second capacitor C22, and a thirty-second capacitor C32. Wherein the non-inverting input of the twenty-second operational amplifier U22 is connected to the first end of the forty-second resistor R42 and the first end of the twenty-second capacitor C22; an inverting input end of the twenty-second operational amplifier U22 is connected with an output end of the twenty-second operational amplifier U22; the output terminal of the twenty-second operational amplifier U22 is further connected to the input terminal of the third second-order active low-pass filter circuit 223 and the first terminal of the thirty-second capacitor C32. The second end of the twenty-second capacitor C22 is grounded. A second terminal of the forty-second resistor R42 is connected to a second terminal of the thirty-second capacitor C32 and to a first terminal of the thirty-second resistor R32; a second terminal of the thirty-second resistor R32 is connected to an output terminal of the first second-order active low-pass filter circuit 421.

The third second order active low pass filter circuit 423 includes a twenty third operational amplifier U23, a thirty third resistor R33, a forty third resistor R43, a twenty third capacitor C23, and a thirty third capacitor C33. Wherein the non-inverting input terminal of the twenty-third operational amplifier U23 is connected to the first terminal of the forty-third resistor R43 and the first terminal of the twenty-third capacitor C23; the inverting input end of the twenty-third operational amplifier U23 is connected with the output end of the twenty-third operational amplifier U23; the output terminal of the twenty-third operational amplifier U23 is further connected to the output terminal V2 of the active filter circuit 400 and the first terminal of the thirty-third capacitor C33. The second end of the twenty-third capacitor C23 is grounded. A second terminal of the forty-third resistor R43 is connected to a second terminal of the thirty-third capacitor C33 and to a first terminal of the thirty-third resistor R33; a second terminal of the thirty-third resistor R33 is connected to an output terminal of the second-order active low-pass filter circuit 422.

In the actual testing process of the primary site, the vehicle does not lift the pantograph, and at this time, the vehicle is in a non-powered state, the site noise is simply tested, and the test result of not adding the anti-aliasing filter 100 between the test antenna and the test instrument is shown in fig. 8 and 9 below. The RSR122-1 in FIG. 8 and the RSR122-2 in FIG. 9 are two operating frequency points of a type of axle counter, respectively. The operating frequency of RSR122-1 is 1.13MHz. The operating frequency point of RSR122-2 is 1.035MHz. The cut-off frequency of the anti-aliasing filter 100 of the test instrument itself is 30MHz, and the sampling rate is set to 10M in the sampling process. As can be seen from FIG. 8, the magnetic field strength at the 1.13MHz operating frequency point is 45.6dBuA/m. As can be seen from fig. 9, the magnetic field strength at the 1.035MHz operating frequency point is 54.3dBuA/m. The two working frequency points are only different by 950kHz, and the test result is different by 10.3dBuA/m, wherein the magnetic field intensity at the 1.13MHz working frequency point is 10.3dBuA/m higher than the magnetic field intensity at the 1.035MHz working frequency point. And under the condition of no interference from the outside, the magnetic field intensity at the 1.13MHz working frequency point and the magnetic field intensity at the 1.035MHz working frequency point should be close. In the test process, the outside obviously has a high-frequency signal which is overlapped to the working frequency point of 1.13MHz, thereby leading to inaccurate test results.

Test results of adding the anti-aliasing filter 100 provided by the present embodiment between the test antenna and the test instrument are shown in fig. 10 and 11 below. As shown in FIG. 10, the magnetic field strength at the 1.13MHz operating frequency point is 46.8dBuA/m. As shown in FIG. 11, the magnetic field strength at the 1.035MHz operating frequency point was 47dBuA/m. It is evident that the magnetic field strengths at the two frequency points are very close. If the anti-aliasing filter 100 is not added during the test, there may be a high frequency signal from the outside that may be aliased to the frequency point or frequency band to be tested, thereby resulting in inaccurate test results. The magnitude of the magnetic field strength at the frequency point of 1.13MHz can be represented from fig. 8 and 10.

The active filter circuit 400 in the anti-aliasing filter 100 provided in this embodiment is a 7-order active filter circuit, and attenuates to 4.2dB at 1.3MHz and 42dB at 3MHz. Has lower attenuation in the band-pass range and higher attenuation in the stop-band range. The test frequency band of the axle counter is 10kHz-1.3kMHz in the electromagnetic compatibility test of the vehicle. In addition, in the present embodiment, the anti-aliasing filter 100 is provided with 6 groups of independent anti-aliasing filter circuits 200, and each group of independent anti-aliasing filter circuits 200 corresponds to one independent anti-aliasing filter channel, that is, 6 independent anti-aliasing filter channels are designed in total, so that 6 anti-aliasing filter channels can be simultaneously filtered. The requirements of simultaneous acquisition of channels in three magnetic field directions of the high-frequency antenna X, Y, Z in the axle counter testing process are met.

The foregoing is merely an embodiment of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. An anti-aliasing filter (100) comprising a separate anti-aliasing filter circuit (200) of a first set-point, said first set-point being an integer not smaller than one; the anti-aliasing filter circuit (200) comprises an impedance matching circuit (300) for performing impedance matching with an input analog signal, and an active filter circuit (400) for performing anti-aliasing filtering on the impedance-matched analog signal; and the bias adjusting circuit (500) is used for carrying out bias zeroing on the analog signal output by the active filter circuit (400).

2. The anti-aliasing filter (100) according to claim 1, wherein the impedance matching circuit (300) comprises a first resistor (R1), a first terminal of the first resistor (R1) being grounded, a second terminal of the first resistor (R1) being connected to an output terminal (V1) of the impedance matching circuit (300) and to an analog signal input terminal (Vin) for inputting an analog signal.

3. The antialiasing filter (100) of claim 1, characterized in that when the order of the active filter circuit (400) is even, the active filter circuit (400) comprises a second order active low-pass filter circuit module (420), the second order active low-pass filter circuit module (420) comprising a second set value of second order active low-pass filter circuits connected in series in turn, the second set value being an integer not smaller than one.

4. The antialiasing filter (100) of claim 1, characterized in that when the order of the active filter circuit (400) is odd, the active filter circuit (400) comprises a first-order active low-pass filter circuit (410) and a second-order active low-pass filter circuit module (420) connected in series, the second-order active low-pass filter circuit module (420) comprising a third set value, the third set value being an integer not smaller than zero, that is connected in series in turn.

5. The anti-aliasing filter (100) of claim 1, wherein the bias adjustment circuit (500) comprises an adjustable resistor (Rc 1), a second order active low pass filter circuit (510), and a subtraction circuit (520), wherein:

-a first input of the subtracting circuit (520) is connected to an output (V2) of the active filter circuit (400); a second input end of the subtracting circuit (520) is connected with an output end of the second-order active low-pass filter circuit (510); the output end of the subtracting circuit (520) is connected with an analog signal output end (Vout) for outputting an analog signal;

the active arm pin of the adjustable resistor (Rc 1) is connected with the input end of the second-order active low-pass filter circuit (510); a first fixed pin of the adjustable resistor (Rc 1) is connected with an upper limit voltage end (VCC) of the adjustable bias voltage; the second fixed pin of the adjustable resistor (Rc 1) is connected with a lower limit voltage end (VEE) of the adjustable bias voltage.

6. The anti-aliasing filter (100) of claim 5, wherein the second first order active low pass filter circuit (510) comprises a fourth operational amplifier (U4), a seventh resistor (R7) and a fourth capacitor (C4), wherein:

a first end of the seventh resistor (R7) is connected to a movable arm pin of the adjustable resistor (Rc 1); -a second terminal of the seventh resistor (R7) is connected to the non-inverting input terminal of the fourth operational amplifier (U4) and to the first terminal of the fourth capacitor (C4);

the first end of the fourth capacitor (C4) is also connected with the non-inverting input end of the fourth operational amplifier (U4); a second terminal of the fourth capacitor (C4) is grounded;

the output end of the fourth operational amplifier (U4) is connected with the inverting input end of the fourth operational amplifier (U4) and the second input end of the subtracting circuit (520).

7. The anti-aliasing filter (100) of claim 5, wherein the subtracting circuit (520) comprises a fifth resistor (R5), a sixth resistor (R6), an eighth resistor (R8), a ninth resistor (R9), and a third operational amplifier (U3), wherein:

a first end of the fifth resistor (R5) is connected with an output end (V2) of the active filter circuit (400); -a second end of the fifth resistor (R5) is connected to the non-inverting input of the third operational amplifier (U3) and to the first end of the sixth resistor (R6);

the first end of the sixth resistor (R6) is also connected with the non-inverting input end of the third operational amplifier (U3); a second end of the sixth resistor (R6) is grounded;

-the non-inverting input of the third operational amplifier (U3) is connected to the first end of the eighth resistor (R8) and to the first end of the ninth resistor (R9); the output end of the third operational amplifier (U3) is connected with the second end of the ninth resistor (R9) and the analog signal output end (Vout);

a second end of the eighth resistor (R8) is connected to an output end of the second first-order active low-pass filter circuit (510).

8. The anti-aliasing filter (100) of claim 4, wherein the active filter circuit (400) comprises the first-order active low-pass filter circuit (410) and the second-order active low-pass filter circuit module (420) connected in series, the second-order active low-pass filter circuit module (420) comprising three of the second-order active low-pass filter circuits connected in series in turn.

9. The anti-aliasing filter (100) of claim 4, wherein the first-order active low-pass filter circuit (410) comprises a first operational amplifier (U1), a second resistor (R2) and a first capacitor (C1), wherein:

-a first end of the second resistor (R2) is connected to an output (V1) of the impedance matching circuit (300); -a second terminal of the second resistor (R2) is connected to the non-inverting input terminal of the first operational amplifier (U1) and to the first terminal of the first capacitor (C1); a second terminal of the first capacitor (C1) is grounded;

the non-inverting input end of the first operational amplifier (U1) is also connected with the first end of the first capacitor (C1); the output end of the first operational amplifier (U1) is connected with the inverting input end of the first operational amplifier (U1) and the input end of the second-order active low-pass filter circuit module (420).

10. The anti-aliasing filter (100) according to claim 3 or 4 or 8, wherein the second order active low pass filter circuit comprises a second operational amplifier (U2), a third resistor (R3), a fourth resistor (R4), a second capacitor (C2) and a third capacitor (C3), wherein:

-the non-inverting input of the second operational amplifier (U2) is connected to the first end of the fourth resistor (R4) and to the first end of the second capacitor (C2); the inverting input end of the second operational amplifier (U2) is connected with the output end of the second operational amplifier (U2); the output end of the second operational amplifier (U2) is also connected with the output end of the second-order active low-pass filter circuit and the first end of the third capacitor (C3);

a second terminal of the second capacitor (C3) is grounded; -a second end of the fourth resistor (R4) is connected to a second end of the third capacitor (C3) and to a first end of the third resistor (R3); a second end of the third resistor (R3) is connected to an input end of the second-order active low-pass filter circuit.