CN117548319A

CN117548319A - Micromechanical ultrasonic transducer structure with double PMUTs on bearing layer and manufacturing method thereof

Info

Publication number: CN117548319A
Application number: CN202210959225.4A
Authority: CN
Inventors: 庞慰; 牛鹏飞; 张孟伦
Original assignee: Tianjin University
Current assignee: Tianjin University
Priority date: 2022-08-05
Filing date: 2022-08-05
Publication date: 2024-02-13
Also published as: WO2024027731A1

Abstract

The invention relates to a micromechanical ultrasonic transducer structure and a manufacturing method thereof, the micromechanical ultrasonic transducer structure comprises a PMUT unit, the PMUT unit comprises a PMUT bearing layer, a first PMUT and a second PMUT which are arranged on the PMUT bearing layer, each PMUT comprises a first electrode layer, a second electrode layer and a piezoelectric layer, wherein: the piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than the piezoelectric coefficient of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than the dielectric constant of the piezoelectric layer of the second PMUT. Further, the first PMUT and the second PMUT are respectively disposed at two sides of the PMUT bearing layer. The invention also relates to an electronic device comprising the micromechanical ultrasonic transducer structure.

Description

Micromechanical ultrasonic transducer structure with double PMUTs on bearing layer and manufacturing method thereof

Technical Field

Embodiments of the present invention relate to the field of semiconductors, and in particular, to a micromechanical ultrasonic transducer structure having a carrier layer provided with a dual PMUT (Piezoelectric micromachined ultrasonic transducer, PMUT), a method for manufacturing the same, and an electronic device having the micromechanical ultrasonic transducer structure.

Background

Ultrasonic transducers are widely used in production and life as an electroacoustic element. The ultrasonic transducer transmits ultrasonic waves to the external environment, receives the reflected ultrasonic waves through the ultrasonic transducer, converts the reflected ultrasonic waves into electric signals, and senses, images and plays a role in the external environment. Typical applications of ultrasonic transducers include fingerprint recognition, ultrasonic imaging, ultrasonic radar and ranging, nondestructive detection, flow measurement, force feedback and the like, and can be used in human body imaging, automobile reversing radar, underwater sonar detection, sweeping robots, ultrasonic smoke alarms and the like. In the application, the ultrasonic signal transmission and the ultrasonic signal echo reception of the ultrasonic transducer are involved, so that the transmission sensitivity and the reception sensitivity of the ultrasonic transducer determine the advantages and disadvantages of the ultrasonic transducer to a great extent, and the method is a key index in the application scene.

The ultrasonic transducer manufactured by the traditional mechanical cutting scheme is limited in the aspects of size miniaturization of the vibration unit, production cost, efficiency, product consistency, yield and the like, and cannot meet the requirements of further development of an ultrasonic imager, in particular to low cost, portability, high resolution and the like.

MEMS fabrication technology based on the semiconductor industry is a very efficient way to produce small-sized devices in high efficiency, low cost, and mass. The ultrasonic transducer developed by utilizing the MEMS technology is mainly based on two principles of capacitance and piezoelectricity, and corresponds to a capacitance type micro-mechanical ultrasonic transducer (Capacitive Micromachined Ultrasonic Transducer, CMUT) and a piezoelectricity type micro-mechanical ultrasonic transducer (PMUT) respectively, and the capacitance type micro-mechanical ultrasonic transducer and the piezoelectricity type micro-mechanical ultrasonic transducer can be integrated with a complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) circuit to realize low-cost, consistent and large-scale manufacturing of the micro-ultrasonic transducer with high integration level and strong operation capability. In both transducers, the CMUT needs to apply a large bias voltage when in operation, resulting in high power consumption and limited application. In contrast, PMUT is a promising approach. Wherein the efficient integration of PMUT with CMOS is a crucial factor for the realization of the above mentioned ultrasound transducer.

The transmitting sensitivity and the receiving sensitivity of the piezoelectric micromachined ultrasonic transducer PMUT serve as key performance indexes, plays a vital role in the application of the PMUT to various scenes, and the signal-to-noise ratio is affected due to the fact that the transmitting sensitivity and the receiving sensitivity are too low, and finally the system cannot work or is low in performance.

PMUTs are typically in flexural vibration mode. When the ultrasonic transmitter is used, an alternating electric field is applied to electrodes on two sides of the piezoelectric film, transverse stress is generated in the piezoelectric layer due to the inverse piezoelectric effect, and a bending moment is generated, so that the film is forced to deviate from the plane, and sound pressure waves are emitted into surrounding media. As shown in formula (1), the ultrasonic emission sensitivity S of the flexural vibrating PMUT _T Proportional to the piezoelectric coefficient e of the piezoelectric film _31r ：

S _T ∝e _31f (1)

When PMUT is used as an ultrasonic receiver, the incident ultrasonic waves deflect the piezoelectric film to generate transverse stress, and charges are accumulated on the electrodes on two sides of the piezoelectric film due to positive piezoelectric effect to form a voltage signal, as shown in formula (2), the receiving sensitivity S of the PMUT is _R Proportional to the piezoelectric coefficient e _31r And dielectric constant epsilon ₃₃ Is a ratio of (2);

S _R ∝e _31f /ε ₃₃ (2)

in ultrasonic imaging, an ultrasonic transducer probe is used as a transmitter to transmit ultrasonic waves outwards and a receiver to receive ultrasonic waves reflected from an object to be imaged, wherein the working mode is usually a pulse-echo mode, and the PMUT pulse-echo sensitivity S is shown in a formula (3) _T ·S _R Proportional to the piezoelectric coefficient e ₃₁ Square of (d) and dielectric constant epsilon ₃₃ Is a ratio of (2).

The piezoelectric coefficients and dielectric constants are basic characteristics of piezoelectric materials, and table 1 lists piezoelectric coefficients and dielectric constant characteristics of PZT and AlN in common piezoelectric materials.

TABLE 1 Properties of PZT and AlN in common piezoelectric Material

Comparing the two piezoelectric materials of PZT and AlN, it is known that when used only as a transmitting ultrasonic probe, the piezoelectric constant of PZT is 10 times higher than that of AlN, and the transmission sensitivity of PZT-based PMUT will be 10 times that of AlN-based PMUT based on equation (1).

However, when used only as a probe for receiving ultrasonic waves, the dielectric constant of PZT is about 110 times that of AlN, and thus the reception sensitivity of PZT-based PMUTs will be about one twelfth that of AlN-based PMUTs. When a single piezoelectric material of PZT or AlN is used for the simultaneous transmission and reception mode of the ultrasonic probe, the sensitivity of pulse-echo (transmission-reception) signals of PMUTs developed therefrom is equivalent as shown in table 1.

Therefore, it is difficult for a single piezoelectric material to satisfy characteristics having both high piezoelectric coefficient and low dielectric constant, and for example, PMUT-on-CMOS devices based on the single piezoelectric material cannot realize application requirements having both ultra-high ultrasonic emission intensity and ultra-high ultrasonic reception sensitivity.

In addition, PMUT fabrication processes include deposition of various films (e.g., piezoelectric films, electrode films, etc.) at different temperatures and etching of the corresponding films in different atmospheres, liquid environments, which can cause damage to CMOS circuitry. In addition, the thin film and patterning processes of different piezoelectric materials and electrode materials deposited on two sides of the thin film are also greatly different, so that the PMUT processing two materials on the same substrate has the problem of process incompatibility. This results in great risk and difficulty in sequentially manufacturing different piezoelectric film-based PMUTs layer by layer on the same wafer, and development of a PMUT-on-CMOS integration scheme with strong process compatibility and convenience and containing different types of piezoelectric materials is required.

In addition, when PMUTs of two piezoelectric materials are integrated on one side (i.e., coplanar) of a wafer, due to the great difference of processing technologies caused by the difference of the piezoelectric materials, a scheme of respectively processing two piezoelectric material-based PMUTs is generally adopted, including a corresponding piezoelectric film layer and top and bottom electrode layers on two sides of the piezoelectric film, and this type of PMUT integration scheme generally needs to sequentially but not simultaneously construct multiple types of microstructures in a millimeter-level or even sub-millimeter-level space, which brings greater risks and difficulties for processing and molding.

Disclosure of Invention

The present invention has been made to alleviate or solve at least one of the above-mentioned problems of the prior art.

Embodiments of the present invention relate to a micromechanical ultrasound transducer structure comprising:

a PMUT unit including a PMUT carrier layer, and first and second PMUTs disposed on the PMUT carrier layer, each PMUT including a first electrode layer, a second electrode layer, and a piezoelectric layer,

wherein:

the piezoelectric coefficient of the piezoelectric layer of the first PMUT is higher than the piezoelectric coefficient of the piezoelectric layer of the second PMUT, and the dielectric constant of the piezoelectric layer of the first PMUT is lower than the dielectric constant of the piezoelectric layer of the second PMUT.

Further, the first PMUT and the second PMUT are respectively disposed at two sides of the PMUT bearing layer.

The embodiment of the invention also relates to a manufacturing method of the micromechanical ultrasonic transducer structure, which comprises the following steps:

providing a transistor unit, wherein the transistor unit comprises a transistor substrate, a transistor and a circuit protection layer covering the transistor; and

providing a PMUT unit coupled to the circuit protection layer of the transistor unit, the PMUT unit including a PMUT carrier layer, a first PMUT and a second PMUT, each PMUT including a first electrode layer, a second electrode layer and a piezoelectric layer,

wherein:

Further, in the above method, the first PMUT and the second PMUT are respectively disposed at two sides of the PMUT carrier layer.

Embodiments of the present invention also relate to an electronic device comprising a micromechanical ultrasound transducer structure as described above, or a micromechanical ultrasound transducer structure manufactured by the above manufacturing method.

Drawings

These and other features and advantages of the various embodiments of the disclosed invention will be better understood from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate like parts throughout the several views, and wherein:

FIGS. 1-5 are schematic structural views of a micromechanical ultrasound transducer structure according to various exemplary embodiments of the present invention, wherein two PMUTs share the same PMUT carrier layer and are disposed on both sides of the PMUT carrier layer;

fig. 6-11C are schematic cross-sectional views illustrating a method of manufacturing the micro-machined ultrasonic transducer structure shown in fig. 1 according to an exemplary embodiment of the present invention, wherein fig. 11A-11C illustrate schematic views of how PMUTs on both sides of the micro-machined ultrasonic transducer structure shown in fig. 1 form electrical connections with CMOS;

FIGS. 12-16 are schematic cross-sectional views illustrating a method of fabricating the micromachined ultrasonic transducer structure shown in FIG. 5, according to an exemplary embodiment of the present invention;

fig. 17 is a structural schematic diagram of a micromechanical ultrasound transducer structure according to a further exemplary embodiment of the present invention, wherein two PMUTs share the same PMUT carrier layer and are arranged on one side of the PMUT carrier layer;

fig. 18 is a schematic diagram of a PMUT structure array in accordance with an exemplary embodiment of the invention.

Detailed Description

The technical scheme of the invention is further specifically described below through examples and with reference to the accompanying drawings. In the specification, the same or similar reference numerals denote the same or similar components. The following description of embodiments of the present invention with reference to the accompanying drawings is intended to illustrate the general inventive concept and should not be taken as limiting the invention. Some, but not all embodiments of the invention. All other embodiments, which are derived by a person skilled in the art based on the embodiments of the invention, fall within the scope of protection of the invention.

The inventors have found that if a material-based PMUT with a high piezoelectric coefficient is used as an ultrasonic transmitter, a low dielectric constant material-based PMUT is used as an ultrasonic receiver, such as a PZT-based PMUT and an AlN-based PMUT as shown in table 1 are integrated together on a set of ultrasonic transducers, wherein the PZT-based PMUT is used as an ultrasonic transmitter, and the AlN-based PMUT is used as an ultrasonic receiver, the pulse-echo sensitivity will be 100 times higher than that of the single material-based PMUT.

In addition, the integration of the existing PMUT and CMOS is mainly achieved by the following two schemes:

scheme 1. CMOS wafers are used as substrates for various thin film deposition and etching processes, however, PMUT fabrication processes include deposition of various thin films (such as piezoelectric thin films, electrode thin films, etc.) at different temperatures and etching of the corresponding thin films in different atmospheres and liquid environments, which requires that the process does not damage CMOS circuits. In the piezoelectric materials, only a few MEMS manufacturing processes of piezoelectric films such as AlN-based piezoelectric materials are compatible with CMOS, so that the scheme is mainly used for developing corresponding piezoelectric material-based integrated ultrasonic transducers. However, the piezoelectric properties of piezoelectric films are a critical determinant of PMUT performance, e.g., PZT, liNbO ₃ The piezoelectric material with very excellent piezoelectric characteristics is harder in processing technology than AlN and poorer in compatibility with CMOS, so that the development of CMOS integrated PMUT based on the technological process is more limited and difficult to realize.

And 2, respectively processing the PMUT wafer and the CMOS wafer, setting one side of the PMUT wafer, on which the piezoelectric film is arranged, and one side of the CMOS wafer, on which the transistor is arranged, as the front surface of the corresponding wafer, and bonding the front surface of the PMUT wafer and the front surface of the CMOS to construct the CMOS integrated PMUT. This approach has less limitations on the piezoelectric material than the above-described approach 1, however, the effective vibration of the PMUT mechanical vibration unit is critical for efficient emission and reception of ultrasound waves, which requires a cavity structure below the vibration unit, providing space for the vibration unit to vibrate effectively, which requires a corresponding cavity on the CMOS. However, cavity size is a central factor in determining PMUT ultrasound frequency, and variations in cavity size will result in variations in PMUT ultrasound frequency. When bonding two wafers of PMUT and CMOS, there is an unavoidable misalignment, resulting in random misalignment between the vibrating cell area and the design itself, causing frequency fluctuations of the developed CMOS integrated PMUT. It is worth noting that PMUT resonators used in the field of ultrasound imaging are very small in diameter, typically tens of microns or even less, and even a misalignment of 1 micron will have a significant adverse effect.

Accordingly, there is a need in the art to develop CMOS and PMUT integration schemes as follows: the method has strong universality on the piezoelectric material, and/or the integration process of the CMOS unit and the PMUT unit has no influence on the size of the cavity.

Based on the above, the present invention proposes to integrate the high voltage coefficients (for example, absolute value higher than 1C/m ² Further higher than 5C/m ² ) Two types of ultrasonic transducers, piezoelectric material-based PMUT with low dielectric constant (e.g., lower than 1200, further lower than 100), wherein piezoelectric material-based PMUT with high piezoelectric coefficient is dedicated to transmit ultrasonic waves, and piezoelectric material-based PMUT with low dielectric constant is used to receive reflected ultrasonic waves. The PMUT and CMOS integration scheme is the key for developing the MEMS ultrasonic transducer with excellent performance and low cost.

The invention also provides a scheme for integrating the two types of piezoelectric material-based PMUTs on the same CMOS wafer. The scheme is a PMUT-on-CMOS integrated scheme which is high in process compatibility and convenient and fast to use and contains different types of piezoelectric materials.

The invention also provides a micromechanical ultrasonic transducer structure comprising the two types of piezoelectric film base PMUTs. The invention provides a scheme of integrating two piezoelectric material-based PMUTs back to back on two sides of a substrate, wherein the PMUT on a single side only contains one type of piezoelectric material and an electrode material matched with the piezoelectric material, so that the influence on the first type of PMUT when the second type of piezoelectric film-based PMUT is processed is greatly reduced; at the same time, this approach also reduces the planar area occupied by the transducers (two piezoelectric material based PMUTs are integrated back-to-back in the longitudinal direction, rather than being laterally aligned).

Reference numerals in the drawings of the present invention are explained as follows:

1000: CMOS cells or transistor cells, see fig. 6.

100: the CMOS substrate or transistor substrate can be made of monocrystalline silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide, diamond, etc.

101: a source and a drain of the transistor.

110: the circuit protection layer is an insulating material layer, and may be silicon dioxide, silicon nitride, or the like.

111: a gate of the transistor.

113A: the material of the electrical connection layer in the transistor unit layer corresponds to the first electrical connection layer, and is selected from molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium or the composite of the above metals or the alloy thereof, and the like, and the material is also applicable to other electrical connection layers.

113B: the transistor unit layer is internally provided with an electric connection layer corresponding to the second electric connection layer.

113. 115: and other transistor unit layers are electrically connected.

112 and 114: and a transistor cell interlayer electrical connection layer.

200: the PMUT substrate is made of monocrystalline silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide, diamond and the like.

201 and 202: a cavity for a PMUT.

210: an oxide layer (fig. 4) or a bonding layer (fig. 5).

220, 221, 222: the material of the support layer may be the same as that of the electrode layer or may be different. The supporting layer may be disposed between the PMUT and the PMUT substrate, and the supporting layer is an insulating layer, and may be made of non-conductive materials such as silicon, silicon dioxide, and silicon nitride. The support layer may also be disposed on top of the PMUT. It should be noted that the support layer may not be provided.

230. 250;260, 280: the electrode layer is made of molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium or a composite or alloy of the above metals. The materials of the two electrode layers may be the same or different.

240. 270: a piezoelectric layer. The material can be selected from polycrystalline aluminum nitride (AlN), polycrystalline zinc oxide, polycrystalline lead zirconate titanate (PZT), polycrystalline lithium niobate (LiNbO) ₃ ) Polycrystalline lithium tantalate (LiTaO) ₃ ) Polycrystalline potassium niobate (KNbO) ₃ ) Such as single crystal aluminum nitride, single crystal gallium nitride, single crystal lithium niobate, single crystal lead zirconate titanate, single crystal potassium niobate, single crystal quartz thin film, or single crystal lithium tantalate, and the single crystal or the polycrystalline material may also include rare earth element doped materials with a certain atomic ratio, which are all piezoelectric layers that can be used in the present invention, such as scandium doped aluminum nitride (AlScN).

245: the conductive layer or the electrical connection layer may be made of a material selected from materials for forming the electrode layer.

275: the conductive layer or the electrical connection layer may be made of a material selected from materials for forming the electrode layer.

290: the device protection layer is typically a dielectric material such as silicon dioxide, aluminum nitride, silicon nitride, etc.

400A: a first conductive aperture.

400B: and a second conductive hole.

500: the bonding material layer, see fig. 1 and 3, may be a metal bonding layer, such as gold-gold bonding, aluminum-germanium bonding, etc., or may be other material layers that bond the two layers together.

3000: PMUT structure (see fig. 1 and 18).

4000: PMUT structure array (see fig. 18).

Fig. 1-5 are schematic structural views of a micromechanical ultrasonic transducer structure according to various exemplary embodiments of the present invention, wherein two PMUTs share the same PMUT carrier layer and are disposed on both sides of the PMUT carrier layer.

In the illustrated embodiment, a single PMUT generally includes a support layer 220, a piezoelectric layer 240, and top and bottom electrode layers 250, 230 on either side of the piezoelectric layer 240, and a cavity 201 common to both PMUTs is provided on the side of the PMUT vibrating unit facing the CMOS, enabling the PMUT vibrating unit to generate efficient flexural vibrations to generate ultrasound waves. In the present invention, two types of ultrasonic transducers, i.e., a piezoelectric material-based PMUT having a high piezoelectric coefficient and a piezoelectric material-based PMUT having a low dielectric constant, are integrated on a CMOS wafer or, as shown, a transistor cell 1000.

As shown in fig. 1-5, 240 and 270 represent a high-voltage electrical-coefficient-based piezoelectric film and a low-dielectric-constant-based piezoelectric film, respectively. 201 is the cavity region of the PMUT where the two types of piezoelectric films make effective flexural vibration. 220 is the carrier layer carrying the PMUT, which in the embodiment of fig. 1 is the PMUT supporting layer, 100 is the substrate or transistor base on which the CMOS circuit is built, and 110 is the circuit protection layer.

As previously mentioned, in a more specific embodiment, the piezoelectric layer 240 has an absolute value of piezoelectric coefficient greater than 1C/m ² And/or the dielectric constant of the piezoelectric layer 270 is less than 1200. Further, the absolute value of the piezoelectric coefficient of the piezoelectric layer 240 is greater than 5C/m ² And/or the dielectric constant of the piezoelectric layer 270 is less than 100.

In a more specific embodiment, piezoelectric layer 240 is PZT or doped PZT and piezoelectric layer 270 is ALN or AlScN.

In the aspect of PMUT-on-CMOS integration, one piezoelectric material base PMUT wafer is firstly constructed on one side of a PMUT bearing layer, then is bonded with a CMOS wafer, and then another piezoelectric material base PMUT is constructed on the other side of the PMUT bearing layer on a partially integrated PMUT-on-CMOS wafer. In the integrated scheme, even if the processing conditions of harsh and even incompatible processing conditions exist in the processing of the piezoelectric film base PMUT, the processing conditions are not contacted with each other, the processing effects of the piezoelectric film base PMUT are not influenced, and the operability is good.

As will be described later with reference to fig. 15 and 16, the PMUT wafer electrodes may be electrically connected to corresponding electrode interconnections on the CMOS wafer, and the devices may be surface protected as needed to provide a device protection layer 290. In the integration scheme of the invention, such as shown in fig. 1-5, in the processing of different types of piezoelectric thin film based PMUTs, even if the upper PMUT has a severe processing condition, the damage to the CMOS wafer is avoided, and the process compatibility is good.

In addition, in the processing process of two piezoelectric material base PMUTs, when the processing technology of a certain piezoelectric material base PMUT is poor in compatibility with CMOS and even incompatible, the piezoelectric material base PMUT can be processed on a PMUT bearing layer which is not bonded with a CMOS circuit, then another part of PMUT is constructed on the surface of a part of PMUT-on-CMOS wafer, integration of the piezoelectric material base PMUT with the CMOS with different performance indexes is realized, and the MEMS ultrasonic transducer with excellent ultrasonic emission and acceptance sensitivity is obtained.

The PMUT carrier layer may be used to form a PMUT thereon, such as support layer 220 of fig. 1-3, SOI structure of fig. 4 (including substrate 200, oxide layer 210, and support layer or silicon membrane layer 220 of fig. 4), or substrate 200 of fig. 5, as well as other support structures for creating a PMUT, which are within the scope of the present invention.

In embodiments of the present invention, the material of the PMUT bearing layer may be the same or a different metal than the material of the electrode layer; or the PMUT carrier layer material may be an insulating material or a semiconductor material, such as silicon, silicon dioxide, silicon nitride, aluminum nitride, etc.

As shown in fig. 1, two piezoelectric material-based PMUTs are located on either side of the support layer 220, the two PMUTs sharing a cavity 201, and the PMUT cells are bonded to transistor cells, such as CMOS cells, using a metal bonding layer 500, which is also connected to circuitry within the transistor cells. In fig. 1, 290 is a device protection layer, and as mentioned above, the device protection layer may not be provided.

As shown in fig. 2, two piezoelectric material-based PMUTs are located on either side of the support layer 220, the two PMUTs sharing a cavity 201, the support layer 220 of the PMUT cell being directly bonded or directly bonded to the circuit protection layer 110 of a transistor cell, such as a CMOS cell. In fig. 2, 290 is a device protection layer, and as mentioned above, the device protection layer may not be provided.

In the embodiments shown in fig. 1-2, two PMUTs share the same PMUT carrier layer and are disposed on opposite sides of the PMUT carrier layer in the thickness direction of the PMUT carrier layer, for example, the two PMUTs share a center line, and this vibrating element layout or the arrangement of the two PMUTs helps to reduce the size of the PMUT-on-CMOS chip and increase the integration level and the imaging performance of the final-stage ultrasonic transducer.

In comparison with the positional relationship of two material-based PMUTs distributed on both sides of the PMUT carrier layer in the structure shown in fig. 1 and 2, as shown in fig. 3 to 5, two types of PMUTs distributed on both sides may have positional deviation in the axial direction perpendicular to the substrate plane, i.e., two PMUTs are disposed on both sides of the PMUT carrier layer spaced apart from each other in the lateral direction. In the structure shown in fig. 3-5, the two PMUTs do not share a cavity, but each has a corresponding cavity.

As shown in fig. 3, two piezoelectric material-based PMUTs are located on either side of the support layer 220, wherein the two material-based PMUTs are integrated in a staggered fashion without sharing cavities, and the PMUT cells are bonded to transistor cells, such as CMOS cells, using a metal bonding layer 500, which is also connected to circuitry within the transistor cells. In fig. 3, 290 is a device protection layer.

As shown in fig. 4, two piezoelectric material-based PMUTs are located on both sides of an SOI wafer, where the two material-based PMUTs are integrated in a staggered fashion without sharing cavities, the SOI wafer comprising a substrate 200, an oxide layer 210, and a top silicon thin film layer or silicon membrane layer 220. The silicon membrane layer 220 in the SOI that constitutes the PMUT is directly bonded to the circuit protection layer 110. 290 is a device protection layer. Compared to fig. 3, this solution does not require removal of the substrate 200 and the oxide layer 210, and the PMUT based on the piezoelectric material 270 is built on a thicker substrate 200, simplifying the manufacturing process.

As shown in fig. 5, two piezoelectric material-based PMUTs are located on both sides of the substrate 200, wherein the two material-based PMUTs are integrated in a staggered manner without sharing a cavity, wherein the PMUTs include support layers 221 and 222, piezoelectric layers, and cavities on both sides of the piezoelectric layers. The support layer may be located outside either side electrode, although the PMUT may also be free of support layers. The substrate 200 on which the PMUT is built or the bonding layer 210 generated on its surface is directly bonded to the circuit protection layer 220. 290 is a device protection layer. Compared with the structure shown in fig. 4, the substrate for constructing the PMUT can be selected from more common substrates cheaper than SOI, so that the cost is reduced.

In bonding of the PMUT wafer to the CMOS wafer, the PMUT wafer substrate layer may be directly bonded to the circuit protection layer of the CMOS wafer (see, e.g., fig. 5), or the integration of the PMUT cell and the CMOS cell may be achieved by an intermediate bonding layer material (e.g., metal bonding, etc., corresponding to bonding material layer 500) (see, e.g., fig. 1).

In the embodiment shown in fig. 1-5, the PMUT cell comprises two PMUTs, a first PMUT and a second PMUT, disposed on both sides of the PMUT carrier layer, the piezoelectric coefficient of the piezoelectric layer 240 of the first PMUT being higher than the piezoelectric coefficient of the piezoelectric layer 270 of the second PMUT, and the dielectric constant of the piezoelectric layer 240 of the first PMUT being lower than the dielectric constant of the piezoelectric layer 270 of the second PMUT. In a further embodiment, the piezoelectric layer 240 of the first PMUT is PZT or doped PZT and the piezoelectric layer 270 of the second PMUT is AlN or AlScN.

In the embodiment shown in fig. 1-5, the structure of PMUT-on-CMOS is employed, but the invention is not limited thereto. The PMUT cells described above may also be arranged on other structures, PMUT-on-CMOS being an advantageous embodiment of the invention.

In the embodiment shown in fig. 1-5, a first PMUT of the PMUT cell is used to transmit ultrasound waves and a second PMUT is used to receive ultrasound waves.

Fig. 6-11 are schematic cross-sectional views illustrating a method of manufacturing the micro-mechanical ultrasonic transducer structure shown in fig. 1, according to an exemplary embodiment of the present invention. More specifically, fig. 6-11 illustrate an integration scheme for integrating a PZT piezoelectric thin film based PMUT with a high piezoelectric coefficient and an AlN piezoelectric thin film based PMUT with a low dielectric constant into a CMOS wafer by fabricating the PMUT on an SOI wafer and integrating it with the CMOS wafer. Wherein the high-voltage coefficient material 240 or the piezoelectric layer 240 of the first PMUT is PZT or doped PZT, and the low-dielectric constant material 270 or the piezoelectric layer 270 of the second PMUT is AlN or AlScN, a PMUT-on-CMOS ultrasound transducer with ultra-high pulse-echo sensitivity can be constructed.

The transistor cell 1000 is provided first. Fig. 6 is a schematic diagram of a CMOS structure, in which only one transistor is shown, wherein 100 is the substrate of the CMOS, i.e., the transistor base (which may be silicon, etc.), and 110 is the circuit protection layer (which may be silicon oxide, silicon nitride, etc.). 101 is the source and drain of the transistor, 111 is the gate of the transistor, 113A, 113B, 113 and 115 are electrical connections within the CMOS layer, and 112 and 114 are electrical connections between the CMOS layers. As shown in fig. 6, the transistor unit includes a transistor substrate 100, and first and second transistors arranged to be spaced apart in a lateral direction. It should be noted that the structure shown in fig. 6 is exemplary, and the CMOS unit 1000 may include the CMOS transistor and the circuit protection layer 110, and may optionally include the first electrical connection layer 113A and the second electrical connection layer 113B for the present invention.

As shown in fig. 7, a PZT piezoelectric material based PMUT is fabricated on an SOI wafer, where 200 is a substrate, 210 is an oxide layer, 220 is a silicon film layer, forming the SOI wafer. Reference numeral 240 denotes a PZT piezoelectric thin film layer, and 230 and 250 denote top and bottom electrode layers on both sides of the piezoelectric thin film layer. 245 are electrical connection channels or layers connecting the top and bottom electrodes on both sides of the PZT piezoelectric film to the silicon layer 220, which are then interconnected with electrical connections of the CMOS circuit.

As shown in fig. 8, the circuit protection layer material on the CMOS circuit that will correspond to the PMUT electrical interconnections (i.e., the conductive vias 400A and 400B are formed as shown in fig. 15 later) is removed to expose the electrical connections on the CMOS circuit; next, the piezoelectric film side of the PZT-based PMUT is bonded to the CMOS circuit side, and integration of the piezoelectric film PZT-based PMUT with the CMOS circuit and electrical interconnection are achieved by metal bonding is exemplarily shown in fig. 8. I.e., the bonding material layer 500, also serves as part of electrically connecting the PMUT to the CMOS circuitry.

However, other bonding methods may be selected, such as using a non-conductive material bonding layer, or direct bonding of the silicon film layer 220 to the circuit protection layer 110 (e.g., silicon-silicon bonding, direct bonding of silicon to silicon oxide, etc.).

When metal bonding is adopted, the bonding layer material can realize the bonding function and also realize the electrical interconnection of PMUT and CMOS, and when a scheme of directly bonding the non-conductive material bonding layer material or the silicon film layer 220 and the circuit protection layer 110 is adopted, the heights of the bonding layer and the electrical interconnection layer need to be strictly limited, and the electrical interconnection is realized while the bonding is completed.

In addition, the PMUT realizes effective bending vibration, a cavity is formed on one side of the CMOS, and when two wafers are bonded together by adopting an intermediate bonding layer material, the cavity can be provided for the PMUT vibration unit to realize effective vibration, and the cavity can be etched at the corresponding position of the CMOS wafer or used in combination for the PMUT vibration unit to vibrate effectively. When directly bonded to the circuit protection layer 110 through the silicon film layer 220, it is necessary to form a sufficient cavity on the CMOS circuit for the PMUT vibratory unit to vibrate effectively.

Referring to fig. 9, after the bonding step in fig. 8, the substrate 200 and oxide layer 210 of the SOI wafer are removed, exposing the unprocessed side of the silicon membrane layer 220 of the SOI wafer, where the fabrication of the second type of piezoelectric thin film based PMUT is performed.

Referring to fig. 10, another piezoelectric material based PMUT, such as an AlN piezoelectric material based PMUT, is constructed on one side of the bare silicon membrane layer 220, where 270 is an AlN based piezoelectric membrane layer and 260 and 280 are top and bottom electrode layers on both sides of the piezoelectric membrane, respectively.

Fig. 11A and 11B are schematic diagrams illustrating how PMUTs on both sides of the micromechanical ultrasound transducer structure shown in fig. 1 form electrical connections with CMOS. Fig. 11A and 11B illustrate electrically interconnecting a PMUT (i.e., a second piezoelectric material based PMUT) on a side of a PMUT carrier layer remote from a CMOS wafer with CMOS circuitry. PMUTs on both sides of the support layer 220 are different from where the track lines electrically interconnecting the CMOS circuits exist.

As shown in FIG. 11A, the two PMUTs are electrically interconnected with the CMOS circuit at A-A 'and B-B', respectively, although the lines A-A 'and B-B' need not be perpendicular, so long as there is no overlap.

Fig. 11B electrically interconnects electrode layers 260 and 280 of the piezoelectric film 270 based PMUT with CMOS circuitry. When preparing a piezoelectric material-based PMUT, bonding a PMUT wafer to a CMOS circuit, and interconnecting electrode layers 230 and 250 of a piezoelectric thin film 240-based PMUT to the CMOS circuit, an electrical interconnect material is deposited at the electrical interconnection between the second piezoelectric material-based PMUT and the CMOS circuit to form an interconnection channel, i.e. only the support layer 220 at the corresponding position is etched to expose the electrical connection channel end. And depositing an electrical connection layer 275 of the PMUT and the CMOS on the upper side of the supporting layer 220 after the electrical connection terminal is exposed. Fig. 11C is a schematic cross-sectional view of the resulting PMUT-on-CMOS device along support layer 220 on the side facing the CMOS circuitry where PMUT forms an electrical interconnect with CMOS, i.e., along A-A in fig. 11A. Finally, if desired, a device protection layer 290 is deposited over the entire device surface, as shown in fig. 16.

Fig. 12-16 are schematic cross-sectional views illustrating a method of manufacturing the micro-machined ultrasonic transducer structure shown in fig. 5, according to an exemplary embodiment of the present invention. Fig. 12-16 illustrate an integration scheme of a PZT piezoelectric thin film based PMUT with high piezoelectric coefficient and an AlN piezoelectric thin film based PMUT with low dielectric constant into a CMOS wafer, in which the two PMUTs are arranged offset in the lateral direction without sharing a cavity, by making PMUTs on an SOI wafer and integrating them with the CMOS wafer.

FIG. 12 is a schematic diagram of the structure of a PZT piezoelectric material based PMUT fabricated on an SOI wafer, where 200 is the substrate, 210 is the oxide layer, and 220 is the silicon membrane layer; 240 is a PZT piezoelectric thin film layer, 230 and 250 are top and bottom electrode layers on both sides of the piezoelectric thin film layer; 245 are electrical connection channels or layers connecting the top and bottom electrodes on both sides of the PZT piezoelectric film to the silicon layer 220, which in turn are interconnected with electrical connections of the CMOS circuit.

As shown in fig. 13, a cavity 201 required for vibration of the piezoelectric film PZT-based PMUT is etched in the circuit protection layer of the CMOS, and the structure shown in fig. 12 is bonded to the circuit protection layer of the CMOS, i.e., the piezoelectric film side of the PZT-based PMUT is bonded to the CMOS circuit side, and the vibration portion of the PZT-based PMUT is located in the cavity 201.

As shown in fig. 14, a PMUT based on another piezoelectric material 270, such as a piezoelectric film AlN-based PMUT, is constructed on a substrate 200, wherein 260 and 280 are electrodes on both sides of the piezoelectric film, and a cavity 202 required for the PMUT to vibrate effectively and completely can be formed by a sacrificial layer or the like. The PMUT may or may not be built on a support layer 222.

As shown in fig. 15, at the electrical connection point for connecting the PMUT electrode and the CMOS circuit, conductive holes 400A and 400B are formed, which penetrate through the entire thickness of the PMUT into the circuit protection layer 110, until the conductive portions within the circuit protection layer are exposed, based on an etching process. For each PMUT, a hole 400A for conduction and a hole 400B for conduction are etched to expose the in-transistor cell layer electrical connection layer 113A and the in-transistor cell layer electrical connection layer 113B, respectively. Alternatively, the first electrical connection layer 113A is electrically connected to one of the electrodes (e.g., the source) of the CMOS transistor, and the second electrical connection layer 113B is electrically connected to the other one of the electrodes (e.g., the gate) of the CMOS transistor. However, it is within the scope of the present invention that the first electrical connection layer 113A and/or the second electrical connection layer 113B may be electrically connected thereto, as needed and desired, in the case of other electrical connection structures present in the CMOS cell.

As shown in fig. 16, an electrical connection layer 275 for PMUT and CMOS is provided, for example, in a deposition process, to achieve electrical connection of PMUT and CMOS.

The electrical connection layer 275 is formed by a deposition method to achieve electrical connection of the PMUT and CMOS, and finally the device protection layer 290 is covered on the PMUT surface. The electrical connection layer 275 may be made of various conductive materials, such as materials forming electrode layers, and the materials used for connecting the PZT-based PMUT and the conductive path or the electrical connection layer 235 of the CMOS circuit and the conductive path or the electrical connection layer 275 for electrically connecting the AlN-based PMUT and the CMOS circuit may be the same material or different conductive materials. As can be appreciated, it is apparent that the electrical connection layers 235 and 275 are electrically insulated from each other, and that the electrical connection layers 235 and 275 form electrical connections with the transistor cell intra-layer electrical connection layer 113A and intra-layer electrical connection layer 113B, respectively, via conductive vias.

As can be appreciated, in the above-described method, if bonding between the PMUT cell and the transistor cell is achieved by providing a bonding material layer 500, the PMUT cell, the transistor cell, and the bonding material layer together define a cavity, and the bonding material layer 500 may be used to define lateral boundaries of the cavity.

In addition, in the above-described solution, one side of the PMUT carrier layer is bonded to the circuit protection layer 110, so that: when a PMUT needs to be fabricated on the other side of the PMUT carrier layer in a subsequent step, the PMUT carrier layer may protect the CMOS cell 1000 without regard to the impact on the CMOS cell 1000 when fabricating the PMUT. This can make the micro-mechanical ultrasonic transducer structure have strong universality for piezoelectric materials, and can be aluminum nitride (AlN), lead zirconate titanate (PZT) and lithium niobate (LiNbO) ₃ ) Lithium tantalate (LiTaO) ₃ ) Potassium niobate (KNbO) ₃ ) And the like.

It should be noted that the joining of the two in the present invention includes not only the case where the two are directly joined as shown but also the case where another joining layer or film layer is provided therebetween.

It should be noted that, in the specific embodiment of the present invention, the connection of the PMUT substrate and the circuit protection layer is exemplified, however, the connection of the PMUT substrate and the CMOS cell 1000 may be the circuit protection layer defining the surface of the CMOS cell, or other layers defining the surface of the CMOS cell, which is within the scope of the present invention.

In the embodiment shown in fig. 1-5, the CMOS cell 1000 further includes a CMOS substrate 100, one side of the circuit protection layer 110 is bonded to the PMUT carrier layer, and the other side of the circuit protection layer 110 is bonded to the CMOS substrate 100. Alternatively, in some cases, the PMUT cell may be bonded to the CMOS substrate 100, which is also within the scope of the present invention.

It is also to be noted that, in the present invention, CMOS is taken as one example of a transistor, and thus a CMOS cell is taken as one example of a transistor cell, but the present invention is not limited thereto, and the transistor may also be a BiMOS cell, BCD or the like, and thus the transistor cell may also be a BiMOS cell, BCD cell or the like.

As shown in fig. 1, in the wafer level manufacturing, the cavity structure required by PMUT vibration is arranged on the PMUT wafer side, and the cavity 201 is not required to be formed on the CMOS wafer before the two are integrated, so that the vibration area change caused by alignment deviation and the ultrasonic transducer frequency change caused by the alignment deviation do not exist in the process of integrating the CMOS wafer and the PMUT wafer, and the technical problem that the cavity size is adversely affected in the process of integrating the CMOS and the PMUT in the prior art is solved.

For example, as shown in fig. 5 and 15, in an alternative embodiment, for each PMUT, the micromechanical ultrasound transducer structure is provided with a first conductive via 400A and a second conductive via 400B, the first conductive via 400A extending through the PMUT substrate 200 and/or support layer 210 and reaching the first electrical connection layer 113A within the circuit protection layer 110, the second conductive via 400B extending through the PMUT substrate 200 and/or support layer 210 and reaching the second electrical connection layer 113B within the circuit protection layer 110, wherein: the first conductive layer 235 is electrically connected to the first electrical connection layer 113A through the first conductive via 400A, and the second conductive layer 275 is electrically connected to the second electrical connection layer 113B through the second conductive via 400B.

Although not shown, it is within the scope of the present invention that the first conductive layer 235 and the second conductive layer 275 may be electrically connected to the first electrical connection layer 113A and the second electrical connection layer 113B, respectively, exposed at the sides of the micromechanical ultrasound transducer structure.

In fig. 1-16, a structure in which two PMUTs are disposed on both sides of a PMUT carrier board is shown, but the present invention is not limited thereto. As shown in fig. 17, the two PMUTs spaced apart in the lateral direction may also be disposed on the same side of the PMUT carrier board.

In addition, when the PMUT is arranged in the cavity, the cavity plays a role in protecting the PMUT (particularly the piezoelectric layer) from the external environment, so that the reliability and long-term stability of the PMUT can be improved, and further, when the PMUT structure is used in an imager for example, the reliability and long-term stability of a final imaging system can be improved.

Fig. 18 is a schematic diagram of a PMUT structure array in accordance with an exemplary embodiment of the invention. As shown in fig. 18, the PMUT structure 3000 described above may be just one element of the array 4000. In fig. 18, the hollow circles represent PMUT vibration regions of the PMUT structure 3000, which may be any desired shape other than circles, such as ellipses, polygons, and combinations thereof. The black filled circles represent the PMUT cells making electrical connection with the CMOS cells, as at the first electrical connection layer 113A and the second electrical connection layer 113B shown in fig. 6, which may also be of any desired shape. The PMUT structures 3000 combine to form a PMUT structure array 4000.

Each PMUT cell may be individually controlled by a matched CMOS circuit to form a two-dimensional PMUT structure array 4000.

Multiple PMUT structures 3000 may also be connected together, such as electrodes of PMUT structures 3000 on the same column are interconnected to form a one-dimensional line array, where the electrical connection points between the circuits of the CMOS cells and the PMUT cells are reduced, and the electrical connection points between a pair of CMOS cells and the PMUT cells control multiple PMUT cells simultaneously.

The ultrasonic transducer may be formed based on a PMUT structure or an array of PMUT structures, which may be used on an ultrasonic imager, but also on other electronic devices such as ultrasonic range finders, ultrasonic fingerprint sensors, nondestructive inspection instruments for industrial applications, etc.

Based on the above, the invention provides the following technical scheme:

1. a micromechanical ultrasound transducer structure comprising:

wherein:

2. The micromachined ultrasonic transducer structure of 1, wherein:

the first PMUT and the second PMUT are respectively arranged on two sides of the PMUT bearing layer.

3. The micromachined ultrasonic transducer structure of 1, wherein:

the piezoelectric layer of the first PMUT is PZT or doped PZT, and the piezoelectric layer of the second PMUT is AlN or AlScN; and/or

The first PMUT is for transmitting ultrasound waves and the second PMUT is for receiving ultrasound waves.

4. The micromachined ultrasonic transducer structure of any of claims 1-3, wherein:

the first PMUT and the second PMUT are oppositely arranged on two sides of the PMUT bearing layer in the thickness direction of the PMUT bearing layer, and the first PMUT and the second PMUT share a cavity for the PMUT.

5. The micromachined ultrasonic transducer structure of claim 4, wherein:

the PMUT bearing layer is a PMUT supporting layer;

the micromechanical ultrasonic transducer structure further comprises a transistor unit, wherein the transistor unit comprises a transistor substrate, a transistor and a circuit protection layer covering the transistor, and the circuit protection layer faces the PMUT unit;

the circuit protection layer is jointed with the PMUT supporting layer, one side of the circuit protection layer facing the PMUT unit is provided with a cavity shared by the first PMUT and the second PMUT, the vibration part of the corresponding PMUT is positioned in the cavity, or the circuit protection layer is jointed with the PMUT supporting layer through the metal bonding layer, and a cavity shared by the first PMUT and the second PMUT is arranged among the metal bonding layer, the circuit protection layer and the PMUT supporting layer.

6. The micromachined ultrasonic transducer structure of claim 5, wherein:

the transistor cell includes a plurality of electrical connection layers within a circuit protection layer;

the micromachined ultrasonic transducer structure also includes a plurality of conductive vias that electrically connect the electrode layers of the first and second PMUTs with corresponding electrical connection layers.

7. The micromachined ultrasonic transducer structure of claim 6, wherein:

the metal bonding layer forms a portion of a corresponding conductive via.

8. The micromachined ultrasonic transducer structure of any of claims 1-3, wherein:

the first PMUT and the second PMUT are arranged on both sides of the PMUT carrier layer spaced apart from each other in the lateral direction, and the micromechanical ultrasound transducer structure is provided with cavities for the first PMUT and the second PMUT, respectively.

9. The micromachined ultrasonic transducer structure of 8, further comprising:

the transistor unit comprises a transistor substrate, a transistor and a circuit protection layer covering the transistor, wherein the circuit protection layer faces the PMUT unit, and the circuit protection layer is connected with the PMUT unit.

10. The micromachined ultrasonic transducer structure of 9, wherein:

the PMUT bearing layer is a PMUT supporting layer, and the first PMUT and the second PMUT are arranged on two sides of the PMUT supporting layer;

The circuit protection layer is directly connected with the PMUT supporting layer or is connected with the PMUT supporting layer through a bonding layer, one side of the circuit protection layer facing the PMUT unit is respectively provided with cavities for the first PMUT and the second PMUT, and the vibration part of the corresponding PMUT is positioned in the cavities; or the circuit protection layer is bonded with the PMUT support layer by a metal bonding layer, the metal bonding layer defines at least one part of the transverse boundary of the cavity for the first PMUT and the second PMUT, and the cavity for the first PMUT and the second PMUT is arranged between the circuit protection layer and the PMUT support layer.

11. The micromachined ultrasonic transducer structure of 9, wherein:

the PMUT bearing layer includes a substrate layer, one of the first PMUT and the second PMUT is disposed on one side of the substrate layer, the other of the first PMUT and the second PMUT is disposed on the other side of the substrate layer, the substrate layer is thinned or removed at a position corresponding to the one PMUT to facilitate vibration of a vibrating portion of the one PMUT, and a cavity for the other PMUT is disposed in the substrate layer;

the circuit protection layer is bonded to the substrate layer, and a side of the circuit protection layer facing the PMUT cell is provided with a cavity for the one PMUT.

12. The micromachined ultrasonic transducer structure of claim 11, wherein:

the micromechanical ultrasonic transducer structure further comprises: a PMUT support layer for the one PMUT, and/or a PMUT support layer for the other PMUT.

13. The micromachined ultrasonic transducer structure of 9, wherein:

the PMUT carrier layer includes an SOI structure including a substrate layer, an oxide layer, and a silicon film layer, one of the first PMUT and the second PMUT being disposed on a silicon film layer side, and the other of the first PMUT and the second PMUT being disposed on a substrate layer side, a cavity for the other PMUT being disposed in the substrate layer, the substrate layer being thinned or removed at a position corresponding to the one PMUT so as to facilitate vibration of a vibration portion of the one PMUT;

the circuit protection layer is directly bonded to the silicon membrane layer, and a side of the circuit protection layer facing the PMUT cell is provided with a cavity for the one PMUT.

14. The micromachined ultrasonic transducer structure of any of claims 9-13, wherein:

15. The micromachined ultrasonic transducer structure of claim 14, wherein:

the metal bonding layer forms a portion of a corresponding conductive via.

16. The micromachined ultrasonic transducer structure of claim 5 or 9, wherein:

the transistor cell includes one of a CMOS cell, a BiMOS cell, and a BCD cell.

17. The micromachined ultrasonic transducer structure of 1, wherein:

the PMUT bearing layer material is the same or different metal with the material of the first electrode layer or the second electrode layer; or the PMUT bearing layer material is an insulating material or a semiconductor material, such as silicon, silicon dioxide, silicon nitride, aluminum nitride and the like.

18. The micromachined ultrasonic transducer structure of claim 17, wherein:

the PMUT bearing layer material is silicon, silicon dioxide, silicon nitride or aluminum nitride.

19. The micromachined ultrasonic transducer structure of 1, wherein:

the absolute value of the piezoelectric coefficient of the piezoelectric layer of the first PMUT is larger than 1C/m ² The method comprises the steps of carrying out a first treatment on the surface of the And/or

The piezoelectric layer of the second PMUT has a dielectric constant less than 1200.

20. The micromachined ultrasonic transducer structure of 19, wherein:

the absolute value of the piezoelectric coefficient of the piezoelectric layer of the first PMUT is larger than 5C/m ² The method comprises the steps of carrying out a first treatment on the surface of the And/or

The piezoelectric layer of the second PMUT has a dielectric constant less than 100.

21. A method of manufacturing a micromechanical ultrasound transducer structure, comprising the steps of:

wherein:

22. The method of claim 21, wherein:

23. The method of claim 22, wherein:

providing a PMUT cell coupled to a circuit protection layer of a transistor cell includes the steps of: forming one of a first PMUT and a second PMUT on one side of a PMUT support layer, bonding the one side of a PMUT carrier layer with a circuit protection layer, and forming the other one of the first PMUT and the second PMUT on the other side of the PMUT carrier layer; or alternatively

Providing a PMUT cell coupled to a circuit protection layer of a transistor cell includes the steps of: one of the first PMUT and the second PMUT is formed on one side of the PMUT support layer, the other of the first PMUT and the second PMUT is formed on the other side of the PMUT carrier layer, and the one side of the PMUT carrier layer is bonded to the circuit protection layer.

24. The method of claim 23, wherein:

such that the first PMUT and the second PMUT are at least partially opposite in a thickness direction of the PMUT support layer.

25. The method according to claim 24, wherein:

the PMUT bearing layer is a PMUT supporting layer;

the side of the circuit protection layer facing the PMUT unit is provided with a cavity shared by the first PMUT and the second PMUT, and the side of the PMUT support layer is directly jointed with the circuit protection layer; or the circuit protection layer is connected with the PMUT supporting layer through a metal bonding layer, and a cavity shared by the first PMUT and the second PMUT is arranged among the metal bonding layer, the circuit protection layer and the PMUT supporting layer.

26. The method of claim 23, wherein:

in the step of forming another PMUT on the other side of the PMUT carrier layer, the another PMUT and the one PMUT are disposed on both sides of the PMUT carrier layer so as to be spaced apart from each other in the lateral direction.

27. The method of claim 26, wherein:

the PMUT bearing layer is a PMUT supporting layer, and cavities for the first PMUT and the second PMUT are respectively arranged on one side of the circuit protection layer, which faces the PMUT unit;

in the step of bonding the one side of the PMUT carrier layer with the circuit protection layer, causing a vibrating portion of the one PMUT to be within a cavity for the one PMUT;

In the step of forming the further PMUT on the other side of the PMUT carrier layer, the vibrating portion of the further PMUT is made to correspond to the position of the cavity for the further PMUT.

28. The method of claim 26, wherein:

the PMUT bearing layer comprises a substrate layer, and a cavity for one PMUT is arranged on one side of the circuit protection layer, which faces the PMUT unit;

in the step of bonding the one side of the PMUT carrier layer with the circuit protection layer, bonding the circuit protection layer with the substrate layer, and the vibrating portion of the one PMUT being within the cavity for the one PMUT;

the step of forming the further PMUT on the other side of the PMUT carrier layer comprises: providing a cavity for the another PMUT on the substrate layer, and causing the vibrating portion of the another PMUT to correspond to the location of the cavity for the another PMUT;

the method further comprises the steps of: the substrate layer is thinned or removed at a position corresponding to the one PMUT to facilitate vibration of the vibrating portion of the one PMUT.

29. The method of claim 26, wherein:

the PMUT bearing layer comprises an SOI structure, wherein the SOI structure comprises a substrate layer, an oxide layer and a silicon membrane layer, and a cavity for one PMUT is arranged on one side of the circuit protection layer facing the PMUT unit;

In the step of bonding the one side of the PMUT carrier layer with the circuit protection layer, the circuit protection layer is directly bonded with the silicon membrane layer, and the vibrating portion of the one PMUT is within the cavity for the one PMUT;

30. The method of claim 21, wherein:

31. The method of any one of claims 23-30, wherein:

the method further comprises the steps of: a plurality of conductive vias are provided that electrically connect the electrode layers of the first PMUT and the second PMUT with corresponding electrical connection layers.

32. The method of any one of claims 23-30, wherein:

providing a transistor cell includes providing a transistor wafer formed with a plurality of the transistor cells based on a MEMS process;

providing a PMUT cell coupled to a circuit protection layer of a transistor cell includes: providing a PMUT wafer, wherein the PMUT wafer is formed with a plurality of PMUT units based on MEMS technology;

the method further comprises the steps of: dicing is performed to form a micromechanical ultrasound transducer structure comprising a single PMUT cell and a single transistor cell.

33. The method of claim 21, wherein:

the absolute value of the piezoelectric coefficient of the piezoelectric layer of the first PMUT is larger than 1C/m ₂ The method comprises the steps of carrying out a first treatment on the surface of the And/or

34. The method of claim 33, wherein:

the absolute value of the piezoelectric coefficient of the piezoelectric layer of the first PMUT is larger than 5C/m ₂ The method comprises the steps of carrying out a first treatment on the surface of the And/or

35. An electronic device comprising a micromechanical ultrasound transducer structure according to any of claims 1-20 or a micromechanical ultrasound transducer structure manufactured according to the manufacturing method of any of claims 21-34.

36. The electronic device of claim 35, wherein:

The electronic device includes at least one of: ultrasonic imaging instrument, ultrasonic range finder, ultrasonic fingerprint sensor, nondestructive inspection instrument, flowmeter, force sense feedback equipment and smoke alarm.

Although embodiments of the present invention have been shown and described, it would be appreciated by those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the claims and their equivalents.

Claims

1. A micromechanical ultrasound transducer structure comprising:

wherein:

2. The micromachined ultrasonic transducer structure of claim 1, wherein:

3. The micromachined ultrasonic transducer structure of claim 1, wherein:

4. A micromechanical ultrasound transducer structure as claimed in any of claims 1-3, wherein:

5. The micromachined ultrasonic transducer structure of claim 4, wherein:

the PMUT bearing layer is a PMUT supporting layer;

6. The micromachined ultrasonic transducer structure of claim 5, wherein:

7. The micromachined ultrasonic transducer structure of claim 6, wherein:

the metal bonding layer forms a portion of a corresponding conductive via.

8. A micromechanical ultrasound transducer structure as claimed in any of claims 1-3, wherein:

9. The micromachined ultrasonic transducer structure of claim 8, further comprising:

10. The micromachined ultrasonic transducer structure of claim 9, wherein:

11. The micromachined ultrasonic transducer structure of claim 9, wherein:

12. The micromachined ultrasonic transducer structure of claim 11, wherein:

13. The micromachined ultrasonic transducer structure of claim 9, wherein:

15. The micromachined ultrasonic transducer structure of claim 14, wherein:

the metal bonding layer forms a portion of a corresponding conductive via.

16. The micromachined ultrasonic transducer structure of claim 5 or 9, wherein:

the transistor cell includes one of a CMOS cell, a BiMOS cell, and a BCD cell.

17. The micromachined ultrasonic transducer structure of claim 1, wherein:

18. The micromachined ultrasonic transducer structure of claim 17, wherein:

19. The micromachined ultrasonic transducer structure of claim 1, wherein:

20. The micromachined ultrasonic transducer structure of claim 19, wherein:

wherein:

22. The method according to claim 21, wherein:

23. The method according to claim 22, wherein:

24. The method according to claim 23, wherein:

25. The method according to claim 24, wherein:

the PMUT bearing layer is a PMUT supporting layer;

26. The method according to claim 23, wherein:

27. The method according to claim 26, wherein:

28. The method according to claim 26, wherein:

29. The method according to claim 26, wherein:

30. The method according to claim 21, wherein:

31. The method of any one of claims 23-30, wherein:

32. The method of any one of claims 23-30, wherein:

33. The method according to claim 21, wherein:

34. The method according to claim 33, wherein:

35. An electronic device comprising a micromechanical ultrasound transducer structure according to any of claims 1-20, or a micromechanical ultrasound transducer structure manufactured according to the manufacturing method of any of claims 21-34.

36. The electronic device of claim 35, wherein: