CN117539393A

CN117539393A - Data storage method, data storage device and electronic equipment

Info

Publication number: CN117539393A
Application number: CN202311518637.5A
Authority: CN
Inventors: 刘磊
Original assignee: Vivo Mobile Communication Co Ltd
Current assignee: Vivo Mobile Communication Co Ltd
Priority date: 2023-11-14
Filing date: 2023-11-14
Publication date: 2024-02-09

Abstract

The application discloses a data storage method, a data storage device and electronic equipment, and belongs to the technical field of data storage. The method comprises the following steps: acquiring the free storage capacity of a first storage space of a target memory; determining a storable data amount according to the free storage capacity of the first storage space; storing first data to the first storage space; the data volume of the first data is matched with the storable data volume; the target memory comprises a first storage space and a second storage space, wherein the unit storage data volume of the first storage space is smaller than that of the second storage space, and the storage data of the first storage space is transferred to the second storage space under the condition that the data transfer condition is met.

Description

Data storage method, data storage device and electronic equipment

Technical Field

The application belongs to the technical field of data storage, and particularly relates to a data storage method, a data storage device and electronic equipment.

Background

In the related art, the universal flash memory (Universal Flash Storage, UFS) technology is continuously evolved from a single layer Cell (Single Level Cell, SLC) to a Multi Level Cell (MLC), to a triple layer Cell (Triple Level Cell, TLC), and to a Quad Level Cell (QLC), so that the stored binary bits (bit) of the flash memory (nand) are changed to 1, 2, 3, 4 in a physically same unit area, and thus, the evolved nand can store more and more data in a unit area, and the production cost of the evolved nand is lower and lower under the same capacity.

However, as more and more data is stored in a unit area, under the same voltage threshold, SLC nand stores 1 bit to represent 0 and 1, and only 2 gear decisions are required; whereas MLC nand stores 2 bits to distinguish and identify 00/01/10/11 four data, and only 4 gears are needed to distinguish and store data; by analogy, TLC nand stores 3 bits (corresponding to one of the data 000/001/010/011/100/101/110/111) and requires 8 gears to distinguish the stored data, while QLC nand stores 4 bits and requires 16 gears to distinguish the stored data. This finer division of QLC bond requires more complex processing to ensure data read and write accuracy, resulting in a much slower read and write speed for QLC bond than TLC bond.

In the related art, an application program in an electronic device writes data into a QLC nand at a bottom layer, and if other operations on the electronic device are received in the process of writing data into the QLC nand, the response time delay of the operations is greatly increased due to the slow reading and writing speed of the QLC nand, which can cause the problem of jamming of the electronic device.

Disclosure of Invention

The embodiment of the application aims to provide a data storage method, a data storage device and electronic equipment, which can reduce the probability of the electronic equipment being blocked.

In a first aspect, an embodiment of the present application provides a data storage method, including:

acquiring the free storage capacity of a first storage space of a target memory;

determining a storable data amount according to the free storage capacity of the first storage space;

storing first data to the first storage space; the data volume of the first data is matched with the storable data volume;

the target memory comprises a first storage space and a second storage space, wherein the unit storage data volume of the first storage space is smaller than that of the second storage space, and the storage data of the first storage space is transferred to the second storage space under the condition that the data transfer condition is met.

In a second aspect, embodiments of the present application provide a data storage device, the device including:

the first acquisition module is used for acquiring the free storage capacity of the first storage space of the target memory;

the first determining module is used for determining the storable data amount according to the free storage capacity of the first storage space;

the first storage module is used for storing first data into the first storage space; the data volume of the first data is matched with the storable data volume;

In a third aspect, embodiments of the present application provide an electronic device comprising a processor and a memory storing a program or instructions executable on the processor, which when executed by the processor, implement the steps of the method as described in the first aspect.

In a fourth aspect, embodiments of the present application provide a readable storage medium having stored thereon a program or instructions which when executed by a processor implement the steps of the method according to the first aspect.

In a fifth aspect, embodiments of the present application provide a chip, where the chip includes a processor and a communication interface, where the communication interface is coupled to the processor, and where the processor is configured to execute a program or instructions to implement a method according to the first aspect.

In a sixth aspect, embodiments of the present application provide a computer program product stored in a storage medium, the program product being executable by at least one processor to implement the method according to the first aspect.

In the embodiment of the application, the target memory is divided into the first memory space and the second memory space, the unit memory data size of the first memory space is smaller than the unit memory data size of the second memory space, the storable data size is determined according to the free memory capacity of the first memory space, the first data is stored in the first memory space, the data size of the first data is matched with the storable data size, thus, the data can be stored in the memory space with smaller unit memory data size first, and then transferred to the memory space with larger unit memory data size later, and the problem that the electronic equipment is blocked due to low data reading and writing speed caused by directly storing the data in the second memory space with larger unit memory data size during data storage is avoided.

Drawings

FIG. 1 is a flow chart of a data storage method provided in an embodiment of the present application;

fig. 2a is one of schematic diagrams of a UFS device writing flow in the related art;

Fig. 2b is a schematic diagram of a second related art UFS device writing process;

fig. 3a is one of the schematic diagrams of a UFS device writing process in an embodiment of the present application;

fig. 3b is a schematic diagram of a second UFS device writing process in an embodiment of the present application;

FIG. 4 is a schematic diagram of a data storage device according to an embodiment of the present disclosure;

fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present application;

fig. 6 is a schematic hardware structure of an electronic device according to an embodiment of the present application.

Detailed Description

Technical solutions in the embodiments of the present application will be clearly described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application are within the scope of the protection of the present application.

The terms first, second and the like in the description and in the claims, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the application are capable of operation in sequences other than those illustrated or otherwise described herein, and that the objects identified by "first," "second," etc. are generally of a type and do not limit the number of objects, for example, the first object may be one or more. Furthermore, in the description and claims, "and/or" means at least one of the connected objects, and the character "/", generally means that the associated object is an "or" relationship.

The data storage method, the data storage device and the related equipment provided by the embodiment of the application are described in detail below through specific embodiments and application scenes thereof with reference to the accompanying drawings.

Referring to fig. 1, a flowchart of a data storage method is provided in an embodiment of the present application. As shown in fig. 1, the data storage method includes the steps of:

step 101, acquiring the free storage capacity of the first storage space of the target memory.

Step 102, determining the storable data amount according to the free storage capacity of the first storage space.

Step 103, storing first data into the first storage space; the data volume of the first data is matched with the storable data volume; the target memory comprises a first memory space and a second memory space, wherein the unit memory data volume of the first memory space is smaller than the unit memory data volume of the second memory space, and the memory data of the first memory space is transferred to the second memory space under the condition that the data transfer condition is met.

In some embodiments, the execution body of the data storage method provided in the embodiments of the present application may be an electronic device or a data storage apparatus.

Of course, the execution body of the data storage method provided in the embodiments of the present application may be any other system, module or apparatus that needs to write data into the target memory, which is not specifically limited herein.

For convenience of explanation, in the embodiment of the present application, an electronic device is taken as an example to illustrate an execution body of the data storage method provided in the embodiment of the present application.

In some embodiments, an application program in the electronic device may send a first command to the target memory, and receive a first response corresponding to the first command, so as to obtain an idle storage capacity carried in the first response, where the first command is used to query an available capacity of the first storage space. Applications in the electronic device such as file copy programs and the like.

In some implementations, the target memory in the embodiments of the present application may include UFS (Universal Flash Storage ). Of course, the target memory in the embodiments of the present application may further include other types of memories, so that the first storage space or the second storage space in the embodiments of the present application may be generated by using the other types of memories, which is not specifically limited herein.

For convenience of explanation, the UFS is taken as an example of the target memory in the embodiment of the present application.

In some embodiments, an upper layer application program in the electronic device may send a first command to an underlying driver (driver) of the target memory, where the underlying driver may query an available capacity of a first storage space in the target memory according to the first command, and feed back to a sending end of the first command through a first response.

For example, the bottom driver sends a query (check) command to the target memory when receiving the first command, where the check command is used to query the available capacity of the first storage space in the target memory, and when the query obtains the free storage capacity of the first storage space, the first response is fed back, where the first response includes the free storage capacity of the first storage space.

In some embodiments, the data amount of the first data matches the storable data amount, and may be that the data amount of the first data is less than or equal to the storable data amount, so that the first data can be stored in the first storage space entirely.

In some embodiments, the transferring the stored data of the first storage space to the second storage space when the data transfer condition is satisfied may represent: the first storage space may be a storage space corresponding to a buffer (buffer) in the target memory. For example, the first memory space may include a memory space of at least one of SLC buffer, MLC buffer, and TLC buffer. In this way, the first storage space with higher read-write speed is utilized to accelerate the speed of writing data into the target memory, and under the condition that the data transfer condition is met, the stored data of the first storage space is transferred to the second storage space, so that the data is finally stored in the second storage space with larger stored data quantity.

Alternatively, when transferring the stored data of the first storage space to the second storage space, the first storage space may be emptied, so as to reuse the first storage space as a cache for subsequently writing data to the target memory.

In some embodiments, the method further comprises:

and under the condition that the free storage capacity of the first storage space is smaller than or equal to a second threshold value, judging that the first storage space meets the data transfer condition.

The second threshold may be user-set or preconfigured, and is not specifically limited herein. For example, in a case where the first storage space is full or the free storage capacity of the first storage space is less than 80%, it is determined that the first storage space satisfies the data transfer condition.

In this embodiment, the meeting the data transfer condition may include: the free storage capacity of the first storage space is less than or equal to a second threshold. Therefore, when the available storage capacity of the first storage space is insufficient, the data in the first storage space can be transferred in time, so that the data written into the target memory can be buffered in time by utilizing the available storage capacity of the first storage space.

In other embodiments, the meeting the data transfer condition may include: the second storage space is in an idle state.

For example, the stored data of the first storage space may be transferred to the second storage space without a user operation invoking the second storage space.

In this way, it is possible to avoid a decrease in the speed of user operation response due to a slow read/write speed of the second storage space in transferring the storage data of the first storage space to the second storage space.

Of course, the above two data transfer conditions may be combined, for example, in a case where the second storage space is in an idle state and the idle storage capacity of the first storage space is less than or equal to a second threshold, it is determined that the first storage space satisfies the data transfer condition.

In some embodiments, the unit amount of stored data of the first storage space that is smaller than the unit amount of stored data of the second storage space may be: the number of storage bits per unit area of the first storage space is smaller than the number of storage bits per unit area of the second storage space.

For example, assuming that the first memory space is an SLC memory space and the second memory space is a QLC memory space, the SLC stores 1 bit per unit area to represent 0 and 1, and the QLC stores 4 bits per unit area to distinguish 16 kinds of data such as 00000, 0001, 0010, 0011, etc. under the same voltage threshold. In this way, QLC can store more data than SLC under the same physical area, but since QLC stores 4 bits per unit area to distinguish 16 kinds of data such as 00000, 0001, 0010, 0011, etc., in the process of reading and writing data to QLC, more data processing is required in order to distinguish finer data in QLC, thereby causing the read and write speed of QLC to be slower than that of SLC.

Similarly, the reading and writing speed of the QLC is also slower than that of the MLC and TLC, and for convenience of explanation, in this embodiment of the present application, the first storage space is generally taken to include at least one of SLC, MLC, TLC, and the second storage space is taken as an example of QLC, which is not specifically limited herein.

Although the bottom layer of the QLC layer is a QLC medium for the QLC device, the QLC layer can be used as at least one of SLC, MLC, TLC when applied, and if the QLC layer is used as SLC or MLC or TLC with higher read/write speed, the data storage capacity of the QLC with the same area is reduced. At least one of the SLC buffer, the MLC buffer, and the TLC buffer in the embodiment of the present application may be a buffer formed based on QLC nand, for example, firmware (firmware) of the target memory may be used as the SLC buffer, the MLC buffer, or the TLC buffer by adjusting parameters of a part of storage areas in the QLC nand.

Of course, at least one of SLC band, MLC band, and TLC band may be set in the target memory, and QLC band may be set, so that at least one of SLC buffer, MLC buffer, and TLC buffer may be formed using SLC band, MLC band, and TLC band.

For convenience of explanation, in the following embodiments of the present application, the storage area of the partial QLC band is taken as at least one of SLC buffer, MLC buffer, and TLC buffer for illustration, which is not specifically limited herein.

In some embodiments, the first write command may be sent to the target memory to control the target memory to write the first data smaller than or equal to the storable data amount into the first storage space, so that the first data to be written indicated by the first write command may be written into the first storage space entirely.

In some embodiments, in a case where the storable data capacity of the first storage space is queried, a first write command may be sent to the target memory based on the storable data capacity, for example, a sending timing of the first write command may be determined based on the storable data capacity, and/or an amount of data to be written indicated by the first write command may be determined based on the storable data capacity, and so on.

It should be noted that, in the related art, when the data volume of the data to be written exceeds the capacity of the first storage space, the remaining data is written into the QLC storage space, and at this time, if an operation of calling the QLC storage space, especially an operation of a large data volume, such as an operation of continuously calling the data in the QLC storage space, a system stuck phenomenon may be caused.

For example, under the condition of ensuring the user capacity, in the related art, part of QLCs are respectively regarded as SLC buffer, MLC buffer and TLC buffer, wherein the capacity sizes of three buffers and QLCs can be reasonably adjusted according to the idle QLC capacity of the target memory, such as the remaining 60G QLC capacity, the target memory firmware is internally adjusted to 1G SLC buffer,1G MLC buffer,1G TLC buffer, and the remaining QLC capacity is QLC capacity. As shown in fig. 2a and 2b, when data to be written is sent to the target memory, the target memory firmware (firmware) stores control data to SLC buffer, MLC buffer, and TLC buffer. The use sequence of the SLC buffer, the MLC buffer and the TLC buffer is as follows: in the process of writing data into a target memory, the data to be written is written into the SLC buffer first, the data to be written is written into the MLC buffer under the condition that the SLC buffer is full, and the data to be written is written into the TLC buffer under the condition that the MLC buffer is full.

In one case, if the SLC buffer, the MLC buffer, and the TLC buffer are not used up, and the target memory is idle, the data in the SLC buffer, the MLC buffer, and the TLC buffer are re-translated (flush) to the QLC nand in the background of the target memory, so as to store the access data on the QLC nand (the set data is finally stored on the QLC nand), and the SLC buffer, the MLC buffer, and the TLC buffer are reused as buffers for the following data operations due to the release of the stored data.

For example, when the copy file is smaller or the target memory is not frequently called, the performance of SLC, MLC or TLC is used, and the system frequently lets the target memory go in and out of an idle state (e.g. H8 state), so that the SLC buffer, the MLC buffer and the TLC buffer are released in time after being temporarily occupied, and the operation at this time basically does not touch the QLC performance, and does not affect the user experience.

In another case, if the SLC buffer, the MLC buffer, and the TLC buffer are used up and the data to be written is still being continuously sent, at this time, since there are no more SLC buffer, MLC buffer, and TLC buffer, the target memory firmware will directly write the data to be written onto the QLC nand, and the QLC performance will be touched at this time, so that the write delay of the data to be written is greatly increased because of the poor read-write performance of the underlying QLC nand, until the data is completely written, and when the target memory is idle, the data in the SLC buffer, the MLC buffer, and the TLC buffer will be rebuffered to the QLC nand, and be released as the following data caching operation. Under the condition that the buffer is used up, the bare performance of the QLC is touched, so that if the user operation is received in the process, the time delay of the user operation is improved, and the user experience is reduced.

For example, in an application scenario of copying a large file (such as a photo, a video, a document, and a compressed file), as shown in fig. 2a and fig. 2b, in the related art, copied data may be sent to SLC buffer, MLC buffer, and TLC buffer first, after the buffers are used up, if the system is not idle, there is no buffer with good writing speed as a support, the target memory firmware (firmware) receives the data to be written at this time, and detects that the buffer is used up, all the next data to be written will be written to QLC, at this time, the QLC performance is touched, when the QLC performance is touched, the growth speed of the progress bar can be obviously perceived from the file copy progress bar, the buffer is slow to QLC after the writing is completed, the writing speed of QLC is slow, this time is represented by the response delay (latency) of QLC to the command, and the system is not started up due to the slow response of SLC buffer and MLC buffer, or the system is released, the situation is not affected when the user is not able to respond in time, and the situation of waiting for the system is significantly is not needed to be relieved.

As is clear from the above, in the related art, in the case where a user operates a mobile phone, particularly, an operation involving a large amount of data, no special control is performed on writing of application layer data, such as user copy data, which is continuously transmitted to a memory so that the memory stores the data in an underlying storage medium, and before QLC, such an operation is performed, the underlying memory can be supported (handle) without causing a special influence on the user operation. However, in the QLC, in such a continuous operation, the underlying performance of the QLC is touched, and thus the user experience is affected due to the low reading and writing speed of the QLC.

In the embodiment of the present application, even in the application scenario involving a large amount of data operation or frequent call of the target memory, only the first storage space with a fast read-write speed is touched, but the second storage space with a slow read-write speed is not touched, so that the response speed of the user operation can be improved, and the probability of system blocking is reduced.

In this embodiment of the present application, the application scenario related to the operation with a large data amount or the frequent call of the target memory may be a downloaded video application scenario, an application scenario where an application program is continuously installed, an application scenario where a large file is copied, an application scenario where a photo or a video is shot by using a camera, and so on.

For example, video data is stored in a target memory in an application scene where video is downloaded, data packets of an installed application program are stored in the target memory in an application scene where an application program is continuously installed, copied file data is stored in the target memory in an application scene where a large file is copied, and photographed photo or video data is stored in the target memory in an application scene where a photo or video is photographed by a camera.

In one case, when the data amount of the data to be written is smaller than or equal to the storable data amount, all the data to be written may be sent to the driver of the target memory through the first write command, so that all the data to be written may be written into the first storage space.

In another case, when the data amount of the data to be written is greater than the storable data amount, the data to be written may be sent to the driver of the target memory in batches, so that the data amount of the data for performing the write operation in each batch is smaller than or equal to the storable data amount of the first storage space, and thus, the situation that the target memory continues to receive the data to be written and directly writes the data to be written into the second storage space after the first storage space is fully written can be avoided.

In some embodiments, when the target memory is idle, the data in the first storage space may be translated (flush) into the second storage space, and the first storage space may be emptied, so as to continue to use the first storage space to cache the subsequent data to be written.

In other embodiments, the first storage space includes a first storage area and a second storage area, the unit storage data amount of the first storage area is smaller than the unit storage data amount of the second storage area, and the free storage capacity of the first storage space is the free storage capacity of the first storage area;

the storing the first data in the first storage space includes:

storing the first data to the first storage area;

the method further comprises the steps of:

and transferring the storage data of the first storage area to the second storage area under the condition that the free storage capacity of the first storage area is smaller than or equal to a first threshold value.

The first threshold may be set by the user or preconfigured, and is not specifically limited herein. For example, in the case where the free storage capacity of the first storage area is 0, the storage data of the first storage area is transferred to the second storage area.

For example, as shown in fig. 3a and 3b, assuming that the first storage area is an SLC buffer and the second storage area is a TLC buffer, if the data size of the data to be written is greater than the available capacity of the SLC buffer in the process of writing the data into the target memory, after the available capacity of the SLC buffer is queried, a first write command may be sent to the target memory to write the data matching the available capacity of the SLC buffer, and thereafter, the data in the SLC buffer is dumped to the TLC buffer and the SLC buffer is emptied, so that the data to be written into the SLC buffer may be continued after the SLC buffer is emptied.

Optionally, when the target memory is in an idle state, the data in the second storage area may be translated (flush) into the second storage space, and the second storage area may be emptied, so that the data in the first storage area may be dumped by using the second storage area, and the first storage area may be emptied in time.

In this embodiment, when the free storage capacity of the first storage area is less than or equal to the first threshold, the second storage area may be used to dump the data in the first storage area, so as to empty the first storage area, so that the first storage area is convenient to be used to continuously buffer the subsequent data to be written. And compared with the mode of using the second storage space to dump the data of the first storage area, the mode of using the second storage area to dump the data of the first storage area can avoid touching the read-write performance of the second storage space in the dump process.

Optionally, if the free storage capacity of the first storage area is less than or equal to the first threshold, judging whether the second storage space is in a free state, and if so, dumping the cache data in the first storage area to the second storage space; if not, the cache data in the first storage area is dumped to the second storage area, and when the second storage space is in an idle state, the cache data in the second storage area is dumped to the second storage space.

Therefore, under the condition that the free storage capacity of the first storage area is insufficient and the second storage area is occupied, the buffer data in the first storage area can be dumped in time, the first storage area is emptied in time, and buffer preparation is carried out for the subsequent storage data.

As an optional implementation manner, the moment of storing the first data in the first storage space is a first moment; the method further comprises the steps of:

acquiring the free storage capacity of the first storage space of the target memory at a second moment; the time interval between the second time and the first time is a target time interval.

The second time is later than the first time, and the interval time between the first time and the second time is the target time interval, so that the first time is the time when the second time is the last time to store data in the first storage space of the target memory.

It should be noted that, after the free storage capacity of the first storage space of the target memory is acquired at the second time, if there is data to be written into the target memory, second data stored in the first storage space of the target memory may be determined according to the free storage capacity acquired at the second time, so that the data size of the second data is smaller than or equal to the current storable data size of the first storage space.

In some embodiments, the target time interval may be set by the system, or may be calculated according to a dump speed of the first storage space (or the first storage area), and a duration of emptying the first storage space (or the first storage area).

Of course, in addition to the above manner of dumping the data in the first storage space into the second storage space or dumping the data in the first storage area into the second storage area, the first storage space may be emptied in other manners, and in this case, the target time interval may be a time required for emptying the first storage space (or the first storage area), which is not limited herein specifically.

In some embodiments, after the first storage space is fully written through the first writing command, waiting for a target time interval, querying the free storage capacity of the first storage space again, continuing to write the rest data to be written into the first storage space based on the free storage capacity of the first storage space, and cycling in this way, so that the first storage space is cyclically fully written and emptied.

For example, assume that the first storage space includes SLC buffers and TLC buffers and the second storage space includes QLC nand. Assume that the memory of a mobile phone comprises 1G SLC buffer, 1G TLC buffer and QLC nand, wherein the writing speed of the SLC buffer is 2000MB/s, the writing speed of the TLC buffer is 500MB/s, and the writing speed of the QLC nand is 20MB/s.

If the related art writing scheme shown in fig. 2a and 2b is used, the time required for writing 3G data into the memory is as follows: 1000/2000+1000/500+1000/20=52.5 s. In this process, QLC performance is touched, and therefore if the mobile phone is continuously operated in this process, system jam is caused.

If the embodiment of the present application shown in fig. 3a and 3b is used, assuming that the time for flushing SLC buffer and moving buffer data to TLC buffer is 2s, the time required for writing 3G data into the memory is: 1000/2000+2+1000/2000+2+1000/2000=5.5 s. And in the process, only the SLC performance and the TLC performance are touched, but the QLC performance is not touched, so that even if the mobile phone is continuously operated in the process, the system is not blocked.

As can be seen from the examples of the related technical schemes shown in fig. 2a and fig. 2b and the technical schemes of the present application shown in fig. 3a and fig. 3b, in the embodiment of the present application, by increasing the interaction between the application program and the underlying storage, after the application program knows the buffer available capacity of the underlying storage, by controlling the sending timing of the write command and limiting the data amount of the written data to be written, the SLC buffer, MLC buffer or TLC buffer can be used to buffer the data, and when the memory is idle, the data can be buffered to QLC, so that the probability of touching the QLC performance is reduced, and the probability of system blocking is reduced.

In this embodiment, after the first data is written into the first storage space, the first storage space may wait for the first storage space to be emptied, and query the free storage capacity of the first storage space again, and based on the current free storage capacity of the first storage space, the remaining data to be written may continue to be written into the first storage space.

Optionally, the first command includes a data amount of data to be written to the target memory.

In some embodiments, the target memory may determine whether it is necessary to write data to the first storage space in batches based on the amount of data to be written to the target memory and the available capacity of the first storage space.

For example, when the data amount of the data to be written to the target memory is larger than the free storage capacity of the first storage space, it may be determined that the data needs to be written to the first storage space in batches.

In some embodiments, the target memory may determine a policy of emptying the first storage space according to a determination result of whether the data needs to be written to the first storage space in batches.

For example, in the case where data needs to be written to the first storage space in batches, the first storage area may be emptied as soon as possible by dumping the data in the first storage area into the second storage area. In the case that the data is not required to be written into the first storage space in batches, the first storage space can be emptied by dumping the data in the first storage space into the second storage space.

As an alternative embodiment, the first storage space includes at least one storage area, the second storage space includes at least one storage area, and the unit storage data amount is a storage data amount of each storage area;

the method further comprises the steps of:

And converting the unit storage data amount of at least one storage area of the second storage space into a target unit storage data amount, wherein the target unit storage data amount is the unit storage data amount of the storage area of the first storage space, under the condition that the free storage capacity of the first storage space is smaller than or equal to a third threshold value.

In some embodiments, the third threshold may be set by a user or preconfigured, and is not specifically limited herein.

For example, assume that the storage area of the second storage space is a QLC storage area, and the storage area of the first storage space includes at least one of: SLC storage area and TLC storage area. In the case that the free storage capacity of the SLC storage area and the TLC storage area is smaller than the third threshold (e.g., 80%), the parameters of the partial QLC storage area may be adjusted so that the QLC storage area performs data reading and writing in the SLC storage area or the TLC storage area.

In this embodiment, when the free storage capacity of the first storage space is less than or equal to the third threshold, at least one storage area of the second storage space may be used as a storage area of the first storage space, so that the capacity of the first storage space may be expanded, and a problem that cache data cannot be written into the first storage space continuously due to the fact that the first storage space is fully written is avoided.

According to the data storage method provided by the embodiment of the application, the execution body can be a data storage device. In the embodiment of the present application, a method for executing data storage by using a data storage device is taken as an example, and the data storage device provided in the embodiment of the present application is described.

Referring to fig. 4, a data storage device 400 provided in an embodiment of the present application includes the following modules:

a first obtaining module 401, configured to obtain a free storage capacity of a first storage space of the target memory;

A first determining module 402, configured to determine a storable data amount according to a free storage capacity of the first storage space;

a first storage module 403, configured to store first data into the first storage space; the data volume of the first data is matched with the storable data volume;

Optionally, the first storage space includes a first storage area and a second storage area, the unit storage data volume of the first storage area is smaller than the unit storage data volume of the second storage area, and the free storage capacity of the first storage space is the free storage capacity of the first storage area;

the first storage module 403 is specifically configured to:

storing the first data to the first storage area;

the data storage device 400 further includes:

and the transfer module is used for transferring the storage data of the first storage area to the second storage area under the condition that the free storage capacity of the first storage area is smaller than or equal to a first threshold value.

Optionally, the time of storing the first data in the first storage space is a first time; the data storage device 400 further includes:

the second acquisition module is used for acquiring the free storage capacity of the first storage space of the target memory at a second moment; the time interval between the second time and the first time is a target time interval.

Optionally, the first storage space includes at least one storage area, the second storage space includes at least one storage area, and the unit storage data amount is a storage data amount of each storage area;

the data storage device 400 further includes:

the conversion module is used for converting the unit storage data volume of at least one storage area of the second storage space into a target unit storage data volume under the condition that the free storage capacity of the first storage space is smaller than or equal to a third threshold value, wherein the target unit storage data volume is the unit storage data volume of the storage area of the first storage space.

Optionally, the data storage device 400 further includes:

and the judging module is used for judging that the first storage space meets the data transfer condition under the condition that the free storage capacity of the first storage space is smaller than or equal to a second threshold value.

Optionally, the storage area of the first storage space includes at least one of: single-level cell SLC storage area, multi-level cell MLC storage area, and triple-level cell TLC storage area.

Optionally, the storage area of the second storage space is a multi-layer unit QLC storage area.

The data storage device 400 in the embodiment of the present application may be an electronic device, or may be a component in an electronic device, such as an integrated circuit or a chip. The electronic device may be a terminal, or may be other devices than a terminal. By way of example, the electronic device may be a mobile phone, tablet computer, notebook computer, palm computer, vehicle-mounted electronic device, mobile internet appliance (Mobile Internet Device, MID), augmented reality (augmented reality, AR)/Virtual Reality (VR) device, robot, wearable device, ultra-mobile personal computer, UMPC, netbook or personal digital assistant (personal digital assistant, PDA), etc., but may also be a server, network attached storage (Network Attached Storage, NAS), personal computer (personal computer, PC), television (TV), teller machine or self-service machine, etc., and the embodiments of the present application are not limited in particular.

The data storage device 400 in the embodiments of the present application may be a device having an operating system. The operating system may be an Android operating system, an ios operating system, or other possible operating systems, which are not specifically limited in the embodiments of the present application.

The data storage device 400 provided in this embodiment of the present application can implement each process implemented by the foregoing data storage method embodiment, and can achieve the same beneficial effects, so that repetition is avoided, and no further description is provided herein.

Optionally, as shown in fig. 5, the embodiment of the present application further provides an electronic device 500, including a processor 501 and a memory 502, where the memory 502 stores a program or an instruction that can be executed on the processor 501, and the program or the instruction implements each step of the above-mentioned data storage method embodiment when executed by the processor 501, and the steps achieve the same technical effects, so that repetition is avoided, and no further description is given here.

The electronic device in the embodiment of the application includes the mobile electronic device and the non-mobile electronic device described above.

Fig. 6 is a schematic hardware structure of an electronic device implementing an embodiment of the present application.

The electronic device 600 includes, but is not limited to: radio frequency unit 601, network module 602, audio output unit 603, input unit 604, sensor 605, display unit 606, user input unit 607, interface unit 608, memory 609, and processor 610.

Those skilled in the art will appreciate that the electronic device 600 may further include a power source (e.g., a battery) for powering the various components, which may be logically connected to the processor 610 by a power management system to perform functions such as managing charge, discharge, and power consumption by the power management system. The electronic device structure shown in fig. 6 does not constitute a limitation of the electronic device, and the electronic device may include more or less components than shown, or may combine certain components, or may be arranged in different components, which are not described in detail herein.

The processor 610 is configured to obtain a free storage capacity of the first storage space of the target memory;

the processor 610 is further configured to determine an amount of storable data based on a free storage capacity of the first storage space;

a processor 610, further configured to control the memory 609 to store first data into the first storage space; the data volume of the first data is matched with the storable data volume;

the processor 610, executing the control memory 609, stores first data into the first storage space, includes:

the control memory 609 stores the first data to the first storage area;

the processor 610 is further configured to control the memory 609 to transfer the storage data of the first storage area to the second storage area if the free storage capacity of the first storage area is less than or equal to a first threshold.

Optionally, the processor 610 is further configured to determine that the first storage space meets the data transfer condition when the free storage capacity of the first storage space is less than or equal to a second threshold.

Optionally, the time of storing the first data in the first storage space is a first time;

the processor 610 is further configured to obtain, at a second time, a free storage capacity of the first storage space of the target memory; the time interval between the second time and the first time is a target time interval.

the processor 610 is further configured to, when the free storage capacity of the first storage space is less than or equal to a third threshold, control the memory 609 to convert a unit storage data amount of at least one storage area of the second storage space into a target unit storage data amount, where the target unit storage data amount is the unit storage data amount of the storage area of the first storage space.

The electronic device 600 provided in this embodiment of the present application can realize the functions implemented by each module in the foregoing data storage device embodiment, and can obtain the same beneficial effects, so that repetition is avoided, and no further description is provided herein.

It should be understood that in the embodiment of the present application, the input unit 604 may include a graphics processor (Graphics Processing Unit, GPU) 6041 and a microphone 6042, and the graphics processor 6041 processes image data of still pictures or videos obtained by an image capturing apparatus (such as a camera) in a video capturing mode or an image capturing mode. The display unit 606 may include a display panel 6061, and the display panel 6061 may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like. The user input unit 607 includes at least one of a touch panel 6071 and other input devices 6072. The touch panel 6071 is also called a touch screen. The touch panel 6071 may include two parts of a touch detection device and a touch controller. Other input devices 6072 may include, but are not limited to, a physical keyboard, function keys (e.g., volume control keys, switch keys, etc.), a trackball, a mouse, a joystick, and so forth, which are not described in detail herein.

The memory 609 may be used to store software programs as well as various data. The memory 609 may mainly include a first storage area storing programs or instructions and a second storage area storing data, wherein the first storage area may store an operating system, application programs or instructions (such as a sound playing function, an image playing function, etc.) required for at least one function, and the like. Further, the memory 609 may include volatile memory or nonvolatile memory, or the memory 609 may include both volatile and nonvolatile memory. The nonvolatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable EPROM (EEPROM), or a flash Memory. The volatile memory may be random access memory (Random Access Memory, RAM), static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (ddr SDRAM), enhanced SDRAM (Enhanced SDRAM), synchronous DRAM (SLDRAM), and Direct RAM (DRRAM). Memory 609 in the present embodiment includes, but is not limited to, these and any other suitable types of memory.

The processor 610 may include one or more processing units; optionally, the processor 610 integrates an application processor that primarily processes operations involving an operating system, user interface, application programs, etc., and a modem processor that primarily processes wireless communication signals, such as a baseband processor. It will be appreciated that the modem processor described above may not be integrated into the processor 610.

The embodiment of the present application further provides a readable storage medium, where a program or an instruction is stored, and when the program or the instruction is executed by a processor, the processes of the embodiment of the data storage method are implemented, and the same technical effects can be achieved, so that repetition is avoided, and no further description is given here.

Wherein the processor is a processor in the electronic device described in the above embodiment. The readable storage medium includes computer readable storage medium such as computer readable memory ROM, random access memory RAM, magnetic or optical disk, etc.

The embodiment of the application further provides a chip, the chip includes a processor and a communication interface, the communication interface is coupled with the processor, the processor is used for running a program or an instruction, implementing each process of the data storage method embodiment, and achieving the same technical effect, so as to avoid repetition, and no further description is provided here.

It should be understood that the chips referred to in the embodiments of the present application may also be referred to as system-on-chip chips, chip systems, or system-on-chip chips, etc.

The embodiments of the present application provide a computer program product stored in a storage medium, where the program product is executed by at least one processor to implement the respective processes of the embodiments of the data storage method described above, and achieve the same technical effects, and are not repeated herein.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element. Furthermore, it should be noted that the scope of the methods and apparatus in the embodiments of the present application is not limited to performing the functions in the order shown or discussed, but may also include performing the functions in a substantially simultaneous manner or in an opposite order depending on the functions involved, e.g., the described methods may be performed in an order different from that described, and various steps may also be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solutions of the present application may be embodied essentially or in a part contributing to the prior art in the form of a computer software product stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk), comprising several instructions for causing a terminal (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the methods described in the embodiments of the present application.

The embodiments of the present application have been described above with reference to the accompanying drawings, but the present application is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those of ordinary skill in the art without departing from the spirit of the present application and the scope of the claims, which are also within the protection of the present application.

Claims

1. A method of data storage, comprising:

2. The method of claim 1, wherein the first storage space comprises a first storage area and a second storage area, the first storage area having a smaller amount of data per unit of storage than the second storage area, the first storage space having a free storage capacity that is the free storage capacity of the first storage area;

the storing the first data in the first storage space includes:

Storing the first data to the first storage area;

the method further comprises the steps of:

3. The method according to claim 1, wherein the method further comprises:

4. The method of claim 1, wherein the time of storing the first data into the first storage space is a first time; the method further comprises the steps of:

5. The method of claim 1, wherein the first storage space comprises at least one storage area and the second storage space comprises at least one storage area, the unit amount of storage data being an amount of storage data for each storage area;

The method further comprises the steps of:

6. The method of claim 1, wherein the storage area of the first storage space comprises at least one of: single-level cell SLC storage area, multi-level cell MLC storage area, and triple-level cell TLC storage area.

7. The method of claim 1, wherein the storage area of the second storage space is a multi-layer cell QLC storage area.

8. A data storage device, comprising:

9. The apparatus of claim 8, wherein the first storage space comprises a first storage area and a second storage area, the first storage area having a smaller amount of data per unit of storage than the second storage area, the first storage space having a free storage capacity that is the free storage capacity of the first storage area;

the first storage module is specifically configured to:

storing the first data to the first storage area;

the apparatus further comprises:

10. The apparatus of claim 8, wherein the time of storing the first data into the first storage space is a first time; the apparatus further comprises:

11. The apparatus of claim 8, wherein the first storage space comprises at least one storage area and the second storage space comprises at least one storage area, the unit amount of storage data being an amount of storage data for each storage area;

the apparatus further comprises:

12. An electronic device comprising a processor and a memory storing a program or instructions executable on the processor, which when executed by the processor, implement the steps of the data storage method of any one of claims 1 to 7.

13. A readable storage medium, characterized in that the readable storage medium has stored thereon a program or instructions which, when executed by a processor, implement the steps of the data storage method according to any of claims 1 to 7.