CN117528754A - Accurate synchronization method and system for wireless channels - Google Patents
Accurate synchronization method and system for wireless channels Download PDFInfo
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- CN117528754A CN117528754A CN202311450736.4A CN202311450736A CN117528754A CN 117528754 A CN117528754 A CN 117528754A CN 202311450736 A CN202311450736 A CN 202311450736A CN 117528754 A CN117528754 A CN 117528754A
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- 230000001360 synchronised effect Effects 0.000 claims abstract description 62
- 238000011084 recovery Methods 0.000 claims abstract description 8
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- 238000004891 communication Methods 0.000 claims description 22
- 238000001514 detection method Methods 0.000 claims description 21
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- 230000011664 signaling Effects 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 10
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W56/00—Synchronisation arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/02—Power saving arrangements
- H04W52/0209—Power saving arrangements in terminal devices
- H04W52/0225—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W76/00—Connection management
- H04W76/20—Manipulation of established connections
- H04W76/28—Discontinuous transmission [DTX]; Discontinuous reception [DRX]
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Abstract
The specification provides a method and a system for precisely synchronizing a wireless channel, which are applied to a transmitting end and a receiving end, wherein the transmitting end and the receiving end transmit carriers through the wireless channel; the method comprises the following steps: when the transmitting end detects the synchronous pulse, interrupting the carrier signal continuously transmitted to the receiving end; the receiving end receives the carrier signal to extract the power signal, and when the power signal is detected to drop to the reference voltage, the synchronous pulse is recovered, so that the synchronous pulse generated by the dropping recovery transmitting end of the carrier lower than the normal value can be realized, and the transmitting end and the receiving end do not need to encode and decode in the process, so that the delay of transmitting and recovering the synchronous pulse is greatly shortened.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a wireless channel accurate synchronization method and a wireless channel accurate synchronization system.
Background
In a communication system, each communication device needs to realize time synchronization in a communication range, and a synchronization circuit is very important, so that once failure occurs, the error code performance of the system is seriously affected, and even the whole system is paralyzed. Typically, third generation (3G) and fourth generation (4G) wireless communication systems use time slot synchronization, frame synchronization, pulse Per Second (PPS) of a satellite navigation system, and the like, to achieve time synchronization with different precision between various devices within a communication range.
The synchronization may be achieved using wired or wireless communication. The wired communication can easily realize the synchronization of the receiving and transmitting sides, and the synchronization signal is directly transmitted through a signal wire or other wired channels, and only the signal transmission delay is needed to be considered. Wireless communication is relatively difficult to synchronize, and particularly wireless communication devices that do not employ complex processing circuitry, are energy limited, or do not themselves have a power supply. Because of insufficient power supply, complex signal receiving processing units, and tolerance to synchronization error accuracy, the transmission delay of such wireless communication devices often far exceeds the synchronization requirements of the system, making it difficult to achieve high-accuracy signal synchronization. For example, in near field induction communication, the transmitting end is a near field coupling device PCD (Proximity Coupling Device), the receiving end is a proximity coupling card PICC (Proximity Integrated Circuit Card), a certain PICC needs to be synchronized with PPS second pulse of a satellite navigation system, the synchronization error is required to be not more than 100ns, if the PICC near field induction communication mode is adopted, the channel delay caused by protocol processing is usually in the order of several milliseconds, the uncertainty is more than 1 ms, and the requirement cannot be met. Therefore, the existing wireless communication method and system do not have the capability of precisely transmitting the synchronization pulse.
Disclosure of Invention
In view of the foregoing problems in the prior art, an object of the present disclosure is to provide a method and a system for precisely synchronizing a wireless channel, so as to solve the problem that the wireless communication method and system in the prior art do not have the capability of precisely transmitting synchronization pulses.
In order to solve the technical problems, the specific technical scheme in the specification is as follows:
in one aspect, the present disclosure provides a method for precisely synchronizing a wireless channel, which is applied to a transmitting end and a receiving end, where the transmitting end and the receiving end transmit carriers through the wireless channel; the method comprises the following steps:
when the transmitting end detects the synchronous pulse, interrupting the carrier signal continuously transmitted to the receiving end;
and the receiving end receives the carrier signal to extract a power signal, and when detecting that the power signal drops to a reference voltage, the synchronous pulse is recovered.
As an embodiment of the present disclosure, when the transmitting end detects the synchronization pulse, interrupting the carrier signal transmitted to the receiving end further includes:
when the transmitting end detects the synchronous pulse, the carrier signal continuously transmitted to the receiving end through the wireless channel is controlled to be interrupted for a plurality of preset periods.
As an embodiment of the present specification, when the transmitting end detects a synchronization pulse, the method further includes:
when the transmitting end detects a first edge of the synchronous pulse, the first edge is a rising edge when the synchronous pulse is positive pulse, and is a falling edge when the synchronous pulse is negative pulse.
As an embodiment of the present disclosure, the receiving end receives the carrier signal and extracts a power signal, and when detecting that the power signal drops to a reference voltage, the recovering the synchronization pulse further includes:
the receiving end continuously receives the carrier signal through the wireless channel and extracts a power supply signal;
and when the receiving end detects that the power supply signal is lower than the reference voltage, generating the synchronous pulse.
In another aspect, the present disclosure also provides a wireless channel accurate synchronization system, including: the wireless communication system comprises a transmitting end and a receiving end, wherein the transmitting end and the receiving end transmit carriers through a wireless channel;
the transmitting end is used for interrupting the carrier signal continuously transmitted to the receiving end when the transmitting end detects the synchronous pulse;
the receiving end is used for receiving the carrier signal by the receiving end to extract a power supply signal, and when the power supply signal is detected to drop to a reference voltage, the synchronous pulse is recovered.
As one embodiment of the present specification, the transmitting end includes a detection circuit, a carrier control circuit, and a carrier generation circuit;
the detection circuit is used for receiving the synchronous pulse, generating a first control signal when detecting a first edge of the synchronous pulse, and sending the first control signal to the carrier control circuit, wherein the first edge is a rising edge when the synchronous pulse is a positive pulse, and is a falling edge when the synchronous pulse is a negative pulse;
the carrier control circuit is used for responding to a first control signal and controlling the carrier signal to interrupt a plurality of preset periods;
the carrier generating circuit is configured to generate the carrier signal and send the carrier signal to the receiving end through a wireless channel.
As an embodiment of the present specification, the transmitting end further includes a synchronization pulse circuit;
the synchronous pulse circuit is used for generating the synchronous pulse.
As one embodiment of the present specification, the wireless channel includes a coupling coil;
the two ends of the transmitting coil of the coupling coil are connected with the transmitting end, and the receiving coil of the coupling coil is connected with the receiving end.
As one embodiment of the present specification, the receiving end includes a carrier receiving circuit, a power extracting circuit, a detection deciding circuit, and a synchronization pulse recovering circuit;
the carrier receiving circuit is configured to receive the carrier signal through the wireless channel;
the power supply extraction circuit is used for extracting a power supply signal from the carrier signal;
the detection decision circuit is used for detecting the power supply signal, and generating a second control signal when the power supply signal falls to the reference voltage;
the synchronization pulse recovery circuit is used for generating the synchronization pulse when the second control signal is received.
As one embodiment of the present specification, the power conversion circuit is further included for performing voltage stabilization processing on the power signal.
By adopting the technical scheme, when the transmitting end detects the synchronous pulse, the carrier signal transmitted to the receiving end is interrupted, the carrier signal with the interrupted amplitude lower than the normal value can be generated and transmitted to the receiving end, the power signal is extracted by the receiving end through the carrier signal, when the falling of the power supply generated according to the interruption is detected to be lower than the reference voltage, the synchronous pulse is recovered, the synchronous pulse generated by the transmitting end can be recovered by using the falling of the carrier lower than the normal value, and the transmitting end and the receiving end do not need to encode and decode in the process, so the delay for transmitting and recovering the synchronous pulse is greatly shortened.
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of preferred embodiments, as illustrated in the accompanying drawings.
Drawings
In order to more clearly illustrate the embodiments of the present description or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present description, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram illustrating steps of a wireless channel accurate synchronization method according to an embodiment of the present disclosure;
fig. 2 shows a waveform diagram of a wireless channel accurate synchronization method according to an embodiment of the present disclosure;
fig. 3 shows a wireless channel accurate synchronization system according to an embodiment of the present disclosure;
fig. 4 shows a first schematic diagram of a transmitting end according to an embodiment of the present disclosure;
FIG. 5 shows a second schematic diagram of a transmitting end in an embodiment of the present disclosure;
fig. 6 shows a first schematic diagram of a receiving end according to an embodiment of the present disclosure;
fig. 7 shows a first circuit diagram of a receiving end in an embodiment of the present disclosure;
fig. 8 is a schematic diagram of a first circuit of the receiving end according to an embodiment of the disclosure;
fig. 9 shows a second schematic diagram of a receiving end according to an embodiment of the present disclosure;
fig. 10 shows a second circuit diagram of the receiving end in the embodiment of the present specification;
FIG. 11 is a schematic diagram of a second circuit of the receiving end according to the embodiment of the present disclosure;
fig. 12 shows a third circuit diagram of the receiving end in the embodiment of the present disclosure;
fig. 13 is a schematic diagram showing a third circuit of the receiving end according to the embodiment of the present disclosure.
Description of the drawings:
1. a transmitting end;
11. a synchronous pulse circuit;
12. a detection circuit;
13. a carrier control circuit;
14. a carrier wave generating circuit;
2. a wireless channel;
3. a receiving end;
31. a carrier receiving circuit;
32. a power supply extraction circuit;
33. a detection decision circuit;
34. a synchronization pulse recovery circuit;
35. a power conversion circuit.
Detailed Description
The technical solutions of the embodiments of the present specification will be clearly and completely described below with reference to the drawings in the embodiments of the present specification, and it is apparent that the described embodiments are only some embodiments of the present specification, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are intended to be within the scope of the present disclosure.
It should be noted that the terms "first," "second," and the like in the description and the claims, and in the foregoing figures, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the present description described herein may be capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, apparatus, article, or device that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed or inherent to such process, method, article, or device.
Currently, in a wireless communication system, when a receiving end receives a synchronization pulse generated by a satellite navigation system or the satellite navigation system, the receiving end can be marked as a first moment, the first moment can be regarded as the moment when the synchronization pulse appears in a transmitting end, and then the transmitting end encodes and modulates the synchronization pulse and transmits the synchronization pulse to the receiving end through a wireless channel. When a receiving end receives a carrier signal, the carrier signal is demodulated and decoded to obtain a power signal and a synchronous pulse, the moment when the synchronous pulse occurs at the receiving end is called a second moment, and the difference between the first moment and the second moment is larger due to the encoding and decoding processes, so that the wireless communication method and the system in the prior art have larger delay and do not have the capability of accurately transmitting the synchronous pulse.
In order to solve the above-mentioned problems, the embodiments of the present disclosure provide a wireless channel accurate synchronization method capable of accurately transmitting synchronization pulses, and fig. 1 is a schematic diagram of steps of a wireless channel accurate synchronization method provided in the embodiments of the present disclosure, where the steps of the method are as described in the examples or flowcharts, but may include more or less steps based on conventional or non-inventive labor. The order of steps recited in the embodiments is merely one way of performing the order of steps and does not represent a unique order of execution. When a system or apparatus product in practice is executed, it may be executed sequentially or in parallel according to the method shown in the embodiments or the drawings. As shown in fig. 1, the method is applied to a transmitting end and a receiving end, where the transmitting end and the receiving end transmit carriers through a wireless channel, and the method may include:
step 101, when the transmitting end detects the synchronous pulse, interrupting the carrier signal continuously transmitted to the receiving end;
step 102, the receiving end receives the carrier signal to extract a power signal, and when detecting that the power signal drops to a reference voltage, the synchronous pulse is recovered.
By adopting the technical scheme, when the transmitting end detects the synchronous pulse, the carrier signal transmitted to the receiving end is interrupted, the carrier signal with the interrupted amplitude lower than the normal value can be generated and transmitted to the receiving end, the power signal is extracted by the receiving end through the carrier signal, when the falling of the power supply generated according to the interruption is detected to be lower than the reference voltage, the synchronous pulse is recovered, the synchronous pulse generated by the transmitting end can be recovered by using the falling of the carrier lower than the normal value, and the transmitting end and the receiving end do not need to encode and decode in the process, so the delay for transmitting and recovering the synchronous pulse is greatly shortened.
As an embodiment of the present specification, step 101, when the transmitting end detects the synchronization pulse, interrupts the carrier signal transmitted to the receiving end, further includes:
when the transmitting end detects the synchronous pulse, the carrier signal continuously transmitted to the receiving end through the wireless channel is controlled to be interrupted for a plurality of preset periods.
In this step, the transmitting end detecting the synchronization pulse may consider that the transmitting end detects the synchronization pulse as long as the synchronization pulse occurs in the transmitting end, and there is no delay in the process. The synchronization pulse can be generated for the transmitting end itself or can be sent to the transmitting end for the outside. The present specification is not limited thereto.
As an embodiment of the present specification, when the transmitting end detects a synchronization pulse, the method further includes:
when the transmitting end detects a first edge of the synchronous pulse, the first edge is a rising edge when the synchronous pulse is positive pulse, and is a falling edge when the synchronous pulse is negative pulse.
In this step, the steady state of the sync pulse (normal state, when the sync pulse is not received) may be high or low, and when the sync pulse is triggered, the steady state changes to generate a state opposite to the steady state, and if the steady state is high, a negative pulse is generated, and if the steady state is low, a positive pulse is generated. Therefore, when the synchronization pulse is a positive pulse, the rising edge of the positive pulse can be detected; when the sync pulse is a negative pulse, the falling edge of the positive pulse may be detected, which is not limited in this specification.
As an embodiment of the present disclosure, the receiving end receives the carrier signal and extracts a power signal, and when detecting that the power signal drops to a reference voltage, the recovering the synchronization pulse further includes:
the receiving end continuously receives the carrier signal through the wireless channel and extracts a power supply signal;
and when the receiving end detects that the power supply signal is lower than the reference voltage, generating the synchronous pulse.
In the step, a transmitting end continuously transmits a carrier signal to a receiving end through a wireless channel, and the carrier signal is completely converted into a power signal to supply power to a passive receiving end when the carrier signal does not bear a synchronous pulse; when the carrier signal carries the synchronous pulse, one part of the carrier signal is converted into a power signal to supply power to the passive receiving end, and the other part of the carrier signal is converted into the synchronous pulse to carry out accurate synchronization. Normally, the normal working voltage of the power supply signal is 3.3V, the lowest working voltage is 1.8V, when the carrier signal is interrupted, the power supply signal drops, a specific drop value is related to the interruption time, and the drop value cannot influence the normal working of the power supply of the receiving end, namely, the drop value is slightly higher than the lowest working voltage by 1.8V. If the power signal drops to the reference voltage, for example, 2.8V, the receiving end generates a synchronization pulse by dropping the corresponding potential, and because the carrier signal is not demodulated, the delay between the synchronization pulse generated by the receiving end and the synchronization pulse detected by the transmitting end is shorter, which can be within 100 ns.
In fig. 2, it is assumed that the receiving end is a PICC (Proximity Integrated Circuit Card, close to a coupling card) and needs to implement time-accurate synchronization with PPS (Pulse Per Second) Second Pulse of a satellite navigation system, and the synchronization error is not more than 100 ns.
A wireless channel accurate synchronization system as shown in fig. 3, comprising: the wireless communication system comprises a transmitting end 1 and a receiving end 3, wherein the transmitting end 1 and the receiving end 3 transmit carriers through a wireless channel 2;
the transmitting end 1 is configured to interrupt a carrier signal continuously transmitted to the receiving end 3 when the transmitting end 1 detects a synchronization pulse;
the receiving end 3 is configured to receive the carrier signal by the receiving end 3 to extract a power signal, and recover the synchronization pulse when detecting that the power signal drops to a reference voltage.
By adopting the technical scheme, when the transmitting end 1 detects the synchronous pulse, the carrier signal transmitted to the receiving end 3 is interrupted, the carrier signal with the interrupted amplitude lower than the normal value can be generated and transmitted to the receiving end 3, the power signal is extracted by the receiving end 3 through receiving the carrier signal, when the falling of the power supply generated according to the interruption is detected to be lower than the reference voltage, the synchronous pulse is recovered, the synchronous pulse generated by the transmitting end 1 can be recovered by using the falling of the carrier lower than the normal value, and in the process, the transmitting end 1 and the receiving end 3 do not need to encode and decode, so the delay for transmitting and recovering the synchronous pulse is greatly shortened.
As shown in fig. 3, the wireless channel 2 includes a coupling coil;
the two ends of the transmitting coil of the coupling coil are connected with the transmitting end 1, and the receiving coil of the coupling coil is connected with the receiving end 3.
In some cases, when the synchronization pulse is transmitted to the transmitting end 1 for the satellite navigation system, the transmitting end 1 only needs to receive the synchronization pulse.
As shown in fig. 4, as an embodiment of the present specification, the transmitting terminal 1 includes a detecting circuit 12, a carrier control circuit 13, and a carrier generating circuit 14;
the detection circuit 12 is configured to receive the synchronization pulse, and generate a first control signal when detecting a first edge of the synchronization pulse, and send the first control signal to the carrier control circuit 13, where the first edge is a rising edge when the synchronization pulse is a positive pulse, and is a falling edge when the synchronization pulse is a negative pulse;
the carrier control circuit 13 is configured to control the carrier signal to interrupt for a plurality of preset periods in response to a first control signal;
the carrier generating circuit 14 is configured to generate the carrier signal and send the carrier signal to the receiving end 3 through the wireless channel 2.
In some cases, when the synchronization pulse itself is generated and transmitted to the transmitting terminal 1, the transmitting terminal 1 needs to generate the synchronization pulse.
As shown in a second schematic diagram of the transmitting end in fig. 5, as an embodiment of the present specification, the transmitting end 1 further includes a synchronization pulse circuit 11;
the synchronization pulse circuit 11 is configured to generate the synchronization pulse;
the detection circuit 12 is configured to receive the synchronization pulse, and generate a first control signal when detecting a first edge of the synchronization pulse, and send the first control signal to the carrier control circuit 13, where the first edge is a rising edge when the synchronization pulse is a positive pulse, and is a falling edge when the synchronization pulse is a negative pulse;
the carrier control circuit 13 is configured to control the carrier signal to interrupt for a plurality of preset periods in response to a first control signal;
the carrier generating circuit 14 is configured to generate the carrier signal and send the carrier signal to the receiving end 3 through the wireless channel 2.
Since the steady state (normal state) of the sync pulse in this specification may be either a high level or a low level when the sync pulse is not received, the steady state changes when the sync pulse is triggered, resulting in a state opposite to the steady state, and if the steady state is a high level, a negative pulse is generated, and if the steady state is a low level, a positive pulse is generated. Therefore, when the synchronization pulse is a positive pulse, the rising edge of the positive pulse can be detected; when the sync pulse is a negative pulse, the falling edge of the positive pulse may be detected, which is not limited in this specification.
As shown in fig. 6, as an embodiment of the present disclosure, when the detection circuit 12 detects the falling edge of the synchronization pulse of the negative pulse; the receiving end 3 may not need to use the synchronization pulse recovery circuit 34.
The receiving end 3 may include a carrier receiving circuit 31, a power extracting circuit 32, and a detection deciding circuit 33;
a carrier receiving circuit 31 for receiving the carrier signal via the radio channel 2;
a power extraction circuit 32 for extracting a power signal from the carrier signal;
and a detection decision circuit 33 for detecting the power supply signal, and generating the synchronization pulse of the negative pulse when the power supply signal drops to a preset reference voltage.
Corresponding to the embodiment of fig. 6, as shown in the first circuit diagram of the receiving end of fig. 7, as an embodiment of the present disclosure, the carrier receiving circuit 31 includes a capacitor C1, and two ends of the capacitor C1 are connected to the receiving coil of the coupling coil;
in the embodiment of the present disclosure, the power extraction circuit 32 may employ a rectifying and filtering circuit structure or a DCDC converter, such as full-wave rectification and half-wave rectification, and capacitor is used for filtering. A specific embodiment will be given below.
The power supply extraction circuit 32 includes a diode D1, a diode D2, a diode D3, a diode D4, and a capacitor C2, where an anode of the diode D1 is connected to one end of the capacitor C1, a cathode of the diode D1 is connected to a cathode of the diode D2, an anode of the diode D2 is connected to the other end of the capacitor C1, a cathode of the diode D4 is connected to an anode of the diode D2, an anode of the diode D4 is grounded, a cathode of the diode D3 is connected to an anode of the diode D1, an anode of the diode D3 is grounded, and two ends of the capacitor C2 are connected to a cathode of the diode D2 and an anode of the diode D4, respectively;
the detection decision circuit 33 includes a comparator, a positive input of which is connected to the cathode of the diode D2, and a negative input of which is connected to the reference voltage, and outputs the pulse signal of the negative pulse when the power supply voltage received by the positive input is smaller than the reference voltage.
As shown in fig. 8, a power conversion circuit 35 may be added on the basis of the embodiment of fig. 7, where the power conversion circuit 35 is configured to perform voltage stabilization processing on the power signal, and power other circuits in the receiving end 3 after obtaining a stable power signal.
The power conversion circuit 35 includes a diode D5 and a voltage stabilizer, where an anode of the diode D5 is connected to a cathode of the diode D2, a cathode of the diode D5 is connected to an input terminal of the voltage stabilizer, and an output terminal of the voltage stabilizer outputs a stabilized power signal.
As shown in fig. 9, as an embodiment of the present disclosure, when the detection circuit 12 detects the rising edge of the synchronization pulse of the positive pulse;
the receiving end 3 comprises a carrier receiving circuit 31, a power supply extracting circuit 32, a detection judging circuit 33 and a synchronous pulse recovering circuit 34;
the carrier receiving circuit 31 is configured to receive the carrier signal through the radio channel 2;
the power extraction circuit 32 is configured to extract a power signal from the carrier signal;
the detection decision circuit 33 is configured to detect the power supply signal, and generate a second control signal when the power supply signal drops to a reference voltage;
the synchronization pulse recovery circuit 34 is configured to generate a synchronization pulse of a rising edge when receiving the second control signal.
Corresponding to the embodiment of fig. 9, as shown in the second circuit diagram of the receiving end of fig. 10, as an embodiment of the present disclosure, the carrier receiving circuit 31 includes a capacitor C1, and two ends of the capacitor C1 are connected to the receiving coil of the coupling coil;
the power supply extraction circuit 32 includes a diode D1, a diode D2, a diode D3, a diode D4, and a capacitor C2, where an anode of the diode D1 is connected to one end of the capacitor C1, a cathode of the diode D1 is connected to a cathode of the diode D2, an anode of the diode D2 is connected to the other end of the capacitor C1, a cathode of the diode D4 is connected to an anode of the diode D2, an anode of the diode D4 is grounded, a cathode of the diode D3 is connected to an anode of the diode D1, an anode of the diode D3 is grounded, and two ends of the capacitor C2 are connected to a cathode of the diode D2 and an anode of the diode D4, respectively;
the detection decision circuit 33 includes a comparator, a positive input of which is connected to the cathode of the diode D2, and a negative input of which is connected to the reference voltage, and outputs the second control signal when the power supply voltage received by the positive input is smaller than the reference voltage;
the synchronization pulse recovery circuit 34 includes an inverter, an input terminal of which is connected to an output terminal of the comparator, and outputs a synchronization pulse of positive pulse when the input terminal of the inverter receives the second control signal.
As shown in fig. 11, a second circuit of the receiving end is preferably shown, and a power conversion circuit 35 may be added on the basis of the embodiment of fig. 10, where the power conversion circuit 35 is configured to perform voltage stabilizing processing on the power signal, and power other circuits in the receiving end 3 after obtaining a stable power signal.
The power conversion circuit 35 includes a diode D5 and a voltage stabilizer, where an anode of the diode D5 is connected to a cathode of the diode D2, a cathode of the diode D5 is connected to an input terminal of the voltage stabilizer, and an output terminal of the voltage stabilizer outputs a stabilized power signal.
Corresponding to the embodiment of fig. 9, as shown in the third circuit diagram of the receiving end in fig. 12, the carrier receiving circuit 31 includes a capacitor C1, and two ends of the capacitor C1 are connected to the receiving coil of the coupling coil;
the power supply extraction circuit 32 includes a diode D1, a diode D2, a diode D3, a diode D4, and a capacitor C2, where an anode of the diode D1 is connected to one end of the capacitor C1, a cathode of the diode D1 is connected to a cathode of the diode D2, an anode of the diode D2 is connected to the other end of the capacitor C1, a cathode of the diode D4 is connected to an anode of the diode D2, an anode of the diode D4 is grounded, a cathode of the diode D3 is connected to an anode of the diode D1, an anode of the diode D3 is grounded, and two ends of the capacitor C2 are connected to a cathode of the diode D2 and an anode of the diode D4, respectively;
the detection decision circuit 33 includes a comparator, the inverting input of which is connected to the cathode of the diode D2, and the forward input of which is connected to the reference voltage, and outputs a positive pulse synchronization pulse when the power supply voltage received by the forward input is smaller than the reference voltage.
As shown in fig. 13, a third circuit of the receiving end is preferably shown, and a power conversion circuit 35 may be added on the basis of the embodiment of fig. 12, where the power conversion circuit 35 is configured to perform voltage stabilizing processing on the power signal, and power other circuits in the receiving end 3 after obtaining a stable power signal.
The power conversion circuit 35 includes a diode D5 and a voltage stabilizer, where an anode of the diode D5 is connected to a cathode of the diode D2, a cathode of the diode D5 is connected to an input terminal of the voltage stabilizer, and an output terminal of the voltage stabilizer outputs a stabilized power signal.
It should be understood that, in various embodiments of the present disclosure, the sequence numbers of the foregoing processes do not mean the order of execution, and the order of execution of the processes should be determined by the functions and internal logic thereof, and should not constitute any limitation on the implementation of the embodiments of the present disclosure.
It should also be understood that, in the embodiments of the present specification, the term "and/or" is merely one association relationship describing the association object, meaning that three relationships may exist. For example, a and/or B may represent: a exists alone, A and B exist together, and B exists alone. In the present specification, the character "/" generally indicates that the front and rear related objects are an or relationship.
Those of ordinary skill in the art will appreciate that the elements and algorithm steps described in connection with the embodiments disclosed herein may be embodied in electronic hardware, in computer software, or in a combination of the two, and that the various example components and steps have been generally described in terms of function in the foregoing description to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present specification.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided in this specification, it should be understood that the disclosed systems, apparatuses, and methods may be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. In addition, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices, or elements, or may be an electrical, mechanical, or other form of connection.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purposes of the embodiments of the present description.
In addition, each functional unit in each embodiment of the present specification may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on this understanding, the technical solution of the present specification is essentially or a part contributing to the prior art, or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium, including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in the embodiments of the present specification. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The principles and embodiments of the present specification are explained in this specification using specific examples, the above examples being provided only to assist in understanding the method of the present specification and its core ideas; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope based on the ideas of the present specification, the present description should not be construed as limiting the present specification in view of the above.
Claims (10)
1. The wireless channel accurate synchronization method is characterized by being applied to a transmitting end and a receiving end, wherein the transmitting end and the receiving end transmit carriers through a wireless channel; the method comprises the following steps:
when the transmitting end detects the synchronous pulse, interrupting the carrier signal continuously transmitted to the receiving end;
and the receiving end receives the carrier signal to extract a power signal, and when detecting that the power signal drops to a reference voltage, the synchronous pulse is recovered.
2. The method for precisely synchronizing a wireless channel according to claim 1, wherein the interrupting the carrier signal transmitted to the receiving terminal when the transmitting terminal detects the synchronization pulse, further comprises:
when the transmitting end detects the synchronous pulse, the carrier signal continuously transmitted to the receiving end through the wireless channel is controlled to be interrupted for a plurality of preset periods.
3. The method for precisely synchronizing a wireless channel according to claim 2, wherein when the transmitting end detects a synchronization pulse, further comprising:
when the transmitting end detects a first edge of the synchronous pulse, the first edge is a rising edge when the synchronous pulse is positive pulse, and is a falling edge when the synchronous pulse is negative pulse.
4. The method for precisely synchronizing a wireless channel according to claim 2, wherein the receiving end receives the carrier signal to extract a power signal, and when detecting that the power signal drops to a reference voltage, the recovering the synchronization pulse further comprises:
the receiving end continuously receives the carrier signal through the wireless channel and extracts a power supply signal;
and when the receiving end detects that the power supply signal is lower than the reference voltage, generating the synchronous pulse.
5. A wireless channel accurate synchronization system, comprising: the wireless communication system comprises a transmitting end and a receiving end, wherein the transmitting end and the receiving end transmit carriers through a wireless channel;
the transmitting end is used for interrupting the carrier signal continuously transmitted to the receiving end when the transmitting end detects the synchronous pulse;
the receiving end is used for receiving the carrier signal by the receiving end to extract a power supply signal, and when the power supply signal is detected to drop to a reference voltage, the synchronous pulse is recovered.
6. The wireless channel accurate synchronization system of claim 5 wherein the transmitting end comprises a detection circuit, a carrier control circuit and a carrier generation circuit;
the detection circuit is used for receiving the synchronous pulse, generating a first control signal when detecting a first edge of the synchronous pulse, and sending the first control signal to the carrier control circuit, wherein the first edge is a rising edge when the synchronous pulse is a positive pulse, and is a falling edge when the synchronous pulse is a negative pulse;
the carrier control circuit is used for responding to a first control signal and controlling the carrier signal to interrupt a plurality of preset periods;
the carrier generating circuit is configured to generate the carrier signal and send the carrier signal to the receiving end through a wireless channel.
7. The wireless channel accurate synchronization system of claim 6 wherein the transmitting end further comprises a synchronization pulse circuit;
the synchronous pulse circuit is used for generating the synchronous pulse.
8. The wireless channel accurate synchronization system of claim 5 wherein the wireless channel comprises a coupling coil;
the two ends of the transmitting coil of the coupling coil are connected with the transmitting end, and the receiving coil of the coupling coil is connected with the receiving end.
9. The wireless channel accurate synchronization system of claim 5 wherein the receiving end comprises a carrier receiving circuit, a power extraction circuit, a detection decision circuit and a synchronization pulse recovery circuit;
the carrier receiving circuit is configured to receive the carrier signal through the wireless channel;
the power supply extraction circuit is used for extracting a power supply signal from the carrier signal;
the detection decision circuit is used for detecting the power supply signal, and generating a second control signal when the power supply signal falls to the reference voltage;
the synchronization pulse recovery circuit is used for generating the synchronization pulse when the second control signal is received.
10. The wireless channel accurate synchronization system of claim 9 further comprising a power conversion circuit for stabilizing the power signal.
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| CN202311450736.4A CN117528754A (en) | 2023-11-02 | 2023-11-02 | Accurate synchronization method and system for wireless channels |
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