CN117524071A - Display panel and display device - Google Patents

Display panel and display device Download PDF

Info

Publication number
CN117524071A
CN117524071A CN202311682781.2A CN202311682781A CN117524071A CN 117524071 A CN117524071 A CN 117524071A CN 202311682781 A CN202311682781 A CN 202311682781A CN 117524071 A CN117524071 A CN 117524071A
Authority
CN
China
Prior art keywords
control signal
transmission channel
driving circuit
period
control unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311682781.2A
Other languages
Chinese (zh)
Inventor
付海波
叶利丹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Original Assignee
HKC Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HKC Co Ltd filed Critical HKC Co Ltd
Priority to CN202311682781.2A priority Critical patent/CN117524071A/en
Publication of CN117524071A publication Critical patent/CN117524071A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0267Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04Display protection
    • G09G2330/045Protection against panel overheating

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The application discloses a display panel and a display device, which comprises a level conversion circuit, a first scanning driving circuit and a plurality of pixel units, wherein the level conversion circuit is electrically connected with the first scanning driving circuit and used for outputting a clock signal, and the first scanning driving circuit controls the pixel units to receive data signals for image display according to the clock signal so as to display images. The display panel further comprises a first control unit, a first transmission channel and a second transmission channel, the level conversion circuit is connected to the first scanning driving circuit through the first control unit and the first transmission channel, and the level conversion circuit is further connected to the first scanning driving circuit through the first control unit and the second transmission channel. The first control unit is used for controlling the clock signals output by the level conversion circuit to be transmitted to the first scanning driving circuit through the first transmission channel and the second transmission channel at different time. The control clock signals are not transmitted through the first transmission channel and the second transmission channel at the same time, so that the heating of the circuit can be effectively reduced.

Description

Display panel and display device
Technical Field
The application relates to the technical field of display, in particular to a display panel and a display device.
Background
The display panel generally includes an array substrate and an opposite substrate, which are disposed opposite to each other, for controlling light emitted from pixel units on the array substrate to display an image. The scanning driving circuit for controlling the pixel units to display the image is arranged on the array substrate, so that the space occupation of the control circuit board is reduced.
However, when the scan driving circuit receives the clock signal to control the pixel unit to display an image, the clock signal current is large, so that the circuit for transmitting the clock signal generally generates heat, and if a large current occurs due to a short circuit of a certain circuit, the circuit is extremely easy to damage. Therefore, how to effectively avoid the heat and burnout of the circuit for transmitting the clock signal is a problem to be solved.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present application provides a display panel and a display device capable of effectively avoiding heat generation of a circuit.
The application provides a display panel, including level conversion circuit, first scanning drive circuit and a plurality of pixel unit, level conversion circuit electric connection is used for the output clock signal in first scanning drive circuit, and first scanning drive circuit is according to the data signal that clock signal control pixel unit received image display usefulness carries out image display. The display panel further comprises a first control unit, a first transmission channel and a second transmission channel, the level conversion circuit is connected to the first scanning driving circuit through the first control unit and the first transmission channel, and the level conversion circuit is further connected to the first scanning driving circuit through the first control unit and the second transmission channel. The first control unit is used for controlling the clock signals output by the level conversion circuit to be transmitted to the first scanning driving circuit through the first transmission channel and the second transmission channel at different time.
Optionally, the first control unit is connected to the control signal end, when the control signal end outputs the first control signal, the first control unit controls the clock signal to be transmitted to the first scan driving circuit through the first transmission channel, and when the control signal end outputs the second control signal, the first control unit controls the clock signal to be transmitted to the first scan driving circuit through the second transmission channel.
Optionally, in any adjacent first frame image display period and second frame image display period, the control signal terminal outputs the first control signal in the first frame image display period, and the control signal terminal outputs the second control signal in the second frame image display period.
Optionally, in any adjacent first period and second period, the control signal end outputs a first control signal in the first period, and the control signal end outputs a second control signal in the second period, wherein the duration of the first period is the duration of m frames of image display, the duration of the second period is the duration of n frames of image display, and m is greater than 1 and n is greater than 1.
Optionally, the first control unit includes a first switching tube and a second switching tube, a gate of the first switching tube is connected to the control signal end, a source of the first switching tube is connected to the level conversion circuit through a first transmission channel, and a drain of the first switching tube is connected to the first scan driving circuit through the first transmission channel and is used for being turned on when receiving the first control signal so as to control the clock signal to be transmitted to the first scan driving circuit through the first transmission channel. The grid electrode of the second switching tube is connected with the control signal end, the source electrode of the second switching tube is connected with the level conversion circuit through the second transmission channel, the drain electrode of the second switching tube is connected with the first scanning driving circuit through the second transmission channel and is used for being conducted when receiving the second control signal so as to control the clock signal to be transmitted to the first scanning driving circuit through the second transmission channel.
Optionally, the display panel further includes a second scan driving circuit, a second control unit, a third transmission channel and a fourth transmission channel, the level conversion circuit is connected to the second scan driving circuit through the second control unit and the third transmission channel, the level conversion circuit is further connected to the second scan driving circuit through the second control unit and the fourth transmission channel, and the second control unit is used for controlling the clock signal output by the level conversion circuit to be transmitted to the second scan driving circuit through the first transmission channel and the second transmission channel at different time.
Optionally, when the control signal end outputs the first control signal, the second control unit controls the clock signal to be transmitted to the second scan driving circuit through the third transmission channel, and when the control signal end outputs the second control signal, the second control unit controls the clock signal to be transmitted to the second scan driving circuit through the fourth transmission channel.
Optionally, when the scan driving circuit or the second scan driving circuit controls the pixel unit to perform image display, the control signal terminal outputs the first control signal in the first frame image display period and the control signal terminal outputs the second control signal in the second frame image display period in any adjacent first frame image display period and second frame image display period.
Optionally, when the scan driving circuit and the second scan driving circuit control the pixel unit to display an image, in the adjacent first period and second period, the control signal terminal outputs a first control signal in the first period, and the control signal outputs a second control signal in the second period; the duration of the first period is the duration of m frames of images, the duration of the second period is the duration of n frames of images, m is more than 1, and n is more than 1.
The application also provides a display device, including power module and like aforementioned display panel, power module is used for providing drive power supply for display panel carries out image display.
Compared with the prior art, the first control unit is arranged between the level conversion circuit and the scanning driving circuit, and the first transmission channel and the second transmission channel are correspondingly arranged, so that the first control unit can control clock signals to be transmitted to the scanning driving circuit through the first transmission channel and the second transmission channel at different time, thereby avoiding the heating condition of only one transmission channel when transmitting the clock signals, effectively preventing the circuit from being damaged due to heavy current through the switching of the transmission channels, and effectively improving the circuit protection capability.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a display device according to a first embodiment of the present disclosure;
FIG. 2 is a schematic side view of the display panel of FIG. 1;
FIG. 3 is a schematic plan layout of the display panel of FIG. 1;
FIG. 4 is a schematic diagram illustrating an equivalent circuit connection of the level shifter circuit of FIG. 3;
FIG. 5 is a schematic diagram of the control signal output waveforms of FIG. 4;
fig. 6 is a schematic diagram of a waveform of a control signal output as shown in fig. 4 according to a second embodiment of the present application.
Reference numerals:
the display device comprises a display device 100, a display panel 10, a power module 20, a supporting frame 30, a display area 10a, a non-display area 10B, an array substrate 10c, a counter substrate 10d, a display medium layer 10e, a backlight module 11, a first scanning driving circuit 12A, a second scanning driving circuit 12B, a flip-chip film 13, a data driving circuit 14, a control circuit board 15, a level converting circuit 16, a first control circuit 171, a second control unit 172, a first transmission channel 181, a second transmission channel 182, a third transmission channel 183, a fourth transmission channel 184, a first switching tube M1, a second switching tube M2, a third switching tube M3, a fourth switching tube M4, a control signal end EN, a first period of time T1, a second period of time T2, a third period of time T3, a first control signal V1 and a second control signal V2.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Preferred embodiments of the present application are shown in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
The following description of the embodiments refers to the accompanying drawings, which illustrate specific embodiments that can be used to practice the present application. The numbering of the components itself, e.g. "first", "second", etc., is used herein merely to distinguish between the described objects and does not have any sequential or technical meaning. The terms "coupled" and "connected," as used herein, are intended to encompass both direct and indirect coupling (coupling), unless otherwise indicated. Directional terms referred to in this application, such as "upper", "lower", "front", "rear", "left", "right", "inner", "outer", "side", etc., are merely directions referring to the attached drawings, and thus, directional terms are used for better, more clear description and understanding of the present application, rather than indicating or implying that the apparatus or element being referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present application.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; may be a mechanical connection; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context. It should be noted that the terms "first," "second," and the like in the description and claims of the present application and in the drawings are used for distinguishing between different objects and not for describing a particular sequential order.
Furthermore, the terms "comprises," "comprising," "includes," "including," "may be" or "including" as used in this application mean the presence of the corresponding function, operation, element, etc. disclosed, but not limited to other one or more additional functions, operations, elements, etc. Furthermore, the terms "comprises" or "comprising" mean that there is a corresponding feature, number, step, operation, element, component, or combination thereof disclosed in the specification, and that there is no intention to exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof. Furthermore, when describing embodiments of the present application, use of "may" means "one or more embodiments of the present application. Also, the term "exemplary" is intended to refer to an example or illustration.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a display device according to a first embodiment of the present application. As shown in fig. 1, the display device 100 includes a display panel 10, a power module 20 and a supporting frame 30, wherein the display panel 10 and the power module 20 are fixed on the supporting frame 30, and the power module 20 is disposed on a back surface of the display panel 10, i.e. a non-display surface of the display panel 10. The power module 20 is used for providing power voltage for the display panel 10 to display images, and the support frame 30 provides fixing and protecting functions for the display panel 10 and the power module 20. In other embodiments of the present application, the display device 100 may not need to be provided with the support frame 30, for example, a portable electronic device, such as a mobile phone, a tablet computer, and the like.
Referring to fig. 2, fig. 2 is a schematic side view of the display panel in fig. 1.
As shown in fig. 2, the display panel 10 includes a display region 10a for an image and a non-display region 10b. The display area 10a is used for performing image display, the non-display area 10b is disposed around the display area 10a to provide other auxiliary components or modules, specifically, the display panel 10 includes an array substrate 10c and an opposite substrate 10d, and a display medium layer 10e sandwiched between the array substrate 10c and the opposite substrate 10d, and driving elements disposed on the array substrate 10c and the opposite substrate 10d generate corresponding electric fields according to Data signals (Data), so as to drive the display medium layer 10e to emit light with corresponding brightness, so as to perform image display. In this embodiment, the display medium in the display medium layer 10e may be a material such as liquid crystal molecules, micro LEDs, mini LEDs, etc.
Taking a liquid crystal display panel as an example, in which liquid crystal molecules are in the display medium layer 10e, the liquid crystal molecules deflect light rays having a predetermined brightness to perform image display. The display panel 10 further includes a backlight module 11 (Back light Module, BM), the backlight module 11 is configured to provide display light to the display area 10a of the display panel 10, and the display panel 10 emits corresponding light according to the image signal to be displayed to perform image display. The display panel 10 further includes other elements or components, such as a signal processor module and a signal sensing module.
Referring to fig. 3, fig. 3 is a schematic plan layout of the display panel in fig. 1.
As shown in fig. 3, the display panel 10 further includes a first scan driving circuit 12A, a plurality of Chip On Flex (COF) 13, a data driving circuit 14, a control circuit board 15, and a level converting circuit 16. The scan driving circuit 12 and the plurality of flip chip films 13 are disposed in a non-display area of the display panel 10, i.e. in an edge position of the display panel 10, and the first scan driving circuit 12A is configured to output a scan signal to the display area 10a to control pixel units (not shown) in the display area 10a to receive a data signal for displaying an image. The flip chip film 13 is used for fixing the data driving circuit 14, and the data driving circuit 14 is used for outputting data signals to the pixel units in the display area 10a so as to control the pixel units to execute image display.
The control circuit board 15 is used for temporarily storing and decoding the image data to be displayed into driving signals, and the data driving circuit 14 fixed on the flip chip film 13 is used for receiving the driving signals from the control circuit board 15 and driving the pixel units P in the display area 10a to display images according to the driving signals.
The level shifter 16 is disposed on the control circuit board 15, and is configured to output a clock signal to the first scan driving circuit 12A, and the first scan driving circuit 12A outputs a scan signal to the pixel unit according to the clock signal.
In the exemplary embodiment, the display panel 10 further includes a second scan driving circuit 12B, the second scan driving circuit 12B is electrically connected to the level shifter circuit 16, and is configured to receive a clock signal from the level shifter circuit 16 and output a scan signal according to the clock signal, wherein the first scan driving circuit 12A or the second scan driving circuit 12B can be selected to control the pixel unit to display an image, and the second scan driving circuit 12B can be used as a standby circuit of the first scan driving circuit 12A.
The first scan driving circuit 12A and the second scan driving circuit 12B can also be controlled to receive clock signals from the level shifter circuit 16 and output scan signals according to the clock signals, so that the first scan driving circuit 12A and the second scan driving circuit 12B share loads, and the risk of heating the circuits is reduced.
Referring to fig. 4, fig. 4 is a schematic diagram illustrating an equivalent circuit connection of the level shifter circuit in fig. 3.
As shown in fig. 4, the display panel 10 further includes a first control unit 171, a first transmission channel 181, and a second transmission channel 182, wherein the first control unit 171, the first transmission channel 181, and the second transmission channel 182 are disposed between the first scan driving circuit 12A and the level shifter circuit 16, the level shifter circuit 16 is connected to the first scan driving circuit 12A through the first control unit 171 and the first transmission channel 181, and the level shifter circuit 16 is further connected to the first scan driving circuit 12A through the first control unit 171 and the second transmission channel 182. The first control unit 171 is connected to the control signal end EN, and is configured to receive a control signal from the control signal end EN, when receiving the first control signal, the first control unit 171 controls the first transmission channel 181 to be turned on, the clock signal output by the level conversion circuit 16 is transmitted to the first scan driving circuit 12A through the first transmission channel 181, and when receiving the second control signal, the first control unit 171 controls the second transmission channel 182 to be turned on, and the clock signal output by the level conversion circuit 16 is transmitted to the first scan driving circuit 12A through the second transmission channel 182.
Through setting up first control unit 171 between level shifter circuit 16 and scan driving circuit 12 to corresponding first transmission channel 181 and the second transmission channel 182 of setting up, make first control unit 171 can control clock signal and pass through first transmission channel 181 and second transmission channel 182 transmission to scan driving circuit 12 at the same time, thereby avoided only a transmission channel to appear when transmitting clock signal's the condition that generates heat, and through the switching of transmission channel, can effectively prevent the heavy current to pass through, and then cause the damage of circuit, effectively promoted circuit protection ability.
Specifically, the first control unit 171 includes a first switching tube M1 and a second switching tube M2, wherein a gate of the first switching tube M1 is connected to the control signal end EN for receiving the first control signal from the control signal end EN, a source of the first switching tube M1 is connected to the level shifter circuit 16, and a drain of the first switching tube M1 is connected to the first scan driver circuit 12A for being turned on when receiving the first control signal to transmit the clock signal to the first scan driver circuit 12A.
The gate of the second switching tube M2 is connected to the control signal end EN, for receiving the second control signal from the control signal end EN, the source of the second switching tube M2 is connected to the level shifter 16, and the drain of the second switching tube M2 is connected to the first scan driving circuit 12A, for being turned on when receiving the second control signal, so as to transmit the clock signal to the first scan driving circuit 12A.
The first switching tube M1 is an N-type switching tube, and is configured to be turned on when a high level signal or a positive polarity signal is received, the second switching tube M2 is a P-type switching tube, and is configured to be turned on when a low level signal or a negative polarity signal is received, that is, the first control signal is a high level signal or a positive polarity signal, the second control signal is a low level signal or a negative polarity signal, that is, when the control signal end EN outputs the high level signal, the first switching tube M1 is turned on, the second switching tube M2 is turned off, so that the first transmission channel 181 transmits a clock signal, and when the control signal end EN outputs the low level signal, the first switching tube M1 is turned off, and the second switching tube M2 is turned on, so that the second transmission channel 182 transmits the clock signal.
Of course, the first switching tube M1 may be a P-type switching tube, the second switching tube M2 may be an N-type switching tube, and the first control signal may be a low level signal or a negative polarity signal, and the second control signal may be a high level signal or a positive polarity signal.
In the exemplary embodiment, the display panel 10 further includes a second scan driving circuit 12B, a second control unit 172, a third transmission channel 183, and a fourth transmission channel 184, wherein the second scan driving circuit 12B, the second control unit 172, the third transmission channel 183, and the fourth transmission channel 184 are disposed between the scan driving circuit 12 and the level shifter circuit 16, that is, the level shifter circuit 16 is connected to the second scan driving circuit 12B through the second control unit 172 and the third transmission channel 183, and the level shifter circuit 16 is also connected to the second scan driving circuit 12B through the second control unit 172 and the fourth transmission channel 184. The second control unit 172 is connected to the control signal end EN, and is configured to receive a control signal from the control signal end EN, when receiving the first control signal, the second control unit 172 controls the third transmission channel 183 to be turned on, the clock signal output by the level shifter circuit 16 is transmitted to the scan driving circuit 12 via the third transmission channel 183, and when receiving the second control signal, the second control unit 172 controls the fourth transmission channel 184 to be turned on, and the clock signal output by the level shifter circuit 16 is transmitted to the scan driving circuit 12 via the fourth transmission channel 184.
Specifically, the second control unit 172 includes a third switching tube M3 and a fourth switching tube M4, wherein a gate of the third switching tube M3 is connected to the control signal end EN for receiving the first control signal from the control signal end EN, a source of the third switching tube M3 is connected to the level shifter circuit 16, and a drain of the third switching tube M3 is connected to the second scan driver circuit 12B for being turned on when receiving the first control signal to transmit the clock signal to the second scan driver circuit 12B.
The gate of the fourth switching tube M4 is connected to the control signal end EN, for receiving the second control signal from the control signal end EN, the source of the fourth switching tube M4 is connected to the level shifter 16, and the drain of the fourth switching tube M4 is connected to the second scan driving circuit 12B, for being turned on when receiving the second control signal, so as to transmit the clock signal to the second scan driving circuit 12B.
The third switching tube M3 is an N-type switching tube, and is configured to be turned on when receiving a high level signal, the fourth switching tube M4 is a P-type switching tube, and is configured to be turned on when receiving a low level signal, that is, the first control signal is a high level signal, the second control signal is a low level signal, that is, when the control signal end EN outputs the high level signal, the third switching tube M3 is turned on, the fourth switching tube M4 is turned off, so that the first transmission channel 181 transmits a clock signal, when the control signal end EN outputs the low level signal, the third switching tube M3 is turned off, and the fourth switching tube M4 is turned on, so that the second transmission channel 182 transmits the clock signal.
Referring to fig. 5, fig. 5 is a schematic diagram of the waveform of the control signal output in fig. 4.
As shown in fig. 5, when the first scan driving circuit 12A or the second scan driving circuit 12B controls the pixel unit to perform image display, the control signal terminal EN alternately outputs the first control signal V1 and the second control signal V2 in a plurality of consecutive periods, for example, the first control signal is output in a first period T1, the second control signal is output in a second period T2, wherein the first period T1 is a period of m-frame image display, and the second period T2 is a period of at least n-frame image display, wherein 1 < m,1 < n.
For example, when the first scan driving circuit 12A controls the pixel unit to perform image display, the control clock signal is transmitted to the scan driving circuit 12 through the first transmission channel 181 in the first period T1, and the control clock signal is transmitted to the scan driving circuit 12 through the second transmission channel 182 in the second period T2.
For example, m=10, that is, the first period T1 is a period for continuously displaying 10 frames of images, n=20, that is, the second period T2 is a period for continuously displaying 20 frames of images, in the first period T1, the first switching transistor M1 is turned on, the clock signal is continuously transmitted to the scan driving circuit 12 through the first transmission channel 181, in the second period T2, the second switching transistor M2 is turned on, the clock signal is continuously transmitted to the scan driving circuit 12 through the second transmission channel 182, and the first period T1 and the second period T2 are alternately arranged. The second scan driving circuit 12B controls the pixel units to perform image display similar to the first scan driving circuit 12A, and will not be described herein.
In an exemplary embodiment, the duration of the first period T1 and the second period T2 may be set according to specific needs, for example, the first period T1 is set to a duration of displaying 5 frames of images, the second period T2 is a duration of displaying 5 frames of images, and the application is not limited thereto.
When the first scan driving circuit 12A or the second scan driving circuit 12B individually drives the pixel units to perform image display, the first period T1 and the second period T2 are controlled to be at least two frames of image display time at this time due to a larger load of one scan driving circuit, so that the problems of line heating and burning can be effectively alleviated. Or the first period T1 and the second period T2 may be controlled as required to be the duration of displaying one frame of image, which is not limited in this application.
Referring to fig. 6, a waveform diagram of the control signal output as shown in fig. 4 is provided in the second embodiment of fig. 6.
As shown in fig. 6, when the first scan driving circuit 12A and the second scan driving circuit 12B control the pixel units to display images at the same time, the control signal terminal EN outputs the first control signal V1 and the second control signal V2 alternately in a plurality of continuous frame images, for example, in any adjacent first period T1 and second period T2, the control signal terminal EN outputs the first control signal V1 to drive the first switching tube M1 to be turned on in the first period T1, the clock signal is transmitted to the first scan driving circuit 12A through the first transmission channel 181, and the clock signal is transmitted to the second scan driving circuit 12B through the third transmission channel 183, and in the second period T2, the control signal terminal EN outputs the second control signal V2 to drive the second switching tube M2 to be turned on, and the clock signal is transmitted to the first scan driving circuit 12A through the second transmission channel 182, and the clock signal is transmitted to the second scan driving circuit 12B through the fourth transmission channel 184, wherein the first period T1 and the second period T2 are the duration of one frame image display.
In the exemplary embodiment, the duration of the first period T1 and/or the second period T2 may also be set to the duration of at least two frames of image display when the first scan driving circuit 12A and the second scan driving circuit 12B control the pixel units to perform image display at the same time, which is not limited in this application.
The first scanning driving circuit 12A and the second scanning driving circuit 12B are controlled to simultaneously control the pixel units to display images, so that the loads of the first scanning driving circuit 12A and the second scanning driving circuit 12B are reduced, the first control signal and the second control signal are simultaneously output alternately in two continuous frames, the heating condition of a circuit can be further reduced, and the control signal is switched once after one frame of image is displayed, so that the circuit can be effectively prevented from being damaged by high current.
It is to be understood that the invention is not limited in its application to the examples described above, but is capable of modification and variation in light of the above teachings by those skilled in the art, and that all such modifications and variations are intended to be included within the scope of the appended claims.

Claims (10)

1. The display panel comprises a level conversion circuit, a first scanning driving circuit and a plurality of pixel units, wherein the level conversion circuit is electrically connected with the first scanning driving circuit and is used for outputting a clock signal, and the first scanning driving circuit controls the pixel units to receive data signals for image display according to the clock signal so as to display images;
the display panel is characterized by further comprising a first control unit, a first transmission channel and a second transmission channel, wherein the level conversion circuit is connected with the first scanning driving circuit through the first control unit and the first transmission channel, and the level conversion circuit is also connected with the first scanning driving circuit through the first control unit and the second transmission channel;
the first control unit is used for controlling the clock signals output by the level conversion circuit to be transmitted to the first scanning driving circuit through the first transmission channel and the second transmission channel at different time.
2. The display panel of claim 1, wherein the first control unit is connected to a control signal terminal, and when the control signal terminal outputs a first control signal, the first control unit controls the clock signal to be transmitted to the first scan driving circuit through the first transmission channel;
when the control signal end outputs a second control signal, the first control unit controls the clock signal to be transmitted to the first scanning driving circuit through the second transmission channel.
3. The display panel according to claim 2, wherein the control signal terminal outputs the first control signal in any adjacent first frame image display period and second frame image display period, and the control signal terminal outputs the second control signal in the first frame image display period.
4. The display panel of claim 2, wherein the control signal terminal outputs a first control signal in any adjacent first period and second period, and the control signal terminal outputs a second control signal in the first period;
the duration of the first period is the duration of m frames of images, the duration of the second period is the duration of n frames of images, m is more than 1, and n is more than 1.
5. The display panel according to claim 3 or 4, wherein the first control unit includes a first switching tube and a second switching tube, a gate of the first switching tube is connected to the control signal terminal, a source of the first switching tube is connected to the level conversion circuit through the first transmission channel, and a drain of the first switching tube is connected to the first scan driving circuit through the first transmission channel, and is turned on when receiving the first control signal, so as to control the clock signal to be transmitted to the first scan driving circuit through the first transmission channel;
the grid electrode of the second switching tube is connected to the control signal end, the source electrode of the second switching tube is connected to the level conversion circuit through the second transmission channel, the drain electrode of the second switching tube is connected to the first scanning driving circuit through the second transmission channel and is used for being conducted when the second control signal is received so as to control the clock signal to be transmitted to the first scanning driving circuit through the second transmission channel.
6. The display panel according to claim 5, further comprising a second scan driving circuit, a second control unit, a third transmission channel, and a fourth transmission channel, wherein the level shift circuit is connected to the second scan driving circuit through the second control unit and the third transmission channel, and wherein the level shift circuit is further connected to the second scan driving circuit through the second control unit and the fourth transmission channel;
the second control unit is used for controlling the clock signals output by the level conversion circuit to be transmitted to the second scanning driving circuit through the first transmission channel and the second transmission channel at different time.
7. The display panel according to claim 6, wherein the second control unit controls the clock signal to be transmitted to the second scan driving circuit via the third transmission channel when the control signal terminal outputs the first control signal, and controls the clock signal to be transmitted to the second scan driving circuit via the fourth transmission channel when the control signal terminal outputs the second control signal.
8. The display panel according to claim 6, wherein when the scanning driving circuit or the second scanning driving circuit controls the pixel unit to perform image display, the control signal terminal outputs the first control signal in any adjacent first frame image display period and second frame image display period, and the control signal terminal outputs the second control signal in the first frame image display period.
9. The display panel according to claim 6, wherein when the scan driving circuit and the second scan driving circuit simultaneously control the pixel unit to perform image display, the control signal terminal outputs the first control signal in a first period and the second control signal in a second period adjacent to each other, and the control signal terminal outputs the second control signal in the first period;
the duration of the first period is the duration of m frames of images, the duration of the second period is the duration of n frames of images, m is more than 1, and n is more than 1.
10. A display device comprising a power module and a display panel according to any one of claims 1-9, the power module being adapted to provide a driving power for image display of the display panel.
CN202311682781.2A 2023-12-07 2023-12-07 Display panel and display device Pending CN117524071A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311682781.2A CN117524071A (en) 2023-12-07 2023-12-07 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311682781.2A CN117524071A (en) 2023-12-07 2023-12-07 Display panel and display device

Publications (1)

Publication Number Publication Date
CN117524071A true CN117524071A (en) 2024-02-06

Family

ID=89741990

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311682781.2A Pending CN117524071A (en) 2023-12-07 2023-12-07 Display panel and display device

Country Status (1)

Country Link
CN (1) CN117524071A (en)

Similar Documents

Publication Publication Date Title
KR100783695B1 (en) Low power-dissipating liquid crystal display
KR20060097552A (en) Driving system of liquid crystal display
US8643639B2 (en) Non-volatile display module and non-volatile display apparatus
CN111583847B (en) Display module, driving method thereof and display device
CN115132129B (en) Driving circuit, display module and display device
US11605360B2 (en) Circuit and method for preventing screen flickering, drive circuit for display panel, and display apparatus
KR20240003745A (en) Drive circuit, display module and display device
US20170140720A1 (en) Source drive and lcd device
US20170285405A1 (en) Display panel, display module and display method thereof, and display device
CN101295462A (en) Electronic system having display panel
US20080068323A1 (en) Integrated display panel
US11308911B2 (en) Display device, driving method, and display system
US11887556B2 (en) Data driving circuit, display module, and display device
CN117524071A (en) Display panel and display device
CN116168656A (en) Array substrate and display panel
US11199925B2 (en) Touch display module and electronic device
US7893911B2 (en) Display panel and driving method thereof
CN210378428U (en) Control circuit and display device
US20070252799A1 (en) Liquid crystal display panel having photoelectric cell unit and mobile phone using same
CN115424593B (en) Data driving circuit, display module and display device
KR101216172B1 (en) Liquid crystal display
JP2006091051A (en) Display device and electronic equipment with the same
CN218729850U (en) Display panel, display module and display device
CN116455197A (en) Power supply adjusting circuit and display terminal
KR100861276B1 (en) Liquid crystal display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination