CN117496886A - Method and system for improving display performance of LED display screen - Google Patents

Method and system for improving display performance of LED display screen Download PDF

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Publication number
CN117496886A
CN117496886A CN202311853965.0A CN202311853965A CN117496886A CN 117496886 A CN117496886 A CN 117496886A CN 202311853965 A CN202311853965 A CN 202311853965A CN 117496886 A CN117496886 A CN 117496886A
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China
Prior art keywords
led
wiring
line
row
pmos channel
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CN202311853965.0A
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Chinese (zh)
Inventor
席光义
梁家菠
罗会杰
彭洪非
娄文海
席庆男
宋林
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Yuanxu Semiconductor Technology Beijing Co ltd
Yuanxu Semiconductor Technology Tianjin Co ltd
Yuanxu Semiconductor Technology Co ltd
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Yuanxu Semiconductor Technology Beijing Co ltd
Yuanxu Semiconductor Technology Tianjin Co ltd
Yuanxu Semiconductor Technology Co ltd
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Application filed by Yuanxu Semiconductor Technology Beijing Co ltd, Yuanxu Semiconductor Technology Tianjin Co ltd, Yuanxu Semiconductor Technology Co ltd filed Critical Yuanxu Semiconductor Technology Beijing Co ltd
Priority to CN202311853965.0A priority Critical patent/CN117496886A/en
Publication of CN117496886A publication Critical patent/CN117496886A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention relates to the technical field of LED display screens, and provides a method and a system for improving display performance of an LED display screen, wherein the method comprises the following steps: a time-sharing power supply control signal is added into a positive gating signal output by the row driving chip, and the time-sharing power supply control signal is used for controlling the PMOS channel of the row driving chip which provides voltage for the LEDs to be opened in a time-sharing mode; the PCB wiring parameters of the PCB lamp panel of the LED display screen are calculated, the PCB wiring parameters comprise the line width of the LED wiring, the node position of the LED wiring and the wiring line width from the PMOS channel to the node of the LED wiring, so that the reasonable parameters such as the line width of the LED wiring and the wiring length-width ratio of the PMOS channel are calculated and designed, the impedance consistency between the PMOS channel of each row driving chip and the LED wiring is ensured, and the problem that various display effects are poor due to overlarge voltage and current differences between the LED wirings is solved.

Description

Method and system for improving display performance of LED display screen
Technical Field
The invention belongs to the technical field of LED display screens, and particularly relates to a method and a system for improving display performance of an LED display screen.
Background
The LED display screen is widely applied, such as information propagation markets of commercial display, cultural performance, advertising media, stadiums, command centers, studios and the like, and can meet different environmental requirements. In printed circuit board (Printed Circuit Board, PCB) lamp panel development designs, high density lamp panels are increasingly being designed in product development, particularly in small pitch lamp panel product designs.
At present, the display performance of the LED display screen in the market is very different, particularly the display of the ultra-high definition small-space LED display, and a high scanning screen is generally adopted. Such a configuration is prone to in-board coupling phenomenon, and is difficult to meet the display requirements of high-end customers, and the main reason is defects caused by unreasonable design of the PCB lamp panel. The current improvement scheme is that the blanking voltage of the row driving chip is regulated down (kept at a certain level after the discharge is finished) by a software program, so that the coupling phenomenon can be improved to a certain extent, but the method can cause the problems of larger back pressure of the lamp beads, short-circuit caterpillars, shortened service life of the lamp beads and the like.
The LED display screen gradually develops towards the Mini/Micro LED direction, the scanning number is higher and higher, the in-lamp panel coupling phenomenon caused by unreasonable design of the PCB lamp panel is more and more obvious, the performance of the LED display screen is greatly reduced, and the requirement of high-end customers on the display performance cannot be met.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a method for improving the display performance of an LED display screen, which aims at solving the problems that the LED display screen gradually develops towards the Mini/Micro LED direction in the prior art, the scanning number is higher and higher, the in-board coupling phenomenon caused by unreasonable design of a PCB (printed circuit board) lamp board is more and more obvious, the performance of the LED display screen is greatly reduced, and the requirement of high-end customers on the display performance cannot be met.
The technical scheme provided by the invention is as follows: a method for improving display performance of an LED display screen, the method comprising the steps of:
a time-sharing power supply control signal is added into a positive gating signal output by the row driving chip, and the time-sharing power supply control signal is used for controlling a PMOS channel of the row driving chip for providing voltage for the LEDs to be opened in a time-sharing mode;
and calculating PCB wiring parameters of the PCB lamp panel of the LED display screen, wherein the PCB wiring parameters comprise LED wiring line widths, LED wiring line node positions and wiring line widths from the PMOS channels to the LED wiring line nodes.
As an improved scheme, the row driving chip comprises a plurality of PMOS tubes, and anodes of all LEDs on the PCB lamp panel of the LED display screen are connected together.
As an improved scheme, the step of calculating the PCB routing parameters of the PCB lamp panel of the LED display screen specifically includes the following steps:
calculating the line width of the LED row line where the LEDs which are connected together are located;
calculating the node position of the LED row line corresponding to each LED row line, wherein the node position of the row line is a via hole position where the LED row line is intersected and conducted with a PMOS channel of the row driving chip;
and calculating the wiring line width and the wiring length-width ratio of the PMOS channel to the LED row line, which accord with the wiring impedance consistency of the PMOS channel to the LED row line of the row driving chip.
As an improvement, the line width of the LED row line satisfies the following formula:
W h =1.2*I lamp bead current * K/1000 in mm, wherein K is the number of lamps in a row line, the lamps in a group beingRefers to a pixel point composed of RGB in LED display.
As an improvement, the distance L between the node position of the LED row line and the starting point of the LED row line satisfies the following formula:
l=pixel pitch (N-1)/2, where N is the number of LED row lines.
As an improved scheme, the wiring line width from the PMOS channel to the LED row line satisfies the following calculation formula:
a N WL/M, wherein WL is the PMOS channel trace length, M is a constant, N is the number of PMOS channels, and is the same as the number of LED row lines;
the aspect ratio of the PMOS channel routing meets the following calculation formula:
the aspect ratio of the PMOS channel wiring is b in turn 1 =WL 1 /a 1 、b 2 =WL 2 /a 2 、…、b N-1 =WL N-1 /a N-1、 b N =WL N /a N And the difference of the aspect ratios of adjacent PMOS channel wires is smaller than P, which is a constant.
Another embodiment of the present invention provides a system for improving display performance of an LED display screen, the system comprising:
the time-sharing power supply control signal adding module is used for controlling the addition of a time-sharing power supply control signal into a positive strobe signal output by the row driving chip, and the time-sharing power supply control signal is used for controlling the time-sharing opening of a PMOS channel of the row driving chip for providing voltage for the LEDs;
the PCB wiring parameter calculation module is used for calculating PCB wiring parameters of the PCB lamp panel of the LED display screen, wherein the PCB wiring parameters comprise LED wiring line widths, LED wiring line node positions and wiring line widths from the PMOS channel to the LED wiring line nodes.
As an improved scheme, the row driving chip comprises a plurality of PMOS tubes, and anodes of all LEDs on the PCB lamp panel of the LED display screen are connected together.
As an improved scheme, the PCB routing parameter calculating module specifically includes:
the LED line width calculation module is used for calculating the line width of the LED line where the LEDs which are connected together are located;
the LED row line node position calculation module is used for calculating the node position of the LED row line corresponding to each LED row line, wherein the row line node position is a via hole position where the LED row line is intersected and conducted with a PMOS channel of the row driving chip;
the wiring impedance consistency calculation module is used for calculating wiring line width and wiring length-width ratio of the PMOS channel to the LED row line, which accord with the wiring impedance consistency from the PMOS channel of the row driving chip to the LED row line.
As an improvement, the line width of the LED row line satisfies the following formula:
W h =1.2*I lamp bead current * K/1000, wherein K is the number of a group of lamps of a row line, and the group of lamps refers to a pixel point formed by RGB in LED display;
the distance L between the node position of the LED row line and the starting point of the LED row line meets the following calculation formula:
l=pixel pitch (N-1)/2, where N is the number of LED row lines;
the wiring line width from the PMOS channel to the LED row line meets the following calculation formula:
a N WL/M, wherein WL is the PMOS channel trace length, M is a constant, N is the number of PMOS channels, and is the same as the number of LED row lines;
the aspect ratio of the PMOS channel routing meets the following calculation formula:
the aspect ratio of the PMOS channel wiring is b in turn 1 =WL 1 /a 1 、b 2 =WL 2 /a 2 、…、b N-1 =WL N-1 /a N-1、 b N =WL N /a N And the difference of the aspect ratios of adjacent PMOS channel wires is smaller than P, which is a constant.
In the embodiment of the invention, a time-sharing power supply control signal is added into a positive gating signal output by a row driving chip, and the time-sharing power supply control signal is used for controlling a PMOS channel of the row driving chip which provides voltage for an LED to be opened in a time-sharing manner; and calculating PCB wiring parameters of the PCB lamp panel of the LED display screen, wherein the PCB wiring parameters comprise LED wiring line width, LED wiring line node position and wiring line width from the PMOS channel to the LED wiring line node, so that reasonable parameters such as the LED wiring line width, the PMOS channel wiring length-width ratio and the like are calculated and designed, the impedance consistency between the PMOS channel of each row driving chip and the LED wiring line is ensured, and the problem of poor various display effects caused by overlarge voltage and current difference between the LED wiring lines is solved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. Like elements or portions are generally identified by like reference numerals throughout the several figures. In the drawings, elements or portions thereof are not necessarily drawn to scale.
FIG. 1 is a flow chart of an implementation of a method for improving display performance of an LED display screen;
FIG. 2 is a schematic diagram of a PCB wiring of a PCB lamp panel of an LED display screen;
FIG. 3 is a flowchart of an implementation of calculating PCB routing parameters of a PCB lamp panel of an LED display screen;
fig. 4 is a block diagram of a system for improving display performance of an LED display screen according to the present invention.
Detailed Description
Embodiments of the technical scheme of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are only for the purpose of more clearly illustrating the technical aspects of the present invention, and thus are merely exemplary and are not to be construed as limiting the scope of the present invention.
Fig. 1 is a flowchart of an implementation of a method for improving display performance of an LED display screen, which specifically includes the following steps:
in step S101, adding a time-sharing power supply control signal to a positive strobe signal output by a row driving chip, where the time-sharing power supply control signal is used to control to open a PMOS channel of the row driving chip that provides voltage for the LED in a time-sharing manner;
in step S102, calculating PCB routing parameters of the LED display screen PCB light board, where the PCB routing parameters include an LED row line width, an LED row line node position, and a routing line width from a PMOS channel to an LED row line node.
In the embodiment of the invention, as shown in fig. 2, a row driving chip, an LED row line (the number is N) and a column driving chip are arranged on a PCB panel of the LED display screen, the row driving chip includes a plurality of PMOS tubes, anodes of all LEDs on the PCB panel of the LED display screen are commonly connected together, and current flows are input from an external power terminal, pass through the row driving chip to the LED anodes, and then are grounded to the column driving chip to form a loop. The row driving chip (comprising MOS tubes) mainly provides voltage control for each row of LEDs when scanning is completed, and then the row channels are output to the LED row lines;
referring to fig. 2, H1, H2 …, HN are row lines;
the marked numbers 1 to N are the node positions of the LED row lines, namely the node positions of the row lines are the hole positions of the through holes which are communicated with the PMOS channels of the row driving chip in a crossing way;
the PMOS channels OUT1, OUT2 and … of the row driving chip and the PMOS channels OUTN are correspondingly connected to the corresponding positions of the LED row line nodes.
Fig. 3 is a flowchart of an implementation of calculating PCB routing parameters of a PCB lamp panel of an LED display screen, which specifically includes:
in step S201, calculating the line width of the LED row line where the LEDs that are commonly connected together are located;
wherein, the line width of the LED line meets the following calculation formula:
W h =1.2*I lamp bead current * K/1000, wherein K is the number of a group of lamps of a row line, and the group of lamps refers to a pixel point formed by RGB in LED display; the bead current refers to the current of a group of lamps (RGB forms a pixel point) under the required brightness, for example, the group of lamp current is 5ma, and the total number of the lamps in the LED row line is 100 groups, so that the line width of the LED row line should satisfy 1.2×5×100/1000=0.6 mm.
In step S202, calculating the node position of the LED row line corresponding to each LED row line, where the node position of the row line is a via hole where the LED row line is intersected and turned on with the PMOS channel of the row driving chip;
the distance L between the node position of the LED row line and the starting point of the LED row line satisfies the following calculation formula:
l=pixel pitch (N-1)/2, where N is the number of LED row lines in mm, the starting end coordinates of the LED row lines are (0, 0), for example, the pixel pitch is P0.9, and there are 100 pixels on the LED row lines, and then l=0.9×100-1)/2=44.55 mm, so that the node position (0, 44.55), the position error is positive or negative 3×pixel pitch distances, for example, the node position (0, 44.55±3×0.9), are all in a reasonable range.
In step S203, the line width and the line aspect ratio of the PMOS channel to the LED row line are calculated in accordance with the line impedance consistency of the PMOS channel to the LED row line of the row driver chip.
The wiring line width from the PMOS channel to the LED row line meets the following calculation formula:
a N WL/M, wherein WL is the PMOS channel routing length, M is a constant, the general selected value 50, n is the number of PMOS channels, and is the same as the number of LED row lines;
the aspect ratio of the PMOS channel routing meets the following calculation formula:
the aspect ratio of the PMOS channel wiring is b in turn 1 =WL 1 /a 1 、b 2 =WL 2 /a 2 、…、b N-1 =WL N-1 /a N-1、 b N =WL N /a N And the difference of the aspect ratios of adjacent PMOS channel wires is smaller than P, P is a constant, and P is optional 10.
In the embodiment of the invention, reasonable parameters such as the line width of the LED row lines, the length-width ratio of the wiring of the PMOS channels and the like are calculated and designed, so that the impedance consistency between the PMOS channels of each row driving chip and the LED row lines is ensured, and the problems of poor display effects caused by overlarge voltage and current differences between the LED row lines, such as low gray color cast, serious coupling and the like, are reduced.
Fig. 4 is a block diagram of a display performance improving system for an LED display screen according to the present invention, and for convenience of explanation, only a portion related to an embodiment of the present invention is shown in the drawing. The LED display screen display performance improving system is a program module which is built in corresponding electronic equipment or a terminal.
The LED display screen display performance improving system comprises:
the time-sharing power supply control signal adding module 11 is used for controlling the addition of a time-sharing power supply control signal to a positive strobe signal output by the row driving chip, wherein the time-sharing power supply control signal is used for controlling the time-sharing opening of a PMOS channel of the row driving chip for providing voltage for the LEDs;
the PCB wiring parameter calculation module 12 is configured to calculate PCB wiring parameters of the LED display screen PCB lamp panel, where the PCB wiring parameters include an LED line width, an LED line node position, and a wiring line width from the PMOS channel to the LED line node.
In this embodiment, the PCB routing parameter calculation module 12 specifically includes:
the LED row line width calculation module 13 is used for calculating the line width of the LED row line where the LEDs which are connected together are located;
the LED row line node position calculation module 14 is configured to calculate an LED row line node position corresponding to each LED row line, where the row line node position is a via hole position where the LED row line and the PMOS channel of the row driving chip are intersected and turned on;
the wiring impedance consistency calculating module 15 is configured to calculate a wiring line width and a wiring aspect ratio of the PMOS channel to the LED row line according to the wiring impedance consistency from the PMOS channel to the LED row line of the row driving chip.
The specific implementation of each module is described in the above method embodiment, and is not described herein.
In the embodiment of the invention, a time-sharing power supply control signal is added into a positive gating signal output by a row driving chip, and the time-sharing power supply control signal is used for controlling a PMOS channel of the row driving chip which provides voltage for an LED to be opened in a time-sharing manner; and calculating PCB wiring parameters of the PCB lamp panel of the LED display screen, wherein the PCB wiring parameters comprise LED wiring line width, LED wiring line node position and wiring line width from the PMOS channel to the LED wiring line node, so that reasonable parameters such as the LED wiring line width, the PMOS channel wiring length-width ratio and the like are calculated and designed, the impedance consistency between the PMOS channel of each row driving chip and the LED wiring line is ensured, and the problems of poor various display effects caused by overlarge voltage and current difference between the LED wiring lines, such as low gray color cast, serious coupling and the like are reduced.
The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention, and are intended to be included within the scope of the appended claims and description.

Claims (10)

1. The method for improving the display performance of the LED display screen is characterized by comprising the following steps of:
a time-sharing power supply control signal is added into a positive gating signal output by the row driving chip, and the time-sharing power supply control signal is used for controlling a PMOS channel of the row driving chip for providing voltage for the LEDs to be opened in a time-sharing mode;
and calculating PCB wiring parameters of the PCB lamp panel of the LED display screen, wherein the PCB wiring parameters comprise LED wiring line widths, LED wiring line node positions and wiring line widths from the PMOS channels to the LED wiring line nodes.
2. The method for improving display performance of an LED display according to claim 1, wherein the row driving chip comprises a plurality of PMOS transistors, and anodes of all LEDs on a PCB panel of the LED display are commonly connected together.
3. The method for improving display performance of an LED display screen according to claim 2, wherein the step of calculating PCB routing parameters of the PCB panel of the LED display screen specifically comprises the steps of:
calculating the line width of the LED row line where the LEDs which are connected together are located;
calculating the node position of the LED row line corresponding to each LED row line, wherein the node position of the row line is a via hole position where the LED row line is intersected and conducted with a PMOS channel of the row driving chip;
and calculating the wiring line width and the wiring length-width ratio of the PMOS channel to the LED row line, which accord with the wiring impedance consistency of the PMOS channel to the LED row line of the row driving chip.
4. The method for improving display performance of an LED display screen according to claim 3, wherein the line width of the LED row line satisfies the following formula:
W h =1.2*I lamp bead current * K/1000, where K is the number of a group of lamps in a row line, the group of lamps being one pixel of RGB composition in an LED display.
5. The method for improving display performance of an LED display screen according to claim 3, wherein the distance L between the node position of the LED row line and the starting point of the LED row line satisfies the following formula:
l=pixel pitch (N-1)/2, where N is the number of LED row lines.
6. The method for improving display performance of an LED display screen according to claim 3, wherein the line width from the PMOS channel to the LED row line satisfies the following calculation formula:
a N WL/M, wherein WL is the PMOS channel trace length, M is a constant, N is the number of PMOS channels, and is the same as the number of LED row lines;
the aspect ratio of the PMOS channel routing meets the following calculation formula:
the aspect ratio of the PMOS channel wiring is b in turn 1 =WL 1 /a 1 、b 2 =WL 2 /a 2 、…、b N-1 =WL N-1 /a N-1、 b N =WL N /a N And the difference of the aspect ratios of adjacent PMOS channel wires is smaller than P, which is a constant.
7. A system for improving display performance of an LED display screen, the system comprising:
the time-sharing power supply control signal adding module is used for controlling the addition of a time-sharing power supply control signal into a positive strobe signal output by the row driving chip, and the time-sharing power supply control signal is used for controlling the time-sharing opening of a PMOS channel of the row driving chip for providing voltage for the LEDs;
the PCB wiring parameter calculation module is used for calculating PCB wiring parameters of the PCB lamp panel of the LED display screen, wherein the PCB wiring parameters comprise LED wiring line widths, LED wiring line node positions and wiring line widths from the PMOS channel to the LED wiring line nodes.
8. The LED display screen display performance enhancement system of claim 7, wherein the row driver chip comprises a plurality of PMOS transistors, and anodes of all LEDs on the LED display screen PCB are commonly connected together.
9. The LED display screen display performance improvement system of claim 8, wherein said PCB routing parameter calculation module specifically comprises:
the LED line width calculation module is used for calculating the line width of the LED line where the LEDs which are connected together are located;
the LED row line node position calculation module is used for calculating the node position of the LED row line corresponding to each LED row line, wherein the row line node position is a via hole position where the LED row line is intersected and conducted with a PMOS channel of the row driving chip;
the wiring impedance consistency calculation module is used for calculating wiring line width and wiring length-width ratio of the PMOS channel to the LED row line, which accord with the wiring impedance consistency from the PMOS channel of the row driving chip to the LED row line.
10. The method of claim 9, wherein the line width of the LED row line satisfies the following formula:
W h =1.2*I lamp bead current * K/1000 in millimeters, wherein K is the number of a set of lights in a row line, the set of lightsThe pixel point is composed of RGB in LED display;
the distance L between the node position of the LED row line and the starting point of the LED row line meets the following calculation formula:
l=pixel pitch (N-1)/2, where N is the number of LED row lines;
the wiring line width from the PMOS channel to the LED row line meets the following calculation formula:
a N WL/M, wherein WL is the PMOS channel trace length, M is a constant, N is the number of PMOS channels, and is the same as the number of LED row lines;
the aspect ratio of the PMOS channel routing meets the following calculation formula:
the aspect ratio of the PMOS channel wiring is b in turn 1 =WL 1 /a 1 、b 2 =WL 2 /a 2 、…、b N-1 =WL N-1 /a N-1、 b N =WL N /a N And the difference of the aspect ratios of adjacent PMOS channel wires is smaller than P, which is a constant.
CN202311853965.0A 2023-12-29 2023-12-29 Method and system for improving display performance of LED display screen Pending CN117496886A (en)

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王安明、祁文哲: "《单片机原理与接口技术》", 31 January 2013, 重庆大学出版社, pages: 146 - 147 *

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