CN117472285A - Intelligent operation acceleration method for solid state disk, computer equipment and storage medium - Google Patents
Intelligent operation acceleration method for solid state disk, computer equipment and storage medium Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0647—Migration mechanisms
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention discloses an intelligent operation acceleration method for a solid state disk, computer equipment and a storage medium, which relate to the field of electric digital data processing and solve the problem that the solid state disk is slower when writing or reading data files and cannot reasonably cope with the data files in various conditions at the present stage, and the method comprises the following steps: the host sends a writing command and an original data file to the solid state disk; the main control chip of the solid state disk receives the writing command and compresses the original data file; the main control chip of the solid state disk stores the compressed data files corresponding to the original data files into the solid state disk according to the use frequency of the original data files.
Description
Technical Field
The invention belongs to the field of electric digital data processing, relates to a solid state disk operation acceleration technology, and in particular relates to an intelligent operation acceleration method for a solid state disk, computer equipment and a storage medium.
Background
Hard disks are the most prominent storage devices for computers for long-term storage and retrieval of data. It consists of one or more rotating magnetic disks and a magnetic head for reading and writing data. The hard disk is usually arranged in the computer, but can also be used as external equipment to be connected to the computer, and compared with the traditional mechanical hard disk, the solid state hard disk has faster read-write speed and lower access delay, so that the performance of the computer system is improved, the starting time, the loading speed of an application program and the data transmission speed can be increased, and the user experience and the working efficiency are improved;
however, at the present stage, the solid state disk is slower when writing or reading the data file, and cannot make reasonable response when facing to the data file of various conditions, so that the use experience of the solid state disk is poor;
therefore, we propose an intelligent operation acceleration method for a solid state disk, a computer device and a storage medium.
Disclosure of Invention
Aiming at the defects existing in the prior art, the invention aims to provide an intelligent operation acceleration method for a solid state disk, computer equipment and a storage medium.
The technical problems to be solved by the invention are as follows:
how to realize the acceleration operation of the solid state disk based on file analysis.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
the intelligent operation acceleration method for the solid state disk comprises the following steps:
step P1, a host computer sends a read command to a solid state disk;
step P2, the main control chip of the solid state disk receives the read command and executes the read operation;
step P3, the main control chip of the solid state disk predicts a predicted file to be operated by a user according to the read file;
and P4, matching the main control chip of the solid state disk to a corresponding physical address according to a preset logical address of the predicted file, and then placing the predicted file corresponding to the physical address into a cache layer.
Further, the step P2 further includes the following sub-steps:
step P201, when receiving a command for reading a file, matching a real-time logical address of a corresponding file with a preset logical address in a cache layer to obtain a corresponding physical address;
step P202, the main control chip accesses the flash memory chip through the physical address, reads the related data file and transmits the related data file to the cache region;
in step P203, the host obtains the required file data by reading the buffer.
Further, the step P3 further includes the following sub-steps:
step P301, acquiring an active state of a current host, wherein the active state is an application program or an ongoing task in use by the current host, and the active state is acquired by monitoring an active window of the host;
step P302, screening out a file set related to an application program by the active application program of the host;
step P303, in the file set, acquiring files and access times which are most commonly used in each month in the last three months by the current host computer with a period interval of one month through a file log, and marking each file as a file n, n=1, 2, … …, z and z are positive integers;
the access number of each file in each month is recorded as FWAN, FWBn or FWC, wherein A is the current month, namely the first month, B is the month before the current month, namely the second month, and C is the month before the second month, namely the third month;
step P302, constructing a month-file matrix according to the current monthly file access times of the host, wherein the month-file matrix is shown in the following table:
step P303, calculating the similarity Xsd (A, B) between the first month and the second month and the similarity Xsd (A, C) between the first month and the third month through a formula;
step P304, selecting data of one month with higher similarity as adjacent data to perform prediction calculation, and obtaining a prediction score of each file through calculation;
and step P305, selecting a file with the highest predictive score, and placing the file in a cache region of the solid state disk to wait for operation.
Further, the similarity formula between the first month and the second month specifically includes:
wherein,；
；
。
further, the method comprises the following steps:
step S1, a host sends a writing command and an original data file to a solid state disk;
step S2, a main control chip of the solid state disk receives a writing command and compresses an original data file;
and S3, storing the compressed data file corresponding to the original data file into the solid state disk by the main control chip of the solid state disk according to the use frequency of the original data file.
Further, the step S2 further includes the following sub-steps:
step S201, obtaining an original data file sent by a solid state disk;
step S202, traversing and comparing the original data file, and counting the occurrence frequency of each character in the original data file;
step S203, constructing a Huffman tree according to the characters and the occurrence frequency of each character;
step S204, starting from the root node, assigning a unique binary code to each character;
step S205, each character in the original data file is replaced by a corresponding Huffman code, so as to realize the compression of the original data file.
Further, the step S3 further includes the following sub-steps:
step S301, access conditions of the original data file in three months are obtained through a file log, and total access times of the original data file in three months are recorded;
step S302, comparing the total access times of the original data file with an access times threshold, and dividing the compressed data file corresponding to the original data file into a hot data set if the total access times are smaller than the access times threshold;
dividing the compressed data file corresponding to the original data file into a cold data set when the total access times are greater than the access times threshold;
it should be noted that, the speed of the data file in the hot data layer is greater than the speed of the data file in the cold data layer when accessed;
step S303, dividing the data files in the cold data set and the data files in the hot data set into pages according to fixed sizes respectively;
step S304, the main control chip of the solid state disk writes pages of the file into the flash memory chip one by one, generates a corresponding preset logic address according to the physical address of each page, and records the address mapping relation between the preset logic address and the physical address in the cache layer of the solid state disk.
Further, the method further comprises the following steps when performing the write operation:
step T1, selecting different working modes according to the working conditions of the solid state disk;
step T2, acquiring a data file during writing;
and step T3, acquiring the file size of the data file, and selecting different acceleration methods according to different files.
Further, the step T1 further includes the following sub-steps:
step T101, obtaining the number of write requests received by the solid state disk per second, and recording the write data volume of each write request;
step T102, if the number of the write requests received by the solid state disk in each second is more than 10000, switching the solid state disk to a safe mode;
step T103, if the total written data amount of the solid state disk within one hour is more than 5TB, switching the solid state disk to a safe mode;
and step T104, if the working state of the solid state disk is not in the conditions described in the step T102 and the step T103, the working mode of the solid state disk is a normal mode.
Further, the step T3 further includes the following sub-steps:
step T301, obtaining the size of the written data file at this time;
step T302, if the size of the data file is smaller than the first threshold, writing the data file into the cache layer, and merging a plurality of write operations into a larger write operation;
t303, if the size of the data file is greater than or equal to the first threshold value and less than the second threshold value, performing write operation normally;
and T304, if the size of the data file is larger than or equal to the second threshold value, performing continuous writing operation on the data file.
The invention also provides: a computer device includes a memory storing a computer program which, when executed by a processor, implements an intelligent run acceleration method for a solid state disk.
The invention also provides: a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements an intelligent run acceleration method for a solid state disk.
In summary, due to the adoption of the technical scheme, the beneficial effects of the invention are as follows:
1. in the writing process of the data file, the fixed hard disk in the invention firstly judges whether the writing operation is malicious attack or not, selects the working state as a normal mode or a safe mode, then selects different types of acceleration methods according to the file size of the data file, compresses the data file in the writing process, and simultaneously stores the data file into a hot data layer with higher access efficiency or a cold data layer with lower access efficiency according to different access times, thereby improving the running speed of the solid hard disk.
2. In the process of reading the data file, the fixed hard disk firstly acquires the corresponding physical address through the real-time logical address of the corresponding file, then reads the related data file in the flash memory chip through the physical address, and transmits the file to the cache area for the host to read, meanwhile, the file to be operated subsequently by the user is predicted according to the read file and the historical data of the access file to the month, so that the user does not need to perform cache operation when opening the file, and the operation speed of the hard disk is greatly improved.
Drawings
The present invention is further described below with reference to the accompanying drawings for the convenience of understanding by those skilled in the art.
FIG. 1 is a flow chart of the operation of the present invention at the time of writing;
FIG. 2 is a schematic diagram of a solid state disk according to the present invention;
FIG. 3 is a schematic representation of a Huffman binary tree in accordance with the present invention;
FIG. 4 is a flow chart of the invention at the time of reading;
fig. 5 is a schematic structural diagram of a computer device according to the present invention.
Detailed Description
The technical solutions of the present invention will be clearly and completely described in connection with the embodiments, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
Referring to fig. 1, the present invention provides a technical solution: the intelligent operation acceleration method for the solid state disk comprises the following steps when data files are stored:
step S1, a host sends a writing command and an original data file to a solid state disk;
step S2, a main control chip of the solid state disk receives a writing command and compresses an original data file;
step S3, the main control chip of the solid state disk stores the compressed data file corresponding to the original data file into the solid state disk according to the use frequency of the original data file;
referring to fig. 2, in the present invention, a solid state disk includes a main control chip, a cache layer, a plurality of flash memory chips and a host interface logic unit, wherein the main control chip is composed of a cache manager, a processor and a flash memory controller;
the step S2 specifically further includes the following steps:
step S201, obtaining an original data file sent by a solid state disk;
step S202, traversing and comparing the original data file, and counting the occurrence frequency of each character in the original data file; for example, if the input data is the string "ABBCCCDDDDEEEEE", the frequency of occurrence of the characters is shown in the following table:
step S203, constructing a Huffman tree according to the characters and the occurrence frequency of each character; it should be noted that, in the present invention, a greedy algorithm is adopted in the construction of the huffman tree, that is, two nodes with the lowest frequency are selected for merging each time until only one root node remains; the huffman tree converted from the character-appearance frequency table in the step S202 is shown in fig. 3;
step S204, starting from the root node, allocating unique binary codes for each character, wherein the details are shown in the following table;
it should be noted that, the Huffman code of A is the left child node in the left subtree, namely "00", the Huffman code of B is the right child node in the left subtree, namely "10", the Huffman code of C is the root node of the left subtree, namely "11", the Huffman code of D is the left child node in the right subtree, namely "110", and the Huffman code of E is the right child node in the right subtree, namely "111";
step S205, each character in the original data file is replaced by a corresponding Huffman code; in this embodiment, a is replaced with 00, b is replaced with 10, c is replaced with 11, d is replaced with 110, e is replaced with 111, and the compressed data is: 001010111111110110110110110111111111111111111;
in this embodiment, the original data file occupies 15 byte spaces in total, and the compressed data occupies only 45 bits, i.e., 6 byte spaces;
the step S3 further includes the following sub-steps:
step S301, access conditions of the original data file in three months are obtained through a file log, and total access times of the original data file in three months are recorded;
step S302, comparing the total access times of the original data file with an access times threshold, and dividing the compressed data file corresponding to the original data file into a hot data set if the total access times are smaller than the access times threshold;
dividing the compressed data file corresponding to the original data file into a cold data set when the total access times are greater than the access times threshold;
it should be noted that, the speed of the data file in the hot data layer is greater than the speed of the data file in the cold data layer when accessed;
step S303, dividing the data files in the cold data set and the data files in the hot data set into pages according to fixed sizes, wherein each page is divided into 8KB in the embodiment;
step S304, the main control chip of the solid state disk writes pages of the file into the flash memory chip one by one, generates a corresponding preset logic address according to the physical address of each page, and records the address mapping relation between the preset logic address and the physical address in the cache layer of the solid state disk.
Example 2
Please participate in the intelligent operation acceleration method for the solid state disk shown in fig. 4, when the data file is read, the method includes the following steps:
step P1, a host computer sends a read command to a solid state disk;
step P2, the main control chip of the solid state disk receives the read command and executes the read operation;
step P3, the main control chip of the solid state disk predicts a predicted file to be operated by a user according to the read file;
step P4, the main control chip of the solid state disk is matched with the corresponding physical address according to the preset logical address of the predicted file, and then the predicted file corresponding to the physical address is put into the cache layer;
the step P2 further comprises the following sub-steps:
step P201, when receiving a command for reading a file, matching a real-time logical address of a corresponding file with a preset logical address in a cache layer to obtain a corresponding physical address;
the physical address is an actual memory address and represents the unique position of the data file in the flash memory chip;
the logical address is an address allocated to the data file by the operating system of the host, is only used for reading by an application program or the operating system, and has no practical significance;
step P202, the main control chip accesses the flash memory chip through the physical address, reads the related data file and transmits the related data file to the cache region;
step P203, the host computer obtains the required file data through reading the buffer area;
the step P3 further comprises the following sub-steps:
step P301, acquiring an active state of a current host, wherein the active state is an application program or an ongoing task in use by the current host, and the active state is acquired by monitoring an active window of the host;
step P302, screening out a file set related to an application program through the application program in which the host is active, for example, if the host is currently running is image editing software, the related file set is a file set with file extensions related to image editing, such as suffixes psd, jpeg, png and gif;
step P303, in the file set, acquiring files and access times which are most commonly used in each month in the last three months by the current host computer with a period interval of one month through a file log, and marking each file as a file n, n=1, 2, … …, z and z are positive integers;
the access number of each file in each month is recorded as FWAN, FWBn or FWC, wherein A is the current month, namely the first month, B is the month before the current month, namely the second month, C is the month before the second month, namely the third month, and the value of z is 5 in the embodiment;
in step P302, a month-file matrix is constructed by the current number of monthly file accesses by the host, and the matrix is given in a table form for convenience of expression in this embodiment, as shown in the following table:
step P303, calculating the similarity Xsd (A, B) between the first month and the second month and the similarity Xsd (A, C) between the first month and the third month through a formula;
wherein the similarity formula of the first month and the second month is as follows；
Wherein,；
；
；
finally, calculating to obtain Xsd (A, B) =0.78, and Xsd (A, C) =0.62;
step P304, selecting data of one month with higher similarity as adjacent data to perform prediction calculation, wherein Xsd (A, B) > Xsd (A, C) shows that the similarity of file access of the first month and the second month is higher, and the prediction calculation is performed through file data of the second month;
it should be noted that, the file log also records the score of each file by the user per month;
if the scores of the users in the second month on the files 1 to 5 are 1,2,4,0,5 respectively, the score of the user in the current month on the file 1 is predicted to be 0.78x1=0.78, the score of the user in the current month on the file 2 is predicted to be 0.78x2=1.56, the score of the user in the current month on the file 3 is predicted to be 0.78x4=3.12, the score of the user in the current month on the file 4 is predicted to be 0.78x0=0, and the score of the user on the file 5 is predicted to be 0.78x5=3.9;
step P305, selecting a file with the highest predictive score to be put into a buffer area of the solid state disk for waiting operation, so that a file 5 is selected as a predictive file;
if the user runs the predicted file later, the score of the predicted file in the current month is increased by one, and if the user does not run the predicted file later, no operation is performed on the score of the predicted file in the current month, and the initial score of each file is 0;
example 3
Based on embodiment 1, when the solid state disk performs the write operation, the following operations are also performed:
step T1, selecting different working modes according to the working conditions of the solid state disk;
step T2, acquiring a data file during writing;
step T3, obtaining the file size of the data file, and selecting different acceleration methods according to different files;
the step T1 comprises the following sub-steps:
step T101, obtaining the number of write requests received by the solid state disk per second, and recording the write data volume of each write request;
step T102, if the number of the write requests received by the solid state disk in each second is greater than 10000, the solid state disk is switched to a safe mode, which means that the solid state disk may suffer frequent write attacks at the moment, and the frequent write attacks cause a large number of invalid data blocks to be accumulated, so that the performance and the service life of the memory are affected;
step T103, if the total written data amount of the solid state disk within one hour is more than 5TB, the solid state disk is switched to a safe mode, which indicates that the solid state disk suffers from the action of attempting to fill the storage space and possibly suffers from data filling attack;
step T104, if the working state of the solid state disk is not in the conditions described in step T102 and step T103, the working mode of the solid state disk is a normal mode;
it should be noted that, in the present invention, the security mode of the solid state disk is a special mode for coping with some attacks that may affect the performance of the solid state disk, when the hard disk recognizes that the solid state disk is being attacked, the corresponding security mode will be automatically started, when the solid state disk is in the security mode, the solid state disk will execute garbage collection operation, clean invalid data blocks, and perform block erasure operation to release space, and timely collect and erase the invalid data blocks;
the step T3 further comprises the following sub-steps:
step T301, obtaining the size of the written data file at this time;
step T302, if the size of the data file is smaller than the first threshold, writing the data file into the cache layer, combining a plurality of writing operations into a larger writing operation, reducing redundant writing operations, reducing writing overhead and improving operation performance;
t303, if the size of the data file is greater than or equal to the first threshold value and less than the second threshold value, performing write operation normally;
t304, if the size of the data file is larger than or equal to the second threshold value, performing continuous writing operation on the data file, continuously storing the data file in the flash memory by continuous writing, reducing the seek times and improving the running performance of the solid state disk; when the file is stored, if the corresponding flash memory space of the data file is full, the seek operation is performed again, and the position of the data file is queried again;
wherein the second threshold is greater than the first threshold and greater than zero, in this embodiment the first threshold is 1KB and the second threshold is 5GB;
in the present application, if a corresponding calculation formula appears, the above calculation formulas are all dimensionality-removed and numerical calculation, and the size of the weight coefficient, the scale coefficient and other coefficients existing in the formulas is a result value obtained by quantizing each parameter, so long as the proportional relation between the parameter and the result value is not affected.
The present invention also provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements any of the method steps of the present embodiment.
Meanwhile, the invention also provides a computer device, as shown in fig. 5, for convenience of explanation, only the parts related to the embodiment of the invention are shown, and specific technical details are not disclosed, please refer to the method parts of the embodiment of the invention. The computer equipment can be any terminal equipment including a mobile phone, a tablet personal computer, a PDA, a POS, a vehicle-mounted computer and the like, and takes the computer equipment as the mobile phone as an example:
fig. 5 is a block diagram showing a part of the structure related to the computer device provided by the embodiment of the present invention. The computer device includes: memory, processor, communication bus, and communication interface. Those skilled in the art will appreciate that the computer device structure shown in FIG. 5 is not limiting of the computer device and may include more or fewer components than shown, or may be combined with certain components, or a different arrangement of components.
The following describes the respective constituent elements of the computer apparatus in detail with reference to fig. 5:
the memory may be used to store software programs and modules that the processor executes to perform various functional applications and data processing by executing the software programs and modules stored in the memory. The memory may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function, and the like; the storage data area may store data, etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device.
The processor is a control center of the computer device, and performs various functions and processes data by running or executing software programs and/or modules stored in the memory, and invoking data stored in the memory. In the alternative, the processor may include one or more processing units; preferably, the processor may integrate an application processor and a modem processor, wherein the application processor primarily handles operating systems, user interfaces, applications, etc., and the modem processor primarily handles wireless communications;
the communication bus is used for connecting the memory with the processor in a communication way, and the communication interface is used for connecting the computer equipment with the external associated equipment in a communication way.
In the embodiment of the present invention, the processor included in the computer device may have functions corresponding to any of the method steps in the embodiment.
In summary, when the storage of the data file is performed in the above embodiment, the host sends the write command and the original data file to the solid-state disk, the main control chip of the solid-state disk receives the write command and compresses the original data file, the main control chip of the solid-state disk stores the compressed data file corresponding to the original data file into the solid-state disk according to the use frequency of the original data file, when the solid-state disk performs the write operation, different working modes are selected through the working condition of the solid-state disk, the data file when the write operation is performed is obtained, the file size of the data file is obtained, and different acceleration methods are selected according to the different files, when the data file is read, the host sends the read command to the solid-state disk, the main control chip of the solid-state disk receives the read command and performs the read operation, the main control chip of the solid-state disk predicts the predicted file to be operated by the user later according to the read file, the main control chip of the solid-state disk matches the corresponding physical address according to the preset logical address of the predicted file, and then places the predicted file corresponding to the physical address into the buffer layer.
The algorithms and displays presented herein are not inherently related to any particular computer, virtual system, or other apparatus. Various general-purpose systems may also be used with the teachings herein. The required structure for a construction of such a system is apparent from the description above. In addition, the present invention is not directed to any particular programming language. It will be appreciated that the teachings of the present invention described herein may be implemented in a variety of programming languages, and the above description of specific languages is provided for disclosure of enablement and best mode of the present invention.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be construed as reflecting the intention that: i.e., the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
Those skilled in the art will appreciate that the modules in the apparatus of the embodiments may be adaptively changed and disposed in one or more apparatuses different from the embodiments. The modules or units or components of the embodiments may be combined into one module or unit or component and, furthermore, they may be divided into a plurality of sub-modules or sub-units or sub-components. Any combination of all features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or units of any method or apparatus so disclosed, may be used in combination, except insofar as at least some of such features and/or processes or units are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that while some embodiments herein include some features but not others included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, in the following claims, any of the claimed embodiments can be used in any combination.
Various component embodiments of the invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art will appreciate that some or all of the functions of some or all of the components in a gateway, proxy server, system according to embodiments of the present invention may be implemented in practice using a microprocessor or Digital Signal Processor (DSP). The present invention can also be implemented as an apparatus or device program (e.g., a computer program and a computer program product) for performing a portion or all of the methods described herein. Such a program embodying the present invention may be stored on a computer readable medium, or may have the form of one or more signals. Such signals may be downloaded from an internet website, provided on a carrier signal, or provided in any other form.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words, second, third, etc. do not denote any order. These words may be interpreted as names.
Claims (10)
1. The intelligent operation acceleration method for the solid state disk is characterized by comprising the following steps of:
step S1, a host sends a writing command and an original data file to a solid state disk;
step S2, a main control chip of the solid state disk receives a writing command and compresses an original data file;
and S3, the main control chip of the solid state disk stores the data files corresponding to the compressed data files into the solid state disk according to the using frequency of the original data files.
2. The intelligent operation acceleration method for a solid state disk as set forth in claim 1, wherein the step S2 further includes the sub-steps of:
step S201, obtaining an original data file sent by a solid state disk;
step S202, traversing and comparing the original data file, and counting the occurrence frequency of each character in the original data file;
step S203, constructing a Huffman tree according to the characters and the occurrence frequency of each character;
step S204, starting from the root node, assigning a unique binary code to each character;
step S205, each character in the original data file is replaced by a corresponding Huffman code;
the step S3 further includes the following sub-steps:
step S301, access conditions of the original data file in three months are obtained through a file log, and total access times of the original data file in three months are recorded;
step S302, comparing the total access times of the original data file with an access times threshold, and dividing the data file corresponding to the compressed original data file into a hot data set if the total access times are smaller than the access times threshold;
dividing the data file corresponding to the compressed original data file into a cold data set when the total access times is greater than the access times threshold;
wherein the speed at which the data files in the hot data layer are accessed is greater than the speed at which the data files in the cold data layer are accessed;
step S303, dividing the data files in the cold data set and the data files in the hot data set into pages according to fixed sizes respectively;
step S304, the main control chip of the solid state disk writes pages of the data file into the flash memory chip one by one, generates a corresponding preset logic address according to the physical address of each page, and records the address mapping relation between the preset logic address and the physical address in the cache layer of the solid state disk.
3. The intelligent operation acceleration method for a solid state disk according to claim 1, wherein the method further comprises the steps of, when performing a write operation:
step T1, selecting different working modes according to the working conditions of the solid state disk;
step T2, acquiring a data file during writing;
and step T3, acquiring the file size of the data file, and selecting different acceleration methods according to different data files.
4. The intelligent operation acceleration method for a solid state disk according to claim 3, wherein the step T1 includes the following sub-steps:
step T101, obtaining the number of write requests received by the solid state disk per second, and recording the write data volume of each write request;
step T102, if the number of the write requests received by the solid state disk in each second is more than 10000, switching the solid state disk to a safe mode;
step T103, if the total written data amount of the solid state disk within one hour is more than 5TB, switching the solid state disk to a safe mode;
step T104, if the working state of the solid state disk is not in the conditions described in step T102 and step T103, the working mode of the solid state disk is a normal mode;
the step T3 comprises the following sub-steps:
step T301, obtaining the size of the written data file at this time;
step T302, if the size of the data file is smaller than the first threshold, writing the data file into the cache layer, and merging a plurality of write operations into a larger write operation;
t303, if the size of the data file is greater than or equal to the first threshold value and less than the second threshold value, performing write operation normally;
and T304, if the size of the data file is larger than or equal to the second threshold value, performing continuous writing operation on the data file.
5. The intelligent operation acceleration method for a solid state disk according to claim 1, further comprising the steps of:
step P1, a host computer sends a read command to a solid state disk;
step P2, the main control chip of the solid state disk receives the read command and executes the read operation;
step P3, the main control chip of the solid state disk predicts a predicted file to be operated by a user according to the read file;
and P4, matching the main control chip of the solid state disk to a corresponding physical address according to a preset logical address of the predicted file, and then placing the predicted file corresponding to the physical address into a cache layer.
6. The intelligent operation acceleration method for a solid state disk as set forth in claim 5, wherein the step P2 further includes the sub-steps of:
step P201, when receiving a command for reading a file, matching a real-time logical address of a corresponding file with a preset logical address in a cache layer to obtain a corresponding physical address;
step P202, the main control chip accesses the flash memory chip through the physical address, reads the related data file and transmits the related data file to the cache region;
in step P203, the host obtains the required file data by reading the buffer.
7. The intelligent operation acceleration method for a solid state disk as set forth in claim 5, wherein the step P3 further includes the sub-steps of:
step P301, acquiring an active state of a current host, wherein the active state is an application program or an ongoing task in use by the current host, and the active state is acquired by monitoring an active window of the host;
step P302, screening out a file set related to an application program by the active application program of the host;
step P303, in the file set, acquiring files and access times which are most commonly used in each month in the last three months by the current host computer with a period interval of one month through a file log, and marking each file as a file n, n=1, 2, … …, z and z are positive integers;
the access number of each file in each month is recorded as FWAN, FWBn or FWC, wherein A is the current month, namely the first month, B is the month before the current month, namely the second month, and C is the month before the second month, namely the third month;
step P304, constructing a month-file matrix according to the current monthly file access times of the host;
step P305, calculating the similarity Xsd (A, B) between the first month and the second month and the similarity Xsd (A, C) between the first month and the third month through a formula;
step P306, selecting data of one month with higher similarity as adjacent data to perform prediction calculation, and obtaining a prediction score of each file through calculation;
and step P307, selecting a file with the highest predictive score, and placing the file in a cache region of the solid state disk to wait for operation.
8. The intelligent operation acceleration method for a solid state disk of claim 7, wherein the similarity formula between the first month and the second month is specifically:；
wherein,；
；
。
9. a computer device comprising a memory storing a computer program which, when executed by a processor, implements the intelligent run acceleration method for a solid state disk of any one of claims 1-8.
10. A computer-readable storage medium, on which a computer program is stored, characterized in that the program, when executed by a processor, implements the intelligent running acceleration method for a solid state disk according to any one of claims 1-8.
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