CN117458998A - Broadband frequency doubling circuit for high-frequency source - Google Patents
Broadband frequency doubling circuit for high-frequency source Download PDFInfo
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- CN117458998A CN117458998A CN202311332545.8A CN202311332545A CN117458998A CN 117458998 A CN117458998 A CN 117458998A CN 202311332545 A CN202311332545 A CN 202311332545A CN 117458998 A CN117458998 A CN 117458998A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
- H03B19/06—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
- H03B19/14—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
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- H03H11/32—Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
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Abstract
The invention discloses a broadband frequency doubling circuit for a high-frequency source, which comprises a frequency doubling stage self-biasing circuit, a frequency doubling stage circuit, a buffer stage self-biasing circuit and a buffer stage circuit; the frequency doubling stage self-bias circuit, the frequency doubling stage circuit, the buffer stage self-bias circuit and the buffer stage circuit share a direct current power supply, and the frequency doubling stage self-bias circuit provides power bias and base bias for the frequency doubling stage circuit; providing a power bias and a base bias for the buffer stage circuit by the buffer stage self-bias circuit; the frequency doubling stage circuit and the buffer stage circuit thereof adopt an RLC resonant cavity based on a switch capacitor array as a load, and the frequency of the RLC resonant cavity is changed by controlling the on or off of a switch capacitor, so that the load is dynamically changed along with the working frequency, and the broadband work is realized. The invention has the characteristics of miniaturization, large bandwidth, low noise, low cost and high reliability, and can be used for multiplying the frequency of the voltage-controlled oscillator in a high-frequency source.
Description
Technical Field
The invention belongs to the field of wireless communication, and relates to a broadband frequency doubling circuit for a high-frequency source.
Background
The explosive growth of high data rate wireless communication demands has driven the development of wireless technology, but increasingly "crowded" spectrum resources in the low frequency range are one of the bottlenecks that limit their rapid development. The high-frequency band has a large amount of available resources which are not fully developed, so the design of a high-frequency band frequency source circuit is urgent. Because of the shortcomings of phase noise difference, narrow tuning range and the like of a voltage-controlled oscillator (VCO) in a high frequency band, the frequency doubling circuit is used as a circuit system for doubling the frequency of an input signal, and is widely applied to frequency source circuits in various wireless transceiver systems.
The cascade of frequency multipliers to produce the high frequency signal has the following advantages: the main vibration frequency of the VCO is reduced, so that the design difficulty of the VCO is reduced; the bandwidth is expanded, and the working bandwidth of the system is increased; the frequency dividing ratio of the frequency divider is reduced, and the design difficulty of the frequency divider is reduced; generating a stable high frequency output signal. However, the frequency band of the existing frequency doubling circuit is narrower, so that the application of multiple frequency bands and large bandwidth cannot be satisfied, and how to generate the frequency doubling circuit with the broadband characteristic is a current big design challenge.
Disclosure of Invention
The technical solution of the invention is as follows: the utility model provides a broadband frequency doubling circuit that is applied to Gao Pinpin rate source, realizes low phase noise, high spectral purity and stable high frequency power output in the wide frequency band to overcome the defect of prior art.
The technical scheme of the invention is as follows: a broadband frequency doubling circuit for a high-frequency source comprises a frequency doubling stage self-biasing circuit, a frequency doubling stage circuit, a buffer stage self-biasing circuit and a buffer stage circuit;
the frequency doubling stage self-bias circuit, the frequency doubling stage circuit, the buffer stage self-bias circuit and the buffer stage circuit share a direct current power supply, and the frequency doubling stage self-bias circuit provides power bias and base bias for the frequency doubling stage circuit; providing a power bias and a base bias for the buffer stage circuit by the buffer stage self-bias circuit; the frequency doubling stage circuit and the buffer stage circuit thereof adopt an RLC resonant cavity based on a switch capacitor array as a load, and the frequency of the RLC resonant cavity is changed by controlling the on or off of a switch capacitor, so that the load is dynamically changed along with the working frequency, and the broadband work is realized.
Preferably, the frequency doubling stage self-bias circuit comprises Bipolar tubes T1, T2, T3, T4 and T5, resistors R1, R2, R3, R4, R5 and R6 and a capacitor C1; the collector of the Bipolar tube T1 and the base of the Bipolar tube T2 are connected to a direct current power supply VCC through a resistor R1 and grounded through a capacitor C1, the emitter of the Bipolar tube T1 is grounded through a resistor R2, and the base of the Bipolar tube T1 is connected to the emitter of the Bipolar tube T2, the bases of the Bipolar tube T5 and the Bipolar tube T6 and grounded through a resistor R3; the emitter of the bipolarpipe T5 is grounded through a resistor R5, the collector of the bipolarpipe T5 is connected to the emitter of the bipolarpipe T4, the base of the bipolarpipe T4 is connected to the collector of the bipolarpipe T4 through a resistor R6 and then to the emitter of the bipolarpipe T3, the base of the bipolarpipe T3 is connected to the collector of the bipolarpipe T3 and is connected to a direct current power supply VCC through a resistor R4, and the collector of the bipolarpipe T2 is connected to the direct current power supply VCC.
Preferably, the frequency doubling stage circuit comprises Bipolar tubes T6, T7, T8, T9, T10, T11, resistors R7, R8, R9, R10, R11, R12, R13, capacitors C2, C3, C4, C5, C6, switched capacitors SC1, SC2, SC3, and inductors L1, L2; differential radio frequency input signal RFIN +/RFIN-is connected to the bases of Bipolar tubes T8, T9 through capacitors C2, C3, respectively, the emitters of Bipolar tubes T7, T8, T9 are shorted together and connected to the collector of Bipolar tube T6, the emitter of Bipolar tube T6 is grounded through resistor R11, the base of Bipolar tube T7 is grounded through capacitor C4, the collectors of Bipolar tubes T8, T9 are shorted together and connected to the emitter of Bipolar tube T11, the collector of Bipolar tube T7 is connected to the emitter of Bipolar tube T10, the collector of Bipolar tube T10 is connected to the dc power supply VCC through resistors R12, L1, the collector of Bipolar tube T11 is connected to the dc power supply VCC through resistors R13, L2, while the collectors of Bipolar tubes T10, T11 are connected on both sides of switched capacitors SC1, SC2, SC3, the collectors of Bipolar tube T4 are connected to the collectors of Bipolar tube T8, R9, R10 are connected to the base of Bipolar tube T7, base of Bipolar tube T10 is connected to the collector of Bipolar tube T10 through resistors R9, T3.
Preferably, the buffer stage self-bias circuit comprises Bipolar transistors T12, T13, T14, T15 and T16, resistors R14, R15, R16, R17, R18 and R19 and a capacitor C7; the collector of the Bipolar transistor T12, the base of the Bipolar transistor T13 are connected to a direct current power supply VCC through a resistor R14 and grounded through a capacitor C7, the emitter of the Bipolar transistor T12 is grounded through a resistor R15, the base of the Bipolar transistor T12 is connected to the emitter of the Bipolar transistor T13, the Bipolar transistor T16 and the base of the Bipolar transistor T17, the emitter of the Bipolar transistor T13 is grounded through a resistor R16, the emitter of the Bipolar transistor T16 is connected to ground through a resistor R18, the collector of the Bipolar transistor T16 is connected to the emitter of the Bipolar transistor T15, the base of the Bipolar transistor T15 is connected to the collector of the Bipolar transistor T15 through a resistor R19 and then to the emitter of the Bipolar transistor T14, the base of the Bipolar transistor T14 is connected to the collector of the Bipolar transistor T14 and to the direct current power supply VCC through a resistor R17, and the collector of the Bipolar transistor T13 is connected to the direct current power supply VCC.
Preferably, the buffer stage circuit comprises Bipolar transistors T17, T18, T19, T20, T21, resistors R20, R21, R22, R23, R24, R25, capacitors C8, C9, switched capacitors SC4, SC5, SC6, and inductors L3, L4; the output differential signal of the frequency doubling stage circuit is connected to the bases of Bipolar tubes T18 and T19 through capacitors C5 and C6 respectively, the emitters of Bipolar tubes T18 and T19 are in short circuit and connected to the collectors of Bipolar tubes T17, the emitters of Bipolar tubes T17 are grounded through resistors R23, the collector of Bipolar tube T19 is connected to the emitter of Bipolar tube T21, the collector of Bipolar tube T18 is connected to the emitter of Bipolar tube T20, the collector of Bipolar tube T20 is connected to a direct current power supply VCC through resistors R24 and L3 in parallel, the collector of Bipolar tube T21 is connected to a direct current power supply VCC through resistors R25 and L4 in parallel, the collectors of Bipolar tubes T20 and T21 are connected to the two sides of switch capacitors SC4, SC5 and SC6 respectively, the collector of buffer stage self-bias circuit T15 is connected to the bases of Bipolar tubes T18 and T19 through resistors R21 and R22, and the base of buffer stage self-bias circuit T14 is connected to the bases of Bipolar tube T20 and T21 through resistors R20 and T21.
Preferably, the capacitance values of the switch capacitors SC1 and SC4 are the same; the capacitance values of the switch capacitors SC2 and SC5 are the same and are twice the capacitance values of the switch capacitors SC1 and SC 4; the switched capacitors SC3 and SC6 have the same capacitance value, which is four times the capacitance value of the switched capacitors SC1 and SC 4.
Preferably, the resistances of the resistor R24 and the resistor R25 are 45-60 Ω, so as to achieve matching of the output impedance of the buffer stage circuit to the differential 100 Ω, and no additional matching circuit is required.
Preferably, the values of the inductors L1, L2, L3 and L4 and the switch capacitors SC1-SC6 are regulated, the working frequency of the broadband frequency doubling circuit is changed, the bandwidth can reach 8GHz-16GHz, and the relative bandwidth is 66.7%.
Preferably, bipolar tubes T8 and T9 in the frequency doubling stage are a set of symmetrical devices, and Bipolar tubes T8, T9 and Bipolar tube T7 are a set of symmetrical devices which are to be arranged symmetrically in the layout.
Preferably, the sizes of the Bipolar tubes T8 and T9 are the same, and the size of the Bipolar tube T7 is the sum of the sizes of the Bipolar tubes T8 and T9.
Compared with the traditional design scheme, the wideband frequency doubling circuit applied to the high-frequency source has the following obvious advantages:
(1) The frequency doubling stage circuit and the buffer stage circuit of the invention are self-biased, only one power supply is needed, no additional direct current voltage source is needed, and the invention has simple structure and convenient use.
(2) The invention adopts the RLC resonant cavity based on the switch capacitor array as the load of the frequency doubling stage circuit and the buffer stage circuit thereof, and changes the frequency of the RLC resonant cavity by controlling the on or off of the switch capacitor, so that the load dynamically changes along with the working frequency, and the broadband work is realized.
(3) The invention adopts a balance structure to realize the frequency multiplication function, and the structure has good odd harmonic suppression capability and improves the frequency spectrum purity of the output signal.
(4) The invention combines the active balun circuit and the frequency doubling circuit, avoids using a single-ended to differential transformer circuit, saves the chip area and reduces the cost.
(5) The resistance values of the resistor R24 and the resistor R25 are 45-60 omega, so that the output impedance of the buffer stage circuit 400 is matched to the difference of 100 omega, and a matching circuit is not required to be additionally arranged.
Drawings
Fig. 1 is a schematic diagram of a wideband frequency doubling circuit for a high frequency source according to the present invention.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings.
As shown in fig. 1, the wideband frequency doubling circuit for high-frequency source according to the present invention comprises four parts: frequency doubling stage self-bias circuit 100, frequency doubling stage circuit 200, buffer stage self-bias circuit 300, buffer stage circuit 400. The specific circuit configuration and connection relation of each part are described below.
The frequency doubling stage self-bias circuit 100 mainly comprises Bipolar transistors T1, T2, T3, T4, T5, resistors R1, R2, R3, R4, R5, R6, a capacitor C1, and a dc power supply VCC. The connection relation is that the collector of T1 and the base of T2 are connected to the DC power supply VCC through a resistor R1 and grounded through a capacitor C1. The emitter of T1 is grounded through resistor R2, the base of T1 is connected to the emitter of T2, the bases of T5 and T6, and is grounded through resistor R3. The emitter of T5 is grounded through a resistor R5, the collector of T5 is connected to the emitter of T4, the base of T4 is connected to the collector of T4 through a resistor R6, then to the emitter of T3, the base of T3 is connected to the collector of T3, and through a resistor R4 to VCC. The collector of T2 is also connected to VCC.
The frequency doubling stage circuit 200 mainly comprises Bipolar transistors T6, T7, T8, T9, T10, T11, resistors R7, R8, R9, R10, R11, R12, R13, capacitors C2, C3, C4, C5, C6, switched capacitors SC1, SC2, SC3, inductors L1, L2, and a dc power supply VCC. The connection relation is as follows: the differential radio frequency input signal RFIN +/RFIN-is connected to the bases of T8, T9 through capacitors C2, C3, respectively, the emitters of T7, T8, T9 are shorted together and to the collector of T6, and the emitter of T6 is grounded through resistor R11. The collectors of T8, T9 are shorted together and connected to the emitter of T11, and the collector of T7 is connected to the emitter of T10. The collector of T10 is connected to the dc power supply VCC through the parallel connection R12, L1, the collector of T11 is connected to the dc power supply VCC through the parallel connection R13, L2, while the collectors of T10, T11 are connected on both sides of the switched capacitors SC1, SC2, SC 3. The collector of T4 in the frequency doubling stage self-bias circuit 100 is connected to the bases of T7, T8 and T9 through R8, R9 and R10 respectively, the base of T7 is grounded through a capacitor C4, the collector of T3 is connected to the bases of T10 and T11 through R7, and the base of T5 is connected to the base of T6.
The buffer stage self-bias circuit 300 mainly comprises Bipolar transistors T12, T13, T14, T15, T16, resistors R14, R15, R16, R17, R18, R19, a capacitor C7, and a dc power supply VCC. The connection relation is that the collector of the T12 and the base of the T13 are connected to the direct current power supply VCC through a resistor R14 and grounded through a capacitor C7. The emitter of T12 is grounded through a resistor R15, the base of T12 is connected to the emitter of T13, the bases of T16 and T17, and the emitter of T13 is grounded through a resistor R16. The emitter of T16 is connected to ground through resistor R18, the collector of T16 is connected to the emitter of T15, the base of T15 is connected to the collector of T15 through resistor R19, then to the emitter of T14, the base of T14 is connected to the collector of T14, and through resistor R17 to VCC. The collector of T13 is also connected to VCC.
The buffer stage circuit 400 mainly comprises Bipolar transistors T17, T18, T19, T20, T21, resistors R20, R21, R22, R23, R24, R25, capacitors C8, C9, switched capacitors SC4, SC5, SC6, inductors L3, L4, and a dc power supply VCC. The connection relation is as follows: the output differential signals of the frequency doubling stage circuit 200 are respectively connected to the bases of the T18 and the T19 through the capacitors C5 and C6, the emitters of the T18 and the T19 are short-circuited together and connected to the collector of the T17, and the emitter of the T17 is grounded through the resistor R23. The collector of T19 is connected to the emitter of T21 and the collector of T18 is connected to the emitter of T20. The collector of T20 is connected to the dc power supply VCC through the parallel connection R24, L3, the collector of T21 is connected to the dc power supply VCC through the parallel connection R25, L4, and the collectors of T20, T21 are connected on both sides of the switched capacitors SC4, SC5, SC 6. The collector of T15 in the buffer stage self-bias circuit 300 is connected to the bases of T18, T19 through resistors R21, R22, respectively, and the base of T14 is connected to the bases of T20, T21 through resistor R20.
The frequency doubling stage self-bias circuit 100 provides the required bias for the corresponding frequency doubling stage circuit 200 without additional external dc bias, based on the following specific principles: t1, R2 form an amplifier, T2 and R2 form an emitter follower, the output of the amplifier is connected to the base of T2 and fed back to the base of T1 through the emitter follower, so that the base voltage of T1 can be stabilized. T1, R2 and T5, R5 form a pair of current mirrors, and mirrored currents generate corresponding voltages through diode-connected T3, T4, thereby providing base bias for T10, T11 and T7, T8, T9, respectively, in the frequency doubling stage circuit 200.
The operating principle of the frequency doubling stage circuit 200 is as follows: t8 and T9 are multipliers with balanced structures, and the radiofrequency differential input signals RFIN+/RFIN-are respectively input to the bases of the T8 and T9, and various harmonic components of the input signals, such as direct current, fundamental harmonic, second harmonic and third harmonic, are generated by utilizing the nonlinear characteristics of the T8 and T9. The odd harmonics current phases are opposite, and the even harmonics current phases are the same, so that at a common mode point (namely the collector and the emitter of T8 and T9), the odd harmonics cancel each other, and the even harmonics are synthesized. The structure has good odd harmonic suppression capability, and even harmonic power can be improved by 3dB. However, the balance structure has a disadvantage that only a single-ended second harmonic signal can be generated, and if a differential output signal is required, the use of a single-ended rotary differential transformer with area redundancy cannot be avoided. The invention T7, T8 and T9 also form an active balun, which avoids a single-ended to differential transformer and greatly saves the use area. The differential second harmonic current generated by the active balun is converted to the required output voltage by the flow of T10, T11 to the load. The load is an RLC parallel resonant cavity, and the C value of the capacitor in the access circuit is changed by controlling the on and off of the switch capacitors SC1, SC2 and SC3, so that the resonant frequency of the RLC is changed, and stable load can be provided under a large bandwidth, and broadband operation is supported. Capacitor C4 provides an ac ground for the base of T7. T10, T11 are the isolation tube, strengthen the isolation between the input and output signal, promote stability. T6, R11 and T1, R2 are a pair of current mirrors providing bias currents for T7, T8, T9, T10, T11.
The buffer stage self-bias circuit 300 provides the required bias for the corresponding buffer stage circuit 400 without additional external dc bias, based on the following specific principles: t12, R14, R15 form an amplifier, T13 and R16 form an emitter follower, the output of the amplifier is connected to the base of T13 and fed back to the base of T12 through the emitter follower, so that the base voltage of T12 can be stabilized. T12, R15 and T16, R18 form a pair of current mirrors, and mirrored currents generate corresponding voltages through diode-connected T14, T15 to provide base bias for T20, T21 and T18, T19, respectively, in buffer stage circuit 400.
The operating principle of the buffer stage circuit 400 is as follows: t18 and T19 are a pair of differential amplifiers, and the differential output signals generated by the frequency doubling stage circuit 200 are respectively input to the bases of T18 and T19 through blocking capacitors C5 and C6, and amplified differential currents generated by the amplifiers flow to the load through T20 and T21 to be converted into output voltages. The load is an RLC parallel resonant cavity, and the value of a capacitor C connected into a circuit is changed by controlling the on and off of switch capacitors SC4, SC5 and SC6, so that the resonant frequency of the RLC is changed, and stable load can be provided under a large bandwidth, and broadband operation is supported. T20 and T21 are isolation tubes, so that isolation between input and output signals is enhanced, and stability is improved. In addition, in the frequency doubling stage circuit 200, the second harmonic currents generated by T8 and T9 flow to the load through different paths (one flows from the collectors of T8 and T9 to the load through T11, and the other flows from the emitters of T8 and T9 to the load through T7 and T10), so that the output signals of the frequency doubling stage are not perfectly differential and have a certain amplitude and phase error. The buffer stage circuit 400 can effectively isolate the frequency doubling stage circuit 200 from the external 100Ω and further enhance the differential performance of the second harmonic signal. T17, R23 and T12, R15 are a pair of current mirrors providing bias currents for T18, T19, T20, T21.
The structure of one embodiment of the wideband frequency doubling circuit for the high-frequency source is shown in fig. 1, and the parameter list of the components in the diagram is as follows:
note that: * Represents W x L x m, wherein W is the emitter width, L is the emitter length, m is the number of parallel connections
The invention does not need an extra Bipolar tube base bias power supply, and can normally work only by a direct current power supply voltage VCC and switching capacitors SC1-SC6 control signals. The operating frequency range of the circuit can be adjusted by adjusting the inductance value of the inductances L1-L4 and the capacitance values of the switched capacitances SC1-SC6 that are connected into the circuit. The resistors R11 and R23 have smaller resistance values, are easily influenced by process fluctuation, and can be realized by connecting a plurality of resistors in parallel. In layout design, the frequency doubling stage circuit 200 and the buffer stage circuit 400 are required to be layout matched to ensure high symmetry. Simulation results show that the broadband frequency doubling circuit for the high-frequency source has the working frequency reaching 8GHz-16GHz, the relative bandwidth being 66.7%, the whole X wave band and most of Ku wave bands are covered, the maximum output power can reach 4dBm, and the harmonic suppression is greater than 25dBc.
What is not described in detail in the present specification is a known technology to those skilled in the art. Although embodiments of the present invention have been described with reference to the accompanying drawings, various changes and modifications may be suggested to one skilled in the art within the scope of the appended claims.
The invention is not described in detail in part as being common general knowledge to a person skilled in the art.
Claims (10)
1. A wideband frequency multiplier circuit for a high-frequency source, comprising: the circuit comprises a frequency multiplication stage self-bias circuit, a frequency multiplication stage circuit, a buffer stage self-bias circuit and a buffer stage circuit;
the frequency doubling stage self-bias circuit, the frequency doubling stage circuit, the buffer stage self-bias circuit and the buffer stage circuit share a direct current power supply, and the frequency doubling stage self-bias circuit provides power bias and base bias for the frequency doubling stage circuit; providing a power bias and a base bias for the buffer stage circuit by the buffer stage self-bias circuit; the frequency doubling stage circuit and the buffer stage circuit thereof adopt an RLC resonant cavity based on a switch capacitor array as a load, and the frequency of the RLC resonant cavity is changed by controlling the on or off of a switch capacitor, so that the load is dynamically changed along with the working frequency, and the broadband work is realized.
2. The wideband frequency doubling circuit of claim 1, wherein: the frequency doubling stage self-bias circuit comprises Bipolar tubes T1, T2, T3, T4 and T5, resistors R1, R2, R3, R4, R5 and R6 and a capacitor C1; the collector of the Bipolar tube T1 and the base of the Bipolar tube T2 are connected to a direct current power supply VCC through a resistor R1 and grounded through a capacitor C1, the emitter of the Bipolar tube T1 is grounded through a resistor R2, and the base of the Bipolar tube T1 is connected to the emitter of the Bipolar tube T2, the bases of the Bipolar tube T5 and the Bipolar tube T6 and grounded through a resistor R3; the emitter of the bipolarpipe T5 is grounded through a resistor R5, the collector of the bipolarpipe T5 is connected to the emitter of the bipolarpipe T4, the base of the bipolarpipe T4 is connected to the collector of the bipolarpipe T4 through a resistor R6 and then to the emitter of the bipolarpipe T3, the base of the bipolarpipe T3 is connected to the collector of the bipolarpipe T3 and is connected to a direct current power supply VCC through a resistor R4, and the collector of the bipolarpipe T2 is connected to the direct current power supply VCC.
3. The wideband frequency doubling circuit of claim 2, wherein: the frequency doubling stage circuit comprises Bipolar tubes T6, T7, T8, T9, T10 and T11, resistors R7, R8, R9, R10, R11, R12 and R13, capacitors C2, C3, C4, C5 and C6, switched capacitors SC1, SC2 and SC3 and inductors L1 and L2; differential radio frequency input signal RFIN +/RFIN-is connected to the bases of Bipolar tubes T8, T9 through capacitors C2, C3, respectively, the emitters of Bipolar tubes T7, T8, T9 are shorted together and connected to the collector of Bipolar tube T6, the emitter of Bipolar tube T6 is grounded through resistor R11, the base of Bipolar tube T7 is grounded through capacitor C4, the collectors of Bipolar tubes T8, T9 are shorted together and connected to the emitter of Bipolar tube T11, the collector of Bipolar tube T7 is connected to the emitter of Bipolar tube T10, the collector of Bipolar tube T10 is connected to the dc power supply VCC through resistors R12, L1, the collector of Bipolar tube T11 is connected to the dc power supply VCC through resistors R13, L2, while the collectors of Bipolar tubes T10, T11 are connected on both sides of switched capacitors SC1, SC2, SC3, the collectors of Bipolar tube T4 are connected to the collectors of Bipolar tube T8, R9, R10 are connected to the base of Bipolar tube T7, base of Bipolar tube T10 is connected to the collector of Bipolar tube T10 through resistors R9, T3.
4. The wideband frequency doubling circuit of claim 1, wherein: the buffer stage self-bias circuit comprises Bipolar tubes T12, T13, T14, T15 and T16, resistors R14, R15, R16, R17, R18 and R19 and a capacitor C7; the collector of the Bipolar transistor T12, the base of the Bipolar transistor T13 are connected to a direct current power supply VCC through a resistor R14 and grounded through a capacitor C7, the emitter of the Bipolar transistor T12 is grounded through a resistor R15, the base of the Bipolar transistor T12 is connected to the emitter of the Bipolar transistor T13, the Bipolar transistor T16 and the base of the Bipolar transistor T17, the emitter of the Bipolar transistor T13 is grounded through a resistor R16, the emitter of the Bipolar transistor T16 is connected to ground through a resistor R18, the collector of the Bipolar transistor T16 is connected to the emitter of the Bipolar transistor T15, the base of the Bipolar transistor T15 is connected to the collector of the Bipolar transistor T15 through a resistor R19 and then to the emitter of the Bipolar transistor T14, the base of the Bipolar transistor T14 is connected to the collector of the Bipolar transistor T14 and to the direct current power supply VCC through a resistor R17, and the collector of the Bipolar transistor T13 is connected to the direct current power supply VCC.
5. The wideband frequency doubling circuit of claim 3 or 4, wherein: the buffer stage circuit comprises Bipolar tubes T17, T18, T19, T20 and T21, resistors R20, R21, R22, R23, R24 and R25, capacitors C8 and C9, switched capacitors SC4, SC5 and SC6 and inductors L3 and L4; the output differential signal of the frequency doubling stage circuit is connected to the bases of Bipolar tubes T18 and T19 through capacitors C5 and C6 respectively, the emitters of Bipolar tubes T18 and T19 are in short circuit and connected to the collectors of Bipolar tubes T17, the emitters of Bipolar tubes T17 are grounded through resistors R23, the collector of Bipolar tube T19 is connected to the emitter of Bipolar tube T21, the collector of Bipolar tube T18 is connected to the emitter of Bipolar tube T20, the collector of Bipolar tube T20 is connected to a direct current power supply VCC through resistors R24 and L3 in parallel, the collector of Bipolar tube T21 is connected to a direct current power supply VCC through resistors R25 and L4 in parallel, the collectors of Bipolar tubes T20 and T21 are connected to the two sides of switch capacitors SC4, SC5 and SC6 respectively, the collector of buffer stage self-bias circuit T15 is connected to the bases of Bipolar tubes T18 and T19 through resistors R21 and R22, and the base of buffer stage self-bias circuit T14 is connected to the bases of Bipolar tube T20 and T21 through resistors R20 and T21.
6. The wideband frequency doubling circuit for a high frequency source of claim 5, wherein: the capacitance values of the switch capacitors SC1 and SC4 are the same; the capacitance values of the switch capacitors SC2 and SC5 are the same and are twice the capacitance values of the switch capacitors SC1 and SC 4; the switched capacitors SC3 and SC6 have the same capacitance value, which is four times the capacitance value of the switched capacitors SC1 and SC 4.
7. The wideband frequency doubling circuit of claim 5, wherein: the resistance values of the resistor R24 and the resistor R25 are 45-60 omega, so that the output impedance of the buffer stage circuit is matched to the differential 100 omega, and a matching circuit is not required to be additionally configured.
8. The wideband frequency doubling circuit of claim 5, wherein: the operating frequency of the wideband frequency doubling circuit is changed by adjusting the values of the inductances L1, L2, L3, L4 and the switched capacitances SC1-SC 6.
9. The wideband frequency doubling circuit of claim 3, wherein: the Bipolar tubes T8 and T9 in the frequency doubling stage circuit are a group of symmetrical devices, and the Bipolar tubes T8, T9 and the Bipolar tube T7 are a group of symmetrical devices which are symmetrically arranged in the layout.
10. The wideband frequency doubling circuit of claim 3, wherein: the sizes of the Bipolar tubes T8 and T9 are the same, and the size of the Bipolar tube T7 is the sum of the sizes of the Bipolar tubes T8 and T9.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202311332545.8A CN117458998A (en) | 2023-10-13 | 2023-10-13 | Broadband frequency doubling circuit for high-frequency source |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311332545.8A CN117458998A (en) | 2023-10-13 | 2023-10-13 | Broadband frequency doubling circuit for high-frequency source |
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