CN117439971A - Address allocation method, system, computer equipment and storage medium - Google Patents

Address allocation method, system, computer equipment and storage medium Download PDF

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Publication number
CN117439971A
CN117439971A CN202311303855.7A CN202311303855A CN117439971A CN 117439971 A CN117439971 A CN 117439971A CN 202311303855 A CN202311303855 A CN 202311303855A CN 117439971 A CN117439971 A CN 117439971A
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China
Prior art keywords
address
allocated
communication bus
target
interface
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CN202311303855.7A
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Inventor
吴有坤
胡志明
王若溪
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Shenzhen Jiahefeng New Energy Technology Co ltd
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Shenzhen Jiahefeng New Energy Technology Co ltd
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Priority to CN202311303855.7A priority Critical patent/CN117439971A/en
Publication of CN117439971A publication Critical patent/CN117439971A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L61/00Network arrangements, protocols or services for addressing or naming
    • H04L61/50Address allocation
    • H04L61/5038Address allocation for local use, e.g. in LAN or USB networks, or in a controller area network [CAN]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00Secondary cells; Manufacture thereof
    • H01M10/42Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/08Configuration management of networks or network elements
    • H04L41/0876Aspects of the degree of configuration automation
    • H04L41/0886Fully automatic configuration
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/08Configuration management of networks or network elements
    • H04L41/0889Techniques to speed-up the configuration process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00Secondary cells; Manufacture thereof
    • H01M10/42Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M2010/4271Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Automation & Control Theory (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Small-Scale Networks (AREA)

Abstract

The application is applicable to the technical field of battery management, provides an address allocation method, an address allocation system, computer equipment and a storage medium, and aims to automatically allocate addresses to a type B device by utilizing a type A device and improve address allocation efficiency. The method mainly comprises the following steps of: sending a trigger signal to a target B device through a trigger output interface, and sending a target address to be allocated to a communication bus through a communication bus interface, so that the target B device which receives the trigger signal obtains the target address to be allocated from the communication bus; the distributed address fed back by the target type B device through the communication bus is received, the distributed address is formed by the fact that the target type B device successfully records the target address to be distributed and then is endowed with the distributed mark, and the distributed address is fed back to the communication bus; and stopping sending the target address to be allocated to the communication bus through the communication bus interface, and stopping sending the trigger signal to the target B device through the trigger output interface.

Description

Address allocation method, system, computer equipment and storage medium
Technical Field
The application belongs to the technical field of battery management, and particularly relates to an address allocation method, an address allocation system, computer equipment and a storage medium.
Background
The battery energy storage system is widely applied to industries such as household life, industrial production, power transportation and the like at present, and one of the technical cores of the battery energy storage system is a management scheme of the battery energy storage system to a controller. Because battery energy storage systems often include multiple levels of management of battery packs, networking communications are typically performed in a multi-level architecture. For example, large battery energy storage systems typically have their battery energy storage management controllers locally networked in a three-level architecture; the top-layer battery energy storage management controller is called a master controller and is in networking communication with the master controllers of a plurality of battery clusters of the second layer, and the number of the master controllers managed by one master controller is generally more than 10; and each master controller is in networking communication with the slave controllers of the plurality of battery packs of the third layer in each battery cluster, and the number of the slave controllers managed by each master controller is usually more than 10. It can be known that the battery energy storage management controller of the large battery energy storage system can reach more than hundred, and the address allocation of the local networking is accurately carried out, so that the battery energy storage system can normally and stably operate.
However, in the prior art, the scheme of allocating addresses to each battery pack in the battery energy storage system by local networking is set manually by an operator through a dial switch, and a multi-bit dial switch is used on an operation panel of each battery pack, so that the operator needs to perform a live operation after the battery energy storage system is operated, that is, the operator needs to set a different binary number for the multi-bit dial switch of each battery pack to allocate the networking addresses. It is very error-prone for operators to input tens to hundreds of binary digits, inefficient, and dangerous to operate live.
Disclosure of Invention
The invention aims to provide an address allocation method, an address allocation system, computer equipment and a storage medium, and aims to realize automatic allocation of addresses to a type-B device by utilizing a type-A device, improve the address allocation efficiency, reduce the error rate of address allocation and avoid electrified operation of operators.
In a first aspect, the present application provides an address allocation method, applied to a type a device, including:
sending a trigger signal to a target B device through a trigger output interface, and sending a target address to be allocated to a communication bus through a communication bus interface, so that the target B device which receives the trigger signal obtains the target address to be allocated from the communication bus;
The allocated address fed back by the target B device through the communication bus is received, wherein the allocated address is formed by the target B device successfully recording the target address to be allocated and then giving an allocated mark to the target address to be allocated, and the allocated address is fed back to the communication bus;
stopping sending the target address to be allocated to the communication bus through the communication bus interface, and stopping sending the trigger signal to the target B-type device through the trigger output interface.
Optionally, before sending a trigger signal to the target b device through the trigger output interface and sending a target address to be allocated to the communication bus through the communication bus interface, the method further includes:
determining the number N of the B devices respectively connected with the A devices through the communication buses, wherein the target B device is one of N B devices, and N is a positive integer greater than 1;
obtaining K addresses to be allocated, wherein K is a positive integer equal to or greater than N;
and selecting one address to be allocated from the K addresses to be allocated as one target address to be allocated.
Optionally, the K addresses to be allocated are stored in a first address container, and after receiving the allocated address fed back by the target b device through the communication bus, the method further includes:
And placing the allocated address in a preset second address container, wherein the initial state of the second address container is that the allocated address is not stored.
Optionally, the first device is only connected with the target second device through the trigger interface;
after ceasing to send the target address to be allocated to the communication bus via the communication bus interface and ceasing to send the trigger signal to the target device b via the trigger interface, the method further comprises:
sending a new target address to be allocated to the communication bus through the communication bus interface, wherein the new target address to be allocated is one address to be allocated selected from the first address container, so that a new target B device which receives a trigger signal obtains the new target address to be allocated from the communication bus;
receiving a new allocated address fed back by the new target B device through the communication bus, wherein the new allocated address is formed by giving an allocated mark to the new target B device after the new target B device successfully records the new target address to be allocated, and feeding back the new target B device to the communication bus;
Stopping sending the new target address to be allocated to the communication bus through the communication bus interface, and placing the new allocated address in the preset second address container.
Optionally, after stopping sending the new target address to be allocated to the communication bus through the communication bus interface, the method further includes:
judging whether the number of the allocated addresses stored in the second address container is equal to or greater than N;
ending if the number of the allocated addresses stored in the second address container is equal to or greater than N;
and if the number of the allocated addresses stored in the second address container is smaller than N, triggering and executing the step of sending a new target address to be allocated to the communication bus through the communication bus interface.
In a second aspect, the present application provides another address allocation method applied to a b-type device, including:
when a trigger signal is received through a trigger input interface, a communication bus interface is started, and a target address to be allocated is obtained from a communication bus connected with the communication bus interface;
and applying the target address to be allocated as the address of the B device.
Optionally, after applying the target address to be allocated as the address of the b device itself, the method further includes:
Assigning an assigned mark to the target address to be assigned to obtain an assigned address;
feeding back the allocated address to the communication bus;
when the target address to be allocated is not obtained from the communication bus interface, stopping outputting feedback from the allocated address to the communication bus interface, closing the trigger input interface, and starting the trigger output interface to output a trigger signal.
Optionally, after starting the trigger output interface of the self to output the trigger signal externally, the method further includes:
and stopping the trigger output interface from outputting the trigger signal outwards when the allocated address is acquired through the communication bus interface.
In a third aspect, the present application provides an address allocation system comprising:
the device comprises a sending unit, a communication bus interface and a receiving unit, wherein the sending unit is used for sending a trigger signal to a target B device through the trigger output interface and sending a target address to be allocated to the communication bus through the communication bus interface so that the target B device which receives the trigger signal obtains the target address to be allocated from the communication bus;
the receiving unit is used for receiving the allocated address fed back by the target device B through the communication bus, wherein the allocated address is formed by giving an allocated mark to the target device B after the target device B successfully records the target address to be allocated and feeds back the target address to the communication bus;
And the stopping unit is used for stopping sending the target address to be allocated to the communication bus through the communication bus interface and stopping sending the trigger signal to the target B device through the trigger output interface.
Optionally, the system further comprises:
the determining unit is used for determining the number N of the B devices respectively connected with the A devices through the communication bus, wherein the target B device is one of N B devices, and N is a positive integer greater than 1;
an obtaining unit, configured to obtain K addresses to be allocated, where K is a positive integer equal to or greater than N;
and the unit is used for selecting one address to be allocated from the K addresses to be allocated as one target address to be allocated.
Optionally, the system further comprises:
and the placement unit is used for placing the allocated address in a preset second address container, and the initial state of the second address container is that the allocated address is not stored.
Optionally, the first device is only connected with the target second device through the trigger interface;
the system further comprises:
the sending unit is further configured to send a new target address to be allocated to the communication bus through the communication bus interface, where the new target address to be allocated is one address to be allocated selected from the first address container, so that a new target b device that receives a trigger signal obtains the new target address to be allocated from the communication bus;
The receiving unit is further configured to receive a new allocated address fed back by the new target b device through the communication bus, where the new allocated address is formed by the new target b device successfully recording the new target address to be allocated, then giving an allocated mark to the new target b device, and feeding back the new target address to the communication bus;
the stopping unit is further configured to stop sending the new target address to be allocated to the communication bus through the communication bus interface;
the placing unit is further configured to place the new allocated address in the preset second address container.
Optionally, the system further comprises:
a judging unit configured to judge whether the number of allocated addresses stored in the second address container is equal to or greater than N;
an ending unit, configured to end if the number of allocated addresses stored in the second address container is equal to or greater than N;
and the triggering unit is used for triggering and executing the step of sending a new target address to be allocated to the communication bus through the communication bus interface if the number of the allocated addresses stored in the second address container is smaller than N.
In a fourth aspect, the present application provides another address assignment system, comprising:
The starting unit is used for starting the communication bus interface and acquiring a target address to be allocated from a communication bus connected with the communication bus interface when a trigger signal is received through the trigger input interface;
and the application unit is used for applying the target address to be allocated as the address of the device B.
Optionally, the system further comprises:
the marking unit is used for endowing the target address to be allocated with an allocated mark to obtain an allocated address;
a feedback unit for feeding back the allocated address to the communication bus;
a stopping unit, configured to stop outputting feedback from the allocated address to the communication bus interface when the target address to be allocated is not acquired from the communication bus interface;
the closing unit is used for closing the trigger input interface;
the starting unit is used for starting the self trigger output interface to output the trigger signal.
Optionally, the system further comprises:
and the stopping unit is also used for stopping the trigger output interface from outputting the trigger signal outwards when the allocated address is acquired through the communication bus interface.
In a fifth aspect, the present application provides a computer device comprising:
Processor, memory, bus, input/output interface, network interface;
the processor is connected with the memory, the input/output interface and the network interface through the bus;
the memory stores a program;
the processor, when executing the program stored in the memory, implements the address allocation method according to any one of the foregoing first or second aspects.
In a sixth aspect, the present application provides a computer readable storage medium having stored therein instructions which, when executed on a computer, cause the computer to perform the address allocation method according to any one of the preceding first or second aspects.
In a seventh aspect, the present application provides a computer program product which, when executed on a computer, causes the computer to perform the address allocation method of any of the preceding first or second aspects.
The above technical solution can be seen that the embodiment of the application has the following advantages:
in the address allocation method of the embodiment, the first device sends a trigger signal to the second device through the trigger output interface, and sends a target address to be allocated to the communication bus through the communication bus interface, so that the second device which receives the trigger signal obtains the target address to be allocated from the communication bus, and only the second device which receives the trigger signal can obtain the target address to be allocated from the communication bus; the first device can know that the second device successfully obtains the address required by local networking according to the received allocated address, and then the first device can stop sending the target address to be allocated to the communication bus through the communication bus interface, and the first device stops sending a trigger signal to the target second device through the trigger output interface, so that the address allocation to the target second device is completed, the electrified operation of an operator is not needed, the address allocation efficiency is improved, and the error rate of address allocation is reduced.
Drawings
FIG. 1 is a flowchart of an embodiment of an address allocation method applied to a type A device;
FIG. 2 is a flowchart illustrating an address assignment method applied to a type B device according to another embodiment of the present disclosure;
FIG. 3 is a flow chart illustrating an embodiment of the address allocation method applied between a type A device and a plurality of type B devices;
FIG. 4 is a schematic diagram illustrating one embodiment of an address assignment system of the present application;
FIG. 5 is a schematic diagram of another embodiment of an address assignment system according to the present application;
FIG. 6 is a schematic diagram illustrating the structure of one embodiment of a computer device of the present application;
fig. 7 is a schematic diagram of connection of an embodiment of the type-1 device and type-4 device of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
It should be noted that, when the controllers for performing battery energy storage management in the battery energy storage system perform local networking communication according to the multi-level architecture, the controllers for performing local networking in one level in the previous level are all controllers for performing local networking in the next level, which need to be all connected with the controllers for performing local networking in the next level, that is, the embodiment uses the type-a device as the master controller for performing local networking in one level in the previous level, uses the type-N device as the slave controller in the next level connected with the type-a device as an example, and can be applied to the network address allocation of any two adjacent levels of local networking communication in the multi-level architecture in a similar manner.
Referring to fig. 7, fig. 7 shows a schematic diagram of connection between 1 a type a device as a master controller and 4 type b devices as slave controllers (N is equal to 4 in this embodiment, N is generally greater than 10 in practical applications), and the embodiment mainly includes: a type a device 10, a type b device 21, a type b device 22, a type b device 23, a type b device 24, a communication bus 30, a trigger signal line 41, a trigger signal line 42, a trigger signal line 43, a trigger signal line 44, and a power supply line 50; the type a device 10 should have at least the following interfaces: a bus interface AC connected to the communication bus 30, a trigger output interface AT connected to the connected b-type devices 21, a power supply interface for supplying power to all the b-type devices of the next hierarchy, and the like; each type B device is provided with at least the following interfaces: a power interface, a bus interface BC connected to the communication bus 30, a trigger input interface BR for receiving a trigger signal, a trigger output interface BT for outputting a trigger signal, and the like. Specifically, the communication bus 30 should support duplex communication cables, and the communication bus 30 establishes communication connection with the bus interface AC of the a-type device, the bus interface BC of the b-type device 21, the bus interface BC of the b-type device 22, the bus interface BC of the b-type device 23, and the bus interface BC of the b-type device 24, respectively. The trigger output interface AT of the type a device 10 is connected with the trigger input interface BR of the adjacent type b device 21 through the trigger signal line 41; the trigger output interface BT of the b device 21 is connected to the trigger input interface BR of the adjacent another b device 22 through the trigger signal line 42, the trigger output interface BT of the b device 22 is connected to the trigger input interface BR of the adjacent another b device 23 through the trigger signal line 43, and the trigger output interface BT of the b device 23 is connected to the adjacent another b device 24 through the trigger signal line 44; in this embodiment, only 4 types of b devices are shown, and if there are more types of b devices in practical application, the connection between the driving trigger input interface and the trigger output interface can be used. The power supply interface of the a-type device 10 is connected to the power supply interface of the b-type device 21, the power supply interface of the b-type device 22, the power supply interface of the b-type device 23, and the power supply interface of the b-type device 24 via the power supply line 50, respectively, and when the a-type device 10 is started, the b-type device 21, the b-type device 22, the b-type device 23, and the b-type device 24 can be started by supplying power via the power supply line 50. In some embodiments, the type a device may further have a media output interface, through which the display is connected to display information such as the progress of address allocation in some embodiments.
With the above understanding, referring to fig. 1, the address allocation method of the present application is applied to an embodiment of a type a device, and includes:
101. and sending a trigger signal to the target B device through the trigger output interface, and sending a target address to be allocated to the communication bus through the communication bus interface, so that the target B device which receives the trigger signal obtains the target address to be allocated from the communication bus.
As can be seen from fig. 7, since the type a device 10 has only one trigger output interface AT connected to the type b device 21, the type b device in this step corresponds to the type b device 21 shown in fig. 7, and the type a device 10 sends a trigger signal to the type b device 21 through the trigger output interface AT and sends a target address to be allocated to the communication bus 30 through the communication bus interface AC, for example, the target address to be allocated is a preset series of binary digits. The b device of this embodiment is configured to obtain the target address to be allocated from the communication bus 30 only when receiving the trigger signal from the trigger input interface BR, so as to ensure that the target address to be allocated is uniquely allocated to one target b device.
102. And receiving the allocated address fed back by the target B device through the communication bus, wherein the allocated address is formed by giving an allocated mark to the target B device after the target B device successfully records the target address to be allocated, and feeding back the allocated mark to the communication bus.
After the target address to be allocated of the first device is acquired by the second device in step 101, the second device records the target address to be allocated and sets the target address to be a local network address of the second device, assigns the target address to be allocated to an allocated mark, and further forms the target address to be allocated, the second device feeds back the allocated address to the communication bus 30 through the bus interface BC of the second device, and the second device can receive the allocated address fed back by the second device through the communication bus.
103. And stopping sending the target address to be allocated to the communication bus through the communication bus interface, and stopping sending the trigger signal to the target B device through the trigger interface.
When the type a device receives the allocated address fed back by the type b target device through the communication bus in step 102, it proves that the local networking address allocated through the communication bus has been applied by the type b target device, and the sending of the address to be allocated to the communication bus through the communication bus interface and the sending of the trigger signal to the type b target device through the trigger interface can be stopped, so that the address allocation to the type b target device is completed without the need of the live operation of an operator, the address allocation efficiency is improved, and the error rate of the address allocation is reduced.
With the above understanding, referring to fig. 2, the address allocation method of the present application is applied to an embodiment of a b device, and includes:
201. when a trigger signal is received through the trigger input interface, the communication bus interface is started and the target address to be allocated is acquired.
The b device of the present embodiment is a target b device connected to the trigger output interface AT of the a device through a trigger signal line, for example, the b device 21 shown in fig. 7. And when the second device receives a trigger signal through the trigger input interface, starting the communication bus interface and acquiring a target address to be allocated. That is, the type b device in this embodiment does not need to care whether the trigger signal received by the trigger input interface is derived from the type a device, and can enable the communication bus interface and acquire the target address to be allocated from the communication bus connected to the communication bus interface as long as the trigger signal is received through the trigger input interface, and the trigger signal is excited one by one from the type a device to the type b device due to the connection relationship between the type a device and the type b device shown in fig. 7.
202. And applying the target address to be allocated as the address of the type B device.
After the second device obtains the target address to be allocated in step 201, the target address to be allocated can be directly applied as the address of the second device for local networking, and the second device only needs to obtain the target address to be allocated from the communication bus according to the trigger signal and apply the target address to be allocated, so that no electrified operation of operators is needed, the address allocation efficiency is improved, and the error rate of address allocation is reduced.
More specifically, referring to fig. 3, the address allocation method of the present application is applied to an embodiment between a type a device and a plurality of type b devices, where in the embodiment, the target type b device represents one type b device (e.g. type b device 21 shown in fig. 7) connected to a trigger output interface AT of the type a device through a trigger signal line, the type b device N represents an nth type b device, and the nth type b device represents another type b device connected to a trigger output interface BT of the target type b device (or other type b devices) through a trigger signal line, and specifically, referring to the embodiment, the address allocation method of the present application includes:
301. the type a devices determine the number N of type b devices respectively connected through the communication bus.
Referring to fig. 7, when the type a device 10 is started, the type a device 10 turns on its trigger output interface AT, bus interface AC, and power supply interface. Then, the a-type device can supply power to all the b-type devices connected with the power supply line 50 through the power supply interface and start the b-type devices, and the started b-type devices can open the trigger input interface BR, close the trigger output interface BT and close the bus interface BC. At this time, the type a device sets itself as a signal source of the trigger signal, and determines the number N of the type b devices respectively connected through the communication bus, N should be a positive integer greater than or equal to 2, that is, N should be a positive integer greater than 1. The number of devices may be determined by the operator based on the number of devices connected to the communication bus of the device a in the field, e.g., 4 devices as shown in fig. 7, then N is equal to 4.
302. The A-type device acquires K addresses to be allocated and stores the K addresses in a first address container.
The first device allocates different local networking addresses to the N second devices determined in step 301, where the step needs the first device to obtain K addresses to be allocated, where K is a positive integer greater than or equal to N, that is, the first device has at least addresses to be allocated for local networking, where the number of addresses to be allocated is the same as that of the second devices, so as to ensure that each second device can be allocated to an address to be allocated for local networking. Whereas the local networking address of the type a device is typically assigned by the device of the level above it according to a similar procedure in this embodiment; or when the type-a device is the highest-level device, the local networking address of the type-a device can be directly input or set by an operator. The K addresses to be allocated in this embodiment may be generated by a preset rule algorithm, or may be directly imported by an operator into other set K addresses to be allocated, for example, the addresses to be allocated are a string of binary digits consisting of "0" and "1". In order to facilitate the acquisition of the address allocation process to be allocated by the type a device in the subsequent step, the present step may store K addresses to be allocated in the first address container of the type a device.
303. The A-type device selects one address to be allocated from K addresses to be allocated as a target address to be allocated.
Specifically, the type a device selects one address to be allocated from the K addresses to be allocated in the first address container in step 302 as a target address to be allocated.
304. The A-type device sends a trigger signal through a trigger output interface.
After the first device sets itself as the signal source of the trigger signal in step 301, the trigger signal is actively sent to the trigger input interface BR of the second device through the trigger output interface AT, and the second device can successfully receive the trigger signal sent by the first device because the trigger input interface BR of the second device is already turned on when the second device is powered on in step 301. For example, the target type b device is a type b device 21 shown in fig. 7.
305. The type A device sends a target address to be allocated to a communication bus through a communication bus interface.
After obtaining the target address to be allocated in step 303, the type a device immediately sends the target address to be allocated to the communication bus through its own communication bus interface. Specifically, the type a device periodically transmits the target address to the communication bus to maintain the existence of the target address to be allocated in the communication bus.
306. The target b device enables the communication bus interface and obtains the target address to be allocated from the communication bus.
After the target b device receives the trigger signal through the trigger input interface BR in step 305, the target b device in step enables the communication bus interface BC and obtains the target address to be allocated transmitted by the a device from the communication bus 30.
307. The target B device applies the target address to be allocated as the address of the target B device.
The target type b device can directly take the target address to be allocated obtained in the step 306 as the address of local networking, thereby realizing the process of allocating the address of the type a device to one target type b device.
308. And the target B device assigns an allocated mark to the target address to be allocated to obtain the allocated address.
After the target b device applies the target address to be allocated as its own address in step 307, it also needs to assign an allocated tag to the target address to be allocated in order to obtain the address with the allocated tag, which is called an allocated address. For example, the binary digits corresponding to the target address to be allocated are "0000 … 1101", wherein "…" indicates that "0" and/or "1" of several bits are omitted, and then assuming that the first 4-bit binary digits of the target address to be allocated are marks for distinguishing the "allocated address" from the "address to be allocated", the several-bit binary digits after the marking of the 4-bit binary digits are the real addresses for local networking, wherein "0000" represents that the address belongs to the "address to be allocated" state, and "1111" represents that the address belongs to the "unassigned address" state; the target type b device can change binary digits "0000 … 1101" corresponding to the target address to be allocated into "1111 … 1101", so as to change the state of the target address to be allocated into the allocated address, and reserve the address of the target type b device for local networking. It should be noted that, in practical application, binary digits with different positions and different numbers in the target address to be allocated can be selected as marks for representing the address states according to practical needs, which is not limited herein.
309. The target b device feeds back the assigned address to the communication bus.
The target b device may transmit the allocated address obtained in step 308 to the communication bus 30 through its own bus interface BC, and since the communication bus 30 supports duplex communication, the communication bus 30 may accommodate the target to-be-allocated address sent by the a device and the allocated address fed back by the target b device in this step.
310. The type a device stops sending the target address to be allocated to the communication bus through the communication bus interface and stops sending the trigger signal through the trigger output interface.
When the type a device detects that the allocated address is fed back in the communication bus 30 through the bus interface AC after step 309, it proves that the target address to be allocated sent to the communication bus in step 305 is already acquired and applied, and the type a device can stop sending the target address to be allocated to the communication bus 30 through the communication bus interface AC in this step, and can stop sending the trigger signal through the trigger output interface AT, and end itself as the signal source identity of the trigger signal.
311. The b device stops outputting feedback of the assigned address to the communication bus interface and will close the trigger input interface.
After the communication bus interface BC is enabled in step 306, the b device monitors whether the target address to be allocated exists in the communication bus 30 through the bus interface BC, and when the a device stops sending the target address to be allocated to the communication bus 30 through the communication bus interface AC in step 310, the b device detects the disappearance of the target address to be allocated in the communication bus 30, and at this time, the b device stops sending the feedback of the allocated address to the communication bus interface BC to the communication bus 30, and closes the trigger input interface BR.
312. And the B device sends a trigger signal through the trigger output interface.
After step 311, the b device means that it has completed the acquisition and application of the address of the local network, needs to switch roles to serve as a signal source of the trigger signal, starts the own trigger output interface BT to send the trigger signal to the next b device connected thereto, and the next b device receiving the trigger signal will undergo a process similar to the above-mentioned target b device, and completes the acquisition and application of the address required by the local network. For example, the next device is the device b 22 shown in fig. 7, when the device b 22 goes through a process similar to that of the target device b, after the acquisition and application of the address required by the local networking of the device b are completed, the device b 22 also triggers the triggering output interface BT which goes through the step to enable itself to send a triggering signal to the next device b 23 connected with the triggering output interface BT, and the cycle is performed until the triggering signal sent by the triggering output interface BT which is enabled by the device b 24 is no longer responded.
313. And placing the allocated address in a preset second address container, wherein the initial state of the second address container is that the allocated address is not stored.
After the type a device monitors that the allocated address is fed back in the communication bus 30 through the bus interface AC thereof in step 309, the type a device stores the allocated address in a preset second address container in this step, and the initial state of the second address container is that the allocated address is not stored, so that the number of the allocated addresses in the second address container is counted in the subsequent step. Furthermore, in order to ensure that the allocated "address to be allocated" in the first address container of the type a device is different from other unallocated "addresses to be allocated", the allocated "addresses to be allocated" may be deleted or marked according to the allocated addresses in the second container, so as to avoid being reused by mistake.
314. The type A device determines whether the number of allocated addresses stored in the second address container is equal to or greater than N.
After adding the allocated addresses to the second address container in step 313, the type a device needs to further determine whether the number of allocated addresses stored in the second address container is equal to or greater than N in order to determine whether the type a device has transmitted the same number of addresses for local networking as the type b device to the communication bus 30 through the bus interface AC; when the type a device determines that the number of allocated addresses stored in the second address container is equal to or greater than N, it proves that the type a device has transmitted the same number of addresses for local networking as the type b device to the communication bus 30 through the bus interface AC, and all the type b devices have the addresses for local networking at this time; when the type a device determines that the number of allocated addresses stored in the second address container is smaller than N, it proves that the type a device does not transmit the same number of addresses for local networking as the type b device to the communication bus 30 through the bus interface AC, and at this time, there is still a part of addresses for local networking which are not used by the type b device.
315. And (5) ending.
When the type a device determines in step 314 that the same number of addresses for local networking as the type b devices have been transmitted to the communication bus 30 through the bus interface AC, and all the type b devices have the addresses for local networking at this time, the type a device has completed the network address assignment to all the type b devices connected to itself through the communication bus 30, the execution of the address assignment scheme of the present embodiment may be ended.
316. The type A device selects an address to be allocated from the first address container as a new target address to be allocated.
When the type a device determines in step 314 that the same number of addresses for local networking as the type b device are not transmitted to the communication bus 30 via the bus interface AC, and it proves that there are still some addresses for local networking that are not available to the type b device, the type a device selects in this step one address to be allocated (not selected by step 303) from the first address container as a new target address to be allocated.
317. The type A device sends a new target address to be allocated to the communication bus through the communication bus interface.
The type a device sends the address to be allocated selected in step 316 to the communication bus through the communication bus interface, the execution of this step and the type of step 305, and the type a device returns to execute step 305 in this step.
318. One of the N-station b-devices performs a process similar to some or all of steps 306, 307, 308, 309, 311, 312, 320.
After the first device sends a new target address to be allocated to the communication bus through the communication bus interface in step 317, the trigger signal is sent by the second device which has completed the local network access and application, and the trigger output interface BT of the second device is enabled to send the trigger signal to the next second device connected with the first device, then the second device N which receives the trigger signal will undergo a similar process to the above-mentioned target second device, i.e. the second device N performs a process similar to all of steps 306, 307, 308, 309, 311, 312, 320, and when the second device N is exactly the last device, i.e. it fails to detect that there is an allocated address through the bus interface BC after performing step 312, the last second device N does not need to also fail to perform step 320, but all N second devices can complete the local network access and application of the second device.
319. One of the N type b devices feeds back the new assigned address to the communication bus.
The execution of this step is similar to step 309, and the repeated parts are not repeated here, which is equivalent to regarding the new allocated address as the allocated address of step 309, and further triggers the type a device to execute step 310 in sequence. It should be noted that, at this time, the allocated address is also monitored and seen by the b device N that has completed the address acquisition and application required for the local networking of itself through the communication bus, and the target b device just acts as a signal source of the trigger signal in the present cycle, and the target b device may monitor the allocated address through the bus interface BC.
320. The target B device stops triggering the output interface to output the triggering signal.
When the target b device serving as the signal source monitors the allocated address through the communication bus, the identity of the signal source serving as the trigger signal can be ended, the trigger output interface BT stops outputting the trigger signal to the outside, and the transmission of the trigger signal is completed, at this time, step 312 is executed by the address acquisition required by the local networking of the target b device and the responsibility of the applied b device N serving as the target b device, and the cycle is performed until all the cycles are completed to step 315.
Therefore, the embodiment of the address allocation method can enable the first device serving as the master controller and the second device serving as the slave controller to automatically allocate the addresses one by one, does not need the input of operators and electrified work like the prior art, improves the address allocation efficiency, and reduces the error rate of address allocation; the display can be connected with the media output interface of the A-type device to display the ratio of the number of the allocated addresses stored in the second address container to the number N of the B-type device, namely the display displays the progress of the A-type device to allocate the addresses to the B-type device through the communication bus.
Having described the method for address assignment of the present application in the above embodiments, and describing the address assignment system of the present application in the following, referring to fig. 4, one embodiment of the address assignment system of the present application includes:
a sending unit 401, configured to send a trigger signal to a target b device through a trigger output interface, and send a target address to be allocated to a communication bus through a communication bus interface, so that the target b device that receives the trigger signal obtains the target address to be allocated from the communication bus;
a receiving unit 402, configured to receive an allocated address fed back by the target b device through the communication bus, where the allocated address is formed by the target b device successfully recording the target address to be allocated, then giving an allocated mark to the target b device, and feeding back the target b device to the communication bus;
and a stopping unit 403, configured to stop sending the target address to be allocated to the communication bus through the communication bus interface, and stop sending the trigger signal to the target b device through the trigger output interface.
Optionally, the system further comprises:
a determining unit 404, configured to determine the number N of b devices that are respectively connected to the a devices through the communication bus, where the target b device is one of N b devices, and N is a positive integer greater than 1;
An obtaining unit 405, configured to obtain K addresses to be allocated, where K is a positive integer equal to or greater than N;
as a unit 406, it is configured to select one to-be-allocated address from K to-be-allocated addresses as one target to-be-allocated address.
Optionally, the system further comprises:
the placing unit 407 is configured to place the allocated address in a preset second address container, where the initial state of the second address container is that the allocated address is not stored.
Optionally, the first device is only connected with the target second device through the trigger interface;
the system further comprises:
the sending unit 401 is further configured to send a new target address to be allocated to the communication bus through the communication bus interface, where the new target address to be allocated is one address to be allocated selected from the first address container, so that a new target b device that receives a trigger signal obtains the new target address to be allocated from the communication bus;
the receiving unit 402 is further configured to receive a feedback of a new allocated address from the new target b device through the communication bus, where the new allocated address is formed by the new target b device successfully recording the new target address to be allocated, then assigning an allocated flag to the new target b device, and feeding back the new target address to the communication bus;
The stopping unit 403 is further configured to stop sending the new target address to be allocated to the communication bus through the communication bus interface;
the placing unit 407 is further configured to place the new allocated address in the preset second address container.
Optionally, the system further comprises:
a judging unit 408, configured to judge whether the number of allocated addresses stored in the second address container is equal to or greater than N;
an ending unit 409, configured to end if the number of allocated addresses stored in the second address container is equal to or greater than N;
and a triggering unit 410, configured to trigger to perform a step of sending a new target address to be allocated to the communication bus through the communication bus interface if the number of allocated addresses stored in the second address container is less than N.
The operation performed by the address allocation system of this embodiment is similar to that performed by the type a device in the embodiments of fig. 1 and 3, and will not be described here again.
Referring to fig. 5, another embodiment of the address allocation system of the present application includes:
an enabling unit 501, configured to enable a communication bus interface and obtain a target address to be allocated from a communication bus connected to the communication bus interface when a trigger signal is received through a trigger input interface;
An application unit 502, configured to apply the target address to be allocated as an address of the b device itself.
Optionally, the system further comprises:
a marking unit 503, configured to assign an allocated mark to the target address to be allocated, so as to obtain an allocated address;
a feedback unit 504, configured to feed back the allocated address to the communication bus;
a stopping unit 505, configured to stop outputting feedback from the allocated address to the communication bus interface when the target address to be allocated is not acquired from the communication bus interface;
a closing unit 506 for and to close the trigger input interface;
the starting unit 507 is configured to start the trigger output interface of the starting unit to output the trigger signal.
Optionally, the system further comprises:
the stopping unit 505 is further configured to stop the trigger output interface from outputting a trigger signal to the outside when the allocated address is acquired through the communication bus interface.
The operation performed by the address allocation system of this embodiment is similar to that performed by the device b in the embodiments of fig. 2 and 3, and will not be described here again.
With reference to fig. 6, an embodiment of a computer device in an embodiment of the present application includes:
The computer device 600 may include one or more processors (central processing units, CPU) 601 and memory 602, with one or more applications or data stored in the memory 602. Wherein the memory 602 is volatile or persistent. The program stored in the memory 602 may include one or more modules, each of which may include a series of instruction operations in a computer device. Still further, the processor 601 may be arranged to communicate with the memory 602 and execute a series of instruction operations in the memory 602 on the computer device 600. The computer device 600 may further include: one or more wireless network interfaces 603, one or more input/output interfaces 604, and/or one or more operating systems, such as Harmony OS, windows Server, mac OS, unix, linux, freeBSD, etc. The processor 601 may perform the operations performed in any of the embodiments shown in fig. 1, 2 and 3, and detailed descriptions thereof are omitted herein.
In the several embodiments provided in the embodiments of the present application, it should be understood by those skilled in the art that the disclosed systems, apparatuses and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of the units is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units. The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a read-only memory (ROM), a random access memory (RAM, random access memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing description of the preferred embodiments of the present application is not intended to be limiting, but is intended to cover any and all modifications, equivalents, or alternatives falling within the spirit and principles of the present application.

Claims (12)

1. An address allocation method, applied to a type a device, comprising:
sending a trigger signal to a target B device through a trigger output interface, and sending a target address to be allocated to a communication bus through a communication bus interface, so that the target B device which receives the trigger signal obtains the target address to be allocated from the communication bus;
the allocated address fed back by the target B device through the communication bus is received, wherein the allocated address is formed by the target B device successfully recording the target address to be allocated and then giving an allocated mark to the target address to be allocated, and the allocated address is fed back to the communication bus;
stopping sending the target address to be allocated to the communication bus through the communication bus interface, and stopping sending the trigger signal to the target B-type device through the trigger output interface.
2. The address assignment method as claimed in claim 1, wherein before transmitting the trigger signal to the target b device via the trigger output interface and transmitting a target address to be assigned to the communication bus via the communication bus interface, the method further comprises:
Determining the number N of the B devices respectively connected with the A devices through the communication buses, wherein the target B device is one of N B devices, and N is a positive integer greater than 1;
obtaining K addresses to be allocated, wherein K is a positive integer equal to or greater than N;
and selecting one address to be allocated from the K addresses to be allocated as one target address to be allocated.
3. The address allocation method according to claim 2, wherein K of the addresses to be allocated are stored in a first address container, and after receiving the allocated addresses fed back by the target b device through the communication bus, the method further comprises:
and placing the allocated address in a preset second address container, wherein the initial state of the second address container is that the allocated address is not stored.
4. The address allocation method according to claim 3, wherein the type a device is connected only to the target type b device through the trigger interface;
after ceasing to send the target address to be allocated to the communication bus via the communication bus interface and ceasing to send the trigger signal to the target device b via the trigger interface, the method further comprises:
Sending a new target address to be allocated to the communication bus through the communication bus interface, wherein the new target address to be allocated is one address to be allocated selected from the first address container, so that a new target B device which receives a trigger signal obtains the new target address to be allocated from the communication bus;
receiving a new allocated address fed back by the new target B device through the communication bus, wherein the new allocated address is formed by giving an allocated mark to the new target B device after the new target B device successfully records the new target address to be allocated, and feeding back the new target B device to the communication bus;
stopping sending the new target address to be allocated to the communication bus through the communication bus interface, and placing the new allocated address in the preset second address container.
5. The address allocation method of claim 4, wherein after ceasing to send the new target to-be-allocated address to the communication bus via the communication bus interface, the method further comprises:
judging whether the number of the allocated addresses stored in the second address container is equal to or greater than N;
Ending if the number of the allocated addresses stored in the second address container is equal to or greater than N;
and if the number of the allocated addresses stored in the second address container is smaller than N, triggering and executing the step of sending a new target address to be allocated to the communication bus through the communication bus interface.
6. An address allocation method, applied to a type b device, comprising:
when a trigger signal is received through a trigger input interface, a communication bus interface is started, and a target address to be allocated is obtained from a communication bus connected with the communication bus interface;
and applying the target address to be allocated as the address of the B device.
7. The address allocation method according to claim 6, wherein after applying the target address to be allocated as the address of the b-device itself, the method further comprises:
assigning an assigned mark to the target address to be assigned to obtain an assigned address;
feeding back the allocated address to the communication bus;
when the target address to be allocated is not obtained from the communication bus interface, stopping outputting feedback from the allocated address to the communication bus interface, closing the trigger input interface, and starting the trigger output interface to output a trigger signal.
8. The address allocation method according to claim 7, wherein after starting the trigger output interface of itself to output the trigger signal externally, the method further comprises:
and stopping the trigger output interface from outputting the trigger signal outwards when the allocated address is acquired through the communication bus interface.
9. An address assignment system, comprising:
the device comprises a sending unit, a communication bus interface and a receiving unit, wherein the sending unit is used for sending a trigger signal to a target B device through the trigger output interface and sending a target address to be allocated to the communication bus through the communication bus interface so that the target B device which receives the trigger signal obtains the target address to be allocated from the communication bus;
the receiving unit is used for receiving the allocated address fed back by the target device B through the communication bus, wherein the allocated address is formed by giving an allocated mark to the target device B after the target device B successfully records the target address to be allocated and feeds back the target address to the communication bus;
and the stopping unit is used for stopping sending the target address to be allocated to the communication bus through the communication bus interface and stopping sending the trigger signal to the target B device through the trigger output interface.
10. An address assignment system, comprising:
the starting unit is used for starting the communication bus interface and acquiring a target address to be allocated from a communication bus connected with the communication bus interface when a trigger signal is received through the trigger input interface;
and the application unit is used for applying the target address to be allocated as the address of the device B.
11. A computer device, comprising:
processor, memory, bus, input/output interface, network interface;
the processor is connected with the memory, the input/output interface and the network interface through the bus;
the memory stores a program;
the address allocation method according to any one of claims 1 to 8 is implemented when the processor executes the program stored in the memory.
12. A computer readable storage medium having stored therein instructions which, when executed on a computer, cause the computer to perform the address allocation method of any one of claims 1 to 8.
CN202311303855.7A 2023-10-10 2023-10-10 Address allocation method, system, computer equipment and storage medium Pending CN117439971A (en)

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CN104410510A (en) * 2014-10-24 2015-03-11 华为技术有限公司 Method, device and system for processing failure in controller where information is transmitted through interface card
CN112272243A (en) * 2020-10-10 2021-01-26 深圳市科信通信技术股份有限公司 Address allocation method
CN114338610A (en) * 2021-11-22 2022-04-12 广州极飞科技股份有限公司 Address allocation method, equipment management and irrigation system and slave equipment

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2725499A1 (en) * 2012-10-25 2014-04-30 Telefónica, S.A. Method for assigning dynamically an identifier to a slave device in I2C data bus
CN104410510A (en) * 2014-10-24 2015-03-11 华为技术有限公司 Method, device and system for processing failure in controller where information is transmitted through interface card
CN112272243A (en) * 2020-10-10 2021-01-26 深圳市科信通信技术股份有限公司 Address allocation method
CN114338610A (en) * 2021-11-22 2022-04-12 广州极飞科技股份有限公司 Address allocation method, equipment management and irrigation system and slave equipment

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