CN117439435A - Circuit driving method, system, equipment and medium for split-phase inverter circuit - Google Patents
Circuit driving method, system, equipment and medium for split-phase inverter circuit Download PDFInfo
- Publication number
- CN117439435A CN117439435A CN202311766810.3A CN202311766810A CN117439435A CN 117439435 A CN117439435 A CN 117439435A CN 202311766810 A CN202311766810 A CN 202311766810A CN 117439435 A CN117439435 A CN 117439435A
- Authority
- CN
- China
- Prior art keywords
- bridge arm
- load
- target
- voltage
- driving signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 50
- 238000005070 sampling Methods 0.000 claims description 42
- 239000003990 capacitor Substances 0.000 claims description 25
- 238000004590 computer program Methods 0.000 claims description 25
- 238000003860 storage Methods 0.000 claims description 16
- 238000010586 diagram Methods 0.000 description 13
- 238000004891 communication Methods 0.000 description 11
- 238000012545 processing Methods 0.000 description 9
- 230000006870 function Effects 0.000 description 8
- 238000001914 filtration Methods 0.000 description 6
- 230000003287 optical effect Effects 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000003321 amplification Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- 230000000644 propagated effect Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000004146 energy storage Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 230000002195 synergetic effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The invention relates to the technical field of split phase inverters and discloses a circuit driving method, a system, equipment and a medium for a split phase inverter circuit.
Description
Technical Field
The invention relates to the technical field of split-phase inverters, in particular to a circuit driving method, a system, equipment and a medium for a split-phase inverter circuit.
Background
Along with the development of new energy technology, the inverter is also widely developed and applied, but the inverter has a lot of differences in different countries and regions due to different power grid structures, wherein two main popular user side power grids in the world are a single-phase two-wire power grid and a single-phase three-wire power grid, wherein the single-phase two-wire power grid consists of a live wire and a zero wire, and the single-phase three-wire power grid consists of a zero wire and two live wires. The split-phase inverter is mainly suitable for the single-phase three-wire system power grid, the output end of the split-phase inverter is matched with the single-phase three-wire system power grid, the requirements of low voltage level and high safety when a user accesses a low-power load can be met, the requirements of voltage level improvement when the user accesses a high-power load can be met, and the load capacity is improved. Therefore, a user can select to connect the electric appliance between the live wire and the zero wire of the single-phase three-wire system or between the live wire and the live wire according to the power of the electric appliance, and the purpose of flexibly selecting the connection mode according to the self requirement is achieved.
However, when a single-phase three-wire system power grid is used, because of the uncontrollable external physical environment influence, a large current change rate of load input current between a zero line and a live line can be caused, and the problems of vibration, divergence, resonance and the like can occur, so that the load is stopped to work or even damaged, and the power supply reliability of a split-phase inverter circuit is reduced.
Disclosure of Invention
The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview, and is intended to neither identify key/critical elements nor delineate the scope of such embodiments, but is intended as a prelude to the more detailed description that follows.
In view of the above-mentioned shortcomings of the prior art, the present invention discloses a circuit driving method, system, device and medium for a split-phase inverter circuit, so as to improve the reliability of the split-phase inverter circuit for loading to an output terminal.
The invention provides a circuit driving method for a split-phase inverter circuit, wherein the split-phase inverter circuit is connected with a plurality of output end loads and comprises a plurality of inverter bridge arms which are mutually connected in parallel, and the method comprises the following steps: determining any output end load as a target load, and determining a target bridge arm and a reference bridge arm from the inverter bridge arm, wherein the target load is respectively connected with the target bridge arm and the reference bridge arm; acquiring a reference voltage and a sampling voltage of the target load; calculating according to the reference voltage and the sampling voltage to obtain an error voltage, and generating a target modulation wave according to the error voltage; comparing the target modulation wave with a preset reference carrier wave to obtain a target driving signal, and comparing the target driving signal with the preset reference carrier wave to obtain a reference driving signal; and driving the target bridge arm through the target driving signal, and driving the reference bridge arm according to the reference driving signal.
Optionally, the power input positive pole of the inverter bridge arm is connected with the positive pole of a preset direct current power supply, the power input negative pole of the inverter bridge arm is connected with the negative pole of the preset direct current power supply, the inverter bridge arm comprises a first bridge arm, a second bridge arm and a third bridge arm, and the output end load comprises: the first end of the first load is connected with the middle point of the first bridge arm, and the second end of the first load is connected with the middle point of the second bridge arm, wherein the split-phase inverter circuit is used for providing first alternating current for the first load according to the preset direct current power supply; the first end of the second load is connected with the middle point of the first bridge arm, and the second end of the second load is connected with the middle point of the third bridge arm, wherein the split-phase inverter circuit is used for providing second alternating current for the second load according to the preset direct current power supply.
Optionally, the split phase inverter circuit further includes: the first filter inductor is arranged between the middle point of the second bridge arm and the second end of the first load; the first end of the first filter capacitor is connected with the first end of the first load, and the second end of the first filter capacitor is connected with the second end of the first load; the first filter inductor is arranged between the middle point of the third bridge arm and the second end of the second load; the first end of the second filter capacitor is connected with the first end of the second load, and the second end of the second filter capacitor is connected with the second end of the second load.
Optionally, the split phase inverter circuit is further connected with a third load, a first end of the third load is connected with the middle point of the second bridge arm through the first filter inductor, and a second end of the third load is connected with the middle point of the third bridge arm through the second filter inductor, wherein the split phase inverter circuit is used for providing third alternating current for the third load according to the preset direct current power supply.
Optionally, the inverter leg is composed of at least two switch units, and is driven by: determining a switching unit positioned between a power input positive electrode of the inverter bridge arm and a middle point of the inverter bridge arm as a first switch of the inverter bridge arm, and determining a switching unit positioned between the middle point of the inverter bridge arm and a power input negative electrode of the inverter bridge arm as a second switch of the inverter bridge arm; converting a first control signal corresponding to the inversion bridge arm into a second control signal based on an inverter, wherein the first control signal comprises the target driving signal or the reference driving signal; the first switch is controlled by the first control signal, and the second switch is controlled by the second control signal.
Optionally, determining a target bridge arm and a reference bridge arm from the inverter bridge arm includes at least one of: if the target load comprises the first load, determining the first bridge arm as a reference bridge arm of the first load, and determining the second bridge arm as a target bridge arm of the first load; and if the target load comprises the second load, determining the first bridge arm as a reference bridge arm of the second load, and determining the third bridge arm as a target bridge arm of the second load.
Optionally, generating a target modulation wave according to the error voltage includes: acquiring the sampling current of the target load; inputting the error voltage into a preset voltage control loop, so that the voltage control loop outputs a reference current according to the error voltage; and inputting the sampling current and the reference current into a preset current control loop, so that the current control loop outputs a target modulation wave according to the sampling current and the reference current.
Optionally, generating a target modulation wave according to the error voltage includes: and inputting the error voltage into a preset voltage control loop, so that the voltage control loop outputs a target controller according to the error voltage.
The invention provides a circuit driving system for a split-phase inverter circuit, wherein the split-phase inverter circuit is connected with a plurality of output end loads and comprises a plurality of inverter bridge arms which are mutually connected in parallel, and the system comprises: the acquisition module is used for acquiring reference voltage and sampling voltage of a target load, wherein any output end load is determined to be the target load, and a target bridge arm and a reference bridge arm are determined from the inverter bridge arm, and the target load is respectively connected with the target bridge arm and the reference bridge arm; the generating module is used for calculating according to the reference voltage and the sampling voltage to obtain an error voltage and generating a target modulation wave according to the error voltage; the comparison module is used for comparing the target modulation wave with a preset reference carrier wave to obtain a target driving signal, and comparing the target driving signal with the preset reference carrier wave to obtain a reference driving signal; and the driving module is used for driving the target bridge arm through the target driving signal and driving the reference bridge arm according to the reference driving signal.
The present invention provides an apparatus comprising: a processor and a memory; the memory is used for storing a computer program, and the processor is used for executing the computer program stored in the memory so as to enable the device to execute the method.
The present invention provides a computer-readable storage medium having stored thereon a computer program: the computer program, when executed by a processor, implements the method described above.
The invention has the beneficial effects that:
the method comprises the steps of obtaining a reference voltage and a sampling voltage of a target load, generating a target modulation wave based on the reference voltage and the sampling voltage, driving a target bridge arm connected with the target load according to a target driving signal obtained by comparing the target modulation wave with a preset reference carrier, and driving a reference bridge arm according to a reference driving signal obtained by comparing the preset reference modulation wave with the preset reference carrier. In this way, the error voltage is obtained by calculating the reference voltage and the sampling voltage, and the target driving signal is obtained according to the target modulation wave generated by the error voltage, so that the target bridge arm is driven to control the input voltage of the target load, the change rate of the input voltage is slowed down, the conditions that the target load stops working and even is damaged due to the problems of vibration divergence, resonance and the like are restrained, and the reliability of the split-phase inverter circuit is improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. It is apparent that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art. In the drawings:
FIG. 1 is a schematic diagram of a split phase inverter circuit according to an embodiment of the present invention;
FIG. 2 is a flow chart of a circuit driving method for a split phase inverter circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another split phase inverter circuit according to an embodiment of the present invention;
FIG. 4 is a flow chart of a method for generating a driving signal according to an embodiment of the present invention;
FIG. 5 is a flow chart of another method for generating a driving signal according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of the output voltage of a split phase inverter circuit according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of the output voltage of another split phase inverter circuit according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a circuit driving system for a split phase inverter circuit according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of a computer system of an apparatus in an embodiment of the invention.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that, without conflict, the following embodiments and sub-samples in the embodiments may be combined with each other.
It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
In the following description, numerous details are set forth in order to provide a more thorough explanation of embodiments of the present invention, it will be apparent, however, to one skilled in the art that embodiments of the present invention may be practiced without these specific details, in other embodiments, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the embodiments of the present invention.
The terms first, second and the like in the description and in the claims of the embodiments of the disclosure and in the above-described figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate in order to describe embodiments of the present disclosure. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion.
The term "plurality" means two or more, unless otherwise indicated.
In the embodiment of the present disclosure, the character "/" indicates that the front and rear objects are an or relationship. For example, A/B represents: a or B.
The term "and/or" is an associative relationship that describes an object, meaning that there may be three relationships. For example, a and/or B, represent: a or B, or, A and B.
Before describing embodiments of the present invention in further detail, the terms and terminology involved in the embodiments of the present invention will be described, and the terms and terminology involved in the embodiments of the present invention will be used in the following explanation.
The split phase inverter circuit works in the principle that alternating current is converted into high-frequency pulse signals, then the high-frequency pulse signals are filtered through an inductor and a capacitor, and the high-frequency pulse signals are converted into pure sine wave alternating current to be output. The split phase inverter divides an input alternating current signal into two paths, and inverts after time delay respectively, so that control and optimization of an output waveform are realized, wherein a switching tube and a diode of each bridge arm of the split phase inverter circuit perform switching operation according to a specific time sequence to realize inversion and output of voltage, and meanwhile, the control and optimization of the output waveform can be realized by adjusting the duty ratio and the switching frequency of the switching tube, so that the split phase inverter circuit has higher inversion efficiency and stability and is suitable for various application scenes requiring high-precision and high-efficiency inversion.
LC (Inductor-Capacitor) filtering is realized, and filtering is carried out on signals of a certain frequency band in a circuit based on mutual synergistic effect of the characteristics of inductance and capacitance. In LC filters, the inductance and capacitance function to store energy and store energy, respectively. The inductor is formed by a coil that when energized produces a magnetic field and stores energy. The capacitor is formed by two conductor plates and a medium, and when a voltage is applied, charges are stored between the two conductor plates. LC filters are typically composed of an inductance and a capacitance, which are connected in series. When the input signal passes through the filter, it first enters the inductor, which has a small impedance for low frequency signals and a large impedance for high frequency signals due to the characteristics of the inductor. Thus, the inductor blocks high frequency signals and allows only low frequency signals to pass. After passing through the inductor, the signal enters the capacitor. The capacitor is characterized by a relatively large impedance for low frequency signals and a relatively small impedance for high frequency signals. Thus, the capacitor blocks low frequency signals and only allows high frequency signals to pass. Through the series connection effect of the inductor and the capacitor, the LC filter can realize the filtering of signals in a certain frequency band. In particular, when the input signal is a low frequency signal, the inductance has a small impedance thereto and the capacitance has a large impedance thereto, so that the low frequency signal passes through the filter. And when the input signal is a high-frequency signal, the inductor has a larger impedance to the input signal and the capacitor has a smaller impedance to the input signal, so that the high-frequency signal passes through the filter. The cut-off frequency of an LC filter refers to the frequency at which the response of the filter to an input signal begins to drop. The cut-off frequency depends on the values of the inductance and the capacitance, which can be changed by adjusting them. When the frequency of the input signal is higher than the cut-off frequency, the response of the filter to the input signal is gradually weakened, so that the filtering effect is realized.
An inverter, which is a logic gate implementing a logical not in digital logic, can invert the phase of an input signal by 180 degrees. Such circuits are used in analog circuits such as audio amplification, clock oscillators, etc.
Referring to fig. 1, an embodiment of the disclosure provides a split-phase inverter circuit, which includes an inverter bridge arm and a filter module, wherein the inverter bridge arm includes a first bridge arm, a second bridge arm, and a third bridge arm, and the filter module includes a first filter inductor, a first filter capacitor, a second filter inductor, and a second filter capacitor.
The first bridge arm comprises a switch unit G1 and a switch unit G2 which are connected in series, wherein the first end of the switch unit G1 is connected with the positive electrode of a preset direct current power supply, the second end of the switch unit G1 is connected with the first end of the switch unit G2, and the second end of the switch unit G2 is connected with the negative electrode of the preset direct current power supply.
The middle point N1 of the first bridge arm is respectively connected with the first end of the first load R1 and the first end of the second load R2 through the ground wire N.
The second bridge arm comprises a switch unit G3 and a switch unit G4 which are connected in series, wherein the first end of the switch unit G3 is connected with the positive electrode of the preset direct current power supply, the second end of the switch unit G3 is connected with the first end of the switch unit G4, and the second end of the switch unit G4 is connected with the negative electrode of the preset direct current power supply.
The intermediate point N2 of the second bridge arm is connected with the second end of the first load R1 through the live wire L1, wherein a first filter inductor La is arranged on the live wire L1, and a first filter capacitor Ca is arranged between the live wire L1 and the ground wire N.
The third bridge arm comprises a switch unit G5 and a switch unit G6 which are connected in series, wherein the first end of the switch unit G5 is connected with the positive electrode of the preset direct current power supply, the second end of the switch unit G5 is connected with the first end of the switch unit G6, and the second end of the switch unit G6 is connected with the negative electrode of the preset direct current power supply.
The middle point N3 of the third bridge arm is connected with the second end of the second load R2 through the live wire L2, wherein a second filter inductor Lb is arranged on the live wire L2, and a second filter capacitor Cb is arranged between the live wire L2 and the ground wire N.
As shown in connection with fig. 2, an embodiment of the present disclosure provides a circuit driving method for a split phase inverter circuit, including:
step S201, determining any output end load as a target load, and determining a target bridge arm and a reference bridge arm from an inverter bridge arm;
wherein the output load comprises a first load and a second load;
the target load is respectively connected with the target bridge arm and the reference bridge arm;
step S202, obtaining a reference voltage and a sampling voltage of a target load;
Step S203, calculating according to the reference voltage and the sampling voltage to obtain an error voltage, and generating a target modulation wave according to the error voltage;
step S204, comparing the target modulation wave with a preset reference carrier wave to obtain a target driving signal, and comparing the target modulation wave with the preset reference carrier wave to obtain a reference driving signal;
in step S205, the target bridge arm is driven by the target driving signal, and the reference bridge arm is driven according to the reference driving signal.
By adopting the circuit driving method for the split-phase inverter circuit, the reference voltage and the sampling voltage of the target load are obtained, the target modulation wave is generated based on the reference voltage and the sampling voltage, so that the target bridge arm connected with the target load is driven according to the target driving signal obtained by comparing the target modulation wave with the preset reference carrier wave, and the reference bridge arm is driven according to the reference driving signal obtained by comparing the preset reference modulation wave with the preset reference carrier wave. In this way, the error voltage is obtained by calculating the reference voltage and the sampling voltage, and the target driving signal is obtained according to the target modulation wave generated by the error voltage, so that the target bridge arm is driven to control the input voltage of the target load, the change rate of the input voltage is slowed down, the conditions that the target load stops working and even is damaged due to the problems of vibration divergence, resonance and the like are restrained, and the reliability of the split-phase inverter circuit is improved.
Optionally, the power input positive pole of the inverter bridge arm is connected with the positive pole of a preset direct current power supply, the power input negative pole of the inverter bridge arm is connected with the negative pole of the preset direct current power supply, the inverter bridge arm comprises a first bridge arm, a second bridge arm and a third bridge arm, and the load at the output end comprises: the split-phase inverter circuit is used for providing first alternating current for the first load according to a preset direct current power supply; and the first end of the second load is connected with the middle point of the first bridge arm, and the second end of the second load is connected with the middle point of the third bridge arm, wherein the split-phase inverter circuit is used for providing second alternating current for the second load according to a preset direct current power supply.
Optionally, determining the target bridge arm and the reference bridge arm from the inverter bridge arm includes at least one of: if the target load comprises a first load, determining the first bridge arm as a reference bridge arm of the first load, and determining the second bridge arm as a target bridge arm of the first load; if the target load comprises the second load, the first bridge arm is determined to be a reference bridge arm of the second load, and the third bridge arm is determined to be a target bridge arm of the second load.
Optionally, the split phase inverter circuit further includes: the first filter inductor is arranged between the middle point of the second bridge arm and the second end of the first load; the first end of the first filter capacitor is connected with the first end of the first load, and the second end of the first filter capacitor is connected with the second end of the first load; the second filter inductor is arranged between the middle point of the third bridge arm and the second end of the second load; the first end of the second filter capacitor is connected with the first end of the second load, and the second end of the second filter capacitor is connected with the second end of the second load.
Optionally, the split phase inverter circuit is further connected with a third load, a first end of the third load is connected with a middle point of the second bridge arm through the first filter inductor, a second end of the third load is connected with a middle point of the third bridge arm through the second filter inductor, and the split phase inverter circuit is used for providing third alternating current for the third load according to a preset direct current power supply.
In some embodiments, the inverter leg is comprised of at least two switching units.
In some embodiments, each inverter leg is composed of two switch units, respectively; the switching unit includes a switching transistor including one or more of an IGBT (insulated gate bipolar transistor), a MOSFET (field effect transistor), and the like, and a diode including a PN junction diode, and the like.
In some embodiments, the working principle of the switch unit is to use the combination of the forward conduction characteristic of the PN junction diode and the negative resistance characteristic of the switch tube to realize the blocking of the reverse current. When the forward voltage is applied to the PN junction, the PN junction diode is turned on, the pole voltage of the switching tube is zero, the switching tube is in a cut-off state, and the reverse current cannot pass through. When reverse voltage is applied to the PN junction, the PN junction diode is turned off, the pole voltage of the MOSFET is negative, the switching tube is in a conducting state, and reverse current can flow back to a power supply through a channel of the switching tube, so that the follow current effect is realized.
Therefore, compared with the method that direct current is converted into alternating current through a capacitor, the method has the advantages that direct current is converted into alternating current through the switch unit, and the voltage equalizing capacity of the split-phase inverter circuit on the direct current side is improved.
In some embodiments, the split phase inverter circuit provides ac power to the first load R1 through the hot line L1 and the ground line N, provides ac power to the second load R2 through the hot line L2 and the ground line N, and provides ac power to the third load R3 through the hot line L1 and the hot line L2.
As shown in conjunction with fig. 3, an embodiment of the present disclosure provides a split-phase inverter circuit whose actual output voltage includes a first sampling voltage U1 for supplying power to a first load R1, a second sampling voltage U2 for supplying power to a second load R2, and a third sampling voltage U3 for supplying power to a third load R3, and whose actual output current includes a first sampling current I1 flowing through the first load R1, and a second sampling current I2 flowing through the second load R2; meanwhile, the configuration information of the first load R1 includes a first reference current I1ref and a first reference voltage U1ref, and the second load R2 includes a second reference current I2ref and a second reference voltage U2ref.
Optionally, generating the target modulation wave according to the error voltage includes: acquiring a sampling current of a target load; inputting the error voltage into a preset voltage control loop, so that the voltage control loop outputs a reference current according to the error voltage; the sampling current and the reference current are input into a preset current control loop, so that the current control loop outputs a target modulation wave according to the sampling current and the reference current.
In some embodiments, the operating principles of the voltage control loop and the current control loop are similar, taking the voltage control loop as an example, the voltage control loop controls voltage output through a negative feedback theory to keep stability of output voltage, and the voltage control loop generally comprises a third part of voltage sampling, error amplification and output control, wherein the voltage sampling comprises converting the output voltage into a voltage signal through a voltage sampling resistor, the error amplification comprises comparing the voltage signal on the sampling resistor with a reference voltage to obtain an error signal, the error signal is amplified and transmitted to the output control part, and the output control comprises adjusting amplitude and phase of the output control signal according to the magnitude of the error signal, so that the magnitude and phase of the output voltage are changed, and stable control of the output voltage is realized.
Referring to fig. 4, if the target load includes a first load, taking the difference between the first sampling voltage and the first reference voltage as an error voltage of the first load, and inputting the error voltage into the voltage control loop to generate a first reference current on the first resistor; taking the difference between the first reference current and the first sampling current as an error current, and inputting the error current into a current control loop to generate a sine modulation wave 1; if the target load further includes a second load, a sinusoidal modulation wave 2 corresponding to the second load is obtained in a similar manner, wherein a phase difference between the sinusoidal modulation wave 1 and the sinusoidal modulation wave 2 can be set to an arbitrary value according to actual requirements, for example, the phase difference between the sinusoidal modulation wave 1 and the sinusoidal modulation wave 2 is 180 °; respectively comparing the sinusoidal modulation wave 1, the sinusoidal modulation wave 2 and a preset reference modulation wave with a fixed value of 0 with a preset reference carrier wave to sequentially obtain a first driving signal, a second driving signal and a third driving signal; and driving the second bridge arm by taking the first driving signal as a target driving signal of the second bridge arm, driving the third bridge arm by taking the second driving signal as a target driving signal of the third bridge arm, and driving the first bridge arm by taking the third driving signal as a reference driving signal corresponding to the first bridge arm.
Optionally, the generating the target modulation wave according to the error voltage includes: the error voltage is input into a preset voltage control loop, so that the voltage control loop outputs a target controller according to the error voltage.
Referring to fig. 5, if the target load includes a first load, a difference between the first sampling voltage and the first reference voltage is used as an error voltage of the first load, and the error voltage is input into the voltage control loop to generate a sinusoidal modulation wave 3; if the target load also comprises a second load, the sine modulation wave 4 corresponding to the second load is obtained in a similar way; respectively comparing the sinusoidal modulation wave 3, the sinusoidal modulation wave 4 and a preset reference modulation wave with a fixed value of 0 with a preset reference carrier wave to sequentially obtain a fourth driving signal, a fifth driving signal and a sixth driving signal; and driving the second bridge arm by using the fourth driving signal as a target driving signal of the second bridge arm, driving the third bridge arm by using the fifth driving signal as a target driving signal of the third bridge arm, and driving the first bridge arm by using the sixth driving signal as a reference driving signal corresponding to the first bridge arm.
Optionally, the inverter leg is driven by: determining a switching unit between a power input positive electrode of the inverter bridge arm and a middle point of the inverter bridge arm as a first switch of the inverter bridge arm, and determining a switching unit between the middle point of the inverter bridge arm and a power input negative electrode of the inverter bridge arm as a second switch of the inverter bridge arm; converting a first control signal corresponding to the inversion bridge arm into a second control signal based on the inverter, wherein the first control signal comprises a target driving signal or a reference driving signal; the first switch is controlled by a first control signal and the second switch is controlled by a second control signal.
In some embodiments, during one switching cycle, as shown in table 1, if the first switches G1, G3, G5 of each inverter leg are turned on, the second switches G2, G4, G6 of each inverter leg are turned off; as shown in table 2, if the first switches G1, G3, G5 of each inverter leg are connected, the second switches G2, G4, G6 of each inverter leg are connected.
TABLE 1
| Switch unit | G1 | G2 | G3 | G4 | G5 | G6 |
| Status of | Opening device | Switch for closing | Opening device | Switch for closing | Opening device | Switch for closing |
TABLE 2
| Switch unit | G1 | G2 | G3 | G4 | G5 | G6 |
| Status of | Switch for closing | Opening device | Switch for closing | Opening device | Switch for closing | Opening device |
In some embodiments, based on tables 1 and 2, the dc side power of the preset dc power supply can be transferred to the output load of the ac side through the switching tube; in case the phase difference of the control signals between the first switch and the second switch is achieved based on an inverter to be 180 deg., the actual voltages on the first load and the second load are equal in magnitude but 180 deg. out of phase, such that the actual voltage on the third load is twice the actual voltage on the first load or the second load.
In some embodiments, 400V is applied to the preset dc power Vdc, the first reference voltage of the first load is set to 240V, and the second reference voltage of the second load is set to 240V; based on the circuit driving method for the split phase inverter circuit provided by the embodiment of the disclosure, a sinusoidal modulation wave 1 corresponding to a first load and a sinusoidal modulation wave 2 corresponding to a second load are obtained; and respectively comparing the sinusoidal modulation wave 1, the sinusoidal modulation wave 2 and a preset reference modulation wave with a fixed value of 0 with a preset reference carrier wave to obtain a first driving signal, a second driving signal and a third driving signal, wherein the preset reference carrier wave is a triangular carrier wave with the size of 20 k.
In some embodiments, as shown in fig. 6, the second bridge arm is driven by the first driving signal, the first bridge arm is driven by the third driving signal, and after the output voltage is LC filtered, an ac voltage waveform with an amplitude of 120V and a phase of 0 ° is formed on the first load; driving a third bridge arm through a second driving signal, driving a first bridge arm through the third driving signal, and forming an alternating-current voltage waveform with the amplitude of 120V and the phase of 180 DEG on a second load after the output voltage is subjected to LC filtering; and on the third load, an alternating voltage waveform with the amplitude of 240V is formed based on the second bridge arm and the third bridge arm.
In some embodiments, as shown in fig. 7, the second bridge arm is driven by the first driving signal, the first bridge arm is driven by the third driving signal, and after the output voltage is LC filtered, an ac voltage waveform with an amplitude of 120V and a phase of 0 ° is formed on the first load; driving a third bridge arm through a second driving signal, driving a first bridge arm through the third driving signal, and forming an alternating-current voltage waveform with the amplitude of 120V and the phase of 0 DEG on a second load after the output voltage is subjected to LC filtering; and on the third load, an alternating voltage waveform with the amplitude of 240V is formed based on the second bridge arm and the third bridge arm.
Therefore, the split-phase inverter circuit provides two voltages with the same voltage class and two voltages with different voltage classes, so that the power consumption voltage requirements of different power loads are met, and the output voltage of the split-phase inverter circuit is flexibly controlled.
Referring to fig. 8, an embodiment of the disclosure provides a circuit driving system for a split-phase inverter circuit, where the split-phase inverter circuit is connected with a plurality of output loads, and the split-phase inverter circuit includes a plurality of inverter legs connected in parallel with each other, and the system includes an acquisition module 801, a generation module 802, a comparison module 803, and a driving module 804.
The obtaining module 801 is configured to obtain a reference voltage and a sampling voltage of a target load, where any output end load is determined as the target load, and a target bridge arm and a reference bridge arm are determined from the inverter bridge arm, where the target load is respectively connected to the target bridge arm and the reference bridge arm.
The generating module 802 is configured to calculate according to the reference voltage and the sampling voltage, obtain an error voltage, and generate a target modulation wave according to the error voltage.
The comparison module 803 is configured to compare the target modulation wave with a preset reference carrier to obtain a target driving signal, and compare the target modulation wave with the preset reference carrier to obtain a reference driving signal.
The driving module 804 is configured to drive the target bridge arm through the target driving signal, and drive the reference bridge arm according to the reference driving signal.
By adopting the circuit driving system for the split-phase inverter circuit, the reference voltage and the sampling voltage of the target load are obtained, the target modulation wave is generated based on the reference voltage and the sampling voltage, so that a target bridge arm connected with the target load is driven according to the target driving signal obtained by comparing the target modulation wave with the preset reference carrier wave, and the reference bridge arm is driven according to the reference driving signal obtained by comparing the preset reference modulation wave with the preset reference carrier wave. In this way, the error voltage is obtained by calculating the reference voltage and the sampling voltage, and the target driving signal is obtained according to the target modulation wave generated by the error voltage, so that the target bridge arm is driven to control the input voltage of the target load, the change rate of the input voltage is slowed down, the conditions that the target load stops working and even is damaged due to the problems of vibration divergence, resonance and the like are restrained, and the reliability of the split-phase inverter circuit is improved.
The disclosed embodiments also provide an apparatus comprising: a processor and a memory; the memory is used for storing a computer program and the processor is used for executing the computer program stored in the memory to enable the device to execute the method.
In some embodiments, the device comprises a photovoltaic device, a light storage device, an energy storage device, an electric vehicle, a split phase power grid, or the like.
As shown in fig. 9, the apparatus further includes a schematic structural diagram of a computer system suitable for use in implementing embodiments of the present application. It should be noted that, the computer system 900 of the apparatus shown in fig. 9 is only an example, and should not impose any limitation on the functions and the scope of use of the embodiments of the present application.
As shown in fig. 9, the computer system 900 includes a central processing unit (Central Processing Unit, CPU) 901 which can perform various appropriate actions and processes, such as performing the methods in the above-described embodiments, according to a program stored in a Read-Only Memory (ROM) 902 or a program loaded from a storage portion 908 into a random access Memory (Random Access Memory, RAM) 903. In the RAM 903, various programs and data required for system operation are also stored. The CPU 901, ROM 902, and RAM 903 are connected to each other through a bus 904. An Input/Output (I/O) interface 905 is also connected to bus 904.
The following components are connected to the I/O interface 905: an input section 906 including a keyboard, a mouse, and the like; an output section 907 including a speaker and the like, such as a Cathode Ray Tube (CRT), a liquid crystal display (Liquid Crystal Display, LCD), and the like; a storage portion 908 including a hard disk or the like; and a communication section 909 including a network interface card such as a LAN (Local Area Network ) card, a modem, or the like. The communication section 909 performs communication processing via a network such as the internet. The drive 190 is also connected to the I/O interface 905 as needed. A removable medium 911 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is installed on the drive 190 as needed, so that a computer program read out therefrom is installed into the storage section 908 as needed.
In particular, according to embodiments of the present application, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present application include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising a computer program for performing the method shown in the flowchart. In such an embodiment, the computer program may be downloaded and installed from the network via the communication portion 909 and/or installed from the removable medium 911. When the computer program is executed by a Central Processing Unit (CPU) 901, various functions defined in the system of the present application are performed.
It should be noted that, the computer readable medium shown in the embodiments of the present application may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium may be, for example, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-Only Memory (ROM), an erasable programmable read-Only Memory (Erasable Programmable Read Only Memory, EPROM), flash Memory, an optical fiber, a portable compact disc read-Only Memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present application, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with a computer-readable computer program embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. A computer program embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the foregoing.
The disclosed embodiments also provide a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements any of the methods of the present embodiments.
The computer readable storage medium in the embodiments of the present disclosure may be understood by those of ordinary skill in the art: all or part of the steps for implementing the method embodiments described above may be performed by computer program related hardware. The aforementioned computer program may be stored in a computer readable storage medium. The program, when executed, performs steps including the method embodiments described above; and the aforementioned storage medium includes: various media that can store program code, such as ROM, RAM, magnetic or optical disks.
The electronic device disclosed in this embodiment includes a processor, a memory, a transceiver, and a communication interface, where the memory and the communication interface are connected to the processor and the transceiver and perform communication therebetween, the memory is used to store a computer program, the communication interface is used to perform communication, and the processor and the transceiver are used to run the computer program, so that the electronic device performs each step of the above method.
In this embodiment, the memory may include a random access memory (Random Access Memory, abbreviated as RAM), and may further include a non-volatile memory (non-volatile memory), such as at least one magnetic disk memory.
The processor may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU for short), a graphics processor (Graphics Processing Unit, GPU for short), a network processor (Network Processor, NP for short), etc.; but also digital signal processors (Digital Signal Processing, DSP for short), application specific integrated circuits (Application Specific Integrated Circuit, ASIC for short), field-programmable gate arrays (Field-Programmable Gate Array, FPGA for short) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
The above description and the drawings illustrate embodiments of the disclosure sufficiently to enable those skilled in the art to practice them. Other embodiments may involve structural, logical, electrical, process, and other changes. The embodiments represent only possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and sub-samples of some embodiments may be included in or substituted for portions and sub-samples of other embodiments. Moreover, the terminology used in the present application is for the purpose of describing embodiments only and is not intended to limit the claims. As used in the description of the embodiments and the claims, the singular forms "a," "an," and "the" (the) are intended to include the plural forms as well, unless the context clearly indicates otherwise. Similarly, the term "and/or" as used in this application is meant to encompass any and all possible combinations of one or more of the associated listed. In addition, when used in this application, the terms "comprises," "comprising," and/or "includes," and variations thereof, mean the presence of the stated sub-sample, integer, step, operation, element, and/or component, but do not exclude the presence or addition of one or more other sub-samples, integers, steps, operations, elements, components, and/or groups of these. Without further limitation, an element defined by the phrase "comprising one …" does not exclude the presence of other like elements in a process, method or apparatus comprising such elements. In this context, each embodiment may be described with emphasis on the differences from the other embodiments, and the same similar parts between the various embodiments may be referred to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method sections disclosed in the embodiments, the description of the method sections may be referred to for relevance.
Those of skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. The skilled person may use different methods for each particular application to achieve the described functionality, but such implementation should not be considered to be beyond the scope of the embodiments of the present disclosure. It will be clearly understood by those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, which are not described herein again.
In the embodiments disclosed herein, the disclosed methods, articles of manufacture (including but not limited to devices, apparatuses, etc.) may be practiced in other ways. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of elements may be merely a logical functional division, and there may be additional divisions in actual implementation, e.g., multiple elements or components may be combined or integrated into another system, or some sub-samples may be omitted, or not performed. In addition, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form. The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to implement the present embodiment. In addition, each functional unit in the embodiments of the present disclosure may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. In the description corresponding to the flowcharts and block diagrams in the figures, operations or steps corresponding to different blocks may also occur in different orders than that disclosed in the description, and sometimes no specific order exists between different operations or steps. For example, two consecutive operations or steps may actually be performed substantially in parallel, they may sometimes be performed in reverse order, which may be dependent on the functions involved. Each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
Claims (11)
1. A circuit driving method for a split phase inverter circuit, wherein the split phase inverter circuit is connected with a plurality of output end loads, the split phase inverter circuit includes a plurality of inverter legs connected in parallel with each other, the method comprising:
determining any output end load as a target load, and determining a target bridge arm and a reference bridge arm from the inverter bridge arm, wherein the target load is respectively connected with the target bridge arm and the reference bridge arm;
acquiring a reference voltage and a sampling voltage of the target load;
calculating according to the reference voltage and the sampling voltage to obtain an error voltage, and generating a target modulation wave according to the error voltage;
comparing the target modulation wave with a preset reference carrier wave to obtain a target driving signal, and comparing the target driving signal with the preset reference carrier wave to obtain a reference driving signal;
and driving the target bridge arm through the target driving signal, and driving the reference bridge arm according to the reference driving signal.
2. The method of claim 1, wherein a power input positive electrode of the inverter leg is connected to a positive electrode of a preset dc power supply, a power input negative electrode of the inverter leg is connected to a negative electrode of the preset dc power supply, the inverter leg includes a first leg, a second leg, and a third leg, and the output load includes:
The first end of the first load is connected with the middle point of the first bridge arm, and the second end of the first load is connected with the middle point of the second bridge arm, wherein the split-phase inverter circuit is used for providing first alternating current for the first load according to the preset direct current power supply;
the first end of the second load is connected with the middle point of the first bridge arm, and the second end of the second load is connected with the middle point of the third bridge arm, wherein the split-phase inverter circuit is used for providing second alternating current for the second load according to the preset direct current power supply.
3. The method of claim 2, wherein the split phase inverter circuit further comprises:
the first filter inductor is arranged between the middle point of the second bridge arm and the second end of the first load;
the first end of the first filter capacitor is connected with the first end of the first load, and the second end of the first filter capacitor is connected with the second end of the first load;
the first filter inductor is arranged between the middle point of the third bridge arm and the second end of the second load;
The first end of the second filter capacitor is connected with the first end of the second load, and the second end of the second filter capacitor is connected with the second end of the second load.
4. The method of claim 3, wherein the split phase inverter circuit is further connected to a third load, a first end of the third load is connected to an intermediate point of the second bridge arm through the first filter inductor, and a second end of the third load is connected to an intermediate point of the third bridge arm through the second filter inductor, and wherein the split phase inverter circuit is configured to provide a third alternating current to the third load according to the preset dc power supply.
5. The method according to claim 2, characterized in that the inverter leg consists of at least two switching units, which are driven by:
determining a switching unit positioned between a power input positive electrode of the inverter bridge arm and a middle point of the inverter bridge arm as a first switch of the inverter bridge arm, and determining a switching unit positioned between the middle point of the inverter bridge arm and a power input negative electrode of the inverter bridge arm as a second switch of the inverter bridge arm;
Converting a first control signal corresponding to the inversion bridge arm into a second control signal based on an inverter, wherein the first control signal comprises the target driving signal or the reference driving signal;
the first switch is controlled by the first control signal, and the second switch is controlled by the second control signal.
6. The method of claim 2, wherein determining a target leg and a reference leg from the inverter legs comprises at least one of:
if the target load comprises the first load, determining the first bridge arm as a reference bridge arm of the first load, and determining the second bridge arm as a target bridge arm of the first load;
and if the target load comprises the second load, determining the first bridge arm as a reference bridge arm of the second load, and determining the third bridge arm as a target bridge arm of the second load.
7. The method according to any one of claims 1 to 6, wherein generating a target modulation wave from the error voltage comprises:
acquiring the sampling current of the target load;
inputting the error voltage into a preset voltage control loop, so that the voltage control loop outputs a reference current according to the error voltage;
And inputting the sampling current and the reference current into a preset current control loop, so that the current control loop outputs a target modulation wave according to the sampling current and the reference current.
8. The method according to any one of claims 1 to 6, wherein generating a target modulation wave from the error voltage comprises:
and inputting the error voltage into a preset voltage control loop, so that the voltage control loop outputs a target controller according to the error voltage.
9. A circuit driving system for a split phase inverter circuit, wherein the split phase inverter circuit is connected with a plurality of output end loads, the split phase inverter circuit comprising a plurality of inverter legs connected in parallel with each other, the system comprising:
the acquisition module is used for acquiring reference voltage and sampling voltage of a target load, wherein any output end load is determined to be the target load, and a target bridge arm and a reference bridge arm are determined from the inverter bridge arm, and the target load is respectively connected with the target bridge arm and the reference bridge arm;
the generating module is used for calculating according to the reference voltage and the sampling voltage to obtain an error voltage and generating a target modulation wave according to the error voltage;
The comparison module is used for comparing the target modulation wave with a preset reference carrier wave to obtain a target driving signal, and comparing the target driving signal with the preset reference carrier wave to obtain a reference driving signal;
and the driving module is used for driving the target bridge arm through the target driving signal and driving the reference bridge arm according to the reference driving signal.
10. An apparatus, comprising: a processor and a memory;
the memory is for storing a computer program, and the processor is for executing the computer program stored by the memory to cause the apparatus to perform the method of any one of claims 1 to 8.
11. A computer-readable storage medium having stored thereon a computer program, characterized by:
the computer program, when executed by a processor, implements the method of any of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311766810.3A CN117439435A (en) | 2023-12-21 | 2023-12-21 | Circuit driving method, system, equipment and medium for split-phase inverter circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311766810.3A CN117439435A (en) | 2023-12-21 | 2023-12-21 | Circuit driving method, system, equipment and medium for split-phase inverter circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117439435A true CN117439435A (en) | 2024-01-23 |
Family
ID=89558715
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311766810.3A Pending CN117439435A (en) | 2023-12-21 | 2023-12-21 | Circuit driving method, system, equipment and medium for split-phase inverter circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117439435A (en) |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101478239A (en) * | 2009-01-23 | 2009-07-08 | 西南交通大学 | Three phase inverter control method and apparatus thereof |
| CN102255550A (en) * | 2011-07-04 | 2011-11-23 | 华北电力大学 | Power supply splitting phase device based on three-phase bridge inverter circuit and control method thereof |
| US20110310640A1 (en) * | 2010-06-18 | 2011-12-22 | Shunzhu Tao | kind of LLC resonant converter for full voltage range and its control method |
| CN104836471A (en) * | 2014-02-12 | 2015-08-12 | 江苏物联网研究发展中心 | Inverter circuit and uninterruptible power supply circuit |
| US20210152101A1 (en) * | 2017-05-18 | 2021-05-20 | Toshiba Mitsubishi-Electric Industrial Systems Corporation | Power conversion device superimposing a tertiary harmonic wave |
| CN115995994A (en) * | 2022-11-04 | 2023-04-21 | 惠州市乐亿通科技有限公司 | Split-phase three-bridge arm inverter circuit and modulation method |
| CN116742948A (en) * | 2023-08-11 | 2023-09-12 | 深圳平创半导体有限公司 | Modulation method, system, equipment and medium of three-phase PFC circuit |
| CN117155103A (en) * | 2023-08-28 | 2023-12-01 | 浙江艾罗网络能源技术股份有限公司 | Inverter power control method and related equipment thereof |
-
2023
- 2023-12-21 CN CN202311766810.3A patent/CN117439435A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101478239A (en) * | 2009-01-23 | 2009-07-08 | 西南交通大学 | Three phase inverter control method and apparatus thereof |
| US20110310640A1 (en) * | 2010-06-18 | 2011-12-22 | Shunzhu Tao | kind of LLC resonant converter for full voltage range and its control method |
| CN102255550A (en) * | 2011-07-04 | 2011-11-23 | 华北电力大学 | Power supply splitting phase device based on three-phase bridge inverter circuit and control method thereof |
| CN104836471A (en) * | 2014-02-12 | 2015-08-12 | 江苏物联网研究发展中心 | Inverter circuit and uninterruptible power supply circuit |
| US20210152101A1 (en) * | 2017-05-18 | 2021-05-20 | Toshiba Mitsubishi-Electric Industrial Systems Corporation | Power conversion device superimposing a tertiary harmonic wave |
| CN115995994A (en) * | 2022-11-04 | 2023-04-21 | 惠州市乐亿通科技有限公司 | Split-phase three-bridge arm inverter circuit and modulation method |
| CN116742948A (en) * | 2023-08-11 | 2023-09-12 | 深圳平创半导体有限公司 | Modulation method, system, equipment and medium of three-phase PFC circuit |
| CN117155103A (en) * | 2023-08-28 | 2023-12-01 | 浙江艾罗网络能源技术股份有限公司 | Inverter power control method and related equipment thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Nguyen et al. | Class of high boost inverters based on switched‐inductor structure | |
| Tsang et al. | Single DC source three‐phase multilevel inverter using reduced number of switches | |
| Biricik et al. | Three‐level hysteresis current control strategy for three‐phase four‐switch shunt active filters | |
| Sekar et al. | Single phase nine level inverter using single DC source supported by capacitor voltage balancing algorithm | |
| Ismail et al. | Study on the design and switching dynamics of hysteresis current controlled four‐leg voltage source inverter for load compensation | |
| Luo et al. | Simple carrier‐based pulse‐width modulation scheme for three‐phase four‐wire neutral‐point‐clamped inverters with neutral‐point balancing | |
| Nguyen et al. | Family of high‐boost Z‐source inverters with combined switched‐inductor and transformer cells | |
| Ebrahimzadeh et al. | Modulation technique for four‐leg voltage source inverter without a look‐up table | |
| Ben Mahmoud et al. | Direct power control with common mode voltage reduction of grid‐connected three‐level NPC inverter | |
| Shen et al. | ZVS Control strategy of dual active bridge DC/DC converter with triple‐phase‐shift modulation considering RMS current optimization | |
| Mustafa et al. | Asymmetrical eleven‐level inverter topology with reduced power semiconductor switches, total standing voltage and cost factor | |
| Kumar et al. | Model predictive control with constant switching frequency for four‐leg DSTATCOM using three‐dimensional space vector modulation | |
| Odeh | Improved three‐phase, five‐level pulse‐width modulation switched voltage source inverter | |
| Ebadi et al. | Multilevel cascaded transformerless inverter for connecting distributed‐generation sources to network | |
| Salgado‐Herrera et al. | DSPWM multilevel technique of 27‐levels based on FPGA for the cascaded DC/AC power converter operation | |
| Zare et al. | Circuit configuration of a reduced count modular multi-level inverter | |
| Al-Khayyat et al. | Single-phase grid-connected power control in dq synchronous reference frame with space vector modulation using FPGA | |
| Li et al. | FPGA controlled high frequency resonant converter for contactless power transfer | |
| CN117439435A (en) | Circuit driving method, system, equipment and medium for split-phase inverter circuit | |
| Yang et al. | Analysis and design of L+ LCL‐filtered dual‐frequency single‐phase grid‐connected inverter | |
| Pan et al. | One-cycle control for three-phase single-capacitor Z-source inverter with unity power factor | |
| Palanisamy et al. | Three-phase 3-level Z-source NPC inverter using modified 3D-space vector modulation | |
| Azam | Three to single‐phase high‐power quality switch‐mode cycloconverter | |
| CN108365631B (en) | Reactive voltage control circuit simulation method and system of distributed grid-connected converter | |
| Phanikumar et al. | New self‐balancing 7‐level inverter with coupled inductors for 1‐φ grid‐connected renewable energy systems with voltage boosting capability |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |