CN117419805A - Weak infrared signal processing and collecting device - Google Patents
Weak infrared signal processing and collecting device Download PDFInfo
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Abstract
The invention discloses a weak infrared signal processing and collecting device, wherein an infrared detector pre-amplifying circuit comprises a biasing circuit, a signal amplifying circuit and a filtering and conditioning circuit; the acquisition circuit comprises an aplanatic difference detection circuit, an FPGA main control circuit and an ADC acquisition circuit, and the bias circuit is positioned at the front end of the infrared detector; the signal amplifying circuit is positioned at the rear end of the infrared detector; the filtering conditioning circuit is used for filtering the amplified infrared interference signals; the aplanatic difference detection circuit is used for converting an input laser interference signal into a square wave signal; the FPGA main control circuit provides the upper edge and the lower edge of the square wave signal as acquisition trigger signals for the ADC acquisition circuit; the ADC acquisition circuit is used for converting the acquired infrared interference signals into digital signals and sending the digital signals to the FPGA main control circuit. The device enables the infrared detector to have higher responsivity, is suitable for infrared detectors of more types, saves the resources of a lower computer processing chip, and improves the data processing efficiency.
Description
Technical Field
The invention relates to the technical field of infrared spectrometers, in particular to a weak infrared signal processing and collecting device.
Background
The telemetering type Fourier transform infrared spectrometer usually detects and identifies the target object in real time under the condition of an open light path, infrared signals are extremely weak, and the modulation frequency of the signals is higher, so that the detector usually selects a photoconductive type tellurium-cadmium-mercury detector with high response speed and high detection rate, under the irradiation of light rays, a semiconductor material absorbs photon energy which is larger than the forbidden bandwidth, electron hole pairs are excited, the conductivity is increased, the resistance is reduced, and a photoconductive effect is formed. The photoconductive detector utilizes photoconductive effect to generate linear change photocurrent as output signal under the action of external bias power supply. In a fourier transform infrared spectrometer, an infrared detector receives a weak infrared interference signal and generates a microampere-level current change signal, so that a signal processing method with high bandwidth, low noise and strong stability is required. Because the original signal collected by the infrared detector in the Fourier transform infrared spectrometer is an infrared interference signal, the infrared spectrogram can be obtained by fast Fourier transform by acquiring data at the aplanatic difference, and therefore, a set of stable and accurate aplanatic difference sampling circuits are also indispensable for ADC collection.
The bias circuit in the prior commercial infrared detector pre-amplification module mostly adopts a constant voltage bias circuit with simple design, and the signal primary amplification circuit generally adopts an I-V transimpedance amplification circuit and then obtains a test signal through post-stage amplification. The acquisition circuit adopts an oversampling mode to acquire laser and infrared interference signals to an upper computer at the same time, then a zero-crossing position of the laser signals is found through an upper computer program, an aplanatic difference sampling point is acquired on the infrared interference signals through the zero-crossing point, and then Fourier transformation is carried out to obtain infrared spectrum data.
However, the above prior art scheme has the following problems: because the internal resistance of the photoconductive type infrared detector is smaller, the constant voltage type bias power supply has simple design, but the internal resistance of the detector can change along with the incident light intensity when the detector works, the stability of the constant voltage bias power supply is affected, the responsivity of the detector is reduced, and the signal to noise ratio of the detector is also reduced. The commonly adopted I-V amplifying circuit can cause larger error, mainly because the output voltage of the operational amplifier is influenced by factors such as bias current, offset voltage, offset current and the like. In addition, the AD oversampling mode needs an ADC chip with higher dual-channel synchronous sampling rate, the high sampling rate inevitably sacrifices sampling bits, reduces the dynamic range of signals and the signal to noise ratio, occupies more resources of a main control, and is unfavorable for real-time analysis and transmission of detection results.
Disclosure of Invention
The invention aims to provide a weak infrared signal processing and collecting device, which enables an infrared detector to have higher responsivity, is suitable for more types of infrared detectors, and has the advantages of low noise, high bandwidth, high gain and strong stability; and the processing chip resources of the lower computer can be effectively saved, the processing time is reduced, and the data processing efficiency is improved.
The invention aims at realizing the following technical scheme:
the device comprises an infrared detector pre-amplification circuit and an acquisition circuit, wherein the infrared detector pre-amplification circuit comprises a biasing circuit, a signal amplification circuit and a filtering conditioning circuit; the acquisition circuit comprises an aplanatic difference detection circuit, an FPGA main control circuit and an ADC acquisition circuit, wherein:
the bias circuit is positioned at the front end of the infrared detector and is used for providing forward constant current source bias for the infrared detector so as to improve the response rate of the infrared detector;
the signal amplifying circuit is positioned at the rear end of the infrared detector and is used for carrying out two-stage amplification on the weak current signal so as to reduce the influence of offset voltage and thermal noise on the signal to be detected;
one end of the filtering conditioning circuit is connected with the output end of the signal amplifying circuit, and the other end of the filtering conditioning circuit is connected with the ADC acquisition circuit and is used for filtering the infrared interference signal amplified by the signal amplifying circuit and adjusting the infrared interference signal to be matched with the voltage range input by the ADC acquisition circuit;
the aplanatic difference detection circuit is used for converting an input laser interference signal into a square wave signal and transmitting the converted square wave signal to the FPGA main control circuit;
the FPGA main control circuit receives the square wave signal transmitted by the aplanatic difference detection circuit, provides the upper edge and the lower edge of the square wave signal as acquisition trigger signals for the ADC acquisition circuit, provides a driving time sequence for the normal operation of the ADC acquisition circuit, and transmits data returned by the ADC acquisition circuit to an upper computer;
the ADC acquisition circuit is used for converting the acquired infrared interference signals at the aplanatic difference position into digital signals, transmitting the converted signals to the FPGA main control circuit, and transmitting the converted signals to the upper computer by the FPGA main control circuit.
According to the technical scheme provided by the invention, the infrared detector has higher responsivity, is suitable for more types of infrared detectors, and the designed pre-amplification circuit has the advantages of low noise, high bandwidth, high gain and strong stability; and the processing chip resources of the lower computer can be effectively saved, the processing time is reduced, and the data processing efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a weak infrared signal processing and collecting device according to an embodiment of the present invention;
FIG. 2 is a schematic circuit diagram of a bias circuit and a signal amplifying circuit according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a filter conditioning circuit according to an embodiment of the present invention;
fig. 4 is a schematic circuit diagram of an aplanatic detection circuit according to an embodiment of the invention.
Detailed Description
The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments of the present invention, and this is not limiting to the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention.
Fig. 1 is a schematic structural diagram of a weak infrared signal processing and collecting device provided by the embodiment of the invention, wherein the device comprises an infrared detector pre-amplifying circuit 1 and a collecting circuit 2, and the infrared detector pre-amplifying circuit 1 comprises a biasing circuit, a signal amplifying circuit and a filtering conditioning circuit; the acquisition circuit 2 comprises an aplanatic difference detection circuit, an FPGA main control circuit and an ADC acquisition circuit, wherein:
the bias circuit is positioned at the front end of the infrared detector and is used for providing forward constant current source bias for the infrared detector so as to improve the response rate of the infrared detector and enable the circuit to have wider adaptability;
the signal amplifying circuit is positioned at the rear end of the infrared detector and is used for carrying out two-stage amplification on the weak current signal so as to reduce the influence of offset voltage and thermal noise on the signal to be detected;
one end of the filtering conditioning circuit is connected with the output end of the signal amplifying circuit, and the other end of the filtering conditioning circuit is connected with the ADC acquisition circuit and is used for filtering the infrared interference signal amplified by the signal amplifying circuit and adjusting the infrared interference signal to be matched with the voltage range input by the ADC acquisition circuit;
the aplanatic difference detection circuit is used for converting an input laser interference signal into a square wave signal and transmitting the converted square wave signal to the FPGA main control circuit; therefore, the processing chip resources of the lower computer are saved, and the data acquisition and processing efficiency is improved;
the FPGA main control circuit receives the square wave signal transmitted by the aplanatic difference detection circuit, provides the upper edge and the lower edge of the square wave signal as acquisition trigger signals for the ADC acquisition circuit, provides a driving time sequence for the normal operation of the ADC acquisition circuit, and transmits data returned by the ADC acquisition circuit to an upper computer;
the ADC acquisition circuit is used for converting the acquired infrared interference signals at the aplanatic difference position into digital signals, transmitting the converted signals to the FPGA main control circuit, and transmitting the converted signals to the upper computer by the FPGA main control circuit.
Fig. 2 is a schematic circuit diagram of a bias circuit and a signal amplifying circuit according to an embodiment of the present invention, where the bias circuit is a transistor Q1; resistors R1, R2, rb and Re; and a capacitor C1, wherein:
the third transistor Q1 is an NPN third transistor, the negative electrode B end of the infrared detector is connected with the collector electrode of the third transistor Q1, the positive electrode A end is connected with the bias power supply, and the B end of the infrared detector outputs a detection signal;
the resistor Re is connected between the emitter of the transistor Q1 and the ground and is used as a matching resistor of a bias power supply;
the resistor Rb is connected between the base electrode of the transistor Q1 and the bias power supply; the resistor R1, the resistor R2 and the capacitor C1 are connected in parallel between the base electrode of the transistor Q1 and the ground; the resistance value of the resistor R1 is regulated to enable the transistor Q1 to be in an amplifying state, and the current of the bias power supply can be regulated in the amplifying state, so that the infrared detector works in an optimal state;
in particular, when the transistor Q1 is operating in an amplified state, there is I c ＝βI b ，I c ＝I b +I e Because the gain of the transistor Q1 is very high, the gain coefficient beta is generally larger than 100, so the current I passing through the infrared detector c ≈I e ＝Ve/Re＝(V b -V be )/R e Is of constant electricityThe flow is not affected by the change of the internal resistance Rd of the infrared detector.
As shown in fig. 2, the signal amplifying circuit is composed of two stages of operational amplifiers, the first stage of operational amplifier U1 adopts an operational amplifier with high bandwidth, low noise and low offset voltage, and the feedback circuit adopts a form of T-type resistance feedback plus differential compensation when operating in a closed-loop dc mode with low bias current, wherein:
the signal to be detected is input from the inverting input end of the first-stage operational amplifier U1;
the fixed resistance resistors R6 and R7 and the adjustable resistor R8 form a T-shaped resistor feedback, and are connected with the output end and the inverting input end of the first-stage operational amplifier U1 after being connected with the capacitor C3 in parallel;
the forward input end of the first-stage operational amplifier U1 is connected with a voltage dividing circuit formed by resistors R4 and R5, bias current is provided for the first-stage operational amplifier U1, the input end is balanced, and the static current is 0, so that the output voltage of the first-stage operational amplifier U1 is not influenced no matter how the bias power supply of the infrared detector is adjusted; in a specific implementation, the first-stage operational amplifier U1 can amplify low-noise I-V signals aiming at weak current signals;
the second-stage operational amplifier U2 adopts an operational amplifier with high common-mode rejection ratio, is in AC coupling with the first-stage operational amplifier U1 through a capacitor C4, adopts an inverse voltage amplification mode to reduce common-mode interference, changes the amplification rate by adjusting the resistance value of a resistor R10, and ensures that the amplified output signal is suitable for the working range of the ADC acquisition circuit;
in addition, as shown in fig. 2, after the second-stage operational amplifier U2 amplifies, a third-stage operational amplifier U3 may be further connected, where the third-stage operational amplifier U3 is used as a emitter follower circuit to improve the stability of the pre-amplifier circuit.
Fig. 3 is a schematic circuit diagram of a filter conditioning circuit according to an embodiment of the present invention, where the filter conditioning circuit includes a band-pass filter circuit and a bias adjustment circuit, and the bias adjustment circuit includes:
the operational amplifier U4A, the resistors R13 and R14, and the capacitors C5 and C6 form a second-order Butterworth high-pass filter circuit for filtering direct current components and low-frequency noise in signals;
the operational amplifier U4B, the resistors R15 and R16 and the capacitors C7 and C8 form a second-order Butterworth low-pass filter circuit which is used for filtering high-frequency noise in signals;
an operational amplifier U5 is connected behind the band-pass filter circuit, and the operational amplifier U5 is used as a jet level following circuit for improving the stability of the filter circuit;
the filtered signal then enters a subtracter circuit consisting of an operational amplifier U6 and resistors R17-R20, and the subtracter circuit outputs a stable voltage signal Ref_Source; the output signal of the operational amplifier U5 is subtracted from Ref_Source to obtain direct current bias, and the direct current bias is used for adjusting the infrared interference signal to be suitable for the input range of the ADC acquisition circuit.
Fig. 4 is a schematic circuit diagram of an aplanatic difference detection circuit according to an embodiment of the present invention, where the aplanatic difference detection circuit is composed of a high-speed comparator U7, a diode D1, and resistors R22-R28, and forms a single power zero-crossing comparison circuit, and is configured to convert a laser interference signal without a direct current component into a square wave signal;
the laser interference signal has a low level at the part greater than zero and a high level at the part less than zero, and the zero crossing point is the upper and lower edges of the square wave signal, namely the aplanatic difference point.
In addition, the above embodiment of the present invention is exemplified by a fourier infrared spectrometer using a photoconductive MCT detector, but is not limited to this embodiment, and may be applied to any fourier infrared spectrometer using a photoconductive infrared detector as a detector.
It is noted that what is not described in detail in the embodiments of the present invention belongs to the prior art known to those skilled in the art. For example, other manners of constant current source circuits can be adopted to provide bias power for the infrared detector, and other forms of amplifying circuits can be adopted to amplify weak current signals; meanwhile, the zero-crossing comparison circuit in the aplanatic difference detection circuit can be replaced by other forms, so that square waves are obtained as trigger acquisition signals.
In summary, the device according to the embodiment of the invention has the following advantages:
1. the constant current source bias circuit has the advantages that the detector has higher responsivity, the three-stage tube is in an amplifying state through the adjustable resistor, the bias current is adjustable, and the constant current source bias circuit is suitable for infrared detectors with more types;
2. the operational amplifier of the primary amplifying circuit works in a closed-loop direct current mode with low bias current, the offset voltage is low, and the bias current of the detector is regulated so as not to influence the output voltage of the operational amplifier; the primary amplifying circuit adopts a closed loop feedback T-shaped transimpedance amplifying circuit, can amplify low-noise I-V signals aiming at weak current signals, brings lower noise to the secondary amplifying circuit, and ensures that the pre-amplifying circuit has the advantages of low noise, high bandwidth, high gain, strong stability and the like;
3. the aplanatic difference sampling circuit adopts a high-speed zero-crossing comparison circuit, provides an accurate trigger signal for the AD converter, reduces the sampling rate, improves the sampling bit number, saves the processing chip resource of a lower computer, reduces the processing time and improves the data processing efficiency.
The foregoing is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present invention should be included in the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims. The information disclosed in the background section herein is only for enhancement of understanding of the general background of the invention and is not to be taken as an admission or any form of suggestion that this information forms the prior art already known to those of ordinary skill in the art.
Claims (5)
1. The weak infrared signal processing and collecting device is characterized by comprising an infrared detector pre-amplifying circuit and a collecting circuit, wherein the infrared detector pre-amplifying circuit comprises a biasing circuit, a signal amplifying circuit and a filtering conditioning circuit; the acquisition circuit comprises an aplanatic difference detection circuit, an FPGA main control circuit and an ADC acquisition circuit, wherein:
the bias circuit is positioned at the front end of the infrared detector and is used for providing forward constant current source bias for the infrared detector so as to improve the response rate of the infrared detector;
the signal amplifying circuit is positioned at the rear end of the infrared detector and is used for carrying out two-stage amplification on the weak current signal so as to reduce the influence of offset voltage and thermal noise on the signal to be detected;
one end of the filtering conditioning circuit is connected with the output end of the signal amplifying circuit, and the other end of the filtering conditioning circuit is connected with the ADC acquisition circuit and is used for filtering the infrared interference signal amplified by the signal amplifying circuit and adjusting the infrared interference signal to be matched with the voltage range input by the ADC acquisition circuit;
the aplanatic difference detection circuit is used for converting an input laser interference signal into a square wave signal and transmitting the converted square wave signal to the FPGA main control circuit;
the FPGA main control circuit receives the square wave signal transmitted by the aplanatic difference detection circuit, provides the upper edge and the lower edge of the square wave signal as acquisition trigger signals for the ADC acquisition circuit, provides a driving time sequence for the normal operation of the ADC acquisition circuit, and transmits data returned by the ADC acquisition circuit to an upper computer;
the ADC acquisition circuit is used for converting the acquired infrared interference signals at the aplanatic difference position into digital signals, transmitting the converted signals to the FPGA main control circuit, and transmitting the converted signals to the upper computer by the FPGA main control circuit.
2. The weak infrared signal processing and collecting device according to claim 1, wherein the bias circuit is composed of a third transistor Q1; resistors R1, R2, rb and Re; and a capacitor C1, wherein:
the third transistor Q1 is an NPN third transistor, the negative electrode B end of the infrared detector is connected with the collector electrode of the third transistor Q1, the positive electrode A end is connected with the bias power supply, and the B end of the infrared detector outputs a detection signal;
the resistor Re is connected between the emitter of the transistor Q1 and the ground and is used as a matching resistor of a bias power supply;
the resistor Rb is connected between the base electrode of the transistor Q1 and the bias power supply; the resistor R1, the resistor R2 and the capacitor C1 are connected in parallel between the base electrode of the transistor Q1 and the ground;
the resistance value of the resistor R1 is regulated to enable the transistor Q1 to be in an amplifying state, and the current of the bias power supply can be regulated in the amplifying state, so that the infrared detector works in an optimal state.
3. The weak infrared signal processing and collecting device according to claim 1, wherein the signal amplifying circuit is composed of two stages of operational amplifiers, the first stage of operational amplifier U1 adopts an operational amplifier with high bandwidth, low noise and low offset voltage, and works in a closed-loop direct current mode with low bias current, and the feedback circuit adopts a form of T-type resistor feedback plus differential compensation, wherein:
the signal to be detected is input from the inverting input end of the first-stage operational amplifier U1;
the fixed resistance resistors R6 and R7 and the adjustable resistor R8 form a T-shaped resistor feedback, and are connected with the output end and the inverting input end of the first-stage operational amplifier U1 after being connected with the capacitor C3 in parallel;
the forward input end of the first-stage operational amplifier U1 is connected with a voltage dividing circuit formed by resistors R4 and R5, bias current is provided for the first-stage operational amplifier U1, the input end is balanced, and the static current is 0, so that the output voltage of the first-stage operational amplifier U1 is not influenced no matter how the bias power supply of the infrared detector is adjusted;
the second-stage operational amplifier U2 adopts an operational amplifier with high common-mode rejection ratio, is in AC coupling with the first-stage operational amplifier U1 through a capacitor C4, adopts an inverse voltage amplification mode to reduce common-mode interference, and changes the amplification rate by adjusting the resistance value of a resistor R10 so that the amplified output signal is suitable for the working range of the ADC acquisition circuit;
and the second-stage operational amplifier U2 is connected with a third-stage operational amplifier U3 after amplification, and the third-stage operational amplifier U3 is used as a jet follower circuit for improving the stability of the pre-amplifier circuit.
4. The weak infrared signal processing and acquisition device of claim 1, wherein the filter conditioning circuit comprises a bandpass filter circuit and a bias adjustment circuit, wherein:
the operational amplifier U4A, the resistors R13 and R14, and the capacitors C5 and C6 form a second-order Butterworth high-pass filter circuit for filtering direct current components and low-frequency noise in signals;
the operational amplifier U4B, the resistors R15 and R16 and the capacitors C7 and C8 form a second-order Butterworth low-pass filter circuit which is used for filtering high-frequency noise in signals;
an operational amplifier U5 is connected behind the band-pass filter circuit, and the operational amplifier U5 is used as a jet level following circuit for improving the stability of the filter circuit;
the filtered signal then enters a subtracter circuit consisting of an operational amplifier U6 and resistors R17-R20, and the subtracter circuit outputs a stable voltage signal Ref_Source; the output signal of the operational amplifier U5 is subtracted from Ref_Source to obtain direct current bias, and the direct current bias is used for adjusting the infrared interference signal to be suitable for the input range of the ADC acquisition circuit.
5. The weak infrared signal processing and collecting device according to claim 1, wherein the aplanatic difference detection circuit consists of a high-speed comparator U7, a diode D1 and resistors R22-R28, and forms a single power zero-crossing comparison circuit for converting a laser interference signal without a direct current component into a square wave signal;
the laser interference signal has a low level at the part greater than zero and a high level at the part less than zero, and the zero crossing point is the upper and lower edges of the square wave signal, namely the aplanatic difference point.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117664338A (en) * | 2024-01-31 | 2024-03-08 | 杭州泽天春来科技股份有限公司 | Data processing method, system and readable medium of Fourier transform infrared spectrometer |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117664338A (en) * | 2024-01-31 | 2024-03-08 | 杭州泽天春来科技股份有限公司 | Data processing method, system and readable medium of Fourier transform infrared spectrometer |
| CN117664338B (en) * | 2024-01-31 | 2024-04-26 | 杭州泽天春来科技股份有限公司 | Data processing method, system and readable medium of Fourier transform infrared spectrometer |
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