CN117411459A - Active impedance matching network based on Buck circuit and control method - Google Patents
Active impedance matching network based on Buck circuit and control method Download PDFInfo
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- CN117411459A CN117411459A CN202311730278.XA CN202311730278A CN117411459A CN 117411459 A CN117411459 A CN 117411459A CN 202311730278 A CN202311730278 A CN 202311730278A CN 117411459 A CN117411459 A CN 117411459A
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/28—Impedance matching networks
Abstract
The application discloses an active impedance matching network based on a Buck circuit and a control method thereof, wherein the active impedance matching network comprises a direct-current power supply V, a switching tube Q, a capacitor C, an inductance L and a first diode D 1 Second diode D 2 A control circuit; the output end of the control circuit is connected with the grid electrode of the switching tube Q, and the control circuit is used for controlling the equivalent input impedance of the active impedance matching network to be equal to the characteristic impedance. The invention adjusts the duty ratio of the switching tube through the control strategy provided, thereby adjusting the output voltage of the capacitor and the current flowing into the dynamic load, leading the equivalent input impedance to be equal to the characteristic impedance, and being capable of carrying out impedance matching in real time when the cavity load changes.
Description
Technical Field
The invention mainly relates to the technical field of radio frequency power supply impedance matching, in particular to an active impedance matching network based on a Buck circuit and a control method.
Background
The radio frequency power supply is a matched power supply of the plasma chamber and is widely applied to the fields of PECVD chemical vapor deposition, reactive ion etching and the like. Because the impedance of the nonlinear load of the plasma system can change in real time, the impedance cannot be matched with the constant output impedance of the radio frequency power supply, so that reflected power is generated, and serious capacity loss is generated.
The common solution is to add an adjustable impedance matching network between the rf power supply and the plasma system so that the equivalent impedance of the matching network is equal to the impedance of the rf power supply, thereby achieving the impedance and maximum output power.
In designing an impedance matching network, the prior art methods include: (1) varying the capacitance in the matching network. For example, a servo stepping motor is used for changing the distance between the capacitor plates, but the method has low precision and low speed; (2) changing the inductance in the matching network. For example, the magnitude of the inductance is changed by changing the number of series connections of the inductance through a control strategy, but this method does not smooth the adjustment process. However, the existing impedance matching networks have the following obvious disadvantages: (1) The adjusting speed is too slow to respond to the rapidly changing load; (2) insufficient adjustment accuracy; (3) the conditioning process is not smooth enough.
Therefore, how to design an impedance matching network and a method with high adjusting speed, high adjusting precision and smooth adjusting process is a technical problem to be solved.
Disclosure of Invention
Based on this, it is necessary to provide an active impedance matching network based on a Buck circuit and a control method for solving the problems of the prior art.
In a first aspect, an embodiment of the present application provides an active impedance matching network based on a Buck circuit, including a dc power supply V, a switching tube Q, a capacitor C, an inductor L, and a first diode D 1 Second diode D 2 A control circuit;
the first end of the capacitor C is connected with the characteristic impedance of the radio frequency power supply; the positive terminal of the direct current power supply V is connected with the drain electrode of the switch tube Q, and the negative terminal of the direct current power supply V is dividedIs connected with the first diode D 1 Is connected to the second terminal of the capacitor C; first diode D 1 The negative electrode terminal of the switch tube Q is respectively connected with the source electrode of the switch tube Q and the first end of the inductor L; second end of inductor L and second diode D 2 Is connected with the positive terminal of the battery; second diode D 2 The negative terminal of the capacitor C is connected with the first terminal of the capacitor;
the output end of the control circuit is connected with the grid electrode of the switching tube Q, and the control circuit is used for controlling the equivalent input impedance of the active impedance matching network to be equal to the characteristic impedance.
Preferably, the control circuit controls the actual capacitance voltage of the capacitor C of the active impedance matching network by changing the duty cycle of the switching tube QAnd the actual inductor current through the inductor L>The following condition (1) is satisfied:
（1）；
wherein,for the actual system current flowing into the plasma system, < >>Is the characteristic impedance of the radio frequency power supply.
Preferably, the control circuit comprises a voltage loop compensation circuit, a first current loop compensation circuit, a second current loop compensation circuit, a PWM generator, a first amplifier A 1 Second amplifier A 2 And a third amplifier A 3 ；
The voltage ring compensation circuit is used for compensating the actual capacitance voltage of the capacitor C according to the voltage signal VD of the direct current power supply input circuitComparing the obtained error signals to generate a reference inductor current +.>；
A first current loop compensation circuit for compensating the current according to the reference inductanceAnd the actual inductor current->Generating a theoretical adjusted inductor current of the inductor L by comparing the obtained error signal>；
A second current loop compensation circuit for adjusting the inductance current according to the theory of the inductance LActual system current to plasma system +.>Comparing the obtained error signals to generate a theoretical regulated capacitor voltage of the capacitor C>；
PWM generator for regulating capacitor voltage according to theoryAnd the actual capacitance voltage>The obtained error signals are compared to generate PWM waves for controlling the operation of the switching tube Q.
Preferably, the voltage loop compensation circuit includes:
a voltage loop compensation controller for applying a voltage loop compensation function to the voltage signal VD of the DC power supply input circuit and the actual capacitance voltage of the capacitor CComparing the obtained error signals to generate a reference inductor current +.>；
Proportional controller for theoretical regulated system current to plasma systemAfter theoretical adjustment of the generation capacitor C by proportional amplification, the capacitor voltage +.>；
Voltage measurement delay controller for capacitor voltage after theoretical adjustmentThe actual capacitance voltage of the capacitor C is then measured with a delay>Thereby forming a closed loop control of the voltage loop compensation circuit;
delay function of the voltage measurement delay controllerIs determined by the measuring device.
Preferably, the first current loop compensation circuit includes:
a first current loop compensation controller for compensating the reference inductor current by using a first current loop compensation functionAnd the actual inductor current->Processing the error signal obtained by comparison to generate reference inductor voltage of inductor L>；
A first duty ratio adjustment controller for adjusting the capacitor C according to the reference inductance voltage signalGenerates a theoretical adjusted inductor current of the inductor L；
A first inductor current measurement delay controller for measuring inductor current after theoretical adjustmentDelay measurement then yields the actual inductor current +.>To form a closed loop control of the first current loop compensation circuit.
Preferably, the second current loop control circuit includes:
a second current loop compensation controller for theoretically adjusting the inductance L by using the second current loop compensation functionAnd the actual system current flowing into the plasma system +.>Processing to generate reference system voltage of plasma system；
A second duty cycle adjustment controller for adjusting the voltage of the reference system according to the plasma systemActual capacitance voltage to capacitor C>Theoretical post-regulation system current for generating a plasma system>；
A second inductor current measurement delay controller for system current after theoretical regulation of the plasma systemDelay measurement is then carried out to obtain the actual system current of the plasma system +.>To form a closed loop control of the second current loop compensation circuit.
In a second aspect, an embodiment of the present application provides a control method of an active impedance matching network based on a Buck circuit, where the method includes:
collecting actual capacitance voltage of capacitor C in active impedance matching networkActual inductor current flowing through inductor L；
By changing the duty ratio of the switching tube Q, the actual capacitor voltage at two ends of the capacitor C in the active impedance matching networkAnd the actual inductor current through the inductor L>Condition (1) is satisfied to control the equivalent input impedance of the active impedance matching network to be equal to the characteristic impedance.
Preferably, the duty cycle of the switching tube is changed by:
according to the voltage signal VD of the DC power supply V input circuit and the actual capacitance voltage of the capacitor CComparing the obtained error signals to generate a reference inductor current +.>；
According to the reference inductance currentAnd the actual inductor current->Comparing the obtained error signals to generate a theoretical adjusted inductor current of the inductor L>；
Inductor current after theoretical adjustmentAnd the actual system current flowing into the plasma system +.>Comparing the obtained error signals to generate a theoretical regulated capacitor voltage of the capacitor C>；
The capacitance voltage is regulated according to the theory of the capacitance CAnd the actual capacitance voltage of the capacitor C>The obtained error signals are compared to generate PWM waves for controlling the switching tube Q to operate so as to change the duty ratio of the switching tube Q.
Compared with the prior art, the invention has the following advantages: the duty ratio of the switching tube is regulated through the provided control strategy, so that the output voltage of the capacitor and the current flowing into the dynamic load are regulated, the equivalent input impedance is equal to the characteristic impedance, and the impedance matching can be performed in real time when the cavity load changes.
Drawings
Exemplary embodiments of the present invention may be more fully understood by reference to the following drawings. The accompanying drawings are included to provide a further understanding of embodiments of the application and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the application, and not constitute a limitation of the invention. In the drawings, like reference numerals generally refer to like parts or steps.
Fig. 1 is a schematic structural diagram of an active impedance matching network based on a Buck circuit according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a control circuit according to an embodiment of the present application;
fig. 3 is a schematic diagram of a control process of the control circuit according to the embodiment of the present application;
fig. 4 is a schematic diagram of a control method of an active impedance matching network based on a Buck circuit according to an embodiment of the present application.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In addition, the technical features of the different embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
Based on this, the embodiment of the application provides an active impedance matching network based on a Buck circuit, and the following description is made with reference to the accompanying drawings.
Referring to fig. 1, an active impedance matching network based on a Buck circuit according to an embodiment of the present application includes a dc power supply V, a switching tube Q, a capacitor C, an inductor L, and a first diode D 1 Second diode D 2 A control circuit; in FIG. 1For inductor current +.>For plasma system current, +.>The capacitor voltage is only schematically shown in the figure and is not used as an actual parameter in the subsequent steps.
The first end of the capacitor C is connected with the characteristic impedance of the radio frequency power supply; the positive terminal of the direct current power supply V is connected with the drain electrode of the switching tube Q, and the negative terminal of the direct current power supply V is respectively connected with the first diode D 1 Is connected to the second terminal of the capacitor C; first diode D 1 The negative electrode terminal of the switch tube Q is respectively connected with the source electrode of the switch tube Q and the first end of the inductor L; second end of inductor L and second diode D 2 Is connected with the positive terminal of the battery; second diode D 2 The negative terminal of the capacitor C is connected with the first terminal of the capacitor;
the output end of the control circuit is connected with the grid electrode of the switching tube Q, and the control circuit is used for controlling the equivalent input impedance of the active impedance matching network to be equal to the characteristic impedance.
In the present embodiment, the capacitor C acts onTo participate in the adjustment of the equivalent impedance. Specifically, an inductance L, a first diode D 1 Second diode D 2 And the parameter design of the switching tube Q needs to be consistent with Buck circuits,is the characteristic impedance.
The active impedance matching network of the embodiment is used for a radio frequency power supply and a cavity load, in the implementation process, the radio frequency power supply is connected with the characteristic impedance in series and then connected to the input end of the matching network, and two ends of the capacitor C are connected with the cavity load, namely the plasma system.Is the equivalent input impedance as seen from the rf power supply.
Preferably, when the plasma impedance is changed, the control circuit changes the duty ratio of the switching tube Q to enable the actual capacitance voltage across the capacitor C of the active impedance matching network and the actual inductance current flowing through the inductance LThe following condition (1) is satisfied:
（1）；
wherein,for the actual system current flowing into the plasma system, < >>Is the characteristic impedance of the radio frequency power supply.
Preferably, the control circuit of the present embodiment has a schematic structure as shown in fig. 2, and includes a voltage loop compensation circuit, a first current loop compensation circuit, a second current loop compensation circuit, a PWM generator, and a first amplifier a 1 Second amplifier A 2 And a third amplifier A 3 。
Voltage ring compensation circuit for DC power supplyVoltage signal VD of input circuit and actual capacitance voltage of capacitor CComparing the obtained error signals to generate a reference inductor current +.>；
A first current loop compensation circuit for compensating the current according to the reference inductanceAnd the actual inductor current->Generating a theoretical adjusted inductor current of the inductor L by comparing the obtained error signal>；
A second current loop compensation circuit for adjusting the inductance current according to the theory of the inductance LActual system current to plasma system +.>Comparing the obtained error signals to generate a theoretical regulated capacitor voltage of the capacitor C>；
PWM generator for regulating capacitor voltage according to theoryAnd the actual capacitance voltage>The obtained error signals are compared to generate PWM waves for controlling the operation of the switching tube Q.
In the control circuit, all the steps required to generate the error signal can be realized by an error amplifier, such as the first amplifier in fig. 2A 1 Second amplifier A 2 And a third amplifier A 3 The three error amplifiers complete the generation of the output error signal.
The types of the voltage loop compensation circuit and the current loop compensation circuit are not limited in this embodiment, and may be PID adjustment circuits or other forms of compensation circuits. The compensation circuit is a key part of the control circuit, which determines whether the condition (1) can be fulfilled, and in order for the control circuit to meet the condition (1), the parameter design of the compensation circuit must be such that the control system shown in fig. 3 is stable. Fig. 3 is a schematic diagram of a control structure of the control circuit.
Referring to fig. 3, the voltage loop compensation circuit includes a voltage loop compensation controller, a proportional controller, and a voltage measurement delay controller.
A voltage loop compensation controller for applying a voltage loop compensation function to the voltage signal VD of the DC power supply input circuit and the actual capacitance voltage of the capacitor CComparing the obtained error signals to generate a reference inductor current +.>The method comprises the steps of carrying out a first treatment on the surface of the In practical implementation, the voltage loop compensation function +.>Depending on the type of compensation circuit. The specific parameters are determined by continuously adjusting and observing the stability of the Bode diagram.
Proportional controller for theoretical regulated system current to plasma systemAfter theoretical adjustment of the generation capacitor C by proportional amplification, the capacitor voltage +.>；
Voltage measurement delay controller for capacitor voltage after theoretical adjustmentThe actual capacitance voltage of the capacitor C is then measured with a delay>Thereby forming a closed loop control of the voltage loop compensation circuit; wherein the delay function of the voltage measuring delay controller is +.>Is determined by the measuring device.
Referring to fig. 3, the first current loop compensation circuit includes a first current loop compensation controller, a first duty cycle adjustment controller, and a first inductor current measurement delay controller.
A first current loop compensation controller for compensating the reference inductor current by using a first current loop compensation functionAnd the actual inductor current->Processing the error signal obtained by comparison to generate reference inductor voltage of inductor L>. In practical implementation, the first current loop compensation function +.>Depending on the type of compensation circuit. The specific parameters are determined by continuously adjusting and observing the stability of the Bode diagram.
A first duty ratio adjustment controller for generating a theoretical adjusted inductor current of the inductor L according to the reference inductor voltage signal and the actual capacitor voltage of the capacitor C。
A first inductor current measurement delay controller for measuring inductor current after theoretical adjustmentDelay measurement then yields the actual inductor current +.>To form a closed loop control of the first current loop compensation circuit. Wherein the delay function of the current measuring delay controller +.>Is determined by the measuring device.
Referring to fig. 3, the second current loop control circuit includes a second current loop compensation controller, a second duty cycle adjustment controller, and a second inductor current measurement delay controller.
A second current loop compensation controller for theoretically adjusting the inductance L by using the second current loop compensation functionAnd the actual system current flowing into the plasma system +.>Processing to generate reference system voltage of plasma systemThe method comprises the steps of carrying out a first treatment on the surface of the In practical implementation, the second current loop compensation function +.>Depending on the type of compensation circuit. The specific parameters are determined by continuously adjusting and observing the stability of the Bode diagram.
A second duty cycle adjustment controller for adjusting the voltage of the reference system according to the plasma systemActual capacitance voltage to capacitor C>Theoretical post-regulation system current for generating a plasma system>。
A second inductor current measurement delay controller for system current after theoretical regulation of the plasma systemDelay measurement is then carried out to obtain the actual system current of the plasma system +.>To form a closed loop control of the second current loop compensation circuit. Wherein the delay function of the current measuring delay controller +.>Is determined by the measuring device.
Wherein the control process of the second duty ratio adjustment controller comprises zero-order holding and calculating a delay functionIf the sampling time is T and S is the number of sampling points, +.>。
In summary, according to the active impedance matching network based on the Buck circuit provided by the invention, the duty ratio of the switching tube is adjusted through the provided control strategy, so that the output voltage of the capacitor and the current flowing into the dynamic load are adjusted, the equivalent input impedance is equal to the characteristic impedance, and the impedance matching can be performed in real time when the cavity load changes.
Referring to fig. 4, a control method of an active impedance matching network based on a Buck circuit disclosed in the embodiment of the present application includes the following steps:
s41: collecting actual capacitance voltage of capacitor C in active impedance matching networkAnd the actual inductor current through the inductor L>；
S42: by changing the duty ratio of the switching tube Q, the actual capacitor voltage at two ends of the capacitor C in the active impedance matching networkAnd the actual inductor current through the inductor L>Condition (1) is satisfied to control the equivalent input impedance of the active impedance matching network to be equal to the characteristic impedance.
Preferably, the present embodiment changes the duty ratio of the switching tube Q by:
s421: according to the voltage signal VD of the DC power supply V input circuit and the actual capacitance voltage of the capacitor CComparing the obtained error signals to generate a reference inductor current +.>；
S422: according to the reference inductance currentAnd the actual inductor current->Comparing the obtained error signals to generate a theoretical adjusted inductor current of the inductor L>；
S423: inductor current after theoretical adjustmentAnd the actual system current flowing into the plasma system +.>Comparing the obtained error signals to generate a capacitor CCapacitor voltage +.>；
S424: the capacitance voltage is regulated according to the theory of the capacitance CAnd the actual capacitance voltage of the capacitor C>The obtained error signals are compared to generate PWM waves for controlling the switching tube Q to operate so as to change the duty ratio of the switching tube Q.
Specifically, the implementation circuit and system structure of the method in this embodiment are the same as those in the foregoing embodiments, and are not described herein in detail.
It is noted that the flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described apparatus embodiments are merely illustrative, for example, the division of units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the embodiments, and are intended to be included within the scope of the claims and description.
Claims (8)
1. The active impedance matching network based on the Buck circuit is characterized by comprising a direct-current power supply V, a switching tube Q, a capacitor C, an inductor L and a first diode D 1 Second diode D 2 A control circuit;
the first end of the capacitor C is connected with the characteristic impedance of the radio frequency power supply; the positive terminal of the DC power supply V is connected with the drain electrode of the switching tube Q, and the negative terminal of the DC power supply V is respectively connected with the first diode D 1 Is connected to the second terminal of the capacitor C; first diode D 1 The negative electrode terminal of the switch tube Q is respectively connected with the source electrode of the switch tube Q and the first end of the inductor L; second end of inductor L and second diode D 2 Is connected with the positive terminal of the battery; second diode D 2 The negative terminal of the capacitor C is connected with the first terminal of the capacitor;
the output end of the control circuit is connected with the grid electrode of the switching tube Q, and the control circuit is used for controlling the equivalent input impedance of the active impedance matching network to be equal to the characteristic impedance.
2. The active impedance matching network of claim 1, wherein the control circuit controls the actual capacitance voltage of the capacitance C of the active impedance matching network by varying the duty cycle of the switching tube QActual inductor current flowing through inductor LFlow->The following condition (1) is satisfied:
（1）；
wherein,for the actual system current flowing into the plasma system, < >>Is the characteristic impedance of the radio frequency power supply.
3. The active impedance matching network of claim 2, wherein the control circuit comprises a voltage loop compensation circuit, a first current loop compensation circuit, a second current loop compensation circuit, a PWM generator, a first amplifier a 1 Second amplifier A 2 And a third amplifier A 3 ；
The voltage ring compensation circuit is used for compensating the actual capacitance voltage of the capacitor C according to the voltage signal VD of the direct current power supply input circuitComparing the obtained error signals to generate a reference inductor current +.>；
A first current loop compensation circuit for compensating the current according to the reference inductanceAnd the actual inductor current->Generating a theoretical adjusted inductor current of the inductor L by comparing the obtained error signal>；
A second current loop compensation circuit for adjusting the inductance current according to the theory of the inductance LActual system current to plasma system +.>Comparing the obtained error signals to generate a theoretical regulated capacitor voltage of the capacitor C>；
PWM generator for regulating capacitor voltage according to theoryAnd the actual capacitance voltage>The obtained error signals are compared to generate PWM waves for controlling the operation of the switching tube Q.
4. The active impedance matching network of claim 3, wherein the voltage loop compensation circuit comprises:
a voltage loop compensation controller for applying a voltage loop compensation function to the voltage signal VD of the DC power supply input circuit and the actual capacitance voltage of the capacitor CComparing the obtained error signals to generate a reference inductor current +.>；
Proportional controller for theoretical regulated system current to plasma systemAfter theoretical adjustment of the generation capacitor C by proportional amplification, the capacitor voltage +.>；
Voltage measurement delay controller for capacitor voltage after theoretical adjustmentThe actual capacitance voltage of the capacitor C is then measured with a delay>Thereby forming a closed loop control of the voltage loop compensation circuit;
delay function of the voltage measurement delay controllerIs determined by the measuring device.
5. The active impedance matching network of claim 3, wherein said first current loop compensation circuit comprises:
a first current loop compensation controller for compensating the reference inductor current by using a first current loop compensation functionAnd the actual inductor current->Processing the error signal obtained by comparison to generate reference inductor voltage of inductor L>；
A first duty ratio adjustment controller for generating a theoretical adjusted inductor current of the inductor L according to the reference inductor voltage signal and the actual capacitor voltage of the capacitor C；
A first inductor current measurement delay controller for measuring inductor current after theoretical adjustmentDelay measurement then yields the actual inductor current +.>To form a closed loop control of the first current loop compensation circuit.
6. The active impedance matching network of claim 3, wherein the second current loop control circuit comprises:
a second current loop compensation controller for theoretically adjusting the inductance L by using the second current loop compensation functionAnd the actual system current flowing into the plasma system +.>Processing to generate reference system voltage +.>；
A second duty cycle adjustment controller for adjusting the voltage of the reference system according to the plasma systemActual capacitance voltage to capacitor C>Theoretical post-regulation system current for generating a plasma system>；
A second inductor current measurement delay controller for system current after theoretical regulation of the plasma systemDelay measurement is then carried out to obtain the actual system current of the plasma system +.>To form a closed loop control of the second current loop compensation circuit.
7. The control method of a Buck circuit-based active impedance matching network according to any one of claims 1 to 6, comprising the steps of:
collecting actual capacitance voltage of capacitor C in active impedance matching networkAnd the actual inductor current through the inductor L>；
By changing the duty ratio of the switching tube Q, the actual capacitor voltage at two ends of the capacitor C in the active impedance matching networkAnd the actual inductor current through the inductor L>Condition (1) is satisfied to control the equivalent input impedance of the active impedance matching network to be equal to the characteristic impedance.
8. The control method of a Buck circuit-based active impedance matching network according to claim 7, wherein the duty cycle of the switching tube is varied by:
according to the voltage signal VD of the DC power supply V input circuit and the actual capacitance voltage of the capacitor CComparing the obtained error signals to generate a reference inductor current +.>；
According to the reference inductance currentAnd the actual inductor current->Comparing the obtained error signals to generate a theoretical adjusted inductor current of the inductor L>；
Inductor current after theoretical adjustmentAnd the actual system current flowing into the plasma system +.>Comparing the obtained error signals to generate a theoretical regulated capacitor voltage of the capacitor C>；
The capacitance voltage is regulated according to the theory of the capacitance CAnd the actual capacitance voltage of the capacitor C>The obtained error signals are compared to generate PWM waves for controlling the switching tube Q to operate so as to change the duty ratio of the switching tube Q.
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