CN117406506A - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
- Publication number
- CN117406506A CN117406506A CN202311579755.7A CN202311579755A CN117406506A CN 117406506 A CN117406506 A CN 117406506A CN 202311579755 A CN202311579755 A CN 202311579755A CN 117406506 A CN117406506 A CN 117406506A
- Authority
- CN
- China
- Prior art keywords
- display panel
- active layer
- shielding part
- shielding
- plane
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 claims abstract description 37
- 230000003287 optical effect Effects 0.000 claims description 23
- 239000000758 substrate Substances 0.000 claims description 22
- 238000010586 diagram Methods 0.000 description 22
- 239000000969 carrier Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000002310 reflectometry Methods 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The embodiment of the invention provides a display panel and a display device, relates to the technical field of display, and aims to improve the opening ratio of the panel. The display panel includes: a gate line and a data line defining a plurality of sub-pixels including a control transistor and a pixel electrode; the black matrix comprises a first shielding part, a second shielding part and a third shielding part, wherein the third shielding part is connected with the two first shielding parts at two sides of the first direction, and the third shielding part is connected with the two second shielding parts at two sides of the second direction; the control transistor comprises a first type control transistor, the first type control transistor comprises a first transistor and a second transistor which are connected in series, the first transistor comprises a first active layer, the second transistor comprises a second active layer, the angle between the extending direction of the second active layer and the extending direction of the first active layer is theta, 0 degree is less than theta and less than 180 degrees, and theta is not equal to 90 degrees; the third shielding part overlaps the first active layer and/or the second active layer.
Description
[ field of technology ]
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
[ background Art ]
For a liquid crystal display panel, the aperture ratio is an important indicator for measuring the performance of the panel, and the size of the aperture ratio is related to the coverage area of the black matrix in the display panel.
The black matrix is usually located on the opposite case substrate and is used for shielding the metal layer and the active layer in the array substrate to avoid reflection of light of the film layer. However, in the prior art, based on the structure of the active layer of the control transistor in the array substrate, the black matrix needs to have a larger coverage area to cover it, which results in a lower aperture ratio of the display panel, which is disadvantageous for optimizing the panel performance.
[ invention ]
In view of the above, the embodiments of the present invention provide a display panel and a display device for improving the aperture ratio of the display panel.
In one aspect, an embodiment of the present invention provides a display panel, including:
a gate line extending in a first direction and a data line extending in a second direction, the gate line and the data line intersecting to define a plurality of sub-pixels, the sub-pixels including a control transistor and a pixel electrode, the control transistor being electrically connected between the data line and the pixel electrode;
the black matrix comprises a first shielding part, a second shielding part and a third shielding part, wherein the first shielding part extends along the first direction, the second shielding part extends along the second direction, the third shielding part is respectively connected with the two first shielding parts at two sides of the first direction, and the third shielding part is respectively connected with the two second shielding parts at two sides of the second direction;
the control transistor comprises a first type control transistor, the first type control transistor comprises a first transistor and a second transistor which are connected in series, the first transistor comprises a first active layer, the second transistor comprises a second active layer, the angle between the extending direction of the second active layer and the extending direction of the first active layer is theta, 0 degree is less than 180 degrees, and theta is not equal to 90 degrees;
in the direction perpendicular to the plane of the display panel, the third shielding part overlaps the first active layer and/or the second active layer.
In another aspect, an embodiment of the present invention provides a display device including the above display panel.
One of the above technical solutions has the following beneficial effects:
in the embodiment of the invention, the angle between the extending direction of the first active layer in the first transistor and the extending direction of the second active layer in the second transistor is set to be 0-180 degrees, and 90 degrees are not included, so that the active layer in the control transistor is in a pointer type structure. Compared with the existing U-shaped structure and L-shaped structure, the active layers of the pointer-type structure have smaller occupied lateral length, and two adjacent active layers can be separated by a larger distance. Therefore, when the black matrix is designed, enough space can be reserved between two adjacent third shielding parts to provide a first shielding part which is used for shielding the grid lines and has small longitudinal width, and the part of the black matrix extending along the first direction does not need to be provided with a shielding strip with large longitudinal width. For example, in the prior art, the longitudinal width of the portion extending in the transverse direction in the black matrix is generally about 12 μm to 25 μm, but in the embodiment of the invention, the longitudinal width of the first shielding portion is only required to be similar to the line width of the gate line, for example, only 3 μm, so that the coverage area of the black matrix is effectively reduced, and the aperture ratio of the display panel is improved.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a film structure of a display panel in the prior art;
FIG. 2 is a schematic diagram of another film structure of a display panel according to the prior art;
fig. 3 is a schematic structural diagram of a display panel according to an embodiment of the invention;
fig. 4 is a schematic diagram of a film structure of a display panel according to an embodiment of the invention;
FIG. 5 is an enlarged partial schematic view of FIG. 4;
fig. 6 is a schematic diagram of another structure of a control transistor according to an embodiment of the present invention;
FIG. 7 is a schematic cross-sectional view of a display panel according to an embodiment of the invention;
fig. 8 is a schematic diagram of another structure of a display panel according to an embodiment of the invention;
fig. 9 is a schematic diagram of another structure of a control transistor according to an embodiment of the present invention;
fig. 10 is a schematic diagram of another structure of a control transistor according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of a third light shielding layer according to an embodiment of the present invention;
FIG. 12 is a top view of a display panel according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of a display panel when all active layers of control transistors provided in the embodiment of the invention are designed in a U-shape;
fig. 14 is a schematic structural diagram of a display panel when all active layers of control transistors provided in the embodiment of the invention are designed by using pointers;
fig. 15 is a schematic structural diagram of a display panel when an active layer of a part of control transistors provided in an embodiment of the present invention adopts a pointer type design;
fig. 16 is a schematic structural diagram of a display device according to an embodiment of the invention.
[ detailed description ] of the invention
For a better understanding of the technical solution of the present invention, the following detailed description of the embodiments of the present invention refers to the accompanying drawings.
It should be understood that the described embodiments are merely some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
It should be understood that although the terms first, second, and third may be used in embodiments of the present invention to describe the shielding portions, these shielding portions should not be limited to these terms, which are used only to distinguish the shielding portions from each other. For example, a first occlusion may also be referred to as a second occlusion, and similarly, a second occlusion may also be referred to as a first occlusion, without departing from the scope of embodiments of the present invention.
Before describing the technical solution provided by the embodiments of the present invention, the present invention first describes the problems existing in the prior art:
the display panel comprises an array substrate and a box-aligning substrate which are oppositely arranged, the array substrate comprises a plurality of sub-pixels, as shown in fig. 1 and 2, fig. 1 is a schematic film structure diagram of the display panel in the prior art, fig. 2 is a schematic film structure diagram of the display panel in the prior art, the sub-pixels comprise a control transistor 1' and a pixel electrode 2', the control transistor 1' is used for responding to a scanning signal provided by a Gate line Gate ', transmitting a Data signal provided by a Data line Data ' to the pixel electrode 2', and further enabling an electric field to be formed between the pixel electrode 2' and a common electrode to drive liquid crystal molecules to rotate.
In the prior art, in order to reduce the leakage current of the control transistor 1', the control transistor 1' is generally arranged in a double gate structure, i.e. the control transistor 1' comprises two transistors arranged in series. For this type of control transistor 1', the active layer 3' in the control transistor 1' is typically of a U-shaped design as shown in fig. 1, or of an L-shaped design as shown in fig. 2.
However, when the active layers 3 'adopt the above-described structure, the lateral length L1' occupied by the active layers 3 'is large, and the interval between adjacent two active layers 3' is small. In this way, when designing the black matrix 4', the portion of the black matrix 4' extending along the transverse direction needs to be designed into a light shielding strip with a large longitudinal width L2', which results in a large overall coverage area of the black matrix 4', and affects the aperture ratio of the display panel.
In this regard, an embodiment of the present invention provides a display panel, as shown in fig. 3, fig. 3 is a schematic structural diagram of the display panel provided in the embodiment of the present invention, the display panel includes a Gate line Gate extending along a first direction and a Data line Data extending along a second direction, the Gate line Gate and the Data line Data intersect to define a plurality of sub-pixels 1, the sub-pixels 1 include a control transistor 2 and a pixel electrode 3, the control transistor 2 is electrically connected between the Data line Data and the pixel electrode 3, and is configured to transmit a Data signal provided by the Data line Data to the pixel electrode 3 electrically connected thereto in response to a scan signal provided by the Gate line Gate.
As shown in fig. 4 and fig. 5, fig. 4 is a schematic view of a film structure of a display panel provided by the embodiment of the present invention, fig. 5 is a partially enlarged schematic view of fig. 4, the display panel further includes a black matrix 4, the black matrix 4 includes a first shielding portion 5, a second shielding portion 6, and a third shielding portion 7, wherein the first shielding portion 5 extends along a first direction, the second shielding portion 6 extends along a second direction, the third shielding portion 7 is connected to two first shielding portions 5 respectively at two sides of the first direction, and the third shielding portion 7 is connected to two second shielding portions 6 respectively at two sides of the second direction.
It should be noted that, the second direction in the embodiment of the present invention refers to a longitudinal extending direction of the whole Data line Data. The Data line Data in the embodiment of the invention can extend in a longitudinal straight line or in a longitudinal broken line. When the Data line Data extends in a longitudinal folding line, the Data line Data may have a folding line from a local point of view. The third shielding portions 7 are connected to the two second shielding portions 6 on both sides in the second direction, respectively, which means that both sides of the third shielding portions 7 in the longitudinal direction are connected to the two second shielding portions 6, respectively.
In addition, the first shielding portion 5 extends along the extending direction of the Gate line Gate, and in the direction perpendicular to the plane of the display panel, the first shielding portion 5 overlaps the Gate line Gate to shield the Gate line Gate and prevent the Gate line Gate from reflecting light; the second shielding part 6 extends along the extending direction of the Data line Data, and in the direction perpendicular to the plane of the display panel, the second shielding part 6 overlaps the Data line Data and is used for shielding the Data line Data to prevent the Data line Data from reflecting light.
Referring to fig. 2 to 5, in order to reduce the drain current of the control transistor 2, the control transistor 2 includes a first type control transistor 8, and the first type control transistor 8 includes a first transistor 9 and a second transistor 10 connected in series, that is, the first type control transistor 8 has a double gate structure. Wherein the first transistor 9 comprises a first active layer 11 and the second transistor 10 comprises a second active layer 12, the angle between the extending direction of the second active layer 12 and the extending direction of the first active layer 11 is theta, 0 DEG < theta < 180 DEG, and theta is not equal to 90 deg. The third shielding portion 7 overlaps the first active layer 11 and/or the second active layer 12 in a direction perpendicular to a plane in which the display panel is located.
In the embodiment of the present invention, the active layer in the control transistor 2 may be in a pointer structure by setting the angle between the extending direction of the first active layer 11 in the first transistor 9 and the extending direction of the second active layer 12 in the second transistor 10 to be between 0 ° and 180 ° and excluding 90 °. Referring to fig. 4, compared with the conventional U-shaped structure and L-shaped structure, the active layers of the pointer-shaped structure have smaller lateral length L1, and two adjacent active layers are spaced apart by a larger distance. In this way, when designing the black matrix 4, there may be enough space between two adjacent third shielding portions 7 to provide a section of the first shielding portion 5 with a small longitudinal width L2 for shielding the Gate line Gate, and the portion of the black matrix 4 extending along the first direction does not need to be provided with a shielding strip with a large longitudinal width. For example, in the prior art, the longitudinal width L2' of the portion extending in the transverse direction in the black matrix is generally about 12 μm to 25 μm, but in the embodiment of the present invention, the longitudinal width L2 of the first shielding portion 5 only needs to be close to the line width of the Gate line Gate, for example, only 3 μm, so that the coverage area of the black matrix 4 is effectively reduced, and the aperture ratio of the display panel is improved.
In addition, it should be noted that, for a display panel with a relatively low pixel density, the distance between two adjacent sub-pixels 1 is relatively large, and when the active layer in the control transistor 2 adopts a pointer type structure, the extension length of the first shielding portion 5 can be correspondingly relatively large, so that the control of the longitudinal width of the first shielding portion 5 is relatively easy to implement in terms of technology.
In one possible embodiment, referring to fig. 5, the first active layer 11 extends in the second direction, that is, the first active layer 11 extends along the extending direction of the Data line Data. So set up, at θ fixed time, the active layer that takes up in pointer structure in the required length of first direction is littleer, and correspondingly, the extension length that can set up first shielding part 5 between two third shielding parts 7 just also is longer, has further reduced the coverage area of black matrix 4.
In addition, referring to fig. 5, when the first active layer 11 extends along the second direction, in order to further reduce the total width that the two structures of the first active layer 11 and the Data line Data need to occupy in the first direction, in the direction perpendicular to the plane of the display panel, the first active layer 11 may also overlap the Data line Data, and at this time, the black matrix 4 at this position may shield the Data line Data and the first active layer 11 without setting too wide, so as to further reduce the coverage area of the black matrix 4.
In one possible embodiment, referring to fig. 5, the first active layer 11 includes a first source electrode s1, a first channel p1, and a first drain electrode d1, and the second active layer 12 includes a second source electrode s2, a second channel p2, and a second drain electrode d2, wherein the first source electrode s1 is electrically connected to the Data line Data, the first drain electrode d1 is electrically connected to the second source electrode s2, and the second drain electrode d2 is electrically connected to the pixel electrode 3. The third shielding portion 7 covers at least the first source s1, the first channel p1, the second channel p2, and the second drain d2 in a direction perpendicular to a plane in which the display panel is located.
For the transistor structure, when light irradiates into a channel, photo-generated carriers are generated in the channel, and the photo-generated carriers can accelerate the transmission rate of original carriers in the channel, so that the opening performance of the transistor is affected. In the embodiment of the present invention, by covering the first channel p1 of the first transistor 9 and the second channel p2 of the second transistor 10 with the third shielding portion 7, external ambient light can be prevented from being irradiated into the channels of the two transistors, and thus, the influence on the device performance of the two transistors can be avoided.
Furthermore, the first source s1 of the first transistor 9 generally needs to be designed to be larger in size relative to the first drain d1 of the first transistor 9 to be electrically connected to the Data line Data through the via hole, and similarly, the second drain d2 of the second transistor 10 generally needs to be designed to be larger in size relative to the second source s2 of the second transistor 10 to be electrically connected to the pixel electrode 3 through the via hole. For this reason, in the embodiment of the present invention, by making the third shielding portion 7 further cover the first source s1 and the second drain d2, the black matrix 4 can cover the active layer in the control transistor 2 in a larger area, so as to reduce the risk of reflection of the active layer.
In addition, in connection with fig. 7, the display panel includes an array substrate 13 and a counter substrate 14 disposed opposite to each other. The Gate line Gate, the Data line Data, the control transistor 2, and the pixel electrode 3 may be located at a side of the array substrate 13 facing the opposite case substrate 14, and the black matrix 4 may be located at a side of the opposite case substrate 14 facing the array substrate 13. In other optional embodiments of the present invention, a light blocking layer may be further disposed on a side of the first active layer 11 and the second active layer 12 facing away from the case substrate 14, where the light blocking layer covers the first channel p1 in the first active layer 11 and the second channel p2 in the second active layer 12 in a direction perpendicular to the plane of the display panel, so as to block light incident through the back side of the display panel, and prevent the light from irradiating into the channel of the transistor to affect the device performance of the transistor.
In a possible embodiment, referring to fig. 5, in a direction perpendicular to the plane of the display panel, the third shielding portion 7 covers the first active layer 11 and the second active layer 12, so as to realize full coverage of the active layer in the control transistor 2, further avoid reflection of the active layer, and reduce the reflectivity of the display panel.
In one possible embodiment, see FIG. 5, 90 < θ < 180. The first transistor 9 includes a first Gate g1, and the second transistor 10 includes a second Gate g2, wherein the first Gate g1 is multiplexed with a part of the film layer of the Gate line Gate, and the second Gate g2 is electrically connected with the Gate line Gate.
In this arrangement, the first source s1 and the second drain d2 are respectively located at two sides of the Gate line Gate in the second direction, and the included angle between the first active layer 11 and the second active layer 12 is an obtuse angle, so that compared with the existing U-shape and L-shape, the active layer occupies a smaller length in the lateral direction, and the area of the third shielding portion 7 covering the first active layer is effectively reduced.
Alternatively, in another possible implementation manner, as shown in fig. 6, fig. 6 is another schematic structural diagram of a control transistor provided by an embodiment of the present invention, where θ is 0 ° < θ < 90 °. The first transistor 9 includes a first Gate g1, the second transistor 10 includes a second Gate g2, and the first Gate g1 and the second Gate g2 are multiplexed with a part of the film layer of the Gate line Gate, respectively.
In this arrangement, the angle between the first active layer 11 and the second active layer 12 is smaller than 90 °, at this time, the active layers in the control transistor 2 are in a V-shaped pointer structure, the first source s1 of the first active layer 11 and the first drain d1 of the second active layer 12 are disposed on the same side of the Gate line Gate, and the first active layer 11 and the second active layer 12 overlap the Gate line Gate respectively, so that the overlapped Gate lines Gate of the two portions can be multiplexed into the gates of the first transistor 9 and the second transistor 10, and no additional Gate is required to be disposed. Moreover, the active layer is of a V-shaped pointer structure, the active layer occupies a small space on the other side of the Gate line, the third shielding part 7 can shield the active layer without a large size on the other side of the Gate line, namely, the coverage area of the third shielding part 7 is reduced, and the risk of reflection of the active layer is also reduced.
In a possible implementation manner, as shown in fig. 7 to 9, fig. 7 is a schematic cross-sectional view of a display panel provided by an embodiment of the present invention, fig. 8 is another schematic structural view of a display panel provided by an embodiment of the present invention, and fig. 9 is another schematic structural view of a control transistor provided by an embodiment of the present invention, where the display panel further includes an array substrate 13 and a counter substrate 14 disposed opposite to each other, and a support column 15 and a liquid crystal molecule 16 disposed between the array substrate 13 and the counter substrate 14, and the support column 15 is used for supporting the counter substrate 14 to form a uniform cell thickness. At least a portion of the third shielding portion 7 covers the support column 15 in a direction perpendicular to the plane of the display panel, so as to shield the support column 15 and prevent the support column 15 from light leakage.
Further, referring to fig. 9, at least part of the third shielding portion 7 has the same shape as the orthographic projection of the support column 15 covered therewith in the direction of the plane of the vertical display panel. So set up, at least part third shelter from portion 7 and expand for support column 15 outward, and expand the edge of part and extend along support column 15 orthographic projection's edge outward to under the prerequisite that guarantee that third shelter from portion 7 carries out the complete coverage to support column 15, further reduced the coverage area of third shelter from portion 7.
It should be noted that the orthographic projection of the support column 15 illustrated in fig. 9 is circular, and is only schematically illustrated. In alternative embodiments of the present invention, the shape of the orthographic projection of the support post 15 may be other shapes. For example, as shown in fig. 10, fig. 10 is a schematic diagram of another structure of the control transistor according to the embodiment of the present invention, the shape of the orthographic projection of the support column 15 in the direction perpendicular to the plane of the display panel may also be polygonal, and correspondingly, the shape of the orthographic projection of at least part of the third shielding portion 7 in the direction perpendicular to the plane of the display panel may also be polygonal.
In addition, it should be noted that, in the direction perpendicular to the plane of the display panel, the support column 15 may fully cover the first active layer 11 and the second active layer 12, and at this time, the third shielding portion 7 may fully cover the support column 15, the first active layer 11 and the second active layer 12 only by expanding a short distance with respect to the support column 15. Or, in the direction perpendicular to the plane of the display panel, the support columns 15 may also partially cover the first active layer 11 and the second active layer 12, and at this time, the third shielding portion 7 may be expanded by a larger distance with respect to the support columns 15 to fully cover the support columns 15, the first active layer 11 and the second active layer 12, so as to achieve a smaller panel reflectivity.
Alternatively, as shown in fig. 11, fig. 11 is a schematic view illustrating another structure of a third light shielding layer according to an embodiment of the present invention, where the first control transistor 8 includes an active layer 17, and the active layer 17 includes a first active layer 11 and a second active layer 12. At least part of the third shielding portion 7 includes a first sub-portion 18 and a second sub-portion 19, and in the direction of the plane of the vertical display panel, the first sub-portion 18 covers the support column 15 and covers part of the active layer 17, and the shape of the orthographic projection of the first sub-portion 18 in the direction of the plane of the vertical display panel is the same as the shape of the orthographic projection of the support portion covered therewith in the direction of the plane of the vertical display panel. The second sub-portion 19 covers a portion of the active layer 17 not covered by the first sub-portion 18 in a direction perpendicular to a plane in which the display panel is located.
In this arrangement, in the direction perpendicular to the plane of the display panel, taking the shape of the orthographic projection of the support column 15 as a circle as an example, by setting the third shielding portion 7 to the above-mentioned special shape, the orthographic projection of the first sub-portion 18 in the third shielding portion 7 only needs to expand the orthographic projection of the support column 15 by a short distance, that is, the radius of the orthographic projection of the first sub-portion 18 is similar to the radius of the orthographic projection of the support column 15, and then a second sub-portion 19 protruding from the first sub-portion 18 is further provided to individually shield the portion of the active layer 17 not covered by the first sub-portion 18. The coverage area of the third shielding part 7 is smaller in this embodiment than if the orthographic projection of the entire third shielding part 7 was set to be circular.
In one possible embodiment, referring to fig. 9, the black matrix 4 covers the Gate line Gate in a direction perpendicular to the plane of the display panel. The distance between the edge of the orthographic projection of the first shielding part 5 in the direction perpendicular to the plane of the display panel and the edge of the orthographic projection of the grid line Gate in the direction perpendicular to the plane of the display panel in the second direction is L which is less than or equal to 2 mu m.
It can be understood that, due to the influence of factors such as process precision, there may be a misalignment between the black matrix 4 and the Gate line Gate, and by expanding the edge of the orthographic projection of the first shielding portion 5 by a certain distance with respect to the edge of the orthographic projection of the Gate line Gate, the Gate line Gate at the position can still be covered by the first shielding portion 5 when the misalignment occurs, so as to avoid the reflective phenomenon caused by exposure of the Gate line Gate. Moreover, by setting the distance between the edge of the orthographic projection of the first shielding portion 5 and the edge of the orthographic projection of the Gate line Gate to be less than or equal to 2 μm, it is also possible to avoid the first shielding portion 5 from being excessively wide, and thus to avoid the black matrix 4 from being large in coverage area.
In an alternative implementation, as shown in fig. 12, fig. 12 is a top view of a display panel provided by an embodiment of the present invention, where the display panel further includes a display area 20, and the display area 20 includes a first display area 21 and an optical component setting area 22. The display panel further comprises an optical component 23 located in the optical component arrangement area 22. Wherein at least part of the control transistors 8 of the first type are located in the optical component placement area 22.
The optical component setting area 22 may be an image capturing area, and at this time, the optical component 23 is a component such as a camera, and external ambient light is emitted into the camera through the optical component setting area 22, so as to collect external ambient light, and further, realize imaging. Alternatively, the optical component setting area 22 may be a fingerprint identification area, and in this case, the optical component 23 is a component such as an optical sensor, and the light reflected by the finger is incident into the optical sensor through the optical component setting area 22, so as to collect the detected light, and further realize fingerprint identification. And the first display area 21 is a conventional display area in the display area 20.
The optical component setting area 22 is used for realizing imaging or fingerprint recognition and the like, and the light transmittance of the area is required to be higher than that of the first display area 21. Therefore, in the embodiment of the present invention, by setting the control transistor 2 in the optical component setting region 22 to the above-described first type control transistor 8, the coverage area of the black matrix 4 in the optical component setting region 22 can be effectively reduced, and the light transmittance of the optical component setting region 22 can be effectively improved.
It should be noted that the above-mentioned "at least part of the first type control transistors 8 are located in the optical component setting area 22" includes a case where all of the first type control transistors 8 in the display panel are located only in the optical component setting area 22, and also includes a case where part of the first type control transistors 8 in the display panel are located in the optical component setting area 22 and the rest of the first type control transistors 8 are located in the first display area 21.
In a possible embodiment, all the control transistors 2 are the first type control transistors 8, so that the coverage area of the third shielding portions 7 at different positions in the display area 20 is effectively reduced, and the uniformity of the opening area at different positions is improved while the opening ratio of the display panel is improved.
In addition, the inventor tests the aperture opening ratio of the display panel according to the technical scheme provided by the embodiment of the invention:
as shown in fig. 13, fig. 13 is a schematic structural diagram of a display panel when the active layers 17 of all the control transistors in the display panel are U-shaped, and when the active layers 17 of all the control transistors 2 in the display panel are U-shaped, the longitudinal width L2 of the black matrix 4 is 14.4 μm, and the opening area of the A1 region is 2848.8 μm 2 The opening area of the A2 region was 3120.9. Mu.m 2 The opening area of the A3 region was 2895.4. Mu.m 2 The average opening ratios of the A1 and A2 regions were 70.4%, and the average opening ratios of the A1, A2 and A3 regions were 69.7%.
As shown in fig. 14, fig. 14 is a schematic structural diagram of a display panel when the active layers 17 of all the control transistors provided in the embodiment of the invention are pointer-type designWhen the active layers 17 of the partial control transistors 2 are each of pointer type design, the vertical width L2 of the black matrix 4 is 4.4 μm, and the opening area of the A1 region is 3028 μm as shown in the figure 2 The opening area of the A2 region was 3402. Mu.m 2 The opening area of the A3 region was 3044. Mu.m 2 The average opening ratios of the A1, A2 and A3 regions were 75.8%. Compared with fig. 13, the average aperture ratio of the A1, A2 and A3 regions corresponding to the structure shown in fig. 14 is improved by 6.1%.
As shown in fig. 15, fig. 15 is a schematic structural diagram of a display panel when the active layer 17 of a part of the control transistors provided in the embodiment of the invention adopts a pointer type design, and when the active layer 17 of the control transistor 2 of the display panel only at the position of the support column 15 adopts a pointer type design, the longitudinal width L2 of the black matrix 4 is 4.4 μm, and the opening area of the A1 region shown in the figure is 3028 μm 2 The opening area of the A2 region was 3288.9. Mu.m 2 The average opening ratio of the A1 and A2 regions was 74.5%. Compared with fig. 13, the average opening ratio of the A1 and A2 regions corresponding to the structure shown in fig. 15 is improved by 4.1%.
In addition, it should be noted that, referring to fig. 15, when only a part of the active layer 17 in the control transistor 2 in the display panel is in a pointer type design and the other part of the active layer 17 in the control transistor 2 is in a U type design, the third shielding portion 7 may cover only two ends of the active layer 17 on the same side as the Gate line Gate, and expose a part of the active layer 17 on the other side as the Gate line Gate, so that the coverage area of the black matrix 4 is prevented from being excessively large on the premise that the first source electrode and the second drain electrode in the active layer 17 are covered by the third shielding portion 7.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, as shown in fig. 16, fig. 16 is a schematic structural diagram of the display device provided in the embodiment of the present invention, where the display device includes the display panel 100 described above. The specific structure of the display panel 100 is described in detail in the above embodiments, and will not be described here again. Of course, the display device shown in fig. 16 is only a schematic illustration, and the display device may be any electronic apparatus having a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather to enable any modification, equivalent replacement, improvement or the like to be made within the spirit and principles of the invention.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.
Claims (14)
1. A display panel, comprising:
a gate line extending in a first direction and a data line extending in a second direction;
a plurality of sub-pixels including a control transistor and a pixel electrode, the control transistor being electrically connected between the data line and the pixel electrode;
the control transistor comprises a first type control transistor, the first type control transistor comprises a first transistor and a second transistor which are connected in series, the first transistor comprises a first active layer, the second transistor comprises a second active layer, the angle between the extending direction of the second active layer and the extending direction of the first active layer is theta, 0 degree is less than 180 degrees, and theta is not equal to 90 degrees;
and a black matrix covering at least the first active layer and the second active layer in a direction perpendicular to a plane in which the display panel is located.
2. The display panel of claim 1, wherein the display panel comprises,
the black matrix comprises a first shielding part, a second shielding part and a third shielding part, wherein the first shielding part extends along the first direction, the second shielding part extends along the second direction, the third shielding part is respectively connected with the two first shielding parts at two sides of the first direction, and the third shielding part is respectively connected with the two second shielding parts at two sides of the second direction;
and in the direction perpendicular to the plane of the display panel, the third shielding part at least covers the first active layer and the second active layer.
3. The display panel of claim 2, wherein the display panel comprises,
the first active layer comprises a first source electrode, a first channel and a first drain electrode, the second active layer comprises a second source electrode, a second channel and a second drain electrode, wherein the first source electrode is electrically connected with the data line, the first drain electrode is electrically connected with the second source electrode, and the second drain electrode is electrically connected with the pixel electrode;
and in the direction perpendicular to the plane of the display panel, the third shielding part at least covers the first source electrode, the first channel, the second channel and the second drain electrode.
4. The display panel of claim 1, wherein the display panel comprises,
the first active layer extends in the second direction.
5. The display panel of claim 4, wherein the display panel comprises,
the first active layer overlaps the data line in a direction perpendicular to a plane in which the display panel is located.
6. The display panel of claim 1, wherein the display panel comprises,
90°＜θ＜180°；
the first transistor comprises a first grid electrode and the second transistor comprises a second grid electrode, wherein the first grid electrode is multiplexed with a part of film layers of the grid lines, and the second grid electrode is electrically connected with the grid lines.
7. The display panel of claim 1, wherein the display panel comprises,
0°＜θ＜90°；
the first transistor comprises a first grid electrode, the second transistor comprises a second grid electrode, and the first grid electrode and the second grid electrode are respectively multiplexed with part of film layers of the grid lines.
8. The display panel of claim 1, wherein the display panel comprises,
the display panel also comprises an array substrate, a box-matching substrate and a support column, wherein the array substrate and the box-matching substrate are oppositely arranged;
the display panel comprises a black matrix, the black matrix comprises a first shielding part, a second shielding part and a third shielding part, wherein the first shielding part extends along the first direction, the second shielding part extends along the second direction, the third shielding part is respectively connected with two first shielding parts at two sides of the first direction, and the third shielding part is respectively connected with two second shielding parts at two sides of the second direction;
and at least part of the third shielding part covers the support column in the direction perpendicular to the plane where the display panel is located.
9. The display panel of claim 8, wherein the display panel comprises,
the shape of orthographic projection of at least part of the third shielding part in the direction vertical to the plane of the display panel is the same as the shape of orthographic projection of the support column covered by the third shielding part in the direction vertical to the plane of the display panel.
10. The display panel of claim 8, wherein the display panel comprises,
the first type control transistor comprises an active layer, wherein the active layer comprises the first active layer and the second active layer;
at least part of the third shielding part comprises a first sub part and a second sub part, the first sub part covers the support column and part of the active layer in the direction vertical to the plane of the display panel, and the shape of the orthographic projection of the first sub part in the direction vertical to the plane of the display panel is the same as the orthographic projection of the support column covered by the first sub part in the direction vertical to the plane of the display panel;
in a direction perpendicular to a plane in which the display panel is located, the second sub-portion covers a portion of the active layer that is not covered by the first sub-portion.
11. The display panel of claim 1, wherein the display panel comprises,
the black matrix covers the grid lines in a direction perpendicular to a plane where the display panel is located;
the black matrix comprises a first shielding part which covers the grid lines along the direction vertical to the display panel;
the distance between the edge of the orthographic projection of the first shielding part in the direction vertical to the plane of the display panel and the edge of the orthographic projection of the grid line in the direction vertical to the plane of the display panel in the second direction is L, and L is less than or equal to 2 mu m.
12. The display panel of claim 1, further comprising:
a display area including a first display area and an optical component setting area;
an optical component located in the optical component placement area;
wherein at least part of the first type control transistors are located in the optical component arrangement region.
13. The display panel of claim 1, wherein the display panel comprises,
all of the control transistors are of the first type.
14. A display device comprising the display panel according to any one of claims 1 to 13.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311579755.7A CN117406506A (en) | 2022-01-21 | 2022-01-21 | Display panel and display device |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210070429.2A CN114236932B (en) | 2022-01-21 | 2022-01-21 | Display panel and display device |
| CN202311579755.7A CN117406506A (en) | 2022-01-21 | 2022-01-21 | Display panel and display device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210070429.2A Division CN114236932B (en) | 2022-01-21 | 2022-01-21 | Display panel and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117406506A true CN117406506A (en) | 2024-01-16 |
Family
ID=80747032
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210070429.2A Active CN114236932B (en) | 2022-01-21 | 2022-01-21 | Display panel and display device |
| CN202311579755.7A Pending CN117406506A (en) | 2022-01-21 | 2022-01-21 | Display panel and display device |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210070429.2A Active CN114236932B (en) | 2022-01-21 | 2022-01-21 | Display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (2) | CN114236932B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023184402A1 (en) * | 2022-03-31 | 2023-10-05 | 京东方科技集团股份有限公司 | Display substrate and manufacturing method therefor, and display panel |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002229067A (en) * | 1996-09-17 | 2002-08-14 | Seiko Epson Corp | Substrate for liquid crystal panel, liquid crystal panel using the same and projection display device |
| CN205229635U (en) * | 2015-12-18 | 2016-05-11 | 京东方科技集团股份有限公司 | Pixel structure, array substrate and display device |
| KR102377416B1 (en) * | 2017-06-30 | 2022-03-21 | 엘지디스플레이 주식회사 | Display Device |
| CN109061971A (en) * | 2018-09-07 | 2018-12-21 | 京东方科技集团股份有限公司 | Array substrate and display panel |
| JP7261595B2 (en) * | 2019-01-31 | 2023-04-20 | トライベイル テクノロジーズ， エルエルシー | Display device |
-
2022
- 2022-01-21 CN CN202210070429.2A patent/CN114236932B/en active Active
- 2022-01-21 CN CN202311579755.7A patent/CN117406506A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| CN114236932B (en) | 2023-12-15 |
| CN114236932A (en) | 2022-03-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8031304B2 (en) | Liquid crystal display device | |
| US20210133418A1 (en) | Display module and display apparatus | |
| CN106094363B (en) | Pixel structure, display panel and curved surface display device | |
| CN109270733B (en) | Display panel, array substrate and display device | |
| CN104965331A (en) | Liquid crystal display device | |
| US10732451B2 (en) | Color filter substrate and display panel | |
| CN107578700B (en) | Pixel structure | |
| CN111679526B (en) | Display panel and display device | |
| CN211403022U (en) | Liquid crystal display panel and display device | |
| CN114236932B (en) | Display panel and display device | |
| CN109581761B (en) | Array substrate and display device | |
| CN111308755A (en) | Display panel and display device | |
| CN111308767B (en) | Liquid crystal display module | |
| CN109471308A (en) | Liquid crystal display panel | |
| US6980270B2 (en) | Active matrix substrate, liquid crystal display panel of transflective type, and liquid crystal display device of transflective type | |
| CN101460890B (en) | Semitransparent liquid crystal display | |
| CN111490055B (en) | Pixel array substrate | |
| CN113687534B (en) | Display panel and display device | |
| CN114527596B (en) | Display panel and mobile terminal | |
| CN110441968A (en) | A kind of liquid crystal display panel and display device | |
| US11550429B2 (en) | Liquid crystal display device | |
| CN114077089B (en) | Display panel and display device | |
| US11333919B2 (en) | Display panel | |
| CN113820883A (en) | Pixel unit of display panel and display panel | |
| CN217060713U (en) | Array substrate, display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |