CN117375534A - Power amplifier and power amplifying method - Google Patents
Power amplifier and power amplifying method Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
Abstract
Embodiments of the present disclosure provide a power amplifier and a power amplifying method, the power amplifier including: the device comprises a signal separator, a control power amplifier, a balance power amplifier, an output combiner and an output impedance converter; the signal separator is respectively connected with the input end of the control power amplifier and the input end of the balance power amplifier; the control power amplifier is a first doherty power amplifier, and the balanced power amplifier comprises a second doherty amplifier and a third doherty amplifier which are identical; the first port and the second port of the output combiner are respectively connected with the output ends of the second doherty power amplifier and the third doherty power amplifier, and the fourth port is connected with the output end of the first doherty power amplifier; the third port is an output end; the output end of the output combiner is connected with an output impedance converter, and the output impedance edge converter is used for converting load impedance and matching with the output end of the output combiner. The power amplifier has high overall efficiency.
Description
Technical Field
The embodiment of the disclosure relates to the technical field of wireless communication, in particular to a power amplifier and a power amplifying method.
Background
In a wireless transceiver, a radio frequency power amplifier directly drives an antenna to amplify a signal to a degree that allows the signal to propagate through space to a receiver. The power amplifier (power amplifier for short) consumes the most energy in the whole receiving and transmitting system.
The challenges facing modern wireless communication technology are higher data transmission rates and lower power consumption. Higher data transmission requires expanding signal bandwidth, carrier aggregation, and more complex modulation schemes (higher peak-to-average ratio modulation signals). In addition, the average transmit power of a wireless communication device may change continuously for different traffic scenarios. These features all require further increase of the power amplifier high efficiency back-off interval to improve the power amplifier efficiency.
Disclosure of Invention
The embodiment of the disclosure provides a power amplifier and a power amplifying method, which are used for realizing a wider power back-off interval and improving the overall working efficiency.
In a first aspect, embodiments of the present disclosure provide a power amplifier, comprising: the device comprises a signal separator, a control power amplifier, a balance power amplifier, an output combiner and an output impedance converter; the signal separator is respectively connected with the input end of the control power amplifier and the input end of the balance power amplifier; the control power amplifier is a first doherty power amplifier, and the balanced power amplifier comprises a second doherty amplifier and a third doherty amplifier which are identical; the output combiner comprises a first port, a second port, a third port and a fourth port; the first port and the second port are respectively connected with the output ends of the second doherty power amplifier and the third doherty power amplifier, and the fourth port is connected with the output end of the first doherty power amplifier; the third port is an output end; the output end of the output combiner is connected with an output impedance converter, and the output impedance edge converter is used for converting load impedance and matching with the output end of the output combiner.
In a second aspect, an embodiment of the present disclosure provides a power amplifying method, applied to the power amplifier in the first aspect, including: the signal separator determines a target amplitude interval in a plurality of preset amplitude intervals according to the amplitude of an input signal, wherein the preset amplitude intervals comprise a first amplitude interval, a second amplitude interval, a third amplitude interval and a fourth amplitude interval which are distributed from small to large on a power axis; according to the target amplitude interval, the signal separator respectively controls the first signal sent to the control power amplifier and the second signal sent to the balance power amplifier, so that the control power amplifier and the balance power amplifier respectively work in working states corresponding to the target amplitude interval.
According to the power amplifier and the power amplifying method, the doherty power amplifier is used for realizing the control power amplifier of the load modulation balance type power amplifier, the doherty power amplifier is used for realizing the balance type power amplifier, and the signal separator is used for controlling the working states of different doherty power amplifiers, so that the power amplifier has a wider power back-off interval and has higher efficiency in the power back-off interval.
Drawings
In order to more clearly illustrate the embodiments of the present disclosure or the solutions in the prior art, a brief description will be given below of the drawings that are needed in the embodiments or the description of the prior art, it being obvious that the drawings in the following description are some embodiments of the present disclosure, and that other drawings may be obtained from these drawings without inventive effort to a person of ordinary skill in the art.
FIG. 1 is a schematic diagram of a doherty amplifier configuration;
fig. 2 is a schematic structural diagram of a power amplifier according to an embodiment of the disclosure;
FIG. 3 is a schematic diagram of an output combiner in an embodiment of the present disclosure;
fig. 4 is a schematic flow chart of a power amplifying method according to an embodiment of the disclosure;
FIG. 5 is a schematic diagram of a power amplifier efficiency curve;
fig. 6 is a schematic diagram of a simulated efficiency curve of a power amplifier provided by the present disclosure.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are some embodiments of the present disclosure, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without inventive effort, based on the embodiments in this disclosure are intended to be within the scope of this disclosure.
In order to improve the power amplifier back-off efficiency, a Doherty (English: doherty) architecture is mainly adopted nowadays in the face of broadband peak-to-average ratio signals, and the Doherty has the characteristics of simple structure, easiness in realization, low cost, obvious improvement compared with AB class power amplifier efficiency and the like.
Fig. 1 is a schematic diagram of a doherty power amplifier. As shown in fig. 1, the power amplifier includes a power divider 11, a main power amplifier or carrier power amplifier 12, an auxiliary power amplifier 13 or peak power amplifier, an impedance transformation line, and a peak impedance compensation line. The main power amplifier 12 is an AB type power amplifier, and the auxiliary power amplifier 13 is a C type power amplifier. Only the main power amplifier 12 works in a small signal interval and gradually reaches a high-efficiency state (rollback point); and the peak power amplifier is started in the backspacing interval, and the peak power amplifier modulates the load impedance of the main power amplifier 12 to enable the main power amplifier 12 to work in a high-efficiency state in the whole backspacing interval, so that the efficiency of the doherty power amplifier in the backspacing interval is improved.
Although the doherty power amplifier can significantly improve the efficiency in the back-off section, it is difficult to further improve the power amplification efficiency and bandwidth in the face of a signal having a wider bandwidth and a higher peak-to-average ratio due to its structure and the limitation of the impedance transformation line characteristics.
In order to meet the requirement that the high-efficiency rollback interval of the power amplifier is continuously enlarged, a power amplifier (called as a power amplifier for short) with the following architecture is adopted:
doherty-Outphasing architecture in which doherty and Outphasing architecture are combined, and power amplification efficiency and backoff interval are improved by performing Outphasing synthesis by amplitude-phase separation amplification during a small signal phase in doherty mode and during a large signal phase. Because the structure needs to carry out amplitude-phase separation, the working bandwidth of the signal bandwidth limiting power amplifier is expanded, and the realization and the control are complex.
Load modulation balanced power amplifier (English: load-modulated balanced amplifier, abbreviated as LMBA), LMBA improves the efficiency of the rollback interval by controlling the Load modulation effect of the power amplifier on the balanced power amplifier and the isolation of bridge ports. The power amplifier works in class AB or class C, so that the working bandwidth is greatly improved compared with that of the doherty power amplifier. The larger rollback interval can be obtained by increasing the power ratio of the balanced power amplifier and the controlled power amplifier, but the problem of larger efficiency sinking can be generated in the rollback interval.
According to the scheme provided by the disclosure, the control power amplifier and the balanced power amplifier in the load modulation balanced power amplifier are realized by using the doherty power amplifier, so that a wider backspacing interval is provided, and the efficiency in the backspacing interval is improved.
Fig. 2 is a schematic structural diagram of a power amplifier according to an embodiment of the disclosure. As shown in fig. 2, the power amplifier includes:
a demultiplexer 21, a control power amplifier 22, a balanced power amplifier 23, an output combiner 24, and an output impedance transformer 25; wherein the signal separator 21 is connected to the input of the control power amplifier and the input of the balanced power amplifier, respectively.
The control power amplifier 22 is a first doherty power amplifier and the balanced power amplifier 23 comprises the same second and third doherty amplifiers 231, 232.
The output combiner 24 comprises a first port 1, a second port 2, a third port 3 and a fourth port 4. The first port 1 and the second port 2 are respectively connected with the output ends of the second doherty power amplifier 231 and the third doherty power amplifier 232; the fourth port 4 is connected to the output of the first doherty power amplifier 22. The third port 3 serves as an output.
The fourth port 4 is an isolation port, and the impedance value of the fourth port 4 maintains a constant value Z 0 The method comprises the steps of carrying out a first treatment on the surface of the First port 1And the impedance value of the second port 2 is commonly modulated by the control power amplifier and the balanced power amplifier; the third port 3 impedance value maintains a constant Z 0 。
The output of the output combiner 24 is connected to an output impedance transformer 25, and the output impedance edge transformer 25 is used to transform the load impedance to match the output of the output combiner.
The input of the signal splitter 21 inputs the signal S (t) to be transmitted. The signal separator may separate the signal S (t) into two signals S (t 1) and S (t 2). The two signals S (t 1) and S (t 2) are respectively used as input signals for controlling the power amplifier 22 and the balanced power amplifier 23.
The signal separator 21 may be an analog separator. The analog splitter may employ wilkinson power dividers, bridges, couplers, etc. to simplify circuit complexity.
In some application scenarios, the signal separator 21 may be a digital separator. The digital separator dynamically adjusts the amplitude and the phase of the signals S (t 1) and S (t 2) through digital signal processing so as to achieve a better power amplifier modulation effect.
In the present disclosure, the first doherty power amplifier 22 is a wideband doherty power amplifier. The first doherty power amplifier 22 includes a first main power amplifier 221 and a first auxiliary power amplifier 222, where the first main power amplifier 221 is a class AB power amplifier (i.e., a bias voltage is set such that the first main power amplifier operates as a class AB power amplifier, also referred to as being biased in class AB), and the first auxiliary power amplifier 222 is a class C power amplifier (i.e., a bias voltage is set such that the first auxiliary power amplifier operates as a class C power amplifier, also referred to as being biased in class C). The load impedance of first doherty 22 is Z c The output current is I c 。
The load impedance of the second doherty power amplifier 231 in the balanced power amplifier 23 is Z a The output current is I a The method comprises the steps of carrying out a first treatment on the surface of the The load impedance of the third doherty power amplifier 232 is Z b The output current is I b 。
In some embodiments, the power amplifier further includes a first driving power amplifier 261 and a second driving power amplifier 262. The signal input ends of the first driving power amplifier 261 and the second driving power amplifier 262 are respectively connected with the output end of the signal separator 21, and the output end of the first driving power amplifier 261 is connected with the input end of the control power amplifier 22. The signal output of the second drive power amplifier is connected to the input of the balanced power amplifier 23.
The first driving power amplifier 261 and the second driving power amplifier 262 may amplify the signal S (t 1) and the signal S (t 2) before the signals are input to the control power amplifier and the balance power amplifier, respectively, so that the amplified signal S (t 1) may drive the control power amplifier, and the amplified signal S (t 2) may drive the balance power amplifier.
The second doherty power amplifier 231 and the third doherty power amplifier 232 may be identical doherty power amplifiers. The second doherty power amplifier 231 includes a second main power amplifier 2311 and a second auxiliary power amplifier 2312.
The third doherty power amplifier 232 includes a third main power amplifier 2321 and a third auxiliary power amplifier 2322.
The signal S (t) to be transmitted is input to the signal separator, and the signal separator can control the magnitudes of the first signal S (t 1) sent to the control power amplifier 22 and the second signal S (t 2) sent to the balanced power amplifier 23 according to the magnitude of the input signal S (t), and the first signal S (t 1) and the second signal S (t 2) control the first doherty working amplifier, the second doherty working amplifier and the third doherty working amplifier to be matched with each other, so that the power amplifier has a wider power backoff interval and a larger working efficiency when working. The signal separator controls the first signal S (t 1) and the second signal S (t 2) in response to the input signal S (t), and thus the first, second and third doherty power amplifiers, as described in detail with reference to the embodiment shown in fig. 4.
According to the power amplifier provided by the embodiment, the control power amplifier and the balance power amplifier in the load modulation balance power amplifier are realized by the doherty power amplifier, and the working states of the doherty power amplifiers are controlled, so that the power amplifier has a larger rollback interval and higher efficiency in the rollback interval, and the overall efficiency of the power amplifier is improved.
In some embodiments, the output combiner 25 is a bridge, wherein the output terminals of the second doherty power amplifier 231, the third doherty power amplifier 232, and the first doherty power amplifier 22 are connected to the first port, the second port, and the fourth port of the bridge, respectively; the third port of the bridge outputs a signal to the load.
Further, the bridge is a broadband 3dB bridge.
Referring to fig. 3, fig. 3 is a schematic diagram of an output combiner. As shown in fig. 3, the output combiner is a wideband 3dB bridge. The 3dB bridge is a common-frequency combiner that can continuously sample transmission power in a certain direction along a transmission line, dividing an input signal into two signals having equal amplitude and a phase difference of 90 ° with respect to each other. The broadband 3dB bridge has the characteristics of small insertion loss, high suppression, small in-band fluctuation, large isolation, large bearing power and small standing wave ratio.
The characteristic impedance Z0 of the bridge 24. The bridge 24 may include a first port 1, a second port 2, a third port 3, and a fourth port 4, where the first port 1 and the second port 2 are respectively connected to the output ends of the second doherty power amplifier and the third doherty power amplifier in the balanced power amplifier. The fourth port 4 is an isolation port, the fourth port 4 is connected with the output end of the control power amplifier, and the third port 3 is used as the output end.
The output current of the second doherty power amplifier and the output current of the third doherty amplifier are equal in magnitude and 90 ° out of phase.
The phase difference between the output current of the first doherty power amplifier and the output current of the second doherty amplifier is a constant value. The constant value is 90 degrees.
The scattering parameter matrix of the 3dB bridge is shown in the following formula (1):
setting the output current amplitude I of the second doherty power amplifier and the third doherty power amplifier a |＝|I b |＝I AB Controlling the output current of the power amplifierAmplitude I c |＝I C ，I c And I a The phase difference of phi isI b ＝-I AB 、I c ＝-jI C e jφ 。
The following formula can be derived from the 3dB scattering matrix formula:
Z c ＝Z 0 (3)；
Z l ＝Z 0 (4)；
therefore, the load impedance of the control power amplifier and the output impedance of the 3-port of the bridge are kept unchanged to be Z0 all the time, and the load impedance of the second doherty power amplifier and the load impedance of the third doherty power amplifier of the balanced power amplifier are equal. The load impedance of the second doherty power amplifier is related to the amplitude ratio and the phase difference of the control power amplifier current and the second doherty power amplifier current.
In order to make the Doherty combining point electrical impedance have only a real part, it is possible to setThen there is the following equation (5):
wherein,P A and P B The output powers of the second doherty power amplifier and the third doherty power amplifier in the balanced power amplifier are respectively, P C To control the output power of the power amplifier.
As can be seen from the formula (5), the load impedances of the second doherty power amplifier and the third doherty power amplifier can be adjusted by adjusting the ratio ρ of the output power of the balanced power amplifier to the output power of the control power amplifier.
Further, the output impedance transformer transforms the load impedance to Z 0 Matching a wideband 3dB bridge.
In these embodiments, by using the bridge as an output combiner, co-frequency combining with higher stability can be achieved.
Referring to fig. 4, a schematic flow chart of the power amplification method provided by the present disclosure is shown. The power amplification method is applied to the power amplifier shown in fig. 2 and various possible designs of the power amplifier. The power amplifier includes a control power amplifier and a balanced power amplifier. The control power amplifier includes a first doherty power amplifier including a first main power amplifier and a first auxiliary power amplifier; the balanced power amplifier comprises a second doherty power amplifier and a third doherty power amplifier; the second doherty power amplifier comprises a second main power amplifier and a second auxiliary power amplifier; the third doherty power amplifier comprises a third main power amplifier and a third auxiliary power amplifier. The detailed structure of the power amplifier can be referred to the embodiment shown in fig. 2.
As shown in fig. 4, the method comprises the steps of:
s401: the signal separator determines a target amplitude interval among a plurality of preset amplitude intervals according to the amplitude of the input signal, wherein the plurality of preset amplitude intervals comprise a first amplitude interval, a second amplitude interval, a third amplitude interval and a fourth amplitude interval which are distributed from small to large on a power axis.
S402: according to the target amplitude interval, the signal separator respectively controls the first signal sent to the control power amplifier and the second signal sent to the balance power amplifier, so that the control power amplifier and the balance power amplifier respectively work in working states corresponding to the target amplitude interval.
The preset amplitude intervals and the upper and lower limits of the preset amplitude intervals can be designed according to different requirements. The upper and lower limits of the preset amplitude interval are adjusted, for example, by selecting power amplifiers of different powers, or different bias voltages, impedance matching and signal separation methods.
The input signal may be a signal to be transmitted. The power amplitude of the input signal may be normalized to obtain a normalized input signal.
The following description is given with reference to fig. 2, 4 and 5. Fig. 5 is a schematic diagram of a power amplifier efficiency curve.
The signal S (t) may be split into a first signal S (t 1) and a second signal S (t 2) after passing through the signal splitter.
The signal separator herein may be a digital signal separator. The signal separator may adjust the magnitude and phase of the signal input to the power amplifier. For example, the first signal and the second signal are adjusted in magnitude and phase so that the first signal and the second signal cooperate with each other so that each power amplifier is at a high efficiency point, respectively.
In the present embodiment, the signal separator may generate the first signal S (t 1) and the second signal S (t 2) from the input signal S (t).
In some embodiments, the first signal is input to the signal input of the control power amplifier after passing through the first drive power amplifier. In these embodiments, the first signal is amplified after passing through the first drive power amplifier, which may provide better drive control of the power amplifier.
In some embodiments, the second signal is input to the input of the balanced power amplifier after passing through the second driving power amplifier. The second signal is amplified after passing through the second driving power amplifier, so that the balanced power amplifier can be driven better.
S (t) normalized input signal amplitude P in (normalized power) is 0 or more and 1 or less. In the present embodiment, the plurality of preset amplitude intervals includes a first amplitude interval (0, a]A second amplitude interval (a, b]A third amplitude interval (b, c]A fourth amplitude interval (c, 1]. Wherein the values of a, b, c may be determined by the output powers of the first, second, and third doherty power amplifiers in fig. 2 and the power split ratios of the respective main and auxiliary power amplifiers.
In some application scenarios, the amplitude of the input signal falls into a first amplitude interval. The step S402 includes: responding to the target amplitude interval as a first amplitude interval, and controlling a first main power amplifier of the power amplifier to work after a first signal is amplified by a first driving power amplifier by a signal separator; controlling the second signal to be zero, wherein the balanced power amplifier does not work; when the input signal is the upper limit of the first amplitude interval, the first signal is controlled to enable the first main power amplifier to enter a high-efficiency working state, and a first high-efficiency point is obtained.
When P in :0 to a; the signal separator controls the S (t 1) to drive and control the first main power amplifier of the power amplifier to work after being amplified by the first driving power amplifier; control s (t 2) =0, the balanced power amplifier is not working; when P in When the power amplifier is in the high-efficiency operation state, the first main power amplifier of the power amplifier is controlled to obtain a first high-efficiency point A.
In some application scenarios, the amplitude of the input signal falls into a second amplitude interval. The step S402 includes: responding to the target amplitude interval as the second amplitude interval, and controlling the value of the first signal by the signal separator to be the same as the value when the input signal is the upper limit of the first amplitude interval, so that the first main power amplifier works in a high-efficiency working state;
controlling the second signal to enable the second main power amplifier and the third main power amplifier to work, and controlling the second signal to enable the second main power amplifier and the third main power amplifier to enter a high-efficiency working state when the input signal is the upper limit of the second amplitude interval, so as to obtain a second high-efficiency point; wherein the power ratio of the output power of the balanced power amplifier to the output power of the control power amplifier is a first power ratio, and the load impedance of the second doherty power amplifier and the third doherty power amplifier connected to the first port and the second port of the output combiner (e.g., bridge) is modulated to a first impedance value.
When P in : a-b; the demultiplexer control S (t 1) is identical to the pin=a-duration, i.e. such that the first main power amplifier of the control power amplifier maintains a high efficiency operating state. Control S (t 2) via a second drive power amplificationThe second main power amplifier and the third main power amplifier of the balanced power amplifier are operated by the amplifier. When P in When=b, control S (t 2) makes the second main power amplifier and the third main power amplifier enter a high-efficiency operation state, to obtain a second high-efficiency point B. At a second high-efficiency working point, the ratio of the output power of the balanced power amplifier to the output power of the control power amplifier is a first power ratio; the load impedance of the second doherty power amplifier, the tri-doherty power amplifier connected to the bridge first port 1 and second port 2 is modulated by the control power amplifier to a first impedance value R1, the first power ratio ρ=k1.
In some application scenarios, the amplitude of the input signal falls into a third amplitude interval. The step S402 includes:
responding to the target amplitude interval as a third amplitude interval, and controlling the first signal by the signal separator to enable the first main power amplifier to work in a high-efficiency working state and enable the first auxiliary power amplifier to enter the working state;
controlling the second signal to enable the second main power amplifier and the third main power amplifier to work in a high-efficiency working state, enabling the second auxiliary power amplifier to enter the working state, and controlling the output power ratio of the balance power amplifier and the control power amplifier to be a first power ratio;
the first power ratio is the output power ratio of the balanced power amplifier and the control power amplifier when the power amplifier works at a second high-efficiency point when the input signal is the upper limit of the second amplitude interval;
when the input signal reaches the upper limit of the third amplitude interval, the first signal is controlled to make the first auxiliary power amplifier enter a saturated state (the power amplifier is controlled to enter the saturated state), and a third high efficiency point is obtained.
When P in : b-c; the signal separator simultaneously controls the first signal S (t 1) to make the first main power amplifier of the control power amplifier work in a high-efficiency working state, and the first auxiliary power amplifier work in a working state.
Controlling the second signal S (t 2) to make the second main of the balanced power amplifierThe power amplifier and the third main power amplifier enter a high-efficiency working state, and the second auxiliary power amplifier and the third auxiliary power amplifier enter a working state; and controlling the output power ratio of the balance power amplifier and the control power amplifier to be the first power ratio ρ=k1 unchanged. The load impedance of the second and third doherty power amplifiers is thus always R1. When P in When=c, the first auxiliary power amplifier enters a saturated state, resulting in a third high efficiency point C.
In some application scenarios, the amplitude of the input signal falls into a fourth amplitude interval. The step S402 includes:
responding to the target amplitude interval as a fourth amplitude interval, and controlling the value of the first signal by the signal separator to be the same as the value when the input signal is the upper limit of the third amplitude interval, so that the control power amplifier works at a third high-efficiency point;
controlling the second signal to enable the second auxiliary power amplifier and the third auxiliary power amplifier to work, and enabling the second output power ratio of the balanced power amplifier and the control power amplifier to be larger than the first output power ratio;
when the input signal is at the upper limit of the fourth interval, the second signal is controlled to enable the second doherty power amplifier and the third doherty power amplifier to enter a saturated state, and the power amplifier reaches the saturated state to obtain a fourth high-efficiency point; wherein the load impedance of the second doherty power amplifier and the third doherty power amplifier connected to one port and the second port of the output complex Lu Qidi is modulated to a second impedance value.
When P in : c-1; the signal separator controls the value of the first signal S (t 1) to be the same as the input signal pin=c, i.e. controls the power amplifier to operate in a saturated state, i.e. controls the power amplifier to operate at the third high efficiency point C; the second signal s (t 2) is controlled to operate the second auxiliary power amplifier and the third auxiliary power amplifier of the balanced power amplifier, and the second output power ratio of the balanced power amplifier and the controlled power amplifier is controlled to be ρ=k2, wherein k2 is larger than k1. When P in When=1, the second auxiliary power amplifier sumsAnd the third auxiliary power amplifier is put into a saturated state, and the whole power amplifier reaches the saturated state to obtain a fourth high-efficiency point D. The load impedance values of the second and third doherty power amplifiers are modulated to the second impedance values R2, R2<R1。
Further, an efficiency curve diagram of other types of power amplifiers is also shown in fig. 5. As shown in fig. 5, the efficiency curve 501 of the class AB amplifier can be seen, and the efficiency curve 503 of the 8dB asymmetric Doherty power amplifier with the lowest efficiency of the class AB power amplifier can be seen, where the conventional 8db_lmba and 8dB asymmetric Doherty power amplifier have equivalent power backoff intervals; the efficiency curve 504 of the power amplifier implemented by the high-back LMBA architecture has a wider power back-off interval, but the efficiency recess in the power back-off interval is larger, so the efficiency of the power amplifier implemented by the high-back LMBA architecture needs to be improved. The power amplifier (reference curve 505) provided by the present disclosure may have a plurality of high efficiency points (high efficiency points a, B, C, D) within the power backoff interval a-D, so that compared to a power amplifier implemented by the Gao Huitui LMBA architecture, the efficiency recess within the power backoff interval a-D is significantly improved. Therefore, the power amplifier provided by the disclosure can have higher overall efficiency.
The following describes a specific simulation result.
The high electron mobility transistor HEMT1 with the gallium nitride of 200W is used as a control power amplifier. According to 1:1 design (1:1 power amplifier has the characteristics of high input impedance and low output impedance), the combining point impedance is 10Ω, and the output power P is saturated sat ＝53dBm。
And selecting a second doherty power amplifier and a third doherty power amplifier for realizing balanced power amplification by using a gallium nitride high electron mobility transistor HEMT 2. Saturated output power P sat =57 dBm. Power ratio k1=2, r1=26Ω; k2 =3, r2=22Ω; the saturated output power psat=53 dBm of the second main power amplifier and the third power amplifier. Impedance modulation line characteristic impedance Z 2 =2×r1=52Ω. Saturated output power P of the second auxiliary power amplifier and the third auxiliary power amplifier sat 54.7dBm. Load impedance is 38Ω, fullAnd the combining point impedance is 22Ω.
As shown in the simulation curve of fig. 6, the power amplifier drain efficiency curve is retracted by 14dB, and the drain efficiency is greater than 60% in the retraction interval without obvious efficiency recess, so that the power amplifier drain efficiency curve has higher efficiency.
According to the power amplification method provided by the embodiment, the signal separator pair controls the working states of the doherty power amplifiers in the power amplifier shown in fig. 2, so that the power amplifier has a larger rollback interval and has higher efficiency in the rollback interval, and the overall efficiency of the power amplifier is improved.
The foregoing description is only of the preferred embodiments of the present disclosure and description of the principles of the technology being employed. It will be appreciated by persons skilled in the art that the scope of the disclosure referred to in this disclosure is not limited to the specific combinations of features described above, but also covers other embodiments which may be formed by any combination of features described above or equivalents thereof without departing from the spirit of the disclosure. Such as those described above, are mutually substituted with the technical features having similar functions disclosed in the present disclosure (but not limited thereto).
While several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are example forms of implementing the claims.
Claims (14)
1. A power amplifier, comprising: the device comprises a signal separator, a control power amplifier, a balance power amplifier, an output combiner and an output impedance converter; wherein,
the signal separator is respectively connected with the input end of the control power amplifier and the input end of the balance power amplifier;
the control power amplifier is a first doherty power amplifier, and the balanced power amplifier comprises a second doherty amplifier and a third doherty amplifier which are identical;
the output combiner comprises a first port, a second port, a third port and a fourth port; the first port and the second port are respectively connected with the output ends of the second doherty power amplifier and the third doherty power amplifier, and the fourth port is connected with the output end of the first doherty power amplifier; the third port is an output end;
the output end of the output combiner is connected with an output impedance converter, and the output impedance edge converter is used for converting load impedance and matching with the output end of the output combiner.
2. The power amplifier of claim 1, further comprising a first drive power amplifier and a second drive power amplifier, wherein,
the signal input ends of the first driving power amplifier and the second driving power amplifier are respectively connected with the output end of the signal separator, and the output end of the first driving power amplifier is connected with the input end of the control power amplifier;
and the signal output end of the second driving power amplifier is connected with the input end of the balance power amplifier.
3. The power amplifier of claim 1, wherein the output combiner is a bridge, wherein,
the output ends of the second doherty power amplifier, the third doherty power amplifier and the first doherty power amplifier are respectively connected with a first port, a second port and a fourth port of the bridge;
the third port of the bridge outputs a signal to a load.
4. The power amplifier of claim 1, wherein the first doherty power amplifier comprises a first main power amplifier, a first auxiliary power amplifier, wherein the first main power amplifier is a class AB power amplifier, and wherein the first auxiliary power amplifier is a class C power amplifier.
5. The power amplifier of claim 1, wherein the second doherty power amplifier comprises a second main power amplifier and a second auxiliary power amplifier;
the third doherty power amplifier comprises a third main power amplifier and a third auxiliary power amplifier.
6. A power amplifier according to claim 3, wherein the bridge is a broadband 3dB bridge.
7. The power amplifier of claim 6, wherein the output current of the second doherty power amplifier and the output current of the third doherty amplifier are equal in magnitude and 90 ° out of phase.
8. The power amplifier of claim 6, wherein a phase difference between the output current of the first doherty power amplifier and the output current of the second doherty amplifier is a constant value.
9. The power amplifier of claim 8, wherein the constant value is 90 degrees.
10. A power amplification method applied to the power amplifier of any one of claims 1-9, wherein the power amplifier comprises a control power amplifier and a balanced power amplifier, wherein the control power amplifier comprises a first doherty power amplifier, the balanced power amplifier comprises a second doherty power amplifier and a third doherty power amplifier, the first doherty power amplifier comprises a first main power amplifier and a first auxiliary power amplifier, the second doherty power amplifier comprises a second main power amplifier and a second auxiliary power amplifier, and the third doherty power amplifier comprises a third main power amplifier and a third auxiliary power amplifier, the method comprising:
the signal separator determines a target amplitude interval in a plurality of preset amplitude intervals according to the amplitude of an input signal, wherein the preset amplitude intervals comprise a first amplitude interval, a second amplitude interval, a third amplitude interval and a fourth amplitude interval which are distributed from small to large on a power axis;
according to the target amplitude interval, the signal separator respectively controls the magnitudes of a first signal sent to the control power amplifier and a second signal sent to the balance power amplifier, so that the control power amplifier and the balance power amplifier respectively work in working states corresponding to the target amplitude interval.
11. The method of claim 10, wherein the signal separator controls the magnitudes of the first signal sent to the control power amplifier and the second signal sent to the balanced power amplifier, respectively, according to the target amplitude interval, such that the control power amplifier and the balanced power amplifier operate in operating states corresponding to the target amplitude interval, respectively, comprising:
responding to the target amplitude interval as a first amplitude interval, and controlling a first main power amplifier of the power amplifier to work after a first signal is amplified by a first driving power amplifier by a signal separator; controlling the second signal to be zero, wherein the balanced power amplifier does not work; when the input signal is the upper limit of the first amplitude interval, the first signal is controlled to enable the first main power amplifier to enter a high-efficiency working state, and a first high-efficiency point is obtained.
12. The method of claim 10, wherein the signal separator controls the magnitudes of the first signal sent to the control power amplifier and the second signal sent to the balanced power amplifier, respectively, according to the target amplitude interval, such that the control power amplifier and the balanced power amplifier operate in operating states corresponding to the target amplitude interval, respectively, comprising:
responding to the target amplitude interval as the second amplitude interval, and controlling the value of the first signal by the signal separator to be the same as the value when the input signal is the upper limit of the first amplitude interval, so that the first main power amplifier works in a high-efficiency working state;
controlling the second signal to enable the second main power amplifier and the third main power amplifier to work, and controlling the second signal to enable the second main power amplifier and the third main power amplifier to enter a high-efficiency working state when the input signal is the upper limit of the second amplitude interval, so as to obtain a second high-efficiency point; wherein,
the power ratio of the output power of the balanced power amplifier to the output power of the control power amplifier is a first power ratio, and the load impedances of the second doherty power amplifier and the third doherty power amplifier connected to one port and the second port of the output junction Lu Qidi are modulated to a first impedance value.
13. The method of claim 10, wherein the signal separator controls the magnitudes of the first signal sent to the control power amplifier and the second signal sent to the balanced power amplifier, respectively, according to the target amplitude interval, such that the control power amplifier and the balanced power amplifier operate in operating states corresponding to the target amplitude interval, respectively, comprising:
responding to the target amplitude interval as a third amplitude interval, and controlling the first signal by the signal separator to enable the first main power amplifier to work in a high-efficiency working state and enable the first auxiliary power amplifier to enter the working state;
controlling the second signal to enable the second main power amplifier and the third main power amplifier to work in a high-efficiency working state, enabling the second auxiliary power amplifier and the third auxiliary power amplifier to enter into the working state, and controlling the output power ratio of the balance power amplifier and the control power amplifier to be a first power ratio;
wherein the first power ratio is the output power ratio of the balanced power amplifier and the control power amplifier when the power amplifier works at a second high-efficiency point when the input signal is the upper limit of the second amplitude interval;
when the input signal reaches the upper limit of the third amplitude interval, the first signal is controlled to enable the first auxiliary power amplifier to enter a saturated state, and a third high-efficiency point is obtained.
14. The method of claim 10, wherein the signal separator controls the magnitudes of the first signal sent to the control power amplifier and the second signal sent to the balanced power amplifier, respectively, according to the target amplitude interval, such that the control power amplifier and the balanced power amplifier operate in operating states corresponding to the target amplitude interval, respectively, comprising:
in response to the target amplitude interval being the fourth amplitude interval, the signal splitter controls the value of the first signal to be the same as the value when the input signal is the upper limit of the third amplitude interval, so that the control power amplifier works at a third high efficiency point,
controlling the second signal to enable the second auxiliary power amplifier and the third auxiliary power amplifier to work, and enabling the second output power ratio of the balanced power amplifier and the control power amplifier to be larger than the first output power ratio;
when the input signal is at the upper limit of the fourth interval, the second signal is controlled to enable the second doherty power amplifier and the third doherty power amplifier to enter a saturated state, and the power amplifier reaches the saturated state to obtain a fourth high-efficiency point; wherein,
the load impedance of the second doherty power amplifier and the third doherty power amplifier connected to one port and the second port of the output complex Lu Qidi is modulated to a second impedance value.
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