CN117374130A - GaN Schottky diode with two-dimensional material stacking terminal and preparation process - Google Patents

GaN Schottky diode with two-dimensional material stacking terminal and preparation process Download PDF

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CN117374130A
CN117374130A CN202311340292.9A CN202311340292A CN117374130A CN 117374130 A CN117374130 A CN 117374130A CN 202311340292 A CN202311340292 A CN 202311340292A CN 117374130 A CN117374130 A CN 117374130A
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dimensional material
gan
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top surface
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刘新科
蒋忠伟
黄烨莹
杨永凯
林锦沛
周杰
黎晓华
贺威
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Shenzhen University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H01L29/66143—Schottky diodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention provides a GaN Schottky diode with a two-dimensional material stacked terminal and a preparation process thereof, wherein the diode comprises a cathode layer, a substrate layer and n which are sequentially combined ‑ GaN layer, P-type two-dimensional material layer, h-BN (hexagonal boron nitride) layer and anode layer, n ‑ The side of keeping away from the substrate layer of GaN layer includes the top surface, connect in the slope mesa of the week side of top surface and connect in the annular bottom surface of the bottom side of slope mesa, and the edge area of P type two-dimensional material layer cover annular bottom surface, slope mesa and top surface, and h-BN layer combines in the side of keeping away from annular bottom surface of P type two-dimensional material layer, and the positive pole layer combines in the side of h-BN layer keeping away from P type two-dimensional material layer, and the P type two-dimensional material layer is located the part of slope mesa and top surface and the middle part region of top surface. The scheme can realize more outputThe reverse voltage-resistant performance of the color and the reverse leakage current level of the device are obviously reduced, so that stronger potential is provided for improving the performance of the device, and meanwhile, the long-term stability and reliability of the device are ensured.

Description

GaN Schottky diode with two-dimensional material stacking terminal and preparation process
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a GaN Schottky diode with a two-dimensional material stacking terminal and a preparation process thereof.
Background
GaN material is used as a typical third-generation semiconductor, and has been applied in the fields of high-frequency and high-power electronic devices, etc. by virtue of the advantages of large forbidden bandwidth, high electron saturation drift speed, high voltage resistance, small dielectric constant, etc. Vertical GaN-based power schottky diodes have become a popular research direction in recent years by virtue of many excellent properties such as high withstand voltage, high operating frequency, low on-resistance, and low reverse leakage current.
However, the existing vertical GaN schottky diode also has defects: the problem that the Schottky barrier is lowered and reverse leakage current occurs in a Schottky junction formed by contact of metal and a semiconductor under a high electric field, so that the starting voltage and the reverse leakage current of a diode are increased; and under the action of an external electric field, the diode can generate a fringe electric field aggregation phenomenon, so that the withstand voltage of the device is reduced, and the device is broken down in advance.
Disclosure of Invention
The technical aim of the invention is to provide a GaN Schottky diode with a two-dimensional material stacking terminal and a preparation process thereof, which can realize more excellent reverse voltage resistance and obviously reduce the reverse leakage current level of the device, provide more powerful potential for improving the performance of the device, and ensure the long-term stability and reliability of the device.
The invention aims to solve the technical problems thatIn one embodiment, a GaN Schottky diode with two-dimensional material stacked termination is provided comprising a cathode layer, a substrate layer, and n sequentially bonded - GaN layer, P-type two-dimensional material layer, h-BN layer and anode layer, said n - The side of GaN layer deviate from the substrate layer include the top surface, connect in the slope mesa of the week side of top surface and connect in the annular bottom surface of the bottom side of slope mesa, the P type two-dimensional material layer covers annular bottom surface the slope mesa and the marginal zone of top surface, h-BN layer combine in the one side of P type two-dimensional material layer deviate from annular bottom surface, the anode layer combine in h-BN layer deviate from one side of P type two-dimensional material layer the P type two-dimensional material layer is located slope mesa with the part of top surface and the middle part region of top surface.
Further, the substrate layer adopts a GaN single crystal substrate with the thickness of 300 mu m, si is used as a doping agent, and the doping concentration is 2-6 multiplied by 10 18 cm -3 。
Further, the n is - The GaN layer has a thickness of 40 μm and a doping concentration of 1 to 3×10 using Si as a dopant 16 cm -3 。
Further, the P-type two-dimensional material layer is a single layer or a plurality of layers, and one of tungsten diselenide, graphene, rhenium molybdenum sulfide and molybdenum niobium sulfide is adopted, and the doping concentration is 10 13 ～10 18 cm -3 。
Further, the included angle between the inclined table surface and the annular bottom surface is 40-60 degrees, and the thickness of the h-BN layer is 3-5nm.
Further, the cathode layer adopts Ti, al, ni and/or Au laminated structure, and the thickness is 25-80 nm;
the anode layer adopts a Ni or Au laminated structure, and the thickness is 20-60nm.
Further, a process for preparing a GaN schottky diode with a two-dimensional material stacked termination is provided, comprising the steps of:
preparing a substrate layer;
growing n on one side of the substrate layer - GaN layerRemoving the n - A part of material on one side of the GaN layer, which is away from the substrate layer, is formed into a structure with a top surface, an inclined table surface connected to the peripheral side of the top surface and an annular bottom surface connected to the bottom side of the inclined table surface;
at said n - Forming a P-type two-dimensional material layer covering the annular bottom surface, the inclined table top and the edge area of the top surface on one side of the GaN layer, which is away from the substrate layer;
forming an h-BN layer on one side of the P-type two-dimensional material layer, which is away from the annular bottom surface;
forming a layer on the substrate facing away from the n - And the cathode layer on one side of the GaN layer is combined with one side of the h-BN layer, which is away from the P-type two-dimensional material layer, the P-type two-dimensional material layer is positioned on the inclined table surface and the part of the top surface, and the anode layer is positioned in the middle area of the top surface.
Further, the substrate layer adopts a GaN single crystal substrate, and n is formed on one side of the substrate layer - The GaN layer includes: growing 40 mu m n on GaN monocrystal substrate by hydride gas phase epitaxy, molecular beam epitaxy or metal organic chemical vapor deposition - A GaN layer;
the removal of the n - The portion of material of the side of the GaN layer facing away from the substrate layer comprises: siO production by photolithography 2 Barrier layer, then with Cl 2 And performing variable-rate dry etching to form the inclined table top, wherein the inclination angle of the inclined table top is controlled within the range of 40-60 degrees.
Further, the forming step of the P-type two-dimensional material layer includes:
chemical vapor deposition is adopted in the n - The GaN layer is grown on the surface, or the two-dimensional material is transferred to the n by wet transfer - The GaN layer is combined with the n by an annealing process - The surface of the GaN layer;
and generating a barrier layer on the interface of the two-dimensional material by utilizing a photoetching process, and forming a hole in the middle of the two-dimensional material corresponding to the top surface by adopting dry etching.
Further, the forming of the h-BN layer includes:
and depositing a layer of h-BN on one side of the P-type two-dimensional material layer, which is far away from the annular bottom surface, by using a transfer method, and then carrying out an annealing process to strengthen the combination between the P-type two-dimensional material layer and the h-BN.
Compared with the prior art, the GaN Schottky diode with the two-dimensional material stacking terminal and the preparation process thereof have the beneficial effects that:
in this scheme, n - The GaN layer has an inclined mesa on its side facing away from the substrate layer, and n - And a P-type two-dimensional material layer and an h-BN layer are arranged between the GaN layer and the anode layer, the P-type two-dimensional material layer covers the annular bottom surface, the inclined table surface and the edge area of the top surface, and the h-BN layer is combined on one side, away from the annular bottom surface, of the P-type two-dimensional material layer. Under the condition of reverse bias, the P-type two-dimensional material layer and n-type two-dimensional material layer are utilized - The PN junction formed by the GaN layer effectively isolates reverse leakage current caused by the Schottky barrier from a high electric field, thereby realizing more excellent reverse voltage resistance. And secondly, by introducing the h-BN layer with high dielectric constant and adopting a terminal structure stacked by the P-type two-dimensional material layers, the reverse leakage current level of the device is further remarkably reduced, stronger potential is provided for improving the performance of the device, and meanwhile, the long-term stability and reliability of the device are ensured.
Drawings
Fig. 1 is a schematic diagram of the overall structure of a GaN schottky diode with two-dimensional material stack termination in an embodiment of the invention;
fig. 2 is a schematic flow chart of a process for manufacturing a GaN schottky diode with a two-dimensional material stack termination in an embodiment of the invention;
fig. 3 is a process diagram of step S200 in the fabrication process of a GaN schottky diode with a two-dimensional material stack termination according to an embodiment of the present invention;
fig. 4 is a second process schematic diagram of step S200 in the fabrication process of a GaN schottky diode with a two-dimensional material stack termination according to an embodiment of the present invention;
fig. 5 is a process diagram of step S300 in the fabrication process of a GaN schottky diode with a two-dimensional material stack termination according to an embodiment of the present invention;
fig. 6 is a second process schematic diagram of step S300 in the fabrication process of a GaN schottky diode with a two-dimensional material stack termination according to an embodiment of the present invention;
fig. 7 is a process schematic diagram of step S400 in the fabrication process of a GaN schottky diode with a two-dimensional material stack termination according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a process for forming a cathode layer in step S500 in a process for fabricating a GaN schottky diode with a two-dimensional material stack termination according to an embodiment of the present invention;
fig. 9 is a schematic view of an anode layer forming process in step S500 in a process for fabricating a GaN schottky diode with a two-dimensional material stack termination according to an embodiment of the invention.
In the drawings, each reference numeral denotes: 1. a cathode layer; 2. a substrate layer; 3. n is n - A GaN layer; 4. a P-type two-dimensional material layer; 5. h-BN layer; 6. an anode layer.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below are exemplary and intended to illustrate the present invention and should not be construed as limiting the invention, and all other embodiments, based on the embodiments of the present invention, which may be obtained by persons of ordinary skill in the art without inventive effort, are within the scope of the present invention.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "circumferential", "radial", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplify the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Referring to fig. 1, a GaN schottky diode with two-dimensional material stack termination is provided, comprising a cathode layer 1, a substrate layer 2, n, bonded in sequence - GaN layer 3, P-type two-dimensional material layer 4, h-BN (hexagonal boron nitride) layer 5 and anode layer 6, n - The side of GaN layer 3 facing away from substrate layer 2 includes the top surface, connect in the slope mesa of the week side of top surface and connect in the annular bottom surface of the bottom side of slope mesa, the edge region of P type two-dimensional material layer 4 cover annular bottom surface, slope mesa and top surface, h-BN layer 5 combines in the one side of the departure from annular bottom surface of P type two-dimensional material layer 4, anode layer 6 combines in the one side of h-BN layer 5 departure from P type two-dimensional material layer 4, the part that P type two-dimensional material layer 4 is located slope mesa and top surface, and the middle part region of top surface.
In this scheme, n - The GaN layer 3 has an inclined mesa on its side facing away from the substrate layer 2, and n - A P-type two-dimensional material layer 4 and an h-BN layer 5 are arranged between the GaN layer 3 and the anode layer 6, the P-type two-dimensional material layer 4 covers the annular bottom surface, the inclined table top and the edge area of the top surface, and the h-BN layer 5 is combined on one side, away from the annular bottom surface, of the P-type two-dimensional material layer 4. Under the condition of reverse bias, the P-type two-dimensional material layer 4 and the n are utilized - The PN junction formed by the GaN layer 3 effectively isolates reverse leakage current caused by the Schottky barrier from the high electric field, thereby realizing more excellent reverse withstand voltage performance. Second, by introducing the high dielectric constant h-BN layer 5 and stacking with the P-type two-dimensional material layer 4The structure further remarkably reduces the reverse leakage current level of the device, provides stronger potential for improving the performance of the device, and ensures the long-term stability and reliability of the device.
Further, the substrate layer 2 is a GaN single crystal substrate having a thickness of 300 to 400 μm, preferably 300 μm, and a doping concentration of 2 to 6×10 using Si as a dopant 18 cm -3 The doping concentration is preferably 5×10 18 cm -3 . In some implementations, the substrate layer 2 may also employ a SiC substrate or a Si substrate.
Further, n - The GaN layer 3 has a thickness of 30 to 50 μm, preferably 40 μm, and a doping concentration of 1 to 3×10 using Si as a dopant 16 cm -3 Preferably 2X 10 16 cm -3 。
Further, the P-type two-dimensional material layer 4 may be a single layer or multiple layers, and tungsten diselenide (WSe is used 2 ) Graphene, rhenium molybdenum sulfide (Mores 2 ) Molybdenum niobium sulfide (NbMoS) 2 ) One of them is required, the doping concentration is 10 13 ～10 18 cm -3 。
Further, the included angle between the inclined table top and the annular bottom surface is 40-60 degrees, and the thickness of the h-BN layer 5 is 3-5nm.
Further, the cathode layer 1 adopts a Ti, al, ni and/or Au laminated structure, the thickness is 25-80 nm, and when Ti, al, ni, au is adopted, the thicknesses are preferably 25nm, 100nm, 25nm and 80nm in sequence; the anode layer 6 has a laminated structure of Ni or Au, and the thickness is 20-60nm, and when Ni or Au is used, the thicknesses are preferably 20nm and 60nm in order.
The implementation of the GaN Schottky diode with the two-dimensional material stacking terminal through the scheme has the following advantages:
1. by using the P-type two-dimensional material and the h-BN stacked terminal structure, the Schottky diode can maintain low starting voltage, improve reverse breakdown voltage and reduce reverse leakage current.
2. The use of the inclined mesa structure relieves the phenomenon of electric field concentration around the anode and improves the withstand voltage of the device.
3. The thickness of the P-type two-dimensional material and the h-BN stacked terminal structure is only 5-7 nm, and more excellent performance can be obtained under the condition that the thickness of the power device is not affected.
In order to realize the structure of the GaN schottky diode with the two-dimensional material stacked terminal described above, in conjunction with fig. 2-9, this embodiment further provides a preparation method, which includes the following steps:
s100, preparing a substrate layer 2;
s200, growing and forming n on one side of the substrate layer 2 - GaN layer 3, remove n - A portion of the material on the side of the GaN layer 3 facing away from the substrate layer 2 forms a structure having a top surface, an inclined mesa connected to the peripheral side of the top surface, and an annular bottom surface connected to the bottom side of the inclined mesa;
s300, at n - A P-type two-dimensional material layer 4 covering the annular bottom surface, the inclined table top and the edge area of the top surface is formed on one side of the GaN layer 3 away from the substrate layer 2;
s400, forming an h-BN layer 5 on one side of the P-type two-dimensional material layer 4, which is far away from the annular bottom surface;
s500, forming a deviating part n positioned on the substrate layer 2 - The cathode layer 1 on one side of the GaN layer 3 forms an anode layer 6 bonded to one side of the h-BN layer 5 facing away from the P-type two-dimensional material layer 4, the portion of the P-type two-dimensional material layer 4 located at the inclined mesa and the top surface, and the middle region of the top surface.
Further, in step S100, a GaN single crystal substrate is used as the substrate layer 2, and the thickness is 300 μm.
Further, in step S200:
growing on one side of the substrate layer 2 to form n - The GaN layer 3 includes: growing 40 μm n on GaN single crystal substrate by Hydride Vapor Phase Epitaxy (HVPE), molecular Beam Epitaxy (MBE) or Metal Organic Chemical Vapor Deposition (MOCVD) - GaN layers 3, n - The GaN layer 3 has a thickness of 40 μm and a doping concentration of 1 to 3×10 16 cm -3 Preferably 2X 10 16 cm -3 ；
Removing n - The portion of material of the side of the GaN layer 3 facing away from the substrate layer 2 comprises: siO production by photolithography 2 Barrier layer, then usingCl 2 And performing variable-rate dry etching to form an inclined table top, wherein the inclination angle of the inclined table top is controlled within the range of 40-60 degrees. For example, n may be the first - Forming a photoresist layer on the surface of the GaN layer 3, and exposing and developing the photoresist layer on n - Forming a hollowed pattern in the middle area of the corresponding surface of the GaN layer 3, and depositing SiO in the area of the hollowed pattern 2 Barrier layer, reuse of Cl 2 Performing variable-rate dry etching to form an inclined table surface and an annular bottom surface, and removing SiO 2 A barrier layer. It should be understood that the manner in which the sloped mesa is formed is not limited to the above, so long as the sloped mesa and the annular bottom surface described above can be formed.
Further, in step S300, the forming step of the P-type two-dimensional material layer 4 includes:
using Chemical Vapour Deposition (CVD) at n - The surface of the GaN layer 3 grows to form a P-type two-dimensional material layer 4; or transfer of two-dimensional material to n using wet transfer - The GaN layer 3 is then bonded to n by an annealing process - The GaN layer 3 surface;
generating a barrier layer on the interface of the two-dimensional material by using a photoetching process, and forming a hole in the middle of the two-dimensional material corresponding to the top surface by adopting dry etching. Specifically, the barrier layer covers the area of the two-dimensional material interface on the side facing away from the annular bottom surface, the side facing away from the inclined table top and the edge facing away from the top surface, so that the two-dimensional material can be corresponding to the middle opening of the top surface during dry etching.
Further, the forming step of the h-BN layer 5 in step S400 includes:
and depositing a layer of h-BN on one side of the P-type two-dimensional material layer 4, which is far away from the annular bottom surface, by using a transfer method, and then carrying out an annealing process to strengthen the combination between the P-type two-dimensional material layer 4 and the h-BN, wherein the thickness of the h-BN layer 5 is about 5nm.
Further, in step S500:
the cathode layer 1 is prepared by the following steps: on GaN substrate layer 2 facing away from n - One side of the GaN layer 3 is vapor-deposited with metal film Ti/Al/Ni/Au of 25nm/100nm/25nm/60nm thickness by magnetron sputtering or electron beam vapor deposition, etc., and then annealed in nitrogen atmosphere for 60s at a temperatureThe degree was 800 ℃.
The anode layer 6 is prepared by the following steps: at n - One end of the GaN layer 3, where the P-type two-dimensional material layer 4 is arranged, is combined with a photolithography process, a metal film Ni/Au is evaporated by using a method such as magnetron sputtering, thermal evaporation or electron beam evaporation, the thickness of the metal film is respectively 20nm/60nm, then a stripping process is used for removing redundant metal films, the metal films cover one side of the h-BN layer 5, which is far away from the P-type two-dimensional material layer 4, the parts of the P-type two-dimensional material layer 4, which are positioned on the inclined table surface and the top surface, and n - The anode layer 6 is formed in the middle region of the top surface of the GaN layer 3.
Through the preparation process, the GaN Schottky diode with higher reverse voltage resistance, higher reliability and reduced reverse leakage current of the device can be prepared.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.

Claims (10)

1. A GaN Schottky diode with two-dimensional material stacking terminals is characterized by comprising a cathode layer, a substrate layer and n which are combined in sequence - GaN layer, P-type two-dimensional material layer, h-BN layer and anode layer, said n - The side of GaN layer deviate from the substrate layer include the top surface, connect in the slope mesa of the week side of top surface and connect in the annular bottom surface of the bottom side of slope mesa, the P type two-dimensional material layer covers annular bottom surface the slope mesa and the marginal zone of top surface, h-BN layer combine in the one side of P type two-dimensional material layer deviate from annular bottom surface, the anode layer combine in h-BN layer deviate from one side of P type two-dimensional material layer the P type two-dimensional material layer is located slope mesa with the part of top surface and the middle part region of top surface.
2. The GaN schottky diode with two dimensional material stack termination of claim 1 wherein the substrate layer is comprised ofThe GaN single crystal substrate with the thickness of 300 mu m is used, si is used as a doping agent, and the doping concentration is 2-6 multiplied by 10 18 cm -33 。
3. The GaN schottky diode with two dimensional material stack termination of claim 1 wherein n - The GaN layer has a thickness of 40 μm and is doped with Si at a concentration of generally 1 to 3×10 16 cm -3 。
4. The GaN schottky diode with two-dimensional material stack termination of claim 1 wherein the P-type two-dimensional material layer is single or multilayer with a thickness of 2-8 nm. One of tungsten diselenide, graphene, rhenium molybdenum sulfide and molybdenum niobium sulfide is adopted, and the doping concentration is 10 13 ～10 18 cm -3 。
5. The GaN schottky diode with two dimensional material stacked termination of claim 4 wherein the angle between the sloped mesa and the annular bottom surface is between 40 ° and 60 °, the h-BN layer having a thickness of 3-5nm.
6. The GaN schottky diode with two-dimensional material stacked termination of claim 5 wherein the cathode layer is a Ti, al, ni and/or Au stack with a thickness of 25-80 nm;
the anode layer adopts a Ni or Au laminated structure, and the thickness is 20-60nm.
7. The preparation process of the GaN Schottky diode with the two-dimensional material stacking terminal is characterized by comprising the following steps of:
preparing a substrate layer;
growing n on one side of the substrate layer - A GaN layer, removing the n - A part of material on one side of the GaN layer facing away from the substrate layer, forming an inclined mesa with a top surface, a peripheral side connected to the top surface, and a bottom side connected to the inclined mesaIs a ring-shaped bottom surface structure;
at said n - Forming a P-type two-dimensional material layer covering the annular bottom surface, the inclined table top and the edge area of the top surface on one side of the GaN layer, which is away from the substrate layer;
forming an h-BN layer on one side of the P-type two-dimensional material layer, which is away from the annular bottom surface;
forming a layer on the substrate facing away from the n - And the cathode layer on one side of the GaN layer is combined with one side of the h-BN layer, which is away from the P-type two-dimensional material layer, the P-type two-dimensional material layer is positioned on the inclined table surface and the part of the top surface, and the anode layer is positioned in the middle area of the top surface.
8. The process of claim 7, wherein the substrate layer is a GaN single crystal substrate, and n is formed on one side of the substrate layer - The GaN layer includes: growing 40 mu m n on GaN monocrystal substrate by hydride gas phase epitaxy, molecular beam epitaxy or metal organic chemical vapor deposition - A GaN layer;
the removal of the n - The portion of material of the side of the GaN layer facing away from the substrate layer comprises: manufacturing SiO on n-GaN by photoetching process 2 Barrier layer, then with Cl 2 And performing variable-rate dry etching to form the inclined table top, wherein the inclination angle of the inclined table top is controlled within the range of 40-60 degrees.
9. The process of claim 7, wherein the forming the P-type two-dimensional material layer comprises:
chemical vapor deposition is adopted in the n - The GaN layer is grown on the surface, or the two-dimensional material is transferred to the n by wet transfer - The GaN layer is combined with the n by an annealing process - The surface of the GaN layer;
and generating a barrier layer on the interface of the two-dimensional material by utilizing a photoetching process, and forming a hole in the middle of the two-dimensional material corresponding to the top surface by adopting dry etching.
10. The process of claim 7, wherein the h-BN layer forming step comprises:
and depositing a layer of h-BN on one side of the P-type two-dimensional material layer, which is far away from the annular bottom surface, by using a transfer method, and then carrying out an annealing process to strengthen the combination between the P-type two-dimensional material layer and the h-BN.
CN202311340292.9A 2023-10-17 2023-10-17 GaN Schottky diode with two-dimensional material stacking terminal and preparation process Pending CN117374130A (en)

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