CN117374004A

CN117374004A - Interconnection structure manufacturing method based on metal powder filling

Info

Publication number: CN117374004A
Application number: CN202311375429.4A
Authority: CN
Inventors: 凌必赟; 夏彧虎; 吴亚明; 蔡敏力; 王潇悦
Original assignee: Shanghai Institute of Microsystem and Information Technology of CAS
Current assignee: Shanghai Institute of Microsystem and Information Technology of CAS
Priority date: 2023-10-23
Filing date: 2023-10-23
Publication date: 2024-01-09

Abstract

The invention provides a method for manufacturing an interconnection structure based on metal powder filling, which comprises the following steps: providing a substrate, wherein a cavity for manufacturing an interconnection structure is formed in the substrate; filling metal powder in the cavity; the metal powder is solidified into conductive pillars to form an interconnect structure. By adopting the method, the difficulty in filling the TSV through hole can be greatly reduced, the filling time is shortened, and the process cost is reduced; and the problem of cavity and the like generated based on filling of the metal powder pore structure can be effectively solved, and the filling quality is optimized. Compared with the low-resistance silicon TSV, the conductive column prepared by the method is high in conductivity, suitable for application scenes requiring low on-resistance of the TSV, and capable of expanding application scenes of TSV technology; compared with filling TSV by liquid alloy pouring, the surface polishing amount of the vertical hole of the wafer after filling is greatly reduced, and the process cost is reduced. The method is particularly easy to manufacture the thick-substrate TSV substrate with higher reliability, avoids the limitation of the existing filling technology, and expands the application scene.

Description

Interconnection structure manufacturing method based on metal powder filling

Technical Field

The invention belongs to the technical field of semiconductors such as MEMS (micro-electromechanical systems), integrated circuit manufacturing and semiconductor packaging, and particularly relates to a manufacturing method of an interconnection structure based on metal powder filling.

Background

Good electrical conductivity of the electrical interconnect is a critical and essential requirement in the front-end of the chip fabrication process and in the semiconductor packaging process. Electrical interconnects in the semiconductor industry include chips, horizontal wiring electrical interconnects within a substrate, and various electrical interconnect schemes such as Wire bonding (Wire bonding) of the chip to the substrate, flip-chip bonding (Flip-chip bonding), and the like. With the development of electrical interconnection technology, the application of the vertical lead electrical interconnection method is becoming more and more widespread, and the vertical lead electrical interconnection method is widely applied to the multilayer interconnection inside chips and packaging substrates at present. The high-density chip has the remarkable advantages of short interconnection distance, small distributed capacitance, low on-resistance and the like, and greatly promotes the development of high-density chips and advanced packaging technology.

Through silicon via (Through silicon via, abbreviated as TSV) technology, a vertical through wafer electrical interconnect technology, is a key technology for high-density 3D chip, high-density advanced packaging. The technology has the advantages of high integration level, low interconnection resistance, low electric signal delay and the like, becomes a hot spot technology of the semiconductor industry, and is widely applied to application scenes such as multi-layer high-density memory chips, high-density back-illuminated image sensor chips, wafer level packaging, vertical heterogeneous integration, system level packaging transfer substrates (intersers), array MEMS devices and the like. On the basis of TSV technology, glass via (Through glass via, TGV) technology has also been developed, which is mainly used in the interposer substrate of radio frequency devices.

The manufacturing process of TSV/TGV comprises the processes of through hole structure etching, insulating layer/adhesion layer deposition, through hole filling, subsequent wafer surface polishing and the like. Wherein, the filling of the through hole is the process with the greatest technical difficulty and highest cost. The aperture of the TSV/TGV via varies from several microns to hundreds of microns, and the depth of the via varies from tens of microns to hundreds of microns. The current mainstream via metal filling process is completed by Cu electroplating technology. The process comprises the following steps: (1) Electroplating seed layer deposition, typically by sputtering or evaporation; (2) Cu electroplating and depositing, namely immersing a wafer in electroplating liquid based on an electroplating principle, applying current to the seed layer pattern, and depositing metal Cu based on electrochemical reaction; (3) The wafer surface is polished by metal polishing, typically by chemical mechanical polishing (Chemical mechanical polishing, CMP) to remove superfluous metal Cu from the surface; (4) The plating seed layer is removed, i.e., the plating seed layer remaining in the non-plating area is removed by a dry or wet process. The electroplating manufacturing process has the defects of complex process, easy occurrence of electroplating defects (such as holes), low electroplating filling speed, high electroplating cost, dependence and importation of electroplating liquid, high toxicity of the electroplating liquid, strict depth-to-width ratio limitation of a filling hole structure and the like for filling the deep through holes, and also needs a large amount of metal Cu polishing process. Therefore, the electroplated filled through holes are only suitable for TSV manufacture with the depth of about 50-175 μm at present, and are mainly used for high-density chip manufacture.

Besides the electroplating filling through hole technology, the Silex company adopts etching low-resistance silicon columns and filling insulating medium in an etching annular structure to manufacture low-resistance silicon TSVs, and the resistivity of the low-resistance silicon TSVs can be less than 0.01Ω & cm but is compared with that of metal (such as Cu resistivity is 1.7X10) ^-6 Omega cm) still have a gap of several orders of magnitude, limiting the application scenarios thereof. In addition, the liquid Zn-Al alloy is adopted to fill the vertical through hole structure by one company at home, the resistivity of the conductive column is 6.3 mu omega cm, and the method is a novel through hole filling technology, but has the following defects: (1) The surface of the wafer has a thick metal layer which is tens of micrometers remained after filling, and high-cost polishing treatment is needed; (2) The removal rate difference of the insulating layer and the metal is large in the polishing treatment process, a deeper butterfly-shaped pit structure is easy to form on the surface of the filled metal of the through hole structure, the subsequent application is seriously influenced, and aiming at the problem, special polishing solution and polishing process need to be developed; (3) A specially developed liquid metal via filling apparatus and a special via filling jig (such as a nozzle plate for liquid alloy pouring) are required.

In summary, the existing TSV via filling technologies respectively have shortcomings, which make it difficult to manufacture high-quality low-resistance TSVs, complex process, and high cost, and especially difficult to apply to thick substrate TSVs of MEMS technology and 2.5D advanced packaging technology. Therefore, developing a TSV via filling technology with high quality, fast manufacturing speed, simple process and low cost becomes a problem to be solved urgently, and has wide application prospects in high-density chip manufacturing, MEMS technology and 2.5D advanced packaging technology.

It should be noted that the foregoing description of the background art is only for the purpose of facilitating a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background section of the present application.

Disclosure of Invention

In order to solve the problems in the prior art, the invention provides a manufacturing method of an interconnection structure based on metal powder filling. The invention does not adopt an electroplating filling process, can avoid the process limitation caused by the electroplating filling process, can reduce the difficulty and complexity of the TSV through hole filling process, can improve the TSV through hole filling quality, and can greatly reduce the manufacturing cost.

To achieve the above and other related objects, the present invention provides a method for manufacturing an interconnect structure based on metal powder filling, comprising the steps of:

providing a substrate, wherein a cavity for manufacturing an interconnection structure is formed in the substrate;

filling metal powder in the cavity;

the metal powder is solidified into conductive pillars to form an interconnect structure.

Optionally, the cavity comprises a vertical hole and/or a slot; when the interconnect structure is a damascene structure including vertical holes and trenches, metal powder filling and curing are performed simultaneously for the vertical holes and trenches of the damascene structure.

Optionally, after filling the cavity with the metal powder, the method further comprises a step of compacting the metal powder.

Optionally, the vertical holes are through holes and/or blind holes, and when the vertical holes are through holes, the substrate is placed on the gasket in the process of filling metal powder, and the gasket is removed and then solidified after the metal powder compacting treatment is completed.

Optionally, the method of compacting treatment comprises compaction and/or compaction.

Optionally, the method of solidifying the metal powder includes several of metal melting, metal powder sintering, and metal powder alloying.

Optionally, the interconnect structure manufacturing method includes the step of filling metal powder and then compacting the metal powder more than twice.

Optionally, the method of manufacturing the interconnect structure includes the steps of filling metal powder and then solidifying more than two times.

Optionally, before filling the metal powder, the method further comprises the step of forming an adhesion layer on the inner side surface of the cavity.

In a further alternative example, the adhesion layer includes a polysilicon layer and/or a metallic conductive layer.

Optionally, the metal powder is solidified, and then the substrate is thinned to enable the two ends of the conductive posts to be completely exposed on the surface of the substrate.

Optionally, the substrate comprises one of a silicon wafer, a glass wafer, and a ceramic wafer.

Alternatively, the thickness of the substrate is 200 μm to 1000 μm.

Optionally, the material of the metal powder includes a plurality of Au, ag, cu, sn, al and Ni.

Alternatively, the particle size of the metal powder is 50nm to 5000nm.

Alternatively, the resistance of the prepared conductive column is 0.001 to 10Ω.

Optionally, the filled metal powder comprises more than 2 different particle sizes.

Optionally, the atmosphere in which the metal powder is cured includes one of a vacuum, an inert gas atmosphere, and a reducing atmosphere.

Optionally, the method of filling the metal powder includes dry and/or first mixing the metal powder with a liquid, then filling the cavity in a wet process, and then evaporating the liquid by heating to remove the liquid.

Alternatively, the interconnect structure manufacturing method includes the steps of bonding the plurality of substrates after filling metal powder in the cavities of the plurality of substrates, and curing the metal powder filled in the plurality of substrates while manufacturing the interconnect structure in the plurality of substrates, thereby obtaining the interconnect structure having the multilayer wiring.

As described above, the metal powder filling-based interconnect structure manufacturing method of the present invention has the following advantageous effects:

(1) The interconnection structure comprising the TSV through holes is manufactured by adopting a metal powder filling and curing mode, and the interconnection structure can be subjected to blade coating filling, wiping to remove redundant metal powder or other simple modes, so that the interconnection structure can be mechanically and automatically operated or manually operated; and can be filled by combining metal powder with 2 to 3 different particle sizes, so that the problems of cavity and the like generated by filling based on a metal powder pore structure are effectively solved, and the filling quality is optimized;

(2) Compared with the low-resistance silicon TSV, the prepared conductive column is high in conductivity, is suitable for application scenes requiring low on-resistance of the TSV, and expands the application scenes of TSV technology; compared with filling TSV by liquid alloy pouring, the surface polishing amount of the vertical hole of the wafer is greatly reduced after filling, and the process cost is reduced;

(3) According to the invention, the TSV hole structure is filled with metal powder, the filling process is not limited by the aspect ratio of the TSV hole structure, and the thick substrate TSV substrate with higher reliability is particularly easy to manufacture, so that the limitation of the existing filling technology is avoided, and the application scene is expanded.

Drawings

Fig. 1 shows an illustrative flow chart of a method for manufacturing an interconnect structure based on metal powder filling provided by the invention.

Fig. 2 shows another exemplary flow chart of a method for manufacturing an interconnect structure based on metal powder filling provided by the present invention.

Fig. 3 to 5 are schematic cross-sectional views illustrating the fabrication of different interconnect structures according to the interconnect structure fabrication method provided by the present invention.

Detailed Description

Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. As described in detail in the embodiments of the present invention, the cross-sectional view of the device structure is not partially enlarged to a general scale for convenience of explanation, and the schematic drawings are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.

For ease of description, spatially relative terms such as "under", "below", "beneath", "above", "upper" and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Furthermore, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening layers may also be present.

In the context of this application, a structure described as a first feature being "on" a second feature may include embodiments where the first and second features are formed in direct contact, as well as embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the illustration, rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex. In order to make the illustration as concise as possible, not all structures are labeled in the drawings.

As shown in fig. 1, the present invention provides a method for manufacturing an interconnection structure based on metal powder filling, which includes the steps of:

s1: providing a substrate, wherein a cavity for manufacturing an interconnection structure is formed in the substrate;

s2: filling metal powder in the cavity;

s3: the metal powder is solidified into conductive pillars to form an interconnect structure.

The present embodiment is suitable for manufacturing various types of interconnection structures with various purposes, and thus the material of the substrate is selected according to different requirements. For example, if the interposer is used in the fabrication of back-end packaging, such as in the fabrication of TSV vias, the substrate may be a semiconductor substrate such as a silicon wafer. In another example, the substrate may be an insulating substrate such as a glass wafer or a ceramic wafer. When the substrate is a silicon wafer, the surface of the silicon wafer may be covered with an insulating layer, for example, the insulating layer is a silicon oxide layer formed by a thermal oxidation process. Of course, the present embodiment is equally applicable to the fabrication of interconnect structures in the front-end-of-chip process, except to ensure that the existing structures in the substrate are able to withstand the high temperatures of the subsequent metal powder curing process. The method of forming the cavity in the substrate varies according to the application. For example, where the substrate is a silicon wafer, a cavity may be formed in the substrate using processes including, but not limited to, photolithography and etching. If the substrate is a ceramic wafer, the cavity may be formed by means including, but not limited to, laser drilling or mechanical drilling.

In a preferred example, the substrate has a thickness of 200 μm to 1000 μm. When conventional electroplating and/or chemical vapor deposition processes are used to fabricate interconnect holes in such thick substrates, such as TSV vias in such thick silicon wafers, filling defects such as holes are easily present during metal filling. The invention can effectively solve the problem of poor filling such as holes during filling, so the invention is especially suitable for preparing the interconnection structure with high aspect ratio on a thick substrate.

In some examples, the interconnect structures to be fabricated are Contact/Via(s) that electrically connect different conductive structures, then the cavity is a number of vertical holes. The vertical hole may be a blind hole (i.e., the bottom of the hole is not penetrated), may be a through hole (i.e., the bottom of the hole is penetrated), or may include both a blind hole and a through hole. When the vertical hole includes a through hole, the substrate is placed on the pad during filling of the metal powder into the vertical hole, so as to prevent the metal powder from falling from the bottom of the through hole, and the pad is removed and solidified after the compaction of the metal powder is completed. The pad may be, for example, a wafer of the same material as the substrate, or the pad may be a metal carrier from which the substrate is removed after compaction and/or compaction of the metal powder is completed.

In a further example, in the case that the cavity is a vertical hole, an adhesion layer may be formed on the sidewall of the vertical hole structure first to increase the bonding strength between the solidified metal powder and the sidewall of the vertical hole structure. The adhesion layer may be a single layer of material or a composite structure layer, such as a polysilicon layer and/or a metallic conductive layer. For example, in some examples, the adhesion layer is selected from a titanium layer or a titanium nitride layer. In other examples, the adhesion layer is a polysilicon layer, and the deposited polysilicon layer and the subsequently filled metal powder can form a metal-silicon alloy during high temperature curing, which helps to improve interface performance and resistance of the conductive pillars, and enhance adhesion of the metal powder to the sidewalls. In the prior art, a polysilicon layer is not generally used as a sidewall adhesion layer of the contact hole, and because a metal layer is filled inside the polysilicon adhesion layer by adopting a traditional electroplating or vapor deposition process, poor interlayer contact is easy to generate, so that the resistance of the contact hole is increased. The method for manufacturing the adhesive layer can be one or more of sputtering, evaporation, chemical vapor deposition and atomic beam deposition, and can be preferentially selected according to the material and structure of the adhesive layer, and the adhesive layer is not particularly limited.

In other examples, the cavity may be a non-vertical hole, but a hole at an oblique angle (e.g., between 80 ° and 90 °). It should be noted that the inclination angle may be intentionally prepared, and may be more likely to be caused by process deviation such as photolithography and etching. The interconnection hole structure with the inclined angle is difficult to realize good filling by adopting a traditional chemical vapor deposition method, and filling defects such as holes and the like are extremely easy to occur. With the invention, the manufacture of the contact hole with the inclined angle is possible. This can meet the fabrication requirements of a diverse array of interconnect structures.

In some examples, the interconnect structure to be fabricated is a planar wiring layer, and the cavity is a slot. And more specifically, a horizontally extending slot, i.e., a cavity, with at least one surface open.

In other examples, the interconnect structure is a damascene structure including vertical holes and slots extending in a horizontal direction. When the method is used for manufacturing the damascene interconnection structure, the vertical holes and the grooves of the damascene structure are filled and solidified with metal powder synchronously, so that the vertical wiring and the horizontal wiring of the damascene interconnection structure are realized synchronously, the manufacturing process of the damascene interconnection structure can be greatly simplified, and the production cost is reduced. For example, in fabricating a interposer substrate, rewiring is performed on both the top and bottom surfaces of the TSV substrate, and damascene processing is an effective method of metal routing by embedding the wire into a stripe-shaped trench below the surface of the TSV wafer. Electroplating technology is commonly used in the prior art to fill the conductive trenches. When the transfer substrate with the Damascus wiring is manufactured by adopting the method, the vertical through holes and the conductive grooves of the Damascus process are simultaneously processed on the monocrystalline silicon substrate, the filling and curing technology of metal powder is synchronously carried out in the vertical through holes and the horizontal conductive grooves, and the metal powder filling and curing of the vertical hole structure and the conductive grooves are simultaneously completed by one-step processing, so that the transfer substrate is manufactured. In addition, the invention can also be used for manufacturing the multilayer wiring structure on the upper surface and the lower surface of the transfer substrate.

To ensure that the metal powder completely fills the cavity, in some examples, metal powders of different particle sizes are used for filling. That is, the filled metal powder comprises a mixture of two or more, preferably 2-3, metal powders of different particle sizes. The powder proportion with different particle sizes is optimally selected so as to achieve higher metal powder filling density. In other examples, after filling the cavity with the metal powder, the method further includes the step of compacting the metal powder to increase the packing density of the filled metal powder. Methods of densification include, but are not limited to, compaction and/or jolt ramming. Specifically, the method for compacting the metal powder is that a wafer filled with the metal powder is placed on a vibrating table, the vibration frequency and the vibration amplitude of the vibrating table are adjusted according to a certain flow, so that the vibration acceleration is sequentially adjusted from small to large, and in the process, the metal powder filled in the cavity is mutually collided and extruded to realize compaction. Since the height of the filled metal powder relative to the wafer surface will decrease after tapping, the powder can be refilled and tapped again after tapping. According to the actual situation, filling and compaction can be carried out for 2-3 times. Compacting the metal powder can place the wafer filled with the metal powder on a centrifuge, and the vertical holes filled with the metal powder are placed in the radial direction, and the metal powder is compacted under the action of increasing acceleration as the rotation speed of the centrifuge is from low to high. Likewise, 2-3 fills, compactions may be performed until a satisfactory fill is obtained. Also in the preferred example, when the metal powder is filled a plurality of times, the particle size of the metal powder to be filled later is preferably smaller than that of the metal powder to be filled earlier, which will contribute to the improvement in the packing density of the metal powder. Alternatively, the compaction and compaction operations of the filling powder may be alternated to obtain an optimal filling density. In other examples, compaction of the metal powder may also be achieved by pressing the filled powder with an external tool. However, the compaction by vibration or rotation can effectively avoid damage to the substrate.

In other examples, the base may be bonded to an auxiliary substrate having structures thereon that correspond to and communicate with the cavities on the base, prior to filling with the metal powder. After the metal powder fills the cavities in the base and auxiliary substrate and compacts, the auxiliary substrate is removed. The method can minimize the diffusion of metal powder around the non-filling area of the substrate, ensure that the required height can be achieved by single filling in the substrate, and achieve the purpose of checking the filling quality in the process of removing the auxiliary substrate. In other examples, the presence or absence of voids in the filled metal powder may be detected by optical means.

In the preferred embodiment of the present invention, more than 2 different particle sizes of metal powder are selected for filling, and the compaction and/or compaction operations are combined to ensure that the metal powder completely fills the cavity.

As an example, the method of filling the cavity with the metal powder may be a dry method and/or a wet method. For example, in some examples, if the cavity is a vertical hole, a dry process is used to fill the metal powder into the vertical hole structure. For example, in the dry process filling, the micro-nano metal powder in the form of dry particles is scraped into or rubbed into the vertical holes by a silica gel scraper, sponge, dust-free cloth, etc., or the metal powder is vibrated into the vertical holes by vibration of a proper amplitude. After the vertical holes are filled, the superfluous metal powder on the surface of the substrate is wiped clean. After multiple fills, taps or compacts, the metal powder adhered to other areas of the substrate surface is wiped clean.

In other examples, the metal powder is mixed with the liquid prior to filling the vertical hole structure, the metal powder is filled into the vertical hole structure in a wet process, and the liquid is removed by evaporation with heating. The wet process comprises mixing metal powder and liquid (such as organic solvent) with certain viscosity to obtain flowable slurry, scraping the slurry into vertical holes by a silica gel scraper, and heating to evaporate to remove the liquid. Metal powder compaction or compaction operations may be added as desired. The liquid is filled, evaporated or decomposed multiple times until a satisfactory metal powder packing density is obtained. And after the vertical hole is filled by a wet method, the superfluous metal powder on the surface of the substrate is wiped off. Note that the wet filling in this embodiment is applicable to any metal powder and is not limited to noble metals such as silver. In a preferred example, copper powder is selected as the filler metal powder.

In other examples, dry filling may be performed before wet filling, and the liquid during wet filling may penetrate downward to accelerate compaction of the metal powder.

As an example, the filled metal powder may be a metal simple substance powder having good conductivity, or may be a metal mixed powder. Because it is difficult to avoid spilling metal powder onto the non-cavity surfaces of the substrate during the filling process, the residual metal powder on the substrate surface is typically removed prior to curing to avoid solidification of the excess metal powder with the metal powder in the cavity during the curing process. The cleaning method is, for example, scraping with a scraper or wiping with a dust-free cloth.

The metal powder is a metal with good electric conduction, preferably Au, ag, cu, sn, al, ni, or a mixed powder of the above metals, and the particle size of the metal powder is preferably 50nm to 5000nm. The above-mentioned mixed powder of metals may be a mixture of powders of two or more different metals, or a mixture of powders of the same metal and different particle diameters, or a mixture of powders of different metals having different particle diameters. The mixed metal powder may be sintered to a metal alloy, e.g., cu powder mixed with Sn powder, and sintered in the liquid phase to form stable Cu ₃ The Sn eutectic phase has good conductivity and a melting point significantly higher than that of Sn. When metal powders with different materials and/or different particle sizes are selected, the particle size ratio and/or the mass ratio of the different metal powders are optimally configured, so that the conductivity of the finally prepared conductive column is improved, and the eutectic performance is optimized. The inventors have proved through a number of experiments that when copper powder and tin powder are used, the preferred mass ratio of the copper powder to the tin powder is copper: tin=4:1, and the conductive column obtained by curing has the advantages of high density, good conductivity and the like.

In other examples, the method of solidifying the metal powder may be metal melting and metal powder alloying, or a combination of methods, in addition to metal powder sintering, but one method is generally used.

As an example, the curing of the metal powder is performed under a curing atmosphere, such as one of vacuum, inert gas, reducing atmosphere, to avoid oxidation of the metal, thereby obtaining a filled conductive column with good conductivity. For example, when filling with metal powder such as Au or Ag, the curing atmosphere is vacuum or inert gas. When the metal powder or mixed powder such as Cu, sn, al, ni is used, the curing atmosphere is preferably a reducing atmosphere, and the reducing atmosphere is preferably nitrogen gas and formic acid. In a further alternative, the reducing atmosphere may also be one of formic acid, hydrogen, a mixture of hydrogen and nitrogen, carbon monoxide, a mixture of carbon monoxide and nitrogen. The type, concentration and flow of the reducing gas are determined according to the specific sintering process, and the metal can be prevented from being oxidized in the sintering process. Since it is difficult to ensure a completely oxygen-free atmosphere in most process equipment, a certain amount of reducing gas is preferably introduced during the solidification of the metal powder to avoid oxidation of the metal.

Preferably, the conductive resistance of the conductive column prepared in this embodiment can be reduced to 0.001 to 10Ω. The resistance of the conductive column is closely related to the diameter and the height of the conductive column, and the resistivity of the conductive column prepared by the method can be close to or reach the resistivity of metal.

As an example, the cross-section of the prepared conductive column is in a closed pattern, preferably in a cylindrical or square column structure.

Because of the difference of loose density, the height of the conductive posts formed by melting the metal powder after solidification may be lower than the height of the original filled metal powder, so that when the formed conductive posts are not completely exposed (i.e. are not exposed on the surface of the substrate) after solidification of the metal powder, the substrate can be thinned, for example, the filling surface of the substrate is polished, so that the prepared conductive posts are completely exposed (i.e. are exposed on the surface of the substrate). Or can be filled and solidified for a plurality of times until the finally prepared conductive column is completely exposed. If the two ends of the conductive column to be prepared are required to be exposed on the surface of the substrate, and the cavity which is initially prepared is a blind hole, the two sides of the substrate can be polished to expose the two ends of the conductive column. Of course, the polishing process is not necessary if the compactness of the filled metal powder is ensured so that the height of the conductive pillars formed after curing is not significantly reduced from the original filling height. Also in some examples, during high temperature curing, the metal powder may reflow to form a concave top surface, which is rather well suited for electrical connection to other external conductive structures, such as external solder balls, and thus may not be polished in this case as well.

The invention can be used for manufacturing the conductive interconnection structure of the single-layer substrate and also can be used for manufacturing the multi-layer interconnection structure of the multi-layer substrate.

Thus, in some other examples provided herein, the interconnect structure manufacturing method includes the steps of bonding a plurality of substrates after filling metal powder in cavities of the plurality of substrates, and curing the metal powder filled in the plurality of substrates while manufacturing the interconnect structure in the plurality of substrates, thereby obtaining an interconnect structure having a multilayer wiring. The steps of bonding and curing the filled metal powder may be performed simultaneously, i.e. the curing of the metal powder is achieved simultaneously during the bonding process, except that the bonding temperature of the substrate is required to match the curing temperature of the metal powder. In other examples, the bonding and metal powder curing steps may also be performed separately, such as by bonding the different substrates at a relatively low temperature and then increasing the temperature to effect the curing of the metal powder. Or in another example, the different substrates may be bonded after the metal powder is cured simultaneously. These several methods each have advantages, each with different applicable environments. For example, the conductive post structure formed by curing and bonding can be modified to facilitate better electrical connection with other structures. And the metal powder solidification is synchronously realized in the bonding process, so that the process can be greatly simplified, and the production efficiency is improved. If the interconnect structures in the plurality of substrates need to be electrically connected to each other, alignment of the interconnect structures of the upper and lower substrates may be ensured during bonding and curing of the metal powder. The method for manufacturing the interconnection structure of the multilayer wiring can greatly reduce the manufacturing difficulty and cost and improve the production efficiency (the interconnection structure for manufacturing the multilayer wiring in the prior art needs to be manufactured layer by layer, the time required by vapor deposition and/or electroplating is very long, and the alignment requirement is very high).

The interconnection structure comprising the TSV through holes is manufactured by adopting a metal powder filling and curing mode, and the interconnection structure can be subjected to blade coating filling, wiping to remove redundant metal powder or other simple modes, so that the interconnection structure can be mechanically and automatically operated or manually operated; and can be filled through the combination of 2 to 3 kinds of metal powder of different particle diameters, effectively solve the problem such as cavity that produces based on filling of metal powder pore structure, optimize the filling quality. Compared with the low-resistance silicon TSV, the conductive column prepared by the method is high in conductivity, suitable for application scenes requiring low on-resistance of the TSV, and capable of expanding application scenes of TSV technology; compared with filling TSV by liquid alloy pouring, the surface polishing amount of the vertical hole of the wafer after filling is greatly reduced, and the process cost is reduced. In addition, the invention is not limited by the depth-to-width ratio of the TSV hole structure in the filling process, and is particularly easy to manufacture the thick substrate TSV substrate with higher reliability, thereby avoiding the limitation of the prior filling technology and expanding the application scene. The interconnection structure manufacturing method based on metal powder filling provided by the invention can be widely applied to high-density chip manufacturing, MEMS technology and 2.5D advanced packaging technology, and is beneficial to improving the integration level of devices and reducing the manufacturing cost.

In order to make the technical scheme and advantages of the present invention more prominent, preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

Example 1

Referring to fig. 2 and 3, the interconnect structure prepared in this embodiment is a vertical via structure, and thus the method for manufacturing a wafer vertical via interconnect based on metal powder filling provided in this embodiment includes the following steps:

in step S10, a single-throw single crystal silicon wafer having a thickness of 420 μm and a size of 4 inches is provided.

And S11, etching a blind hole structure on the polished surface of the silicon wafer by using a dry etching process, wherein the aperture of the blind hole is 100 mu m, and the etching depth is 400 mu m.

In step S12, a silicon dioxide layer of 2 μm is formed as an insulating layer on the sidewall of the blind via structure (including the surface of the silicon wafer) using a thermal oxidation process.

Step S20, using a low pressure chemical vapor deposition (Low Pressure Chemical Vapor Deposition, LPCVD) process to form a sidewall of the blind via structure (includingSilicon wafer surface) deposition thickness ofThe low stress polysilicon layer of (2) is used as an adhesion layer to increase the bonding strength of the solidified metal powder and the wafer.

And S30, filling silver powder with the particle size of 1-2 mu m into the blind holes of the silicon wafer through a dry process by taking the silver powder as powder to be filled. Specifically, firstly, uniformly spreading silver powder on the surface of a silicon wafer; secondly, repeatedly scraping silver powder on the surface of the silicon wafer by using a silica gel scraper with an included angle of 75 degrees and a length of 150mm so as to scrape and press the silver powder into the blind hole structure; then, the silver powder filled in the blind hole is compacted in a mechanical vibration mode; the foregoing operation is repeated several times until the vertical hole filling is completed.

And S40, wiping off the redundant silver powder on the surface of the silicon wafer by using a piece of dust-free cloth or a high-mesh sponge polishing plate until the area outside the vertical holes on the surface of the wafer is clean and free of the redundant silver powder.

And S50, placing the silicon wafer into a high-temperature furnace which is vacuumized and then filled with nitrogen at 970 ℃, heating for 0.6 hour (the heating process comprises heating from room temperature to 970 ℃ for 0.5 hour and heating at 970 ℃ for 0.1 hour), then naturally cooling to room temperature, and solidifying the silver powder by adopting a metal melting mode. Thus, the silver powder is completely melted to 961 ℃ and is in a liquid state to fill the bottom of the silicon blind hole, meanwhile, the silver in the silicon blind hole and the polysilicon adhesion layer on the side wall form a silver-silicon eutectic conductive layer (the silver-silicon eutectic temperature is 840 ℃), and the silver powder cannot be oxidized due to thermal sintering in an inert atmosphere. Considering that the metal powder shrinks after hot sintering, the blind holes still have space to be filled with the powder.

And step S60, repeating the steps S30 to S50 until the silver conductive column is completely exposed. It should be noted that: in repeating S30, the powder to be solidified is not silver powder having a particle size of 1 to 2 μm but silver powder having a smaller particle size (particle size of 500 nm). This can reduce the number of fills.

And polishing the non-polished surface of the silicon wafer by adopting a polishing process until the other end of the silver conductive column is completely exposed, and depositing a silicon dioxide insulating layer on the polished surface. The polishing process can obtain a high-quality wafer surface, and is beneficial to the subsequent rewiring process.

Example two

Referring to fig. 2 and 4, the interconnect structure prepared in this embodiment is also a vertical via structure. The method for manufacturing the wafer vertical through hole interconnection based on metal powder filling provided by the embodiment comprises the following steps:

step S10, providing a common silicon wafer, wherein the silicon wafer is a double-polished silicon wafer, and the thickness of the silicon wafer is 500 mu m, and the size of the silicon wafer is 6 inches.

And S11, etching a blind hole on the first surface of the silicon wafer by using a dry etching process, wherein the aperture of the blind hole is 100 mu m, and the etching depth is 450 mu m.

Step S20, depositing a layer thickness of 200 a and 200 a on the sidewall of the blind via structure (including the surface of the silicon wafer) by using a magnetron sputtering processThe titanium/copper composite film of (2) is used as an adhesion layer to increase the bonding strength of the solidified metal powder and the wafer.

Step S30, taking copper-tin mixed powder as powder to be solidified, wherein the mixed powder comprises the following components: 0.8g of copper powder with the particle size of 1 mu m, 1.4g of copper powder with the particle size of 200nm, 8g of copper powder with the particle size of 50nm and 2.5g of tin powder with the particle size of 50nm, wherein the weight ratio of the powder is about copper: tin=4:1. And filling the copper-tin mixed powder into the blind holes of the silicon wafer through a dry process. Specifically, firstly, uniformly scattering copper-tin mixed powder on the surface of a silicon wafer; secondly, repeatedly scraping and pressing the copper-tin mixed powder on the surface of the silicon wafer by using a silica gel scraper with an included angle of 75 degrees and a length of 150mm so as to scrape and press the copper-tin mixed powder and fill the copper-tin mixed powder into the blind holes; repeating the above operation for several times, and vibrating the copper-tin mixed powder filled in the blind hole by mechanical vibration.

And S40, wiping off redundant copper-tin mixed powder on the surface of the silicon wafer by using a brand new silica gel scraper.

S50, placing the silicon chip filled with the copper-tin mixed powder into a reducing atmosphere eutectic furnace, vacuumizing, heating to 200 ℃, preserving heat for 20 minutes, and volatilizing and decomposing a surface passivation layer of the nano powder; vacuumizing, and filling mixed gas of nitrogen and hydrogen at about 0.5 atmosphere, wherein the ratio of the mixed gas is nitrogen: hydrogen = 70%:30%, heating to 350 ℃, and preserving heat for 1 hour to realize liquid phase sintering of the copper-tin mixed powder to form Cu ₃ Sn eutectic phase conductive pillars. In this way, the copper-tin mixed powder in the blind hole and the copper-containing adhesion layer on the side wall also form copper-tin eutectic bonding, the copper-tin mixed powder cannot be oxidized due to liquid phase sintering in hydrogen reducing atmosphere, and the natural oxide layer of the copper and tin powder is reduced to metal, so that good copper-tin eutectic sintering is realized, and Cu with high conductivity is obtained ₃ And the Sn eutectic phase conductive column has high bonding strength with the side wall. Considering that the metal powder shrinks after liquid phase sintering, the blind holes still have space to be filled with the powder.

And S60, repeating the steps S30-S50 until the copper-tin eutectic conductive column is completely exposed. And a polishing process is adopted to polish the non-filling surface of the silicon wafer, so that the other end of the copper-tin eutectic conductive column is completely exposed, and a silicon dioxide insulating layer is deposited on the polished surface. The polishing process can obtain a high-quality wafer surface, and is beneficial to the subsequent rewiring process.

Example III

Referring to fig. 2 and 5, the interconnect structure prepared in this embodiment is a damascene interconnect structure. The method for manufacturing the interconnection structure based on metal powder filling provided by the embodiment comprises the following steps:

step S10, providing an SOI silicon wafer, wherein the silicon wafer is a double-polished SOI silicon wafer, the thickness of a substrate layer of the SOI silicon wafer is 500 mu m, the thickness of a device layer is 30 mu m, the thickness of a buried oxide layer is 1 mu m, and the size of the buried oxide layer is 8 inches.

And S11, etching blind holes and stripe grooves of a Damascus process on the substrate layer of the SOI silicon wafer by using a dry etching process. Wherein, the aperture of the blind hole is 150 μm, the etching depth of the blind hole is 500 μm, in this step, the buried oxide layer of the SOI silicon wafer is used as the self-stop layer in the dry etching process; the damascene process has a stripe trench of 150 μm.

In step S12, a silicon dioxide layer with a thickness of 2 μm is formed as an insulating layer on the side wall of the blind hole structure of the SOI silicon wafer and the side wall of the bar-shaped groove (comprising the surface of the SOI silicon wafer) of the Damascus process by using a thermal oxidation process.

Step S20, using magnetron sputtering process to deposit the strip grooves (substrate layer side containing SOI silicon wafer) with thickness of the side wall of the blind hole structure and Damascus process respectivelyThe chromium/copper composite film of (2) is used as an adhesive layer.

Step S30, taking copper-tin mixed powder as powder to be solidified, wherein the mixed powder comprises the following components: 0.8g of copper powder with the particle size of 1 mu m, 1.4g of copper powder with the particle size of 200nm, 8g of copper powder with the particle size of 50nm and 2.5g of tin powder with the particle size of 50nm, wherein the weight ratio of the powder is about copper: tin=4:1. And filling the copper-tin mixed powder into blind holes on the surface of the SOI silicon wafer substrate layer and strip grooves of the Damascus process through a dry process. Specifically, firstly, uniformly spreading copper-tin mixed powder on the surface of an SOI silicon wafer; secondly, repeatedly rubbing the copper-tin mixed powder on the surface of the SOI silicon wafer by using a silica gel scraper with an included angle of 75 degrees and a length of 250mm so as to scrape and press the copper-tin mixed powder into the blind holes and the strip-shaped grooves; repeating the above operation for several times, and vibrating the copper-tin mixed powder filled in the blind hole and the strip groove by adopting a mechanical vibration mode.

And S40, wiping off redundant copper-tin mixed powder on the surface of the SOI silicon wafer by using a brand new silica gel scraper.

S50, placing the silicon chip filled with the copper-tin mixed powder into a reducing atmosphere eutectic furnace, vacuumizing, heating to 200 ℃, preserving heat for 20 minutes, and volatilizing and decomposing a passivation layer of the nano powder; vacuumizing, charging formic acid (110 ℃) mixed gas with nitrogen as carrier gas to about 0.5 atmosphere, heating to 350 ℃, decomposing the formic acid into carbon dioxide and hydrogen, and preserving the temperature for 1 hour to realize liquid phase sintering of copper-tin mixed powder to form Cu ₃ Conductive pillars of Sn eutectic phase. Thus, the blind holeThe mixed powder of copper and tin in the inner and the strip-shaped grooves and the copper-containing adhesion layer on the side wall also form high-strength copper-tin eutectic bonding. The mixed copper-tin powder is not oxidized due to liquid phase sintering in formic acid reducing atmosphere, and the natural oxide layer of the copper-tin nano powder is reduced into metal, so that good copper-tin eutectic sintering is realized, and Cu with high conductivity is obtained ₃ And the Sn eutectic phase conductive column has high bonding strength with the side wall. Considering that the metal powder shrinks after liquid phase sintering, the blind holes and the strip grooves still have spaces for filling the powder.

And S60, repeating the steps S30-S50 until the copper-tin eutectic conductive column is completely exposed. And polishing the substrate layer of the SOI silicon wafer to the buried oxide layer of the SOI wafer to ensure that the other end of the copper-tin eutectic conductive column is completely exposed. The polishing process can obtain a high-quality wafer surface, and is beneficial to the subsequent rewiring process.

Of course, the above embodiments are merely exemplary, and the substrate materials and the layout of the interconnection structure in practical applications may be further selected, and in particular, the layout is not developed one by one.

In summary, the interconnect structure including the TSV is manufactured by filling and curing the metal powder, so that the difficulty of filling the TSV can be greatly reduced, the filling time can be shortened, and the process cost can be reduced; and the problem of cavity and the like generated based on filling of the metal powder pore structure can be effectively solved, and the filling quality is optimized. Compared with the low-resistance silicon TSV, the conductive column prepared by the method is high in conductivity, suitable for application scenes requiring low on-resistance of the TSV, and capable of expanding application scenes of TSV technology; compared with filling TSV by liquid alloy pouring, the surface polishing amount of the vertical hole of the wafer after filling is greatly reduced, and the process cost is reduced. In addition, the invention is not limited by the depth-to-width ratio of the TSV hole structure in the filling process, and is particularly easy to manufacture the thick substrate TSV substrate with higher reliability, thereby avoiding the limitation of the prior filling technology and expanding the application scene. The invention realizes the TSV through hole filling process with high quality, high manufacturing speed and low cost, and has wide application prospect in high-density chip manufacturing, MEMS technology and 2.5D advanced packaging technology.

Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.

The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims

1. A method of manufacturing an interconnect structure based on metal powder filling, comprising the steps of:

filling metal powder in the cavity;

2. The method of manufacturing an interconnect structure of claim 1, wherein the cavity comprises vertical holes and/or slots; when the interconnect structure is a damascene structure including vertical holes and trenches, metal powder filling and curing are performed simultaneously for the vertical holes and trenches of the damascene structure.

3. The method of manufacturing an interconnect structure as claimed in claim 2, further comprising the step of compacting the metal powder after filling the cavity with the metal powder.

4. A method of fabricating an interconnect structure as claimed in claim 3, wherein the vertical holes are through holes and/or blind holes, and when the vertical holes are through holes, the substrate is placed on the spacer during the metal powder filling process, and the spacer is removed and cured after the metal powder compacting process is completed.

5. A method of fabricating an interconnect structure in accordance with claim 3, wherein the method of densification comprises compaction and/or compaction; and/or the method of solidifying the metal powder includes several of metal melting, metal powder sintering, and metal powder alloying.

6. The method of manufacturing an interconnect structure according to claim 3, wherein the method of manufacturing an interconnect structure comprises the steps of filling metal powder and then compacting twice or more; and/or the manufacturing method of the interconnection structure comprises the steps of filling metal powder and then solidifying more than two times.

7. The method of manufacturing an interconnect structure as claimed in claim 1, further comprising the step of forming an adhesion layer on an inner surface of the cavity before filling the metal powder.

8. The method of manufacturing an interconnect structure according to claim 7, wherein the adhesion layer comprises a polysilicon layer and/or a metal conductive layer.

9. The method of manufacturing an interconnect structure according to claim 1, further comprising the step of thinning the substrate after the metal powder is solidified so that both ends of the conductive pillars are completely exposed on the surface of the substrate.

10. The method of manufacturing an interconnect structure according to claim 1, wherein the substrate comprises one of a silicon wafer, a glass wafer, and a ceramic wafer, and the thickness of the substrate is 200 μm to 1000 μm; and/or the material of the metal powder comprises a plurality of Au, ag, cu, sn, al and Ni, and the particle size of the metal powder is 50 nm-5000 nm; the resistance of the prepared conductive column is 0.001-10Ω.

11. The method of manufacturing an interconnect structure of claim 1, wherein the filled metal powder comprises more than 2 different particle sizes.

12. The method of manufacturing an interconnect structure according to claim 1, wherein the atmosphere in which the metal powder is cured includes one of a vacuum, an inert gas atmosphere, and a reducing atmosphere.

13. The method of manufacturing an interconnect structure according to claim 1, wherein the method of filling the metal powder comprises dry and/or mixing the metal powder with a liquid, then filling the cavity in a wet process, and then evaporating the liquid by heating.

14. The method according to any one of claims 1 to 13, characterized in that the method comprises the steps of bonding the plurality of substrates after filling metal powder in the cavities of the plurality of substrates, and curing the metal powder filled in the plurality of substrates while manufacturing the interconnect structure in the plurality of substrates, thereby obtaining the interconnect structure having the multilayer wiring.