CN117373912A - Preparation method of heterogeneous substrate, heterogeneous substrate and semiconductor device - Google Patents
Preparation method of heterogeneous substrate, heterogeneous substrate and semiconductor device Download PDFInfo
- Publication number
- CN117373912A CN117373912A CN202311508833.4A CN202311508833A CN117373912A CN 117373912 A CN117373912 A CN 117373912A CN 202311508833 A CN202311508833 A CN 202311508833A CN 117373912 A CN117373912 A CN 117373912A
- Authority
- CN
- China
- Prior art keywords
- substrate
- material layer
- bonding
- heterogeneous substrate
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 99
- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 238000002360 preparation method Methods 0.000 title claims description 6
- 238000000034 method Methods 0.000 claims abstract description 28
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims abstract description 27
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 16
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 15
- 238000005468 ion implantation Methods 0.000 claims abstract description 13
- 238000005516 engineering process Methods 0.000 claims abstract description 11
- 230000007547 defect Effects 0.000 claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 claims abstract description 3
- 239000000463 material Substances 0.000 claims description 80
- 229910052594 sapphire Inorganic materials 0.000 claims description 21
- 239000010980 sapphire Substances 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 9
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 6
- -1 hydrogen ions Chemical class 0.000 claims description 6
- 150000002500 ions Chemical class 0.000 claims description 6
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 5
- 238000010884 ion-beam technique Methods 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 238000002513 implantation Methods 0.000 claims description 4
- WSMQKESQZFQMFW-UHFFFAOYSA-N 5-methyl-pyrazole-3-carboxylic acid Chemical compound CC1=CC(C(O)=O)=NN1 WSMQKESQZFQMFW-UHFFFAOYSA-N 0.000 claims description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 3
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 3
- 229910052799 carbon Inorganic materials 0.000 claims description 3
- 239000010432 diamond Substances 0.000 claims description 3
- 229910003460 diamond Inorganic materials 0.000 claims description 3
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 claims description 3
- 230000004927 fusion Effects 0.000 claims description 3
- 229910001195 gallium oxide Inorganic materials 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 3
- 239000001307 helium Substances 0.000 claims description 3
- 229910052734 helium Inorganic materials 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 239000001257 hydrogen Substances 0.000 claims description 3
- 239000012212 insulator Substances 0.000 claims description 3
- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 239000010453 quartz Substances 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 239000011787 zinc oxide Substances 0.000 claims description 3
- 206010040844 Skin exfoliation Diseases 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 6
- 235000012431 wafers Nutrition 0.000 description 5
- 238000010521 absorption reaction Methods 0.000 description 4
- 230000014759 maintenance of location Effects 0.000 description 4
- 125000005842 heteroatom Chemical group 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 230000008646 thermal stress Effects 0.000 description 3
- 229910018509 Al—N Inorganic materials 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000001994 activation Methods 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000000678 plasma activation Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2654—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
- H01L21/26546—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds of electrically active species
Abstract
The present invention relates to the field of semiconductor technologies, and in particular, to a method for manufacturing a hetero-substrate, and a semiconductor device. The method comprises the steps of firstly carrying out ion implantation in aluminum nitride or gallium nitride in a heterogeneous substrate to form a defect layer in the aluminum nitride or gallium nitride, bonding the defect layer with a support substrate, and then transferring the aluminum nitride or gallium nitride onto the support substrate by using a laser stripping method.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to a method for manufacturing a hetero-substrate, and a semiconductor device.
Background
With the demands for integration and miniaturization of electronic devices, semiconductor devices manufactured based on semiconductor processes have become a research hotspot.
In the process of forming a semiconductor device, a heterogeneous substrate is usually required to be formed firstly, the heterogeneous substrate is a substrate structure comprising two materials, the existing method for forming the heterogeneous substrate generally comprises the steps of directly bonding the two substrates, but the mode has higher requirements on the thickness of the two substrates, the yield is low, the mode of directly growing on one substrate to obtain the other substrate is also adopted, the requirements on the types of the substrates are higher, the limitation is higher, the heterogeneous substrate is realized through an ion beam stripping and bonding transfer technology, and in the annealing stripping process, the bonding strength is limited due to the fact that extremely high thermal stress is generated due to the thermal mismatch difference between the materials.
Disclosure of Invention
In order to solve the above technical problems, in one aspect, the present application discloses a method for preparing a heterogeneous substrate, which includes the following steps:
providing an initial heterogeneous substrate; the initial foreign substrate includes a first material layer and a second material layer stacked; the material of the first material layer is a transparent semiconductor material; the material of the second material layer comprises aluminum nitride or gallium nitride;
ion implantation is carried out on the initial heterogeneous substrate by an implantation surface so as to form a defect layer in the second material layer, and an intermediate heterogeneous substrate is obtained;
providing a supporting substrate;
bonding the intermediate heterogeneous substrate and the support substrate to obtain a bonding structure; the supporting substrate in the bonding structure is bonded and connected with the second material layer;
stripping the bonding structure by using a laser stripping technology, and removing the residual damaged layer to obtain a heterogeneous substrate; the foreign substrate includes the support substrate.
In an exemplary embodiment, the laser lift-off technology is used to lift off the bonding structure, and the wavelength of the laser is in the range of 125nm to 364nm.
In one exemplary embodiment, the providing an initial heterogeneous substrate includes:
providing the first material layer;
and growing the second material layer on the first material layer.
In one exemplary embodiment, the ion implanted ions comprise hydrogen ions, helium ions, or a combination of both;
the energy range of the ion implantation comprises 10 keV-10 MeV;
the dose range of the ion implantation comprises 1×10 16 cm -2 ～5×10 18 cm -2 。
In an exemplary embodiment, the bonding manner of the intermediate heterogeneous substrate and the support substrate includes hydrophilic direct bonding, surface activated bonding, metal fusion bonding, and indirect bonding of a dielectric layer.
In an exemplary embodiment, the method of removing the residual damage layer includes one or a combination of chemical mechanical polishing, ion beam etching, mechanical lapping, chemical wet etching, and high temperature annealing.
In an exemplary embodiment, the material of the support substrate is silicon, silicon carbide, polycrystalline silicon carbide, silicon on insulator or silicon carbide, diamond, surface-oxidized silicon wafer, sapphire, gallium nitride, germanium, gallium arsenide, indium phosphide, gallium oxide, zinc oxide, carbon, lithium niobate, lithium tantalate, or quartz.
In an exemplary embodiment, the material of the first material layer is sapphire.
In another aspect, the present application discloses a heterogeneous substrate prepared by the method described above.
In another aspect, the present application discloses a semiconductor device comprising the heterogeneous substrate described above.
According to the embodiment of the application, the ion implantation is firstly carried out on the aluminum nitride or the gallium nitride in the heterogeneous substrate so as to form the defect layer in the aluminum nitride or the gallium nitride, after the defect layer is bonded with the support substrate, the aluminum nitride or the gallium nitride is transferred onto the support substrate by utilizing a laser stripping method, and the high-temperature annealing stripping stage is not needed, so that the generation of extremely high thermal stress is avoided, laser acts on the damaged layer, the laser absorption efficiency of the aluminum nitride or the gallium nitride is improved, and the high-efficiency stripping is realized.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic flow chart of a method for preparing a heterogeneous substrate according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an initial heterogeneous substrate according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of an intermediate heterogeneous substrate according to an embodiment of the present application;
FIG. 4 is a schematic structural diagram of a bonding structure according to an embodiment of the present disclosure;
FIG. 5 is a schematic structural diagram of a laser lift-off process according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of a heterogeneous substrate according to an embodiment of the present application.
The following supplementary explanation is given to the accompanying drawings:
1-a first material layer; 2-a second material layer; 201-a retention layer; 3-a defect layer; 4-supporting the substrate.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic may be included in at least one implementation of the present application. In the description of the present application, it should be understood that the terms "upper," "lower," "top," "bottom," and the like indicate an orientation or a positional relationship based on that shown in the drawings, and are merely for convenience of description and simplicity of description, and do not indicate or imply that the apparatus or elements in question must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may include one or more of the feature, either explicitly or implicitly. Moreover, the terms "first," "second," and the like, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented in sequences other than those illustrated or otherwise described herein.
When a range of values is disclosed herein, the range is considered to be continuous and includes both the minimum and maximum values for the range, as well as each value between such minimum and maximum values. Further, when a range refers to an integer, each integer between the minimum and maximum values of the range is included. Further, when multiple range description features or characteristics are provided, the ranges may be combined. In other words, unless otherwise indicated, all ranges disclosed herein are to be understood to include any and all subranges subsumed therein. For example, a specified range from "1 to 10" should be considered to include any and all subranges between the minimum value of 1 and the maximum value of 10. Exemplary subranges from 1 to 10 include, but are not limited to, 1 to 6.1, 3.5 to 7.8, 5.5 to 10, and the like.
Referring to fig. 1, a schematic flow chart of preparing a heterogeneous substrate according to an embodiment of the present application is shown. The preparation method of the heterogeneous substrate specifically comprises the following steps:
s101: providing an initial heterogeneous substrate; the initial heterogeneous substrate comprises a first material layer 1 and a second material layer 2 which are laminated; the material of the first material layer 1 is a transparent semiconductor material; the material of the second material layer 2 includes aluminum nitride or gallium nitride.
In an exemplary embodiment, step S101 may be specifically described as: providing the first material layer 1; the second material layer 2 is grown on the first material layer 1. Optionally, the material of the first material layer 1 is sapphire, and the material of the second material layer 2 is aluminum nitride, so that aluminum nitride can be grown on the sapphire, a large-size initial heterogeneous substrate can be formed, the size of the initial heterogeneous substrate can reach 4 inches, dislocation density is low, but lattice mismatch ratio of growing aluminum nitride on other substrates is large, and quality of the obtained aluminum nitride is poor. In practice, the first material layer 1 may be made of a transparent semiconductor material other than sapphire, so long as the second material layer 2 with good growth quality can be ensured and the absorption rate of laser light is low when the laser lift-off is used subsequently.
In the disclosed embodiments, the initial heterogeneous substrate may be configured as shown in fig. 2.
S103: ion implantation is performed from the implantation surface toward the initial hetero substrate to form a defect layer 3 in the second material layer 2, resulting in an intermediate hetero substrate.
In one exemplary embodiment, the ion implanted ions comprise hydrogen ions, helium ions, or a combination of both; the energy range of the ion implantation comprises 10 keV-10 MeV; the dose range of the ion implantation comprises 1×10 16 cm -2 ～5×10 18 cm -2 。
In the embodiment of the present application, please refer to fig. 3, which is a schematic structural diagram of an intermediate heterogeneous substrate according to the embodiment of the present application. The implantation surface may be the surface of the second material layer 2 remote from the first material layer 1. Alternatively, the injection surface may be a surface of the first material layer 1 away from the second material layer 2, which is not limited herein.
In the embodiments of the present application, the depth of the ion implantation may be set as required, mainly related to the energy of the ion implantation. Alternatively, the defect layer 3 may be located on the second material layer 2, or may be located at an interface between the first material layer 1 and the second material layer 2, so as to further improve the efficiency of subsequent laser lift-off, where the defect layer 3 may divide the second material layer 2 into a removal layer and a retention layer 201, and the subsequent retention layer 201 may be bonded to the support substrate 4.
In this embodiment, the thickness of the first material layer 1 is greater than or equal to 200nm, and the thickness of the second material layer 2 is greater than or equal to 100nm.
S105: a support substrate 4 is provided.
In an exemplary embodiment, the material of the support substrate 4 is silicon, silicon carbide, polycrystalline silicon carbide, silicon on insulator or silicon carbide, diamond, surface-oxidized silicon wafer, sapphire, gallium nitride, germanium, gallium arsenide, indium phosphide, gallium oxide, zinc oxide, carbon, lithium niobate, lithium tantalate, or quartz.
In the embodiment of the present application, the thickness of the support substrate 4 is 200nm or more.
S107: bonding the intermediate heterogeneous substrate and the support substrate 4 to obtain a bonding structure; the support substrate 4 in the bonding structure is bonded to the second material layer 2.
In an exemplary embodiment, the bonding manner of the intermediate heterogeneous substrate and the support substrate 4 includes hydrophilic direct bonding, surface activated bonding, metal fusion bonding, and indirect bonding of a dielectric layer.
Wherein, hydrophilic direct bonding refers to a bonding process in which hydrophilic bonding reaction occurs at a hydrophilic interface. Typically using a plasma (e.g. Ar, N 2 、O 2 Etc.), after plasma activation, part of organic matters and particles on the surface are removed, and the hydrophilic dangling bond density of the surface is increased, so that the hydrophilicity is enhanced. Specifically, the surface of the retention layer 201 and the surface of the support substrate 4 in the intermediate hetero substrate may be plasma-activated, and then hydrophilic bonding reaction may occur on the plasma-activated surfaces of both.
Surface-activated bonding is performed by treating the surface with plasma (unlike plasma surface activation in hydrophilic bonding), and the whole surface plasma treatment of the sample and bonding process are performed under high vacuum conditions. Etching the surface of the substrate by plasma in the vacuum cavity to remove the oxide existing on the surface, increasing the density of surface dangling bonds, and then bonding in the vacuum cavity.
Metal bonding refers to bonding two wafers together face-to-face by a pure metal or alloy, by means of metal bonding, diffusion between metal and wafer surface, metal melting, etc.
The bonding of the dielectric layer refers to bonding after an intermediate layer is grown on the surfaces of the two wafers. The intermediate layer may be an insulating layer such as a natural oxide layer, silicon dioxide, spin-on glass (SOG), or silicon nitride, or may be a metal or a polymer.
In the embodiment of the present application, the bonding structure obtained in step S107 may be a structure as shown in fig. 4.
S109: stripping the bonding structure by using a laser stripping technology, and removing the residual damaged layer to obtain a heterogeneous substrate; the foreign substrate comprises the support substrate 4.
In an exemplary embodiment, the laser lift-off technology is used to lift off the bonding structure, and the wavelength of the laser is in the range of 125nm to 364nm. Alternatively, when the material of the first material layer 1 is sapphire and the material of the second material layer 2 is aluminum nitride, the corresponding laser wavelength range may be 125nm to 200nm, such as 125nm,130nm,135nm,140nm,145nm,150nm,160nm,165nm,170nm,175nm,180nm,185nm,190nm,195nm,200nm, etc. When the material of the first material layer 1 is sapphire, the material of the second material layer 2 is gallium nitride, the corresponding laser wavelength lambda can be 125 nm-364 nm, such as 125nm,130nm,140nm,160nm,180nm,200nm,220nm,240nm,260nm,280nm,300nm,320nm,340nm,360nm, 284 nm. Alternatively, the scanning mode may be a large-area scanning mode, a local scanning mode or a combination of the two modes. Alternatively, the laser energy may range from 200 to 600mJ/cm 2 As a specific example, 200nm,250nm,300nm,350nm,400nm,450nm,500nm,550nm,600nm, etc. can be mentioned.
In an exemplary embodiment, the method of removing the residual damage layer includes one or a combination of chemical mechanical polishing, ion beam etching, mechanical lapping, chemical wet etching, and high temperature annealing.
In this embodiment, when the damaged layer of the bonding structure is stripped by using the laser stripping technology, referring to fig. 5, laser specifically may enter the damaged layer from the surface of the first material layer 1, so that the second material layer 2 is separated from the damaged layer, the reserved layer 201 is located on the supporting substrate 4, and then the damaged layer remaining on the reserved layer 201 is removed, so that the target heterogeneous substrate as shown in fig. 6 can be obtained.
The principle of effectively realizing the peeling of the bonding structure by utilizing the laser peeling technology is as follows: since the absorptivity of sapphire to laser light is lower than that of the second material layer 2, for example, when the second material layer 2 is aluminum nitride, when the sample is irradiated with laser light of ultraviolet band through the sapphire substrate, the energy of one beam of laser light is between the forbidden band width of aluminum nitride (6.2 eV) and the forbidden band width of sapphire (9.9 eV), and when the whole sample is scanned from the sapphire side, the laser light will not be absorbed by sapphire and will be absorbed by aluminum nitride at the interface, yielding A l and N 2 ，N 2 Escaping, heating the sample to the melting point of the metal A l to melt A l and separate the sapphire from the al N. Thus, in theory, lasers with wavelengths between 125nm and 200nm can be used to strip sapphire-based aluminum nitride. Similarly, sapphire-based gallium nitride (GaN) can also be separated from GaN by laser lift-off, and theoretically, the usable laser wavelength is 125nm to 364nm.
For an aluminum nitride device, aluminum nitride is used as an ultra-wide band-gap semiconductor material, the forbidden band width is 6.2eV, and the critical breakdown field strength can reach 14MV/cm. Aluminum nitride materials have excellent properties such as high thermal conductivity (340W/(m.K)), high sound velocity (10400 m/s), and good ultraviolet transmittance, so aluminum nitride is an ideal material for preparing filters, resonators, and ultraviolet electronic devices. Therefore, the Al-N is integrated with the substrate, the excellent performances of the Al-N and the substrate can be fully utilized, and the performance of the aluminum nitride device is improved. However, in the process of peeling and transferring the sapphire-based aluminum nitride film to the substrate by the ion beam peeling and bonding transfer technology, particularly in annealing peeling, a great thermal stress is generated due to the thermal mismatch difference between materials, so that the bonding strength is limited. For laser stripping, the difference of forbidden band widths of aluminum nitride and sapphire is smaller, but the absorption of laser in sapphire is low, and the absorption in aluminum nitride is high, so that the heterogeneous substrate with better quality can be obtained by adopting the preparation method provided by the embodiment of the application.
In one aspect, the present application discloses a semiconductor device comprising the heterogeneous substrate described above.
In the embodiment of the application, the needed semiconductor device can be prepared by utilizing photoetching, metal growth, etching, passivation and other processes on the heterogeneous substrate.
The structure and preparation method of the heterogeneous substrate are described above and will not be described in detail herein.
The foregoing description of the preferred embodiments is provided for the purpose of illustration only and is not intended to limit the invention to the particular embodiments disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (10)
1. A method of preparing a heterogeneous substrate, comprising the steps of:
providing an initial heterogeneous substrate; the initial foreign substrate comprises a first material layer (1) and a second material layer (2) which are laminated; the material of the first material layer (1) is a transparent semiconductor material; the material of the second material layer (2) comprises aluminum nitride or gallium nitride;
ion implantation is carried out from the implantation surface to the initial heterogeneous substrate to form a defect layer (3) in the second material layer (2) to obtain an intermediate heterogeneous substrate;
providing a support substrate (4);
bonding the intermediate heterogeneous substrate and the support substrate (4) to obtain a bonding structure; the supporting substrate (4) in the bonding structure is bonded and connected with the second material layer (2);
stripping the bonding structure by using a laser stripping technology, and removing the residual damaged layer to obtain a target heterogeneous substrate; the target foreign substrate comprises the support substrate (4).
2. The method according to claim 1, wherein the wavelength of the laser is in a range of 125nm to 364nm in the peeling treatment of the bonding structure by the laser peeling technique.
3. The method of claim 1, wherein providing an initial heterogeneous substrate comprises:
-providing said first material layer (1);
-growing said second material layer (2) on said first material layer (1).
4. The method of claim 1, wherein the ion implanted ions comprise hydrogen ions, helium ions, or a combination thereof;
the energy range of the ion implantation comprises 10 keV-10 MeV;
the dose range of the ion implantation comprises 1×10 16 cm -2 ～5×10 18 cm -2 。
5. The method of preparation according to claim 1, characterized in that the bonding means of the intermediate heterogeneous substrate to the support substrate (4) comprise hydrophilic direct bonding, surface activated bonding, metal fusion bonding, dielectric layer indirect bonding.
6. The method of claim 1, wherein the removing the residual damaged layer comprises one or a combination of chemical mechanical polishing, ion beam etching, mechanical lapping, chemical wet etching, and high temperature annealing.
7. The method according to claim 4, characterized in that the material of the support substrate (4) is silicon, silicon carbide, polycrystalline silicon carbide, silicon on insulator or silicon carbide, diamond, surface-oxidized silicon wafer, sapphire, gallium nitride, germanium, gallium arsenide, indium phosphide, gallium oxide, zinc oxide, carbon, lithium niobate, lithium tantalate or quartz.
8. The method of manufacturing according to claim 1, characterized in that the material of the first material layer (1) is sapphire.
9. A heterogeneous substrate prepared by the method of any one of claims 1-8.
10. A semiconductor device comprising the hetero-substrate of claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311508833.4A CN117373912A (en) | 2023-11-13 | 2023-11-13 | Preparation method of heterogeneous substrate, heterogeneous substrate and semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311508833.4A CN117373912A (en) | 2023-11-13 | 2023-11-13 | Preparation method of heterogeneous substrate, heterogeneous substrate and semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117373912A true CN117373912A (en) | 2024-01-09 |
Family
ID=89405891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311508833.4A Pending CN117373912A (en) | 2023-11-13 | 2023-11-13 | Preparation method of heterogeneous substrate, heterogeneous substrate and semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117373912A (en) |
-
2023
- 2023-11-13 CN CN202311508833.4A patent/CN117373912A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10381261B2 (en) | Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers | |
| US7713369B2 (en) | Detachable substrate or detachable structure and method for the production thereof | |
| US7939428B2 (en) | Methods for making substrates and substrates formed therefrom | |
| TWI527099B (en) | Process for recycling a substrate | |
| CN107112204B (en) | Method for manufacturing bonded SOI wafer | |
| US10475694B2 (en) | Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof | |
| WO2006000691A1 (en) | Hybrid epitaxy support and method for making same | |
| KR102021160B1 (en) | Method for producing transparent soi wafer | |
| WO2018086380A1 (en) | Method for preparing large-sized iii-v heterogeneous substrate | |
| WO2005104192A2 (en) | A METHOD FOR THE FABRICATION OF GaAs/Si AND RELATED WAFER BONDED VIRTUAL SUBSTRATES | |
| JP4838504B2 (en) | Manufacturing method of semiconductor device | |
| FR2850487A1 (en) | PROCESS FOR PRODUCING MIXED SUBSTRATES AND STRUCTURE THUS OBTAINED | |
| FR2995136A1 (en) | PSEUDO-SUBSTRATE WITH IMPROVED EFFICIENCY OF USE OF MONOCRYSTALLINE MATERIAL | |
| CN108699687B (en) | Compound semiconductor substrate, pellicle, and method for producing compound semiconductor substrate | |
| TWI414021B (en) | Semiconductor device having an ingan layer | |
| CN112018025A (en) | Preparation method of III-V group compound semiconductor heterojunction structure | |
| KR102049248B1 (en) | SEPARATION METHOD OF GaN CRYSTAL LAYER USING SACRIFICIAL LAYER | |
| CN117373912A (en) | Preparation method of heterogeneous substrate, heterogeneous substrate and semiconductor device | |
| JP2017139266A (en) | Composite substrate, semiconductor device, and method of manufacturing them | |
| CN113097124B (en) | Preparation method of heterogeneous integrated GaN film and GaN device | |
| JP5598321B2 (en) | Manufacturing method of semiconductor device | |
| CN115241048B (en) | Method for manufacturing semiconductor device and semiconductor device | |
| CN112530855B (en) | Composite heterogeneous integrated semiconductor structure, semiconductor device and preparation method | |
| US11495458B2 (en) | Manufacturing method and semiconductor element | |
| JP7182105B2 (en) | Method for manufacturing group III nitride semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |