CN117372319A - Method, device, equipment and medium for monitoring semiconductor measurement accuracy - Google Patents
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Abstract
The disclosure relates to a method, a device, equipment and a medium for monitoring semiconductor measurement accuracy, wherein the method comprises the following steps: acquiring real-time measurement data and scanning image measurement data of a self-aligned measurement reference pattern on a semiconductor structure; calculating first accuracy data according to a first preset algorithm according to the real-time measurement data, calculating second accuracy data according to the first preset algorithm according to the scanning image measurement data, and calculating target accuracy according to the first accuracy data and the second accuracy data; calculating the wafer difference degree according to the real-time measurement data and a second preset algorithm; and calculating target monitoring data according to a third preset algorithm according to the target accuracy and the wafer difference, comparing the target monitoring data with preset accuracy range data, and judging whether the overlay accuracy of the wafer is normal or not according to a comparison result. The method and the device can automatically monitor whether the etched overlay error meets the preset requirement or not, and effectively improve the measurement efficiency and accuracy of the semiconductor structure.
Description
Technical Field
The disclosure relates to the technical field of semiconductors, and in particular relates to a method, a device, equipment and a medium for monitoring semiconductor measurement accuracy.
Background
With the rapid development of integrated circuit manufacturing processes, the market demands on the performance and quality of semiconductor products are increasing. The semiconductor etching is a quite important process step in the semiconductor manufacturing process, and the etching is mainly a process of patterning a semiconductor structure according to a patterned mask, and environmental errors or artificial errors are inevitably introduced in the actual etching process, so that the pattern on the patterned mask or the designed pattern is different from the pattern after the actual etching.
However, with the continuous miniaturization of semiconductor devices, the structure difference of the semiconductor devices before and after etching is more and more studied, and the accuracy requirement of measurement is higher and higher. The current scanning image measuring means mainly distinguishes the boundary of the graph through image recognition, respectively determines the centers of the current layer graph and the previous layer graph to calculate the offset value of the centers of the two layers of graph, and the method can directly measure the offset according to the image. However, since how the boundary of the target graphic in the image is defined needs to be determined by human experience judgment to a certain extent, differences can be generated due to different engineers, and certain inaccuracy exists.
Disclosure of Invention
According to various embodiments of the present disclosure, a method, an apparatus, a device, and a medium for monitoring semiconductor measurement accuracy are provided, which can automatically monitor whether an overlay error after etching meets a predetermined requirement, and effectively improve measurement efficiency and accuracy of a semiconductor structure.
According to some embodiments, a first aspect of the present disclosure provides a semiconductor measurement accuracy monitoring method, including:
acquiring real-time measurement data and scanning image measurement data of a self-aligned measurement reference pattern on a semiconductor structure;
calculating first accuracy data according to a first preset algorithm according to the real-time measurement data, calculating second accuracy data according to the first preset algorithm according to the scanning image measurement data, and calculating target accuracy according to the first accuracy data and the second accuracy data;
calculating the wafer difference degree according to the real-time measurement data and a second preset algorithm;
and calculating target monitoring data according to a third preset algorithm according to the target accuracy and the wafer difference, comparing the target monitoring data with preset accuracy range data, and judging whether the overlay accuracy of the wafer is normal or not according to a comparison result.
According to the method for monitoring the semiconductor measurement accuracy, after the real-time measurement data and the scanning image measurement data of the self-aligned measurement reference pattern on the semiconductor structure are obtained, the first accuracy data is obtained according to the first preset algorithm by calculation according to the real-time measurement data, and the second accuracy data is obtained according to the first preset algorithm by calculation according to the scanning image measurement data, so that the target accuracy is obtained according to the first accuracy data and the second accuracy data by calculation, the target monitoring data is conveniently obtained according to the target accuracy and the wafer difference degree by calculation, and because the target monitoring data not only represents the implicit or characteristic feature of the real-time measurement data of the self-aligned measurement reference pattern, but also represents the implicit or characteristic feature of the scanning image measurement data of the self-aligned measurement reference pattern.
In some embodiments, the real-time metrology data and the scanned image metrology data each include an overlay error parameter, a fitting function mean, a fitting function standard deviation, a first standard deviation, a second standard deviation, and a third standard deviation; the fitting function is obtained according to overlay errors of self-aligned measurement reference patterns in different areas on the wafer; the first standard deviation is the standard deviation of the distance between the center point of the self-aligned measurement reference pattern on the wafer and the center point of the corresponding wafer exposure basic unit; the second standard deviation is the standard deviation of the positions of the plurality of self-aligned measurement reference patterns; the third standard deviation is the standard deviation of the random repeated measurement calibration parameters.
In some embodiments, the first accuracy data idm_acc and the second accuracy data sem_acc are calculated according to the following formulas:
in the above, M3 sigma 1 、μ slope1 、σ slope1 、σ A2li1 、σ ASR1 Sigma (sigma) Repro1 Respectively representing an overlay error parameter, a fitting function mean value, a fitting function standard deviation, a first standard deviation, a second standard deviation and a third standard deviation in real-time measurement data; m3σ 2 、μ slope2 、σ slope2 、σ A2i2 、σ ASR2 Sigma (sigma) Repro2 Respectively representing overlay error parameters, fitting function mean values, fitting function standard deviations, first standard deviations, second standard deviations and third standard deviations in the scanned image measurement data.
In some embodiments, the target accuracy Acc is calculated from the first accuracy data idm_acc and the second accuracy data sem_acc according to the following formula:
in the above formula, m and n are specific gravity coefficients, m is E (0, 1), and n is E (0, 1).
In some embodiments, m=n=1.
In some embodiments, the wafer variance w2w is calculated according to the following formula:
in the above description, mean is the average value of overlay accuracy of the self-aligned measurement reference pattern on the wafer; 3 sigma is the confidence level of the overlay accuracy of the self-aligned measurement reference pattern; sigma (sigma) slope Standard deviation of the fitting function; mu (mu) slope Is the mean of the fitting function.
In some embodiments, the target monitor data SPEC is calculated according to the following formula from the target accuracy Acc and the wafer variance w2w:
SPEC＝x*Acc+y*w2w；
in the above formula, x and y are proportionality coefficients, x is E (0, 1), and y is E (0, 1).
In some embodiments, x=y=1.
In some embodiments, the self-aligned metrology reference pattern includes a first alignment mark and a second alignment mark located on different layers of the wafer for determining a real-time overlay error of the first alignment mark and the second alignment mark based on an asymmetry of a light intensity distribution of zero-order diffracted light.
In some embodiments, an overlay error map of the wafer is created from real-time overlay errors of the first alignment mark and the second alignment mark.
In some embodiments, the overlay error map includes a real-time metrology map and a scanned image metrology map.
According to some embodiments, a second aspect of the disclosure provides a semiconductor measurement accuracy monitoring device, including a measurement data acquisition module, a target accuracy calculation module, a wafer variance calculation module, and a determination module, where the measurement data acquisition module is configured to acquire real-time measurement data and scan image measurement data of a self-aligned measurement reference pattern on a semiconductor structure; the target accuracy calculating module is used for calculating first accuracy data according to a first preset algorithm according to the real-time measurement data, calculating second accuracy data according to the first preset algorithm according to the scanning image measurement data, and calculating target accuracy according to the first accuracy data and the second accuracy data; the wafer difference degree calculation module is used for calculating the wafer difference degree according to the real-time measurement data and a second preset algorithm; the judging module is used for calculating target monitoring data according to a third preset algorithm according to the target accuracy and the wafer difference degree, comparing the target monitoring data with preset accuracy range data and judging whether the overlay accuracy of the wafer is normal or not according to a comparison result.
In some embodiments, the real-time metrology data and the scanned image metrology data each include an overlay error parameter, a fitting function mean, a fitting function standard deviation, a first standard deviation, a second standard deviation, and a third standard deviation; the fitting function is obtained according to overlay errors of self-aligned measurement reference patterns in different areas on the wafer; the first standard deviation is the standard deviation of the distance between the center point of the self-aligned measurement reference pattern on the wafer and the center point of the corresponding wafer exposure basic unit; the second standard deviation is the standard deviation of the positions of the plurality of self-aligned measurement reference patterns; the third standard deviation is the standard deviation of the random repeated measurement calibration parameters.
According to some embodiments, a third aspect of the present disclosure provides a semiconductor metrology accuracy monitoring device comprising a memory and a processor, the memory having stored thereon a computer program executable on the processor, the processor when executing the program implementing the steps of the method in any of the embodiments of the present disclosure.
According to some embodiments, a fourth aspect of the present disclosure provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method in any of the embodiments of the present disclosure.
In the semiconductor measurement accuracy monitoring device, apparatus or computer readable storage medium in the above embodiments, since the target monitoring data represents both the implicit or characteristic feature of the real-time measurement data of the self-aligned measurement reference pattern and the implicit or characteristic feature of the scan image measurement data of the self-aligned measurement reference pattern, compared with the method using single real-time measurement data or single scan image measurement data, the method and apparatus disclosed in the embodiment take both the characteristics and advantages into consideration, effectively improve the efficiency and accuracy of semiconductor measurement accuracy monitoring, have high automation degree, and avoid the subjective error caused by manual judgment.
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In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and it is also possible for a person skilled in the art to obtain drawings of other embodiments according to these drawings without inventive effort.
FIG. 1 is a schematic diagram of a scan image of a self-aligned metrology reference pattern acquired on a semiconductor structure in accordance with one embodiment of the present disclosure;
FIG. 2 is a schematic cross-sectional view of the overlay error obtained from the scanned image of FIG. 1;
FIG. 3 is a schematic diagram of the scan image acquisition overlay error according to FIG. 1;
FIG. 4 is a flow chart of a method for monitoring semiconductor measurement accuracy according to an embodiment of the disclosure;
FIG. 5a is a schematic top view of a self-aligned metrology reference pattern in accordance with one embodiment of the present disclosure;
FIG. 5b is a schematic cross-sectional structure of the marking unit of FIG. 5a with a value of "0.0";
FIG. 5c is a schematic cross-sectional view of the marking unit of FIG. 5a with a value of "5.0";
FIG. 6a is a schematic top view of a real-time metrology map in accordance with one embodiment of the present disclosure;
FIG. 6b is a schematic top view of a scanned image metrology map in accordance with one embodiment of the present disclosure;
FIG. 6c is a schematic diagram of a fitted curve according to an embodiment of the present disclosure;
FIG. 7 is a schematic diagram of a semiconductor measurement accuracy monitoring device according to an embodiment of the disclosure.
Reference numerals and description:
21. a front layer; 22. when the layer is formed; 50. a semiconductor measurement accuracy monitoring device; 51. a measurement data acquisition module; 52. a target accuracy calculation module; 53. a wafer difference degree calculation module; 54. a judging module; 31. a first alignment mark; 32. and a second alignment mark.
Detailed Description
In order that the disclosure may be understood, a more complete description of the disclosure will be rendered by reference to the appended drawings. Preferred embodiments of the present disclosure are shown in the drawings. This disclosure may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used in the description of the disclosure herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Where the terms "comprising," "having," and "including" are used herein, another component may also be added unless explicitly defined as such, e.g., "consisting of … …," etc. Unless mentioned to the contrary, singular terms may include plural and are not to be construed as being one in number.
It will be understood that, although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure.
The development of semiconductor technology is generally limited to the development of photolithography, which is a process of transferring a mask pattern onto a wafer through a series of steps such as alignment, exposure, etc., and the reduction of feature sizes has put more stringent demands on overlay accuracy. If the overlay accuracy between different layers on the semiconductor structure does not meet the requirement of the design criterion, the functions of the front-stage device and the back-stage connecting wire can be invalid, and the yield loss of the product is directly caused.
Referring to fig. 1-3, in order to ensure that the Overlay accuracy between different layers on the semiconductor structure meets the accuracy required by the design rule, a scanning image (shown as b in fig. 1) is generally obtained by scanning an alignment pattern (shown as a graph in fig. 1) on the semiconductor structure based on a scanning electron microscope (Scanning Electron Microscope, SEM), the alignment pattern boundary is resolved based on image recognition, the center of the current layer 22 and the center of the front layer 21 are clearly shown in fig. 2, and the Overlay error (OVL) between the two layers is determined according to the offset of the center of the current layer 22 relative to the center of the front layer 21. Fig. 3 a shows zero overlay error, and fig. 3 b shows overlay error when the layer (stripe vertical pattern) has an orientation as indicated by the arrow for the front layer (elliptical oblique pattern). The scanning image measuring means mainly distinguishes the boundary of the graph through image recognition, respectively determines the centers of the current layer graph and the front layer graph to calculate the offset value of the centers of the two layers of graphs, and the method can directly measure the offset according to the image. However, since how the boundary of the target graphic in the image is defined needs to be determined by human experience judgment to a certain extent, differences can be generated due to different engineers, and certain inaccuracy exists.
The disclosure aims to provide a method, a device, equipment and a medium for monitoring semiconductor measurement precision, which can automatically monitor whether an overlay error of a semiconductor structure meets a preset requirement in a semiconductor production process, reduce subjective differences introduced by manual judgment and dependence on experience and skill of engineers, and effectively improve the measurement efficiency and accuracy of the semiconductor structure.
Referring to fig. 4, in some embodiments of the present disclosure, a method for monitoring semiconductor measurement accuracy is provided, including the following steps:
step S110: acquiring real-time measurement data and scanning image measurement data of a self-aligned measurement reference pattern on a semiconductor structure;
step S120: calculating first accuracy data according to a first preset algorithm according to the real-time measurement data, calculating second accuracy data according to the first preset algorithm according to the scanning image measurement data, and calculating target accuracy according to the first accuracy data and the second accuracy data;
step S130: calculating the wafer difference degree according to the real-time measurement data and a second preset algorithm;
step S140: and calculating target monitoring data according to a third preset algorithm according to the target accuracy and the wafer difference, comparing the target monitoring data with preset accuracy range data, and judging whether the overlay accuracy of the wafer is normal or not according to a comparison result.
For example, please refer to fig. 5 a-5 c, as shown in fig. 5a, an Overlay error (Overlay) after etching is measured by using an optical diffraction IDM (In Device Measure) machine, the Overlay error (Overlay) is accurately compensated, the influence of NZO (None Zero offset) is eliminated, and an Overlay error of each region is obtained by designing a self-aligned measurement reference pattern (ASR mark) and collecting an asymmetric signal of 0-order diffracted light. After acquiring real-time measurement data and scanning image measurement data of a self-aligned measurement reference pattern on a semiconductor structure, calculating according to a first preset algorithm according to the real-time measurement data to obtain first accuracy data, and calculating according to the scanning image measurement data to obtain second accuracy data according to the first preset algorithm, thereby obtaining target accuracy according to the first accuracy data and the second accuracy data, facilitating calculation according to target accuracy and wafer difference degree to obtain target monitoring data.
In some embodiments, please continue to refer to fig. 5 a-5 c, an ASR pattern is used to be placed in the scribe line to measure overlay accuracy after the wafer is etched; the ASR graph comprises a plurality of marking units distributed in an array, the marking units correspond to different positions of an array area on a wafer, each marking unit has a preset overlay error, a fitting function is determined through a fitting algorithm according to the real-time overlay error of each marking unit and the corresponding preset overlay error, the etching calibration quantity of the position can be determined according to the fitting function and the real-time overlay error of a single position, and etching compensation is performed, so that the measuring precision and reliability are improved.
With continued reference to fig. 5 a-5 c, offset data may be provided for each of the marker units in the ASR graphics array region, where the numbers marked on each marker unit represent a corresponding preset overlay error, and each marker unit may be marked with a corresponding offset direction (not shown). As shown in fig. 5 b-5 c, each of the mark units includes a first alignment mark 31 and a second alignment mark 32, the first alignment mark 31 and the second alignment mark 32 being located on different layers on the wafer, for example, the first alignment mark 31 being located on a front layer and the second alignment mark 32 being located on a current layer. The real-time overlay errors of the first alignment mark 31 and the second alignment mark 32 are determined according to the asymmetry of the light intensity distribution of the zero-order diffracted light. The cross-sectional view of the first alignment mark 31 and the second alignment mark 32 in the mark unit labeled with the number "0.0" in fig. 5a may refer to fig. 5b, indicating that the preset overlay error (OVL) between the first alignment mark 31 and the second alignment mark 32 is 0. The cross-sectional view of the first alignment mark 31 and the second alignment mark 32 in the mark unit labeled with the number "5.0" in fig. 5a may refer to fig. 5c, which shows that the offset distance of the preset overlay error (OVL) between the first alignment mark 31 and the second alignment mark 32 is 5.0, wherein an arrow in fig. 5c indicates the offset direction of the second alignment mark 32 with respect to the first alignment mark 31.
In a lithographic process, measurements are made of the formed structure, for example for semiconductor formation process monitoring and verification.
In some embodiments, referring to FIGS. 6 a-6 b, an overlay error map of the wafer may be created based on real-time overlay errors between the first alignment mark 31 and the second alignment mark 32 on each mark unit in the ASR graphics array region. For example, a real-time metrology map (shown in fig. 6 b) of the wafer may be created according to the real-time overlay error between the first alignment mark 31 and the second alignment mark 32, where the real-time metrology map shows offset vectors in real-time metrology data obtained from ASR graphics at different positions on the wafer, the offset vectors including an offset direction (shown by an arrow in fig. 6 b) and an offset distance (not shown in fig. 6 b) in the offset direction. A scan image metrology map of the wafer may be created based on the acquired ASR graphic scan image metrology data on the semiconductor structure (as shown in fig. 6 a), the scan image metrology map exhibiting offset vectors for different locations on the wafer determined based on the scan image metrology data, the offset vectors including an offset direction (shown by the arrow in fig. 6 a) and an offset distance in the offset direction (not shown in fig. 6 a).
In some embodiments, please refer to fig. 6c, data fitting may be performed according to an offset vector (abbreviated as SEM data) in the scanned image measurement data shown in fig. 6a and an offset vector (abbreviated as IDM data) in the real-time measurement data shown in fig. 6b corresponding to each measurement point, to obtain a fitting curve shown in fig. 6c, each measurement point may be shown in a form of (m, n) in a coordinate axis omn, where an om direction may show SEM data corresponding to each measurement point, and an on direction may show IDM data corresponding to each measurement point.
In some embodiments, the real-time metrology data may include, but is not limited to, any one or more of overlay error parameters, fit function mean, fit function standard deviation, first standard deviation, second standard deviation, third standard deviation, etc.; the scanned image metrology data may include, but is not limited to, any one or more of overlay error parameters, fitting function means, fitting function standard deviation, first standard deviation, second standard deviation, third standard deviation, and the like. The fitting function may be obtained according to overlay errors of the self-aligned measurement reference patterns in different regions on the wafer, for example, a fitting function between real-time overlay errors of each mark unit in the self-aligned measurement reference patterns and corresponding preset overlay errors may be determined through a fitting algorithm. The first standard deviation is the standard deviation of the distance between the center point of the self-aligned measurement reference pattern on the wafer and the center point of the corresponding wafer exposure basic unit, so that errors caused by the distribution randomness of the self-aligned measurement reference pattern on the wafer can be reduced; the second standard deviation is the standard deviation of the positions of the plurality of self-aligned measurement reference patterns, so that measurement errors caused by the position parameters of the self-aligned measurement reference patterns can be reduced; the third standard deviation is the standard deviation of the calibration parameters measured randomly and repeatedly, so that accidental errors caused by limited times of measurement can be reduced.
In some embodiments, in step S120, the first accuracy data idm_acc and the second accuracy data sem_acc may be calculated according to the following formula:
in the above, M3 sigma 1 、μ slope1 、σ slope1 、σ A2li1 、σ ASR1 Sigma (sigma) Repro1 Respectively representing an overlay error parameter, a fitting function mean value, a fitting function standard deviation, a first standard deviation, a second standard deviation and a third standard deviation in real-time measurement data; m3σ 2 、μ slope2 、σ slope2 、σ A2i2 、σ ASR2 Sigma (sigma) Repro2 Respectively representing overlay error parameters, fitting function mean values, fitting function standard deviations, first standard deviations, second standard deviations and third standard deviations in the scanned image measurement data.
Can calculate the difference A1, M3σ between the preset overlay error of each mark unit in the self-aligned measurement reference pattern on the semiconductor structure and the average value of the offset in the real-time measurement data 1 Represents the sum of the mean of the offset and the standard deviation of A1 in the real-time measurement data of the self-aligned measurement reference graph.
Similarly, the difference A2, M3σ between the preset overlay error of each mark unit in the self-aligned metrology reference pattern and the mean of the offsets in the scanned image metrology data on the semiconductor structure may be calculated 2 The sum of the mean of the offset and the standard deviation of A2 in the scanned image measurement data representing the self-aligned measurement reference pattern.
The standard deviation (Standard Deviation), also called mean square error (mean square error), is the average of the distances of the individual data from the average, which is the root of the square after the sum of the squares of the mean differences, denoted by sigma. The standard deviation is the arithmetic square root of the variance. The standard deviation can reflect the degree of discretization of a data set. The standard deviation is not necessarily the same for two sets of data with the same average. The standard deviation can be regarded as a measure of uncertainty. In making repeated measurements, the standard deviation of the set of measurement values represents the accuracy of these measurements.
Self-aligned metrology reference on semiconductor structure acquisitionIn the process of measuring the data in real time of the graph: taking the standard deviation of the distance between the center point of the self-aligned measurement reference pattern on the wafer and the center point of the corresponding wafer exposure basic unit as a first standard deviation sigma A2li1 Taking the standard deviation of the self-aligned measurement reference pattern positions as a second standard deviation sigma ASR1 And taking the standard deviation of the random repeated measurement calibration parameter as a third standard deviation sigma Repro1 . First standard deviation sigma of real-time measurement data A2li1 Errors caused by the distribution randomness of the self-aligned measurement reference patterns on the wafer can be avoided; second standard deviation sigma of real-time measurement data ASR1 Measurement errors caused by the position parameters of the self-aligned measurement reference patterns can be avoided; third standard deviation sigma of real-time measurement data Repro1 Accidental errors due to limited number of measurements can be avoided.
In the process of acquiring self-aligned metrology reference pattern and scan image metrology data on a semiconductor structure: taking the standard deviation of the distance between the center point of the self-aligned measurement reference pattern on the wafer and the center point of the corresponding wafer exposure basic unit as a first standard deviation sigma A2i2 Taking the standard deviation of the self-aligned measurement reference pattern positions as a second standard deviation sigma ASR2 And taking the standard deviation of the random repeated measurement calibration parameter as a third standard deviation sigma Repro2 . First standard deviation sigma of scan image measurement data A2i2 Errors caused by the distribution randomness of the self-aligned measurement reference patterns on the wafer can be avoided; second standard deviation sigma of scanned image measurement data ASR2 Measurement errors caused by the position parameters of the self-aligned measurement reference patterns can be avoided; third standard deviation sigma of scanned image measurement data Repro2 Accidental errors due to limited number of measurements can be avoided.
In some embodiments, the standard deviation of the measurement value plays a decisive role, with a larger value of the standard deviation representing a greater probability of the measurement value being erroneous, away from the normal average value. In contrast, the smaller the standard deviation value is, the measurement value is indicated to be within a certain range of values, and the correct measurement value can be reasonably deduced.
In some embodiments, according to the firstThe target accuracy Acc is calculated from one accuracy data idm_acc and the second accuracy data sem_acc according to the following formula:wherein m and n are specific gravity coefficients, and m E (0, 1)]And n is E (0, 1)]. For example, m=0.6, n=0.4, or m=0.3, n=0.7, or m=0.7, n=0.3, or m=0.5, n=0.5, or the like may be set.
In some embodiments, m=n=1, and the specific gravity coefficients of the first accuracy data idm_acc and the second accuracy data sem_acc are set to be the same and equal to 1, so that the calculation is facilitated. Those skilled in the art can determine that, with respect to the specific values of the first accuracy data idm_acc and the second accuracy data sem_acc, the embodiments of the present disclosure are intended to illustrate the implementation principle of the description, and in a specific application scenario, the specific values of the first accuracy data idm_acc and the second accuracy data sem_acc may be set according to actual requirements.
In some embodiments, the wafer variance w2w is calculated according to the following formula:wherein mean is the average value of overlay accuracy of the self-aligned measurement reference pattern on the wafer; 3 sigma is the confidence level of the overlay accuracy of the self-aligned measurement reference pattern; sigma (sigma) slope Standard deviation of the fitting function; mu (mu) slope Is the mean of the fitting function.
In addition to the fitting function shown in fig. 6c, in the process of obtaining real-time metrology data of the self-aligned metrology reference pattern on the semiconductor structure, a fitting function between real-time overlay errors, corresponding pre-set overlay errors, of each of the marker units in the self-aligned metrology reference pattern may be determined via a fitting algorithm. For example, using the thickness direction of the wafer as oz direction, and using the ox direction and the oy direction shown in fig. 6 a-6 b to establish a three-dimensional coordinate system oxyz of the wafer stereo space, in the process of obtaining the scanned image measurement data of the self-aligned measurement reference pattern on the semiconductor structure, the fitting function between the real-time overlay error and the corresponding position data of each mark unit in the self-aligned measurement reference pattern can be determined through the fitting algorithm.
In some embodiments, the target monitor data SPEC is calculated according to the following formula from the target accuracy Acc and the wafer variance w2 w: spec=x acc+y w2w; where x and y are scaling factors, x e (0, 1), y e (0, 1) may be set, for example, x=0.6, y=0.4, or x=0.3, y=0.7, or x=0.7, y=0.3, or x=0.5, y=0.5, or the like may be set.
In some embodiments, x=y=1. The specific gravity coefficients of the target accuracy Acc and the wafer difference degree w2w are the same and equal to 1, so that the calculation is convenient. Those skilled in the art can determine, without doubt, that, regarding the specific values of the target accuracy Acc and the wafer variance w2w, the embodiments of the present disclosure are intended to illustrate the implementation principle of the disclosure, and in a specific application scenario, specific values of the target accuracy Acc and the wafer variance w2w may be set according to actual requirements.
TABLE 1
In table 1, the overlay error parameter, the fit function mean, the fit function standard deviation, the first standard deviation, the second standard deviation, and the third standard deviation in the real-time measurement data, and the overlay error parameter, the fit function mean, the fit function standard deviation, the first standard deviation, the second standard deviation, and the third standard deviation in the scanned image measurement data are calculated according to the fit function shown in fig. 6c and the calculation formula. The target accuracy is obtained through calculation according to the first accuracy data and the second accuracy data, the target monitoring data is conveniently obtained through calculation according to the target accuracy and the wafer difference, and the target monitoring data not only shows the characteristics of real-time measurement data implication or characterization of the self-aligned measurement reference graph, but also shows the characteristics of scan image measurement data implication or characterization of the self-aligned measurement reference graph.
Although the steps in the flowchart of fig. 4 are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, while at least a portion of the steps in FIG. 4 may include multiple sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, the execution of the sub-steps or stages in turn is not necessarily performed in turn, but may be performed alternately or alternately with at least a portion of the sub-steps or stages of other steps or other steps.
Referring to fig. 7, in some embodiments of the present disclosure, a semiconductor measurement accuracy monitoring device 50 includes a measurement data acquisition module 51, a target accuracy calculation module 52, a wafer variance calculation module 53, and a determination module 54, where the measurement data acquisition module 51 is configured to acquire real-time measurement data and scan image measurement data of a self-aligned measurement reference pattern on a semiconductor structure; the target accuracy calculating module 52 is configured to calculate first accuracy data according to a first preset algorithm according to the real-time measurement data, calculate second accuracy data according to the first preset algorithm according to the scanned image measurement data, and calculate a target accuracy according to the first accuracy data and the second accuracy data; the wafer difference calculating module 53 is configured to calculate a wafer difference according to a second preset algorithm according to the real-time measurement data; the judging module 54 is configured to calculate target monitoring data according to a third preset algorithm according to the target accuracy and the wafer difference, compare the target monitoring data with the preset accuracy range data, and judge whether the overlay accuracy of the wafer is normal according to the comparison result. The target monitoring data not only represents the implicit or represented characteristics of the real-time measurement data of the self-aligned measurement reference graph, but also represents the implicit or represented characteristics of the scanning image measurement data of the self-aligned measurement reference graph, and compared with the method for utilizing single real-time measurement data or single scanning image measurement data, the embodiment of the disclosure takes the characteristics and advantages of the two into consideration, effectively improves the efficiency and accuracy of the semiconductor measurement accuracy monitoring, has high automation degree, and avoids subjective errors caused by manual judgment.
In some embodiments, the semiconductor measurement accuracy monitoring device further includes an overlay error map building module, configured to build an overlay error map of the wafer according to real-time overlay errors of the first alignment mark and the second alignment mark, where a real-time measurement map of the wafer may be built according to real-time overlay errors of the first alignment mark and the second alignment mark, and offset vectors in real-time measurement data obtained from ASR graphics at different positions on the wafer are displayed on the real-time measurement map, where the offset vectors include an offset direction and an offset distance in the offset direction. And a scanning image measurement map of the wafer can be established according to the acquired ASR graph scanning image measurement data on the semiconductor structure, and offset distances determined by different positions on the wafer according to the scanning image measurement data are displayed on the scanning image measurement map.
In some embodiments, the real-time metrology data may include, but is not limited to, any one or more of overlay error parameters, fit function mean, fit function standard deviation, first standard deviation, second standard deviation, third standard deviation, etc.; the scanned image metrology data may include, but is not limited to, any one or more of overlay error parameters, fitting function means, fitting function standard deviation, first standard deviation, second standard deviation, third standard deviation, and the like. The fitting function may be obtained according to overlay errors of the self-aligned measurement reference patterns in different regions on the wafer, for example, a fitting function between real-time overlay errors of each mark unit in the self-aligned measurement reference patterns and corresponding preset overlay errors may be determined through a fitting algorithm. The first standard deviation is the standard deviation of the distance between the center point of the self-aligned measurement reference pattern on the wafer and the center point of the corresponding wafer exposure basic unit, so that errors caused by the distribution randomness of the self-aligned measurement reference pattern on the wafer can be avoided; the second standard deviation is the standard deviation of the positions of the plurality of self-aligned measurement reference patterns, so that measurement errors caused by the position parameters of the self-aligned measurement reference patterns can be avoided; the third standard deviation is the standard deviation of the calibration parameters measured randomly and repeatedly, so that accidental errors caused by limited times of measurement can be avoided.
In some embodiments, referring to fig. 7, the target accuracy calculation module 52 may calculate the first accuracy data idm_acc and the second accuracy data sem_acc according to the following formula:
in the above, M3 sigma 1 、μ slope1 、σ slope1 、σ A2li1 、σ ASR1 Sigma (sigma) Repro1 Respectively representing an overlay error parameter, a fitting function mean value, a fitting function standard deviation, a first standard deviation, a second standard deviation and a third standard deviation in real-time measurement data; m3σ 2 、μ slope2 、σ slope2 、σ A2i2 、σ ASR2 Sigma (sigma) Repro2 Respectively representing overlay error parameters, fitting function mean values, fitting function standard deviations, first standard deviations, second standard deviations and third standard deviations in the scanned image measurement data.
Can calculate the difference A1, M3σ between the preset overlay error of each mark unit in the self-aligned measurement reference pattern on the semiconductor structure and the average value of the offset in the real-time measurement data 1 Represents the sum of the mean of the offset and the standard deviation of A1 in the real-time measurement data of the self-aligned measurement reference graph.
Similarly, the difference A2, M3σ between the preset overlay error of each mark unit in the self-aligned metrology reference pattern and the mean of the offsets in the scanned image metrology data on the semiconductor structure may be calculated 2 The sum of the mean of the offset and the standard deviation of A2 in the scanned image measurement data representing the self-aligned measurement reference pattern.
In some embodiments, referring to fig. 7, the target accuracy calculating module 52 may calculate the target accuracy Acc according to the following formula according to the first accuracy data idm_acc and the second accuracy data sem_acc:
in the above formula, m, n are specific gravity coefficients, m ε (0, 1) and n ε (0, 1) may be set, for example, m=0.6, n=0.4, or m=0.3, n=0.7, or m=0.7, n=0.3, or m=0.5, n=0.5, or the like may be set.
In some embodiments, m=n=1, and the specific gravity coefficients of the first accuracy data idm_acc and the second accuracy data sem_acc are set to be the same and equal to 1, so that the calculation is facilitated.
In some embodiments, please continue with fig. 7, the wafer variance calculating module 53 may calculate the wafer variance w2w according to the following formula:
in the above description, mean is the average value of overlay accuracy of the self-aligned measurement reference pattern on the wafer; 3 sigma is the confidence level of the overlay accuracy of the self-aligned measurement reference pattern; sigma (sigma) slope Standard deviation of the fitting function; mu (mu) slope Is the mean of the fitting function.
In some embodiments, referring to fig. 7, the determining module 54 may calculate the target monitor data SPEC according to the following formula according to the target accuracy Acc and the wafer variance w2w:
SPEC＝x*Acc+y*w2w；
In the above formula, x and y are proportionality coefficients, x∈ (0, 1), y∈ (0, 1) may be set, for example, x=0.6, y=0.4, or x=0.3, y=0.7, or x=0.7, y=0.3, or x=0.5, y=0.5, or the like may be set.
In some embodiments, x=y=1. The specific gravity coefficients of the target accuracy Acc and the wafer difference degree w2w are the same and equal to 1, so that the calculation is convenient.
In some embodiments, a semiconductor metrology accuracy monitoring device is provided, comprising a memory and a processor, the memory having stored thereon a computer program executable on the processor, the processor executing the program to perform the steps of the method in any of the embodiments of the present disclosure.
In some embodiments, a computer-readable storage medium is provided, on which a computer program is stored which, when executed by a processor, implements the steps of the method in any of the embodiments of the disclosure.
In the semiconductor measurement accuracy monitoring device, apparatus or computer readable storage medium in the above embodiments, since the target monitoring data represents both the implicit or characteristic feature of the real-time measurement data of the self-aligned measurement reference pattern and the implicit or characteristic feature of the scan image measurement data of the self-aligned measurement reference pattern, compared with the method using single real-time measurement data or single scan image measurement data, the method and apparatus disclosed in the embodiment take both the characteristics and advantages into consideration, effectively improve the efficiency and accuracy of semiconductor measurement accuracy monitoring, have high automation degree, and avoid the subjective error caused by manual judgment.
Although specific reference may have been made above to the use of embodiments of the disclosure in the context of optical lithography, it will be appreciated that the disclosure may be used in other applications, for example imprint lithography, and where the context allows, is not limited to optical lithography. In imprint lithography, topography in a patterning device defines the pattern created on a substrate. The topography of the patterning device may be printed into a layer of resist supplied to the substrate whereupon the resist is cured by applying electromagnetic radiation, heat, pressure or a combination thereof. After the resist is cured, the patterning device is removed from the resist and a pattern is left in the resist.
Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided by the present disclosure may include non-volatile and/or volatile memory.
Note that the above embodiments are for illustrative purposes only and are not meant to limit the present disclosure.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples represent only a few embodiments of the present disclosure, which are described in more detail and detail, but are not to be construed as limiting the scope of the disclosure. It should be noted that variations and modifications can be made by those skilled in the art without departing from the spirit of the disclosure, which are within the scope of the disclosure. Accordingly, the scope of protection of the present disclosure should be determined by the following claims.
Claims (15)
1. A method for monitoring the measurement accuracy of a semiconductor, comprising:
Acquiring real-time measurement data and scanning image measurement data of a self-aligned measurement reference pattern on a semiconductor structure;
calculating first accuracy data according to a first preset algorithm according to the real-time measurement data, calculating second accuracy data according to the first preset algorithm according to the scanning image measurement data, and calculating target accuracy according to the first accuracy data and the second accuracy data;
calculating the wafer difference degree according to the real-time measurement data and a second preset algorithm;
and calculating target monitoring data according to a third preset algorithm according to the target accuracy and the wafer difference, comparing the target monitoring data with preset accuracy range data, and judging whether the overlay accuracy of the wafer is normal or not according to a comparison result.
2. The method of claim 1, wherein the real-time metrology data and the scanned image metrology data each comprise overlay error parameters, a fitting function mean, a fitting function standard deviation, a first standard deviation, a second standard deviation, and a third standard deviation;
the fitting function is obtained according to overlay errors of the self-aligned measurement reference patterns in different areas on the wafer;
The first standard deviation is the standard deviation of the distance between the center point of the self-alignment measurement reference pattern on the wafer and the center point of the corresponding wafer exposure basic unit;
the second standard deviation is the standard deviation of the positions of the self-aligned measurement reference patterns;
the third standard deviation is the standard deviation of the calibration parameters measured randomly and repeatedly.
3. The method according to claim 2, wherein the first accuracy data idm_acc and the second accuracy data sem_acc are calculated according to the following formulas:
in the above, M3 sigma 1 、μ slope1 、σ slope1 、σ A2li1 、σ ASR1 Sigma (sigma) Repro1 Respectively representing the overlay error parameter, the fitting function mean, the fitting function standard deviation, the first standard deviation, the second standard deviation and the third standard deviation in the real-time measurement data; m3σ 2 、μ slope2 、σ slope2 、σ A2i2 、σ ASR2 Sigma (sigma) Repro2 And respectively representing the overlay error parameter, the fitting function mean value, the fitting function standard deviation, the first standard deviation, the second standard deviation and the third standard deviation in the scanned image measurement data.
4. A method according to claim 3, characterized in that a target accuracy Acc is calculated from the first accuracy data idm_acc and the second accuracy data sem_acc according to the following formula:
In the above formula, m and n are specific gravity coefficients, m is E (0, 1), and n is E (0, 1).
5. The method of claim 4, wherein m = n = 1.
6. The method of claim 4, wherein the wafer variance w2w is calculated according to the formula:
in the above description, mean is the average value of overlay accuracy of the self-aligned measurement reference pattern on the wafer;
3 sigma is the confidence coefficient of the overlay accuracy of the self-aligned measurement reference graph;
σ slope standard deviation for the fitting function;
μ slope to be the instituteAnd (5) fitting the mean value of the function.
7. The method of claim 6, wherein the target monitor data SPEC is calculated from the target accuracy Acc and the wafer variance w2w according to the following formula:
SPEC＝x*Acc+y*w2w；
in the above formula, x and y are proportionality coefficients, x is E (0, 1), and y is E (0, 1).
8. The method of claim 7, wherein x = y = 1.
9. The method of any of claims 1-8, wherein the self-aligned metrology reference pattern comprises a first alignment mark and a second alignment mark, the first alignment mark and the second alignment mark being located on different layers of the wafer, for determining a real-time overlay error of the first alignment mark and the second alignment mark based on an asymmetry of a light intensity distribution of zero-order diffracted light.
10. The method as recited in claim 9, further comprising:
and establishing an overlay error map of the wafer according to the real-time overlay errors of the first alignment mark and the second alignment mark.
11. The method of claim 10, wherein the overlay error map comprises a real-time metrology map and a scanned image metrology map.
12. A semiconductor measurement accuracy monitoring device, comprising:
the measuring data acquisition module is used for acquiring real-time measuring data and scanning image measuring data of the self-aligned measuring reference graph on the semiconductor structure;
the target accuracy computing module is used for computing first accuracy data according to a first preset algorithm according to the real-time measurement data, computing second accuracy data according to the first preset algorithm according to the scanning image measurement data and computing target accuracy according to the first accuracy data and the second accuracy data;
the wafer difference degree calculation module is used for calculating the wafer difference degree according to the real-time measurement data and a second preset algorithm;
and the judging module is used for calculating target monitoring data according to a third preset algorithm according to the target accuracy and the wafer difference, comparing the target monitoring data with preset accuracy range data and judging whether the overlay accuracy of the wafer is normal or not according to a comparison result.
13. The apparatus of claim 12, wherein the real-time metrology data and the scanned image metrology data each comprise overlay error parameters, a fitting function mean, a fitting function standard deviation, a first standard deviation, a second standard deviation, and a third standard deviation;
the fitting function is obtained according to overlay errors of the self-aligned measurement reference patterns in different areas on the wafer;
the first standard deviation is the standard deviation of the distance between the center point of the self-alignment measurement reference pattern on the wafer and the center point of the corresponding wafer exposure basic unit;
the second standard deviation is the standard deviation of the positions of the self-aligned measurement reference patterns;
the third standard deviation is the standard deviation of the calibration parameters measured randomly and repeatedly.
14. A semiconductor metrology accuracy monitoring device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any of claims 1-11 when the computer program is executed.
15. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1-11.
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