CN117354120A - Method, device and medium for sending request and receiving overhead across chips of OTN - Google Patents
Method, device and medium for sending request and receiving overhead across chips of OTN Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/06—Management of faults, events, alarms or notifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/03—Arrangements for fault recovery
- H04B10/032—Arrangements for fault recovery using working and protection systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/03—Arrangements for fault recovery
- H04B10/038—Arrangements for fault recovery using bypasses
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1652—Optical Transport Network [OTN]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/06—Management of faults, events, alarms or notifications
- H04L41/0654—Management of faults, events, alarms or notifications using network fault recovery
- H04L41/0663—Performing the actions predefined by failover planning, e.g. switching to standby network elements
Abstract
Method, device and medium for sending request and receiving overhead across chips of an OTN, wherein the method for sending request is applied to a first chip in the OTN, and the method comprises the following steps: generating an overhead request according to external overhead enabling configuration of overhead bytes, and writing the overhead request into a second storage queue; generating a protection request according to the enabling configuration of the protection group, and writing the protection request into a third storage queue; reading the overhead request stored in the second storage queue and the protection request stored in the third storage queue, generating control information, and writing the control information into a fourth storage queue; and reading the control information stored in the fourth storage queue, and sending the control information to a second chip in the OTN for processing.
Description
The application is a divisional application of application number 202310822808.7, application date 2023.07.06, and the invention name is a method, a device and a medium for sending and receiving overhead and requests across chips by an OTN.
Technical Field
The present disclosure relates to OTN technologies, and in particular, to a method, an apparatus, and a medium for sending a request and receiving overhead across chips in an OTN.
Background
The optical transport network OTN completes network maintenance management through rich overhead, but in the special OTN chip designed by each equipment manufacturer at present, the use of part of general overhead bytes is not completely consistent, for example, when the DCN channel function is realized, some equipment manufacturers only use GCC0/GCC1/GCC2 overhead bytes, and some equipment manufacturers may also use RES bytes to improve the bandwidth of the DCN channel; and the logic in the dedicated chip cannot change once solidified.
Therefore, in order to prevent cost processing errors, or to facilitate the special purpose of a special chip user, a transmission channel can be opened up in the special chip, and then the cost of the special chip for transmitting and extracting to the external FPGA and the cost of receiving the cost transmitted by the external FPGA are realized by adding a field programmable gate array FPGA with low cost outside, so as to realize differentiated cost processing functions.
However, the present document only describes the technical scheme of performing cross-chip transmission for partial overhead self-section, such as APS/PCC, GCC0, GCC1, GCC2, RES bytes, and cannot insert and extract all overhead bytes in OTN, which cannot play the roles of protection and escape channel.
Disclosure of Invention
The application provides a method, a device and a medium for sending requests and receiving overhead across chips of an OTN, which are suitable for the transmission of all overhead bytes in the OTN and have strong universality.
The method for sending an overhead request by an Optical Transport Network (OTN) across chips is applied to a first chip in the OTN, and comprises the following steps:
generating an overhead request according to external overhead enabling configuration of overhead bytes, and writing the overhead request into a second storage queue;
generating a protection request according to the enabling configuration of the protection group, and writing the protection request into a third storage queue;
reading the overhead request stored in the second storage queue and the protection request stored in the third storage queue, generating control information, and writing the control information into a fourth storage queue;
and reading the control information stored in the fourth storage queue, and sending the control information to a second chip in the OTN for processing.
As an example embodiment, generating an overhead request according to an external overhead enable configuration of overhead bytes and writing the overhead request to a second store queue, comprises:
after receiving an overhead request applied by a data path, inquiring external overhead enabling configuration of a corresponding line of the overhead request, and generating an overhead request to write into a second FIFO (first in first out) under the condition that at least 1 overhead byte of a current line is configured as external overhead enabling, wherein the overhead request comprises the enabling configuration, line information, multiframe information and channel information of the current line.
As an example embodiment, the multiframe information contained in the overhead request written to the second FIFO is the multiframe information contained in the overhead request of the data path application plus 1.
As an example embodiment, the control information sent by the first chip to the second chip includes control information for overhead requests or control information for protection requests.
The method for receiving overhead bytes by the optical transport network OTN cross-chip provided by the embodiment of the application is applied to a first chip in the OTN, and the method comprises the following steps:
receiving data of overhead bytes sent by a second chip and protection information;
and executing corresponding processing on the data of the overhead byte and the protection information according to the control information sent to the second chip, wherein the control information comprises control information for overhead request or control information for protection request.
As an example embodiment, according to the control information sent to the second chip, performing corresponding processing on the data of the overhead byte and the protection information, including:
when the control information sent to the second chip is the control information for the overhead request, writing the received overhead byte data into an overhead cache; the write address includes: line information, multi-frame information, and channel information.
As an example embodiment, according to the control information sent to the second chip, performing corresponding processing on the data of the overhead byte and the protection information, including:
and when the control information sent to the second chip is the control information for protecting the request, the received protection information is sent to the protection switching module.
The embodiment of the application provides a computer readable storage medium, where one or more programs are stored, where the one or more programs may be executed by one or more processors, so as to implement a method for sending an overhead request across chips by an OTN of an optical transmission network according to any one of the previous embodiments, or implement a method for receiving an overhead byte across chips by an OTN of an optical transmission network according to any one of the previous embodiments.
The device for sending the overhead request across chips by the optical transport network OTN provided by the embodiment of the application includes a memory and a processor, where the memory stores a program, and when the program is read and executed by the processor, the method for sending the overhead request across chips by the optical transport network OTN described in any embodiment is implemented.
The device for receiving overhead bytes by the optical transport network OTN cross-chip provided by the embodiment of the application comprises a memory and a processor, wherein the memory stores a program, and when the program is read and executed by the processor, the method for receiving the overhead bytes by the optical transport network OTN cross-chip described in any embodiment is realized.
Compared with the related art, the method for sending the overhead request and receiving the overhead bytes by the OTN cross-chip disclosed by the embodiment of the application is applicable to all overhead bytes and has strong universality; in addition, the embodiment of the application supports the request of protecting bytes and the receiving of protecting information, and can make up the defect that the protection SF/SD of the existing OTN is inside a chip and cannot realize an APS protection protocol.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. Other advantages of the present application may be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The accompanying drawings are included to provide an understanding of the technical aspects of the present application, and are incorporated in and constitute a part of this specification, illustrate the technical aspects of the present application and together with the examples of the present application, and not constitute a limitation of the technical aspects of the present application.
Fig. 1 is a flowchart of a method for sending overhead bytes across chips by an OTN according to an embodiment of the present application;
FIG. 2 is a block diagram of a system for communication between a first chip and a second chip according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a state machine provided in an embodiment of the present application;
FIG. 4 is a state transition flow chart of a state machine provided in an embodiment of the present application;
fig. 5 is a flowchart of a method for sending an overhead request across chips by an OTN according to an embodiment of the present application;
FIG. 6 is a flowchart of a method for receiving overhead bytes across chips for an OTN according to an embodiment of the present application;
fig. 7 is a device structure diagram of an OTN transmitting overhead bytes across chips according to an embodiment of the present application.
Detailed Description
The present application describes a number of embodiments, but the description is illustrative and not limiting and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or in place of any other feature or element of any other embodiment unless specifically limited.
The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements of the present disclosure may also be combined with any conventional features or elements to form a unique inventive arrangement as defined in the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive arrangements to form another unique inventive arrangement as defined in the claims. Thus, it should be understood that any of the features shown and/or discussed in this application may be implemented alone or in any suitable combination. Accordingly, the embodiments are not to be restricted except in light of the attached claims and their equivalents. Further, various modifications and changes may be made within the scope of the appended claims.
Furthermore, in describing representative embodiments, the specification may have presented the method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. Other sequences of steps are possible as will be appreciated by those of ordinary skill in the art. Accordingly, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Furthermore, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present application.
The embodiment of the application provides a method for transmitting overhead bytes across chips in an Optical Transport Network (OTN), which is applied to a first chip in the OTN, as shown in fig. 1, and comprises the following steps:
step S101 writes the data of the overhead byte in the OTUk frame of the optical transmission unit into the overhead buffer, where k=1, 2 or 3, respectively represents the frame structures of three different rates;
writing the data of the overhead byte into an overhead cache, wherein the writing address is { channel number, row number, column number };
step S102, generating an overhead extraction request of the overhead byte according to the enabling configuration of the overhead byte from the extraction to the outside, and writing the overhead extraction request into a first storage queue;
extracting the overhead to the outside, configuring 16 bits in total, and configuring the corresponding Bit as 1 if the overhead byte of 16 columns needs to be extracted to the outside;
the enabling configuration exists in the first chip and the second chip and can be issued to the first chip and the second chip by the CPU, so that the second chip can know that the received data of the overhead byte is the data of the byte of a certain row and a certain column in the frame according to the enabling configuration, and the second chip does not need to send row and column information additionally;
step S103 reads the overhead extracting requests stored in the first storage queue sequentially, and sends the data and control information of the overhead byte extracted to the external enabled overhead byte to the second chip in the OTN for processing.
The method for sending the overhead bytes by the OTN cross-chip disclosed by the embodiment of the application is applicable to all overhead bytes and has strong universality.
Fig. 2 is a system block diagram of communication between a first chip and a second chip according to an embodiment of the present application. In the figure, the master chip is the first chip, and the slave chip is the second chip.
In an exemplary embodiment, step S103 sequentially reads the overhead extraction requests stored in the first storage queue, including:
generating control information for reading the first storage queue through a state machine with three conversion states, specifically: when each overhead extraction request is read, determining the current state of the state machine according to the overhead extraction request and the last state of the state machine; determining and reading control information of the first storage queue according to the current state of the state machine;
the three conversion states are respectively as follows: a transmit idle state, a transmit wait state, and a transmit state.
In an exemplary embodiment, the determining the current state of the state machine according to the overhead extraction request and the last state of the state machine includes:
when the last state of the state machine is an idle state, if the extraction cost contained in the read cost extraction request is started to the external enabling state, entering a sending state; if the extraction cost contained in the read overhead extraction request is closed to the external enabling state, entering a transmission waiting state;
when the last state of the state machine is a sending waiting state, if the extraction cost contained in the read overhead extraction request is started to the external enabling state, entering a sending state; if the extraction cost contained in the read overhead extraction request is closed to the external enabling, and the overhead byte contained in the read overhead extraction request is the last overhead byte, entering an idle state; if the read overhead extraction request contains an overhead byte that is not the last overhead byte, the sending wait state is maintained.
The state machine is as shown in fig. 3, and IDLE represents a transmission IDLE state; TXWAIT represents a transmission wait state, meaning that the current overhead extraction request does not meet the transmission requirement and the next stored overhead extraction request needs to be continuously queried; TX represents a transmission state, meaning that the current request meets the transmission requirement, and may begin to transmit overhead extraction requests.
The state machine consists of a plurality of counters and a plurality of registers, wherein the plurality of counters comprise 1 3Bit counter tx_cnt, the count value is 0-7, and each overhead byte is ensured to be transmitted according to Bit; the plurality of registers includes tx_ind for byte alignment, and when tx_cnt=0, tx_ind is set to 1, and other times tx_ind is cleared to 0.
The state of the state machine and the state jump conditions are as follows:
initializing the state machine to an IDLE state after resetting, wherein the state machine corresponds to the state change of the state change scheme in FIG. 3; in the IDLE state: when tx_cnt=7, reading an overhead extraction request from the first storage queue, and when the extraction overhead contained in the read overhead extraction request is 0 to the external enable, entering a TXWAIT state, wherein the TXWAIT state corresponds to a state change in fig. 3; when tx_cnt=7, reading an overhead extraction request from the first storage queue, and the extraction overhead contained in the read overhead extraction request is 1 to the external enable, entering a TX state, and corresponding to a state change step in fig. 3; in addition, remain in the IDLE state, corresponding to the state change in fig. 3;
when the state machine enters the TXWAIT state: when tx_cnt=7, reading an overhead extraction request from the first storage queue, and the extraction overhead contained in the read overhead extraction request is 1 to the external enable, entering a TX state, corresponding to the state change in fig. 3; when tx_cnt=7 and the overhead byte of the current line has found the last 1 overhead byte, any overhead extraction request from extracting overhead to external enabling being 1 is still not found, the transmission requirement is not satisfied, and the current line enters an IDLE state, corresponding to the state change in fig. 3; if the above-mentioned is not satisfied, keep the present state; when tx_cnt=7, reading an overhead extraction request from the first storage queue, and the overhead extraction request read contains an extraction overhead of 0 to external enable, but the last 1 overhead byte of the current line is not queried, maintaining TXWAIT, corresponding to the state change in fig. 3;
when the state machine enters TX state: when tx_cnt=7, the overhead byte of the current line has found the last 1 overhead byte, and any overhead extraction request with the enable of 1 is still not found, if the transmission requirement is not met, the current line enters an IDLE state, and corresponds to the state change denoted by the numeral "lane" in fig. 3; when tx_cnt=7, the overhead byte of the current line has not found the last 1 overhead byte, but has not found any overhead extraction request enabled to be 1, if the transmission requirement is not satisfied, the current line enters a TXWAIT state, corresponding to the state change in fig. 3; when tx_cnt=7, the overhead fetch request is read from the first store queue, and the read overhead fetch request contains a fetch overhead of 1 to external enable, then TXWAIT is maintained, corresponding to the state change behavior in fig. 3.
The state transition process of the state machine is shown in a flow chart, as shown in fig. 4.
The state jumps, the state machine must be ensured to jump after tx_cnt counts for 8 times, and when the overhead extraction request is sent, the 8Bit effective overhead extraction request Bit is sent or the 8Bit effective overhead extraction request Bit is all the invalid Bit.
The actions performed in the different states are as follows:
in the IDLE state: the first store queue is readable only when not empty in the IDLE state and is readable only once; after reading the overhead extraction request of the first storage queue, latching overhead insertion enabling to a Shift register shift_reg, and simultaneously latching a channel tx_chn, a multiframe number tx_mfs and a line number tx_row; after the latching is completed, tx_ready is set to 1, and the state machine can enter 2 states (TXWAIT and TX) to be transmitted according to tx_ready=1; tx_ready is cleared when IDLE is about to jump to another state; column indication tx_col clear 0 for indicating which overhead byte of the current row under IDLE; when the TXWAIT state or TX state jumps to the IDLE state, if tx_row=3, then first_byte is set to 1 for indicating the upcoming 1 st overhead byte of the current overhead channel (not the 1 st overhead byte of the OTN, but the 1 st overhead byte of the configuration for outbound transmission);
in the TXWAIT state: when tx_ready=0, shift_reg of the Shift register is allowed to Shift, the lowest bit of the Shift register is 1, shift is stopped, and tx_ready is set to 1; each Shift register shift_reg is used for counting whether all the overhead bytes of the current row are sent, the column count tx_col is increased by 1, and when tx_col=15, the value of the counter is maintained;
in TX state: when tx_ready=0, shift_reg of the Shift register is allowed to Shift, the lowest bit of the Shift register is 1, shift is stopped, and tx_ready is set to 1; each Shift register shift_reg is used for counting whether all the overhead bytes of the current row are sent, the column count tx_col is increased by 1, and when tx_col=15, the value of the counter is maintained; when tx_cnt=7, then first_byte is cleared to 0; when tx_cnt=0, tx_vld sets 1, otherwise 0; when tx_cnt=0, tx_sync is set to 1 if first_byte=1, otherwise 0.
In an exemplary embodiment, the control information of the overhead byte transmitted by the first chip to the second chip includes at least one of multiframe information and channel information of the overhead byte.
In an exemplary embodiment, the data of the overhead byte has 8 bits, the control information of the overhead byte includes 8 bits of first control information and 8 bits of second control information, the highest bit of the first control information is a channel valid flag, and the other bits are channel numbers; the 8 bits of the second control information are multiframe numbers;
when the first control information is sent, the 1 st clock period sends the effective Bit of the channel, the 2 nd clock period sends the Bit 6 of the channel number, and the 8 th clock period sends the Bit0 of the channel number; the 2 nd clock period and the 8 th clock period are different bits with the same 1 channel number, all the transmissions are transmitted in series according to the bits, the channel number is 7 bits, the 2 nd clock period transmits the 6 th bit, and the 8 th clock period transmits the 0 th bit; { tx_vld, tx_chn } forms a group of 8Bit information, tx_vld is placed at the highest Bit, tx_chn is placed at the low Bit, if the number of channels is small, the middle Bit is padded with 0, when tx_ind=1, this 8Bit information is updated to the shift register, the shift to the left by Bit starts, i.e. from high to low, and the highest Bit is output, when the next 1 tx_ind arrives, i.e. 1 complete 8Bit information is sent to completion;
and when the second control information is sent, sending the Bit 7 of the multiframe in the 1 st clock period, and sending the Bit0 of the multiframe in the 8 th clock period.
The first chip sends the data of the overhead byte, the first control information and the second control information through different interfaces.
In an exemplary embodiment, the first chip simultaneously transmits the data of the overhead byte, the first control information, and the second control information in a bit-by-bit transmission manner through different serial interfaces.
The first chip also sends a synchronization indication flag to the second chip, the synchronization indication flag being valid when sending the data and control information of the first overhead byte in the OTUk frame to be externally enabled.
In an exemplary embodiment, the first chip is a master chip, the second chip is a slave chip, and the first chip also sends a clock signal to the second chip.
In an exemplary embodiment, the overhead byte data sent by the first chip to the second chip includes alarm information detected by the first chip and information for signal failure and signal degradation of protection switching.
The failure of the signal generally seriously affects the failure of the link, and the protection generally switches the link to the link without failure according to the failure information of the working link and the protection link;
signal degradation generally refers to that an error code generated by a link due to optical power or other line aging causes exceeds a certain threshold.
In an exemplary embodiment, the first chip writes overhead bytes in the OTUk frame to an overhead buffer, including: the received data of the invalid overhead bytes in the OTUk frame is replaced by the alarm information detected by the chip and then written into the overhead buffer;
in the enabling configuration, the overhead byte replaced by the alarm information and the overhead byte used for the automatic protection switching APS and the protection control signal PCC are configured to extract overhead to external enable.
Overhead bytes of the automatic protection switching APS and the protection control signal PCC include SF/SD information.
In an exemplary embodiment, the positions of the invalid overhead bytes in the OTUk frame and the data of the positions are replaced by the alarm information detected by the chip, which can be shown in table 1, so as to realize the transmission of the alarm information by using the overhead bytes positioned by the OTN partial frame;
TABLE 1
In an exemplary embodiment, the already invalid overhead bytes in the OTUk frame include overhead bytes for frame positioning.
In an exemplary embodiment, generating an overhead extraction request for the overhead byte according to an externally enabled configuration of the overhead byte extraction overhead, and writing the overhead extraction request to a first store queue, includes:
and when the last column overhead of any row of the OTUk frame is received, inquiring the enabling configuration of the current row from the extracting overhead to the outside, and generating an overhead extracting request to write into the first FIFO under the condition that at least 1 overhead byte of the current row is configured to be the enabling configuration of the extracting overhead to the outside, wherein the overhead extracting request comprises the enabling configuration of the current row, row information, multiframe information and channel information.
In an exemplary embodiment, the sequentially reading the overhead extracting requests stored in the first storage queue, and sending the data and the control information of the overhead byte from the overhead extracting to the external enabling to the second chip for processing includes:
sequentially reading overhead extraction requests in the first FIFO, judging the enabling configuration in the overhead extraction requests bit by bit when reading an overhead extraction request, and executing the following processing on each bit in the enabling configuration, which represents the extraction overhead to external enabling:
extracting data of an overhead byte corresponding to the bit from the overhead cache according to the position of the bit in the enabling configuration and row information, multiframe information and channel information in the overhead extraction request;
generating first control information and second control information of an overhead byte corresponding to the bit according to channel information and multiframe information in the overhead extraction request;
and simultaneously transmitting the data of the overhead byte, the first control information and the second control information corresponding to the bit to the second chip in a bit-by-bit transmission mode through different serial interfaces.
In an exemplary embodiment, when the data of the overhead byte, the first control information and the second control information corresponding to the bit are simultaneously sent to the second chip in a bit-by-bit sending manner, the method further includes:
counting by using a first counter with a value of 0 to 7, when the count value is 0, setting a channel valid flag to be valid and outputting the channel valid flag as the highest bit of the first control information, and when the count value is 1 to 7, sequentially outputting channel numbers as other bits of the first control information; a kind of electronic device with high-pressure air-conditioning system
When the count value is 0 and the currently read overhead extraction request is the first overhead extraction request of one OTUk frame, the synchronization indication flag is set to be valid and sent to the second chip through a single serial interface.
The embodiment of the application also provides a method for sending an overhead request across chips by an optical transport network OTN, which is applied to a first chip in the OTN, as shown in fig. 5, and the method includes:
step S401, generating an overhead request according to external overhead enabling configuration of overhead bytes, and writing the overhead request into a second storage queue;
the external overhead of the row with the overhead bytes is enabled to be configured, 16 bits are total, each 1Bit represents 1 column, and the overhead byte of the 16 columns needs to request the overhead to the outside, and the corresponding Bit is configured to be 1;
step S402, generating a protection request according to the enabling configuration of the protection group, and writing the protection request into a third storage queue;
the external overhead enabling configuration of the protection groups is 16 bits, each Bit corresponds to whether 1 protection group is enabled or not, at most, 16 protection group configurations are supported, and if which of the 16 protection groups needs to request to the outside, the corresponding Bit is configured to be 1; for the protection group, the multi-frame, row and column information is not used, the original multi-frame information is fixed to be 0, the row information is fixed to be 3, and the column information is fixed to be 0 in the generated extraction request;
step S403 reads the overhead request stored in the second storage queue and the protection request stored in the third storage queue, generates control information, and writes the control information into a fourth storage queue;
step S404 reads the control information stored in the fourth storage queue, and sends the control information to the second chip in the OTN for processing.
The method for sending the overhead request by the OTN across chips disclosed by the embodiment of the application is applicable to the requests of all overhead bytes and has strong universality; in addition, the embodiment of the application also supports the request protection byte, and can make up the defect that the protection SF/SD of the existing OTN is in the chip and cannot realize the APS protection protocol.
In an exemplary embodiment, generating an overhead request according to an external overhead enable configuration of overhead bytes and writing the overhead request to a second store queue, comprises:
after receiving an overhead request applied by a data path, inquiring external overhead enabling configuration of a corresponding line of the overhead request, and generating an overhead request to write into a second FIFO (first in first out) under the condition that at least 1 overhead byte of a current line is configured as external overhead enabling, wherein the overhead request comprises the enabling configuration, line information, multiframe information and channel information of the current line.
In an exemplary embodiment, the multiframe information contained in the overhead request written to the second FIFO is the multiframe information contained in the overhead request of the data path application plus 1, because it takes time from the request to the output to the external return data, taking into account more than 1 frame earlier application, the multiframe information requested to the external is the multiframe information of the current data path request plus 1, to ensure a fixed delay.
In an exemplary embodiment, reading the overhead request stored in the second store queue and the protection request stored in the third store queue, generating control information, and writing the control information to the fourth store queue, includes:
and polling and scheduling the second storage queue and the third storage queue, and sequentially reading the requests stored in the storage queues to generate control information of the read requests. The method for sequentially reading the requests stored in the storage queue and generating the control information of the read requests may also include: and reading the request stored in the storage queue through a state machine, and generating control information of the read request. The state machine may employ the state machine shown in fig. 3.
In an exemplary embodiment, the control information sent by the first chip to the second chip includes control information for overhead requests or control information for protection requests.
The embodiment of the application also provides a method for receiving overhead bytes by the Optical Transport Network (OTN) across chips, which is applied to a first chip in the OTN, as shown in fig. 6, and the method comprises the following steps:
step S501 receives the data of the overhead byte sent by the second chip and the protection information;
step S502 executes corresponding processing on the overhead byte data and the protection information according to the control information sent to the second chip, where the control information includes control information for overhead request or control information for protection request.
The method for receiving overhead bytes by the OTN cross-chip method disclosed by the embodiment of the application is applicable to all overhead bytes and has strong universality; in addition, the method also supports receiving protection information, and can make up for the defect that the protection SF/SD of the existing OTN is in the chip and cannot realize the APS protection protocol.
In an exemplary embodiment, 1 receive Bit counter bit_cnt may be defined, and if a serial_rx_fpi is received, this beat corresponds to the 1 st Bit of the byte, clear bit_cnt to 0, and add 1 to bit_cnt at other times; the received data starts to Shift shift_dat_reg [7:0] to the Shift register, and when bit_cnt=7, rx_vld is generated; the received serial_rx_fpi is also shifted to shift_fpi_reg [7:0] to generate rx_sync using the Shift register highest Bit; when rx_vld=1, generating a read enable to read the control information;
to ensure that the request information and the returned data information are not misplaced, the request information is compared with the cached request information at the position of the serial_rx_fpi, if tx_sync is also 1, the request information is normal, otherwise, an error is generated, and the cache is reset to restart synchronization.
In an exemplary embodiment, according to the control information sent to the second chip, performing corresponding processing on the data of the overhead byte and the protection information, including:
when the control information sent to the second chip is the control information for the overhead request, writing the received overhead byte data into an overhead cache; the write address includes: line information, multi-frame information, and channel information.
In an exemplary embodiment, according to the control information sent to the second chip, performing corresponding processing on the data of the overhead byte and the protection information, including:
and when the control information sent to the second chip is the control information for protecting the request, the received protection information is sent to the protection switching module.
The embodiment of the application further provides a computer readable storage medium, where one or more programs are stored, where the one or more programs may be executed by one or more processors, so as to implement a method for sending overhead bytes across chips by an OTN of an optical transmission network according to any one of the previous embodiments, or implement a method for sending overhead requests across chips by an OTN of an optical transmission network according to any one of the previous embodiments, or implement a method for receiving overhead bytes across chips by an OTN of an optical transmission network according to any one of the previous embodiments.
The embodiment of the present application further provides an apparatus for sending overhead bytes across chips in an OTN, as shown in fig. 7, which includes a memory 601 and a processor 602, where the memory 601 stores a program, and when the program is read and executed by the processor 602, the method for sending overhead bytes across chips in an OTN according to any one of the previous embodiments is implemented.
The embodiment of the application also provides a device for sending the overhead request across chips by the OTN, which comprises a memory and a processor, wherein the memory stores a program, and when the program is read and executed by the processor, the method for sending the overhead request across chips by the OTN in any embodiment is realized.
The embodiment of the application also provides a device for receiving overhead bytes by the optical transport network OTN crossing chips, which comprises a memory and a processor, wherein the memory stores a program, and when the program is read and executed by the processor, the method for receiving the overhead bytes by the optical transport network OTN crossing chips is realized.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, functional modules/units in the apparatus, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed cooperatively by several physical components. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
Claims (10)
1. A method for an optical transport network, OTN, to send overhead requests across chips, applied to a first chip in the OTN, the method comprising:
generating an overhead request according to external overhead enabling configuration of overhead bytes, and writing the overhead request into a second storage queue;
generating a protection request according to the enabling configuration of the protection group, and writing the protection request into a third storage queue;
reading the overhead request stored in the second storage queue and the protection request stored in the third storage queue, generating control information, and writing the control information into a fourth storage queue;
and reading the control information stored in the fourth storage queue, and sending the control information to a second chip in the OTN for processing.
2. The method of claim 1, wherein the step of determining the position of the substrate comprises,
generating an overhead request according to the external overhead enabling configuration of the overhead byte, and writing the overhead request into a second storage queue, wherein the method comprises the following steps:
after receiving an overhead request applied by a data path, inquiring external overhead enabling configuration of a corresponding line of the overhead request, and generating an overhead request to write into a second FIFO (first in first out) under the condition that at least 1 overhead byte of a current line is configured as external overhead enabling, wherein the overhead request comprises the enabling configuration, line information, multiframe information and channel information of the current line.
3. The method of claim 2, wherein the step of determining the position of the substrate comprises,
the multiframe information contained in the overhead request written into the second FIFO is the multiframe information contained in the overhead request of the datapath application plus 1.
4. The method of claim 1, wherein the step of determining the position of the substrate comprises,
the control information sent by the first chip to the second chip includes control information for overhead requests or control information for protection requests.
5. A method for an optical transport network, OTN, to receive overhead bytes across chips, applied to a first chip in the OTN, the method comprising:
receiving data of overhead bytes sent by a second chip and protection information;
and executing corresponding processing on the data of the overhead byte and the protection information according to the control information sent to the second chip, wherein the control information comprises control information for overhead request or control information for protection request.
6. The method of claim 5, wherein the step of determining the position of the probe is performed,
and executing corresponding processing on the data of the overhead byte and the protection information according to the control information sent to the second chip, wherein the processing comprises the following steps:
when the control information sent to the second chip is the control information for the overhead request, writing the received overhead byte data into an overhead cache; the write address includes: line information, multi-frame information, and channel information.
7. The method of claim 5, wherein the step of determining the position of the probe is performed,
and executing corresponding processing on the data of the overhead byte and the protection information according to the control information sent to the second chip, wherein the processing comprises the following steps:
and when the control information sent to the second chip is the control information for protecting the request, the received protection information is sent to the protection switching module.
8. A computer readable storage medium storing one or more programs executable by one or more processors to implement the method of sending overhead requests across chips by an optical transport network OTN according to any one of claims 1 to 4 or to implement the method of receiving overhead bytes across chips by an optical transport network OTN according to any one of claims 5 to 7.
9. An apparatus for sending an overhead request across chips by an optical transport network OTN, comprising a memory and a processor, the memory storing a program which, when read by the processor, implements the method for sending an overhead request across chips by an optical transport network OTN according to any one of claims 1 to 4.
10. An apparatus for receiving overhead bytes across chips of an optical transport network OTN, comprising a memory and a processor, said memory storing a program which, when read and executed by said processor, implements the method for receiving overhead bytes across chips of an optical transport network OTN according to any of claims 5 to 7.
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| CN202311199677.8A CN117354120A (en) | 2023-07-06 | 2023-07-06 | Method, device and medium for sending request and receiving overhead across chips of OTN |
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| CN100589365C (en) * | 2007-09-14 | 2010-02-10 | 中兴通讯股份有限公司 | Method for time slot partition and overhead processing of optical payload unit in light transmission network |
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