CN117352627A - Light-emitting diode chip and manufacturing method thereof - Google Patents
Light-emitting diode chip and manufacturing method thereof Download PDFInfo
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- CN117352627A CN117352627A CN202311101815.4A CN202311101815A CN117352627A CN 117352627 A CN117352627 A CN 117352627A CN 202311101815 A CN202311101815 A CN 202311101815A CN 117352627 A CN117352627 A CN 117352627A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 123
- 239000000463 material Substances 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 10
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 9
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 7
- SBIBMFFZSBJNJF-UHFFFAOYSA-N selenium;zinc Chemical compound [Se]=[Zn] SBIBMFFZSBJNJF-UHFFFAOYSA-N 0.000 claims description 7
- 229910016569 AlF 3 Inorganic materials 0.000 claims description 6
- 229910016036 BaF 2 Inorganic materials 0.000 claims description 6
- 238000010521 absorption reaction Methods 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000002310 reflectometry Methods 0.000 description 21
- 229920002120 photoresistant polymer Polymers 0.000 description 9
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- 238000005229 chemical vapour deposition Methods 0.000 description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
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Abstract
The embodiment of the disclosure provides a light-emitting diode chip and a manufacturing method thereof, and belongs to the technical field of semiconductors. The light emitting diode comprises a substrate, a light emitting structure, a first DBR layer and a second DBR layer, wherein the substrate is provided with a front surface and a back surface which are opposite, the light emitting structure is arranged on the front surface of the substrate, the back surface of the substrate is provided with at least one groove, the first DBR layer is arranged in the groove, the first DBR layer comprises a plurality of first high refractive index layers and a plurality of first low refractive index layers, the second DBR layer is arranged on the back surface and covers the first DBR layer, the second DBR layer comprises a plurality of second high refractive index layers and a plurality of second low refractive index layers, and the refractive index difference between the first high refractive index layer and the first low refractive index layer is larger than the refractive index difference between the second high refractive index layer and the second low refractive index layer. The embodiment of the disclosure can effectively reduce the absorption of the DBR layer to light and improve the luminous efficiency of the LED chip.
Description
Technical Field
The disclosure relates to the field of semiconductor technology, and in particular, to a light emitting diode chip and a manufacturing method thereof.
Background
The light emitting diode (Light Emitting Diode, LED) has the characteristics of small volume, long service life, rich and colorful colors, low energy consumption and the like, and is widely applied to various light source fields such as backlight, illumination, landscapes and the like.
In the related art, an LED chip includes: the light emitting device comprises a substrate, a distributed Bragg reflection (Distributed Bragg Reflection, DBR) layer and a light emitting structure, wherein the light emitting structure is positioned on the front surface of the substrate, and the DBR layer is positioned on the back surface of the substrate.
However, in the above structure, when the light emitted by the light emitting structure is incident on the DBR layer, the incident light with a small incident angle is refracted and enters the DBR layer, and the DBR layer absorbs a part of the incident light, which causes a loss of reflectivity, and affects the light emitting efficiency of the LED chip.
Disclosure of Invention
The embodiment of the disclosure provides a light-emitting diode chip and a manufacturing method thereof, which can effectively reduce the absorption of light by a DBR layer and improve the luminous efficiency of the LED chip. The technical scheme is as follows:
in one aspect, a light emitting diode chip is provided, including a substrate, a light emitting structure, a first distributed bragg reflection layer and a second distributed bragg reflection layer, the substrate having opposite front and back sides, the light emitting structure being located on the front side of the substrate, the back side of the substrate having at least one groove, the first distributed bragg reflection layer being located in the groove, the first distributed bragg reflection layer including a plurality of first high refractive index layers and a plurality of first low refractive index layers, the second distributed bragg reflection layer being located on the back side and covering the first distributed bragg reflection layer, the second distributed bragg reflection layer including a plurality of second high refractive index layers and a plurality of second low refractive index layers, a refractive index difference between the first high refractive index layer and the first low refractive index layer being greater than a refractive index difference between the second high refractive index layer and the second low refractive index layer.
Optionally, the refractive index of the first high refractive index layer is greater than or equal to the refractive index of the second high refractive index layer, and the refractive index of the first low refractive index layer is less than the refractive index of the second low refractive index layer.
Optionally, the refractive index difference between the first high refractive index layer and the first low refractive index layer at a wavelength of 500nm is 0.49 to 1.25, and the refractive index difference between the second high refractive index layer and the second low refractive index layer at a wavelength of 500nm is 0.49 to 1.25.
Optionally, the first distributed bragg reflective layer is flush with the back surface of the substrate.
Optionally, the material of the first high refractive index layer comprises TiO 2 、ZnS、ZnSe、Ta 2 O 5 、HfO 2 、ZrO 2 At least one of the materials of the second high refractive index layer comprises TiO 2 、ZnS、ZnSe、Ta 2 O 5 、HfO 2 、ZrO 2 At least one of the materials of the first low refractive index layer comprises SiO 2 、MgF 2 、AlF 3 、Na 3 AlF 6 、BaF 2 At least one of the materials of the second low refractive index layer comprises SiO 2 、MgF 2 、AlF 3 、Na 3 AlF 6 、BaF 2 At least one of them.
Optionally, the side of the first distributed bragg reflection layer close to the substrate is the first low refractive index layer, and the side of the first distributed bragg reflection layer far away from the substrate is the first high refractive index layer.
Optionally, the side of the second distributed bragg reflection layer close to the substrate is the second low refractive index layer, and the side of the second distributed bragg reflection layer far away from the substrate is the second high refractive index layer.
Optionally, the depth of the groove is 1 μm to 5 μm.
Optionally, the groove is a cylindrical groove, a quadrangular groove or a hexagonal groove.
In another aspect, a method for manufacturing a light emitting diode chip is provided, including: forming a light-emitting structure on the front surface of the substrate; forming at least one groove on the back surface of the substrate; forming a first distributed Bragg reflection layer in the groove, wherein the first distributed Bragg reflection layer is positioned in the groove and comprises a plurality of first high refractive index layers and a plurality of first low refractive index layers; and forming a second distributed Bragg reflection layer on the back surface of the substrate, wherein the second distributed Bragg reflection layer is positioned on the back surface of the substrate and covers the first distributed Bragg reflection layer, the second distributed Bragg reflection layer comprises a plurality of second high-refractive-index layers and a plurality of second low-refractive-index layers, and the refractive index difference value between the first high-refractive-index layers and the first low-refractive-index layers is larger than that between the second high-refractive-index layers and the second low-refractive-index layers.
The technical scheme provided by the embodiment of the disclosure has the beneficial effects that:
in an embodiment of the disclosure, a back surface of a substrate has at least one groove, and the groove is filled with a first distributed bragg reflection layer, wherein the first distributed bragg reflection layer comprises a plurality of first high refractive index layers and a plurality of first low refractive index layers. Because the first distributed Bragg reflection layer is filled in the groove on the back surface of the substrate, the total thickness of the LED chip cannot be changed under the condition that the thickness of the substrate is unchanged, so that the first distributed Bragg reflection layer can reduce the propagation stroke of light rays emitted by the light emitting structure in the substrate under the condition that the thickness of a product is unchanged, and the first distributed Bragg reflection layer can reflect the light rays earlier, so that the light emitting efficiency of the LED chip is improved.
And, by providing a second distributed Bragg reflection layer covering the back surface of the substrate and the first distributed Bragg reflection layer on the back surface of the substrate, the second distributed Bragg reflection layer includes a plurality of second high refractive index layers and a plurality of second low refractive index layers, and a refractive index difference between the first high refractive index layer and the first low refractive index layer is larger than a refractive index difference between the second high refractive index layer and the second low refractive index layer. Since the refractive index difference of the high and low refractive index layers in the DBR layer is larger, the reflectivity of the DBR layer is higher, and thus the first distributed bragg reflection layer can increase the reflectivity of light. And the more the laminated logarithm of the high-low refractive index layer in the DBR layer is, the higher the reflectivity of the DBR layer is, so that the first distributed Bragg reflection layer can be matched with the second distributed Bragg reflection layer, the laminated logarithm of the high-low refractive index layer in the DBR layer is increased, thereby reducing the absorption of the DBR layer to light, improving the luminous efficiency of the LED chip, and simultaneously, the later splitting process is not influenced by the overlarge thickness of the DBR layer.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic structural view of an LED chip in the related art;
fig. 2 is a schematic structural diagram of an LED chip according to an embodiment of the present disclosure;
fig. 3 is a schematic partial structure of an LED chip according to an embodiment of the present disclosure;
fig. 4 is a bottom view of an LED chip provided by an embodiment of the present disclosure;
fig. 5 is a flowchart of a method for manufacturing an LED chip according to an embodiment of the present disclosure;
fig. 6 is a flowchart of another method for manufacturing an LED chip according to an embodiment of the present disclosure.
Detailed Description
For the purposes of clarity, technical solutions and advantages of the present disclosure, the following further details the embodiments of the present disclosure with reference to the accompanying drawings.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," "third," and the like in the description and in the claims, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, is intended to mean that elements or items that are present in front of "comprising" or "comprising" are included in the word "comprising" or "comprising", and equivalents thereof, without excluding other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", "top", "bottom" and the like are used only to indicate relative positional relationships, which may be changed accordingly when the absolute position of the object to be described is changed.
Fig. 1 is a schematic structural view of an LED chip in the related art. As shown in fig. 1, the LED chip comprises a substrate 1, a light emitting structure 2 and a distributed bragg reflection layer 3. The light emitting structure 2 is located on the front side of the substrate 1 and the distributed bragg reflection layer 3 is located on the back side of the substrate 1. The distributed bragg reflection layer 3 includes a plurality of high refractive index layers and low refractive index layers alternately stacked.
The principle of DBR layers is that when light passes through films with different refractive indexes, the light is reflected at the interface, the reflectivity is related to the refractive index of the films, so that the films with different refractive indexes are stacked together alternately and periodically, when the light passes through the films with different refractive indexes, the light reflected by each layer interferes constructively due to the change of the phase angle, and then the light is combined with each other, so that the strongly reflected light can be obtained.
As shown in fig. 1, when light emitted from the light emitting structure 2 is incident on the distributed bragg reflection layer 3 through the substrate 1, the incident light having a large incident angle is directly reflected back to the substrate 1. The incident light with a small incident angle is refracted and enters the distributed bragg reflection layer 3, and the distributed bragg reflection layer 3 absorbs part of the incident light with a small incident angle, so that the reflectivity is lost, and the luminous efficiency of the LED chip is affected.
Fig. 2 is a schematic structural diagram of an LED chip according to an embodiment of the present disclosure. As shown in fig. 2, the LED chip includes a substrate 10, a light emitting structure 20, a first distributed bragg reflection layer 30, and a second distributed bragg reflection layer 40. The substrate 10 has opposite front and back sides, the light emitting structure 20 is located on the front side of the substrate 10, the back side of the substrate 10 has at least one recess 11, and the first distributed bragg reflection layer 30 is located in the recess 11.
The first distributed bragg reflection layer 30 includes a plurality of first high refractive index layers 31 and a plurality of first low refractive index layers 32. The second distributed bragg reflection layer 40 is located on the back surface of the substrate 10 and covers the first distributed bragg reflection layer 30, the second distributed bragg reflection layer 40 includes a plurality of second high refractive index layers 41 and a plurality of second low refractive index layers 42, and a refractive index difference between the first high refractive index layer 31 and the first low refractive index layer 32 is greater than a refractive index difference between the second high refractive index layer 41 and the second low refractive index layer 42.
As shown in fig. 2, the back surface of the substrate 10 has at least one recess 11, and the recess 11 is filled with a first distributed bragg reflection layer 30. Since the first distributed bragg reflection layer 30 is filled in the groove 11, the total thickness of the LED chip is not changed under the condition that the thickness of the substrate is unchanged, so that the first distributed bragg reflection layer 30 can reduce the propagation travel of the light emitted by the light emitting structure 20 in the substrate 10 under the condition that the thickness of the product is unchanged, and the first distributed bragg reflection layer 30 can reflect the light earlier, thereby improving the light emitting efficiency of the LED chip.
When the light emitted by the light emitting structure 20 is incident to the first distributed bragg reflection layer 30 or the second distributed bragg reflection layer 40 through the substrate 10, the incident light with a large incident angle is directly reflected back to the substrate 10. The difference in refractive index between the first high refractive index layer 31 and the first low refractive index layer 32 is greater than the difference in refractive index between the second high refractive index layer 41 and the second low refractive index layer 42. Since the refractive index difference of the high and low refractive index layers among the DBR layers is larger, the reflectivity of the DBR layer is higher, and thus the first distributed bragg reflection layer 30 can increase the reflectivity of light. The more the laminated logarithm of the high and low refractive index layers in the DBR layer is, the higher the reflectivity of the DBR layer is, so that the first distributed bragg reflection layer 30 can be matched with the second distributed bragg reflection layer 40, the laminated logarithm of the high and low refractive index layers in the DBR layer is increased, thereby reducing the absorption of light by the DBR layer, improving the luminous efficiency of the LED chip, and meanwhile, the subsequent splitting process is not influenced by the overlarge thickness of the DBR layer.
Alternatively, the substrate 10 is a sapphire substrate. The sapphire substrate is a transparent substrate, the light transmittance is good, the mechanical strength of the sapphire substrate is high, and the sapphire substrate is easy to process and clean. In some examples, substrate 10 may also be a SiC substrate, which is not limited by the present disclosure.
Alternatively, the light emitting structure 20 includes an N-type layer 21, a multiple quantum well layer 22, and a P-type layer 23. The N-type layer 21 may be an N-type GaN layer, the multiple quantum well layer 22 may include a plurality of InGaN well layers and GaN barrier layers alternately grown in cycles, and the P-type layer 23 may be a P-type GaN layer. The light emitted from the light emitting structure 20 may be emitted from the multiple quantum well layer 22.
Alternatively, the first distributed bragg reflection layer 30 includes 10 to 20 pairs of alternately stacked first high refractive index layers 31 and first low refractive index layers 32, and the second distributed bragg reflection layer 40 includes 10 to 20 pairs of alternately stacked second high refractive index layers 41 and second low refractive index layers 42.
The number of pairs in which the first high refractive index layer 31 and the first low refractive index layer 32 are alternately laminated and the number of pairs in which the second high refractive index layer 41 and the second low refractive index layer 42 are alternately laminated are in the above range, the reflectance of light by the first distributed bragg reflection layer 30 and the second layer reflection layer 40 can be improved to improve the light emitting efficiency of the LED chip.
Illustratively, the first high refractive index layers 31 and the first low refractive index layers 32 may alternately stack 20 pairs, and the second high refractive index layers 41 and the second low refractive index layers 42 may alternately stack 20 pairs.
Alternatively, the optical thicknesses of the first high refractive index layer 31, the first low refractive index layer 32, the second high refractive index layer 41, and the second low refractive index layer 42 are each a quarter of the central reflection wavelength. Wherein the optical thickness is the product of the geometric thickness and the refractive index of the material.
When the optical thicknesses of the first high refractive index layer 31, the first low refractive index layer 32, the second high refractive index layer 41 and the second low refractive index layer 42 are one fourth of the central reflection wavelength, the DBR layers, that is, the first distributed bragg reflection layer 30 and the second distributed bragg reflection layer 40 are formed to have higher reflectivity to light.
Fig. 3 is a schematic partial structure of an LED chip according to an embodiment of the present disclosure. As shown in fig. 3, the front surface of the substrate 10 of the LED chip has a light emitting structure 20, and the back surface of the substrate 10 has grooves 11 arranged in an array.
Alternatively, the depth of the groove 11 is 1 μm to 5 μm.
Since the first distributed bragg reflection layer 30 is located in the groove 11 and is flush with the back surface of the substrate 10, the depth of the groove 11 is the thickness of the first distributed bragg reflection layer 30. When the optical thicknesses of the first high refractive index layer 31 and the first low refractive index layer 32 are one quarter of the central reflection wavelength, the thickness of the first DBR layer 30 is within the above range, so that the total number of layers of the first high refractive index layer 31 and the first low refractive index layer 32 is more reasonable, and the reflectivity of the first distributed bragg reflection layer 30 to light is improved, so as to improve the luminous efficiency of the LED chip.
Fig. 4 is a bottom view of an LED chip provided by an embodiment of the present disclosure. As shown in fig. 4, a first distributed bragg reflection layer 30 is located in the grooves 11 of the array arrangement, and a second distributed bragg reflection layer 40 is located on the back surface of the substrate 10 and covers the first distributed bragg reflection layer 30. The grooves 11 may be cylindrical grooves arranged in an array, 5 rows and 6 columns of grooves 11 are arranged in an array in fig. 4, and the distances between the centers of adjacent grooves 11 are equal. Of course, other array arrangements may be employed, and this disclosure is not limited in this regard.
Alternatively, the groove 11 is a cylindrical groove, a quadrangular groove, or a hexagonal groove. The groove 11 is provided in the above shape, which is advantageous for the production and manufacture of the LED chip.
As an example, the groove 11 in the embodiment of the present disclosure is a cylindrical groove. The shape of the groove 11 includes, but is not limited to, the above, but may be any other cylindrical polygonal groove, etc., which is not limited in this disclosure.
Optionally, the first distributed Bragg reflector layer 30 is flush with the back side of the substrate 10. In this way, the first distributed Bragg reflection layer 30 can be ensured not to affect the product thickness of the LED chip, which is beneficial to the production and manufacture of the LED chip.
Optionally, the material of the first high refractive index layer 31 comprises TiO 2 、ZnS、ZnSe、Ta 2 O 5 、HfO 2 、ZrO 2 The material of the second high refractive index layer 41 includes TiO 2 、ZnS、ZnSe、Ta 2 O 5 、HfO 2 、ZrO 2 At least one of them. The material has larger refractive index, good stability, low absorption coefficient and better reflection effect when being used as a high refractive index layer in the DBR layer.
Optionally, the material of the first low refractive index layer 32 comprises SiO 2 、MgF 2 、AlF 3 、Na 3 AlF 6 、BaF 2 The material of the second low refractive index layer 42 includes SiO 2 、MgF 2 、AlF 3 、Na 3 AlF 6 、BaF 2 At least one of them. The material has smaller refractive index, good stability, low absorption coefficient and good reflection effect when used as a low refractive index layer in the DBR layer.
Alternatively, the refractive index of the first high refractive index layer 31 is greater than or equal to the refractive index of the second high refractive index layer 41, and the refractive index of the first low refractive index layer 32 is smaller than the refractive index of the second low refractive index layer 42. Thus, the first distributed Bragg reflection layer 30 and the second distributed Bragg reflection layer 40 can be matched better, the absorption of the DBR layer to light is reduced, and the luminous efficiency of the LED chip is improved.
Alternatively, the difference in refractive index between the first high refractive index layer 31 and the first low refractive index layer 32 at a wavelength of 500nm is 0.49 to 1.25, and the difference in refractive index between the second high refractive index layer 41 and the second low refractive index layer 42 at a wavelength of 500nm is 0.49 to 1.25. Therefore, the reflectivity of the two distributed Bragg reflection layers is higher, and the luminous efficiency of the LED chip is ensured.
When the material of the high refractive index layer adopts HfO 2 At a wavelength of 500nmThe refractive index is 1.95, and the material of the low refractive index layer adopts SiO 2 The refractive index at 500nm is 1.46, and the difference between the refractive indices of the high refractive index layer and the low refractive index layer is 0.49. When ZnSe is used as the material of the high refractive index layer, the refractive index at 500nm is 2.58, and Na is used as the material of the low refractive index layer 3 AlF 6 The refractive index of the high refractive index layer at 500nm is 1.33, and the refractive index difference between the high refractive index layer and the low refractive index layer at 500nm is 1.25.
Illustratively, the materials of the first and second high refractive index layers 31, 41 may both be TiO 2 A refractive index of 2.5 at a wavelength of 500 nm; the material of the first low refractive index layer 32 may be MgF 2 A refractive index of 1.38 at a wavelength of 500 nm; the material of the second low refractive index layer 42 may be SiO 2 The refractive index thereof at a wavelength of 500nm was 1.46. Thus, the refractive index of the first high refractive index layer 31 is equal to the refractive index of the second high refractive index layer 41, and the refractive index of the first low refractive index layer 32 is smaller than the refractive index of the second low refractive index layer 42. The difference in refractive index between the first high refractive index layer 31 and the first low refractive index layer 32 at a wavelength of 500nm was 1.12, and the difference in refractive index between the second high refractive index layer 41 and the second low refractive index layer 42 at a wavelength of 500nm was 1.04. Therefore, the refractive index difference between the first high refractive index layer 31 and the first low refractive index layer 32 is larger than the refractive index difference between the second high refractive index layer 41 and the second low refractive index layer 42, so that the first distributed bragg reflection layer 30 has higher reflectivity, the reflectivity to light can be increased, and the luminous efficiency of the LED chip can be improved.
Optionally, the side of the first distributed bragg reflection layer 30 close to the substrate 10 is a first low refractive index layer 32, and the side of the first distributed bragg reflection layer 30 far from the substrate 10 is a first high refractive index layer 31.
The side of the first distributed bragg reflection layer 30 near the substrate 10 is set as the first low refractive index layer 32, that is, the interface between the first distributed bragg reflection layer 30 and the substrate 10 is the interface between the first low refractive index layer 32 and the substrate 10. The contrast between the refractive index of the first low refractive index layer 32 and the refractive index of the substrate 10 is large, and the refractive index of the first low refractive index layer 32 is smaller than the refractive index of the substrate 10. This facilitates total reflection of light from the substrate 10 toward the first low refractive index layer 32, which facilitates increased reflectivity for light. Total reflection refers to the reflection of all incident light rays without entering a low refractive index film to produce refracted light rays when light rays enter a lower refractive index film from a higher refractive index film. When total reflection occurs, the reflectance is equal to 1.
Optionally, the side of the second distributed bragg reflection layer 40 close to the substrate 10 is a second low refractive index layer 42, and the side of the second distributed bragg reflection layer 40 far from the substrate 10 is a second high refractive index layer 41.
The second low refractive index layer 42 is disposed on the side of the second distributed bragg reflection layer 40 close to the substrate 10, that is, the interface between the second distributed bragg reflection layer 40 and the substrate 10 is the interface between the second low refractive index layer 42 and the substrate 10. The contrast between the refractive index of the second low refractive index layer 42 and the refractive index of the substrate 10 is large, and the refractive index of the second low refractive index layer 42 is smaller than the refractive index of the substrate 10. This facilitates total reflection of light from the substrate 10 toward the second low refractive index layer 42, which facilitates increased reflectivity for light.
The side of the first distributed bragg reflection layer 30 away from the substrate 10 is the first high refractive index layer 31, that is, the interface between the second distributed bragg reflection layer 40 and the first distributed bragg reflection layer 30 is the interface between the second low refractive index layer 42 and the first high refractive index layer 31. The second low refractive index layer 42 has a larger contrast between the refractive index of the first high refractive index layer 31 and a refractive index difference in the range of 0.49 to 1.25 at a wavelength of 500nm, and the second low refractive index layer 42 has a refractive index smaller than that of the first high refractive index layer 31, so that the first distributed bragg reflection layer 30 can be mated with the second distributed bragg reflection layer 40. This is advantageous in that total reflection is generated when light is emitted from the first high refractive index layer 31 to the second low refractive index layer 42, and in that reflectivity of the light is improved, thereby improving luminous efficiency of the LED chip.
In some examples, substrate 10 is a sapphire substrate,having a refractive index of 1.76 at a wavelength of 500nm, the first low refractive index layer 32 being MgF 2 Having a refractive index of 1.38 at a wavelength of 500nm, the second low refractive index layer being SiO 2 The refractive index thereof at a wavelength of 500nm was 1.46. The critical angle is about 56 ° when light is incident from the substrate 10 to the second low refractive index layer 42, and about 51.6 ° when light is incident from the substrate 10 to the first low refractive index layer 32. The critical angle refers to the smallest angle of incidence at which total reflection occurs, and when the angle of incidence of a ray is greater than the critical angle, total reflection occurs. Therefore, the critical angle when the light is incident from the substrate 10 to the first low refractive index layer 32 is smaller than the critical angle when the light is incident from the substrate 10 to the second low refractive index layer 42, that is, the first distributed bragg reflection layer 30 can make more incident light with small incident angle totally reflect, and increase the reflectivity of the incident light with small incident angle, so as to reduce the absorption of the light by the DBR layer and improve the luminous efficiency of the LED chip.
Fig. 5 is a flowchart of a method for manufacturing an LED chip according to an embodiment of the present disclosure. As shown in fig. 5, the manufacturing method includes:
step S101: a light emitting structure is formed on the front side of the substrate.
Step S102: at least one recess is formed in the back side of the substrate.
Step S103: a first distributed bragg reflection layer is formed in the recess.
The first distributed Bragg reflection layer is positioned in the groove and comprises a plurality of first high refractive index layers and a plurality of first low refractive index layers.
Step S104: a second distributed bragg reflector layer is formed on the back side of the substrate.
The second distributed Bragg reflection layer is positioned on the back surface of the substrate and covers the first distributed Bragg reflection layer, the second distributed Bragg reflection layer comprises a plurality of second high refractive index layers and a plurality of second low refractive index layers, and the refractive index difference value between the first high refractive index layers and the first low refractive index layers is larger than that between the second high refractive index layers and the second low refractive index layers.
In an embodiment of the disclosure, a back surface of a substrate has at least one groove, and the groove is filled with a first distributed bragg reflection layer, wherein the first distributed bragg reflection layer comprises a plurality of first high refractive index layers and a plurality of first low refractive index layers. Because the first distributed Bragg reflection layer is filled in the groove on the back surface of the substrate, the total thickness of the LED chip cannot be changed under the condition that the thickness of the substrate is unchanged, so that the first distributed Bragg reflection layer can reduce the propagation stroke of light rays emitted by the light emitting structure in the substrate under the condition that the thickness of a product is unchanged, and the first distributed Bragg reflection layer can reflect the light rays earlier, so that the light emitting efficiency of the LED chip is improved.
And, by providing a second distributed Bragg reflection layer covering the back surface of the substrate and the first distributed Bragg reflection layer on the back surface of the substrate, the second distributed Bragg reflection layer includes a plurality of second high refractive index layers and a plurality of second low refractive index layers, and a refractive index difference between the first high refractive index layer and the first low refractive index layer is larger than a refractive index difference between the second high refractive index layer and the second low refractive index layer. Since the refractive index difference of the high and low refractive index layers in the DBR layer is larger, the reflectivity of the DBR layer is higher, and thus the first distributed bragg reflection layer can increase the reflectivity of light. And the more the laminated logarithm of the high-low refractive index layer in the DBR layer is, the higher the reflectivity of the DBR layer is, so that the first distributed Bragg reflection layer can be matched with the second distributed Bragg reflection layer, the laminated logarithm of the high-low refractive index layer in the DBR layer is increased, thereby reducing the absorption of the DBR layer to light, improving the luminous efficiency of the LED chip, and simultaneously, the later splitting process is not influenced by the overlarge thickness of the DBR layer.
Fig. 6 is a flowchart of another method for manufacturing an LED chip according to an embodiment of the present disclosure. As shown in fig. 6, the manufacturing method includes:
step S201: a substrate is provided.
Alternatively, the substrate may be a sapphire substrate.
In step S201, the sapphire substrate may be subjected to pretreatment, placed in a Metal-organic chemical vapor deposition (Metal-organic Chemical Vapor Deposition, MOCVD) reaction chamber, and baked for 12 to 18 minutes.
Step S202: a light emitting structure is formed on the front side of the substrate.
Optionally, the light emitting structure includes an N-type layer, a multiple quantum well layer, and a P-type layer.
Alternatively, step S202 may include the steps of:
first, an N-type layer is formed on the front surface of a substrate.
Illustratively, the N-type layer may be an N-type GaN layer. The growth temperature of the N-type layer may be 1000 ℃ to 1200 ℃ and the growth pressure may be 50Torr to 200Torr.
In some examples, a u-type GaN layer may also be formed on the substrate prior to forming the N-type layer. In addition, a buffer layer may be formed on the substrate 10 before the u-type GaN layer is formed, and for example, the buffer layer may be an AlN buffer layer.
And a second step of forming a multiple quantum well layer on the N-type layer.
Illustratively, the multiple quantum well layer may include a plurality of periodic alternately grown InGaN well layers and GaN barrier layers. The number of periods in which the quantum well layers and the quantum barrier layers are alternately stacked may be 3 to 8. As an example, in the embodiment of the present disclosure, the number of periods in which the quantum well layers and the quantum barrier layers are alternately stacked is 5. The growth temperature of the quantum well layer may be 760 ℃ to 780 ℃, and the growth pressure may be 200Torr; the growth temperature of the quantum barrier layer may be 860 ℃ to 890 ℃, and the growth pressure may be 200Torr.
And thirdly, forming a P-type layer on the multi-quantum well layer.
The P-type layer may be a P-type GaN layer, for example. The growth temperature of the P-type layer may be 850 ℃ to 1050 ℃, and the growth pressure may be 100Torr to 600Torr.
Step S203: an array of grooves is formed in the back side of the substrate.
Alternatively, photoresist may be coated on the back surface of the substrate, the photoresist is exposed, developed, etc. to form a patterned photoresist mask layer, and then the sapphire substrate is etched by means of inductively coupled plasma (Inductively Coupled Plasma, ICP) etching, etc., to form grooves arranged in an array on the back surface of the substrate.
Alternatively, the depth of the grooves is 1 μm to 5 μm.
Optionally, the groove is a cylindrical groove, a quadrangular groove or a hexagonal groove.
Illustratively, the grooves may be cylindrical grooves arranged in an array, with the distance between the centers of adjacent grooves being equal.
Step S204: and coating a protective agent on the front surface of the chip.
Alternatively, the protective agent may be a curing protective agent that is thicker and easily removable. The protective agent is used for protecting the front surface of the chip from being damaged by yellow light when the front surface of the chip is subjected to photoetching patterns. For example, the protective agent may be a photoresist.
Step S205: a lithographic pattern is made on the back side of the substrate.
Alternatively, photoresist may be coated on the back side of the substrate, and the photoresist may be exposed, developed, etc. to form a patterned photoresist mask layer, where the photoresist removal area coincides with the groove pattern disposed in the array on the back side of the substrate.
Step S206: the first distributed Bragg reflection layer is evaporated.
Alternatively, the substrate may be placed in an electron beam evaporation oven, and the first distributed Bragg reflection layer is evaporated. The first distributed Bragg reflection layer includes a plurality of first high refractive index layers and a plurality of first low refractive index layers alternately stacked.
Alternatively, the material of the first high refractive index layer and the material of the first low refractive index layer, the thickness of the first high refractive index layer and the thickness of the first low refractive index layer, and the logarithm of the alternating lamination of the first high refractive index layer and the first low refractive index layer are referred to in the related embodiment of fig. 2, and a detailed description thereof is omitted.
Optionally, in step S206, a first low refractive index layer needs to be evaporated first, so that a side of the first distributed bragg reflection layer close to the substrate is the first low refractive index layer, and it is further ensured that a layer evaporated last is the first high refractive index layer, and a side of the first distributed bragg reflection layer far from the substrate is the first high refractive index layer.
In other embodiments, the steps S205 to S206 may be to first evaporate the first distributed bragg reflection layer; patterning the backside of the substrate; the ICP then etches the first distributed bragg reflective layer.
Step S207: and evaporating the second distributed Bragg reflection layer.
Before evaporating the second DBR layer, the photoresist on the back surface of the substrate needs to be removed.
Alternatively, the substrate may be placed in an electron beam evaporation oven and the second distributed Bragg reflection layer evaporated. The second distributed Bragg reflection layer includes a plurality of second high refractive index layers and a plurality of second low refractive index layers alternately stacked.
Alternatively, the material of the second high refractive index layer and the material of the second low refractive index layer, the thickness of the second high refractive index layer and the thickness of the second low refractive index layer, and the logarithm of the alternating lamination of the second high refractive index layer and the second low refractive index layer are referred to in the related embodiment of fig. 2, and a detailed description thereof is omitted. The refractive index magnitude relation, the refractive index difference value range, and the refractive index difference value magnitude relation of each refractive index layer are described in the related embodiment of fig. 2, and a detailed description thereof is omitted herein.
Optionally, in step S207, a second low refractive index layer is first deposited, so that a side of the second distributed bragg reflection layer close to the substrate is the second low refractive index layer, and it is further ensured that a last deposited layer is the second high refractive index layer, and a side of the second distributed bragg reflection layer far from the substrate is the second high refractive index layer.
While the present disclosure has been described above by way of example, and not by way of limitation, any person skilled in the art will recognize that many modifications, adaptations, and variations of the present disclosure can be made to the present embodiments without departing from the scope of the present disclosure.
Claims (10)
1. A light emitting diode chip is characterized by comprising a substrate, a light emitting structure, a first distributed Bragg reflection layer and a second distributed Bragg reflection layer,
the substrate has opposite front and back sides, the light emitting structure is located on the front side of the substrate, the back side of the substrate has at least one recess,
the first distributed Bragg reflection layer is positioned in the groove, the first distributed Bragg reflection layer comprises a plurality of first high refractive index layers and a plurality of first low refractive index layers,
the second distributed Bragg reflection layer is positioned on the back surface and covers the first distributed Bragg reflection layer, the second distributed Bragg reflection layer comprises a plurality of second high refractive index layers and a plurality of second low refractive index layers,
the refractive index difference between the first high refractive index layer and the first low refractive index layer is greater than the refractive index difference between the second high refractive index layer and the second low refractive index layer.
2. The light emitting diode chip of claim 1, wherein a refractive index of the first high refractive index layer is greater than or equal to a refractive index of the second high refractive index layer, and a refractive index of the first low refractive index layer is less than a refractive index of the second low refractive index layer.
3. The light emitting diode chip of claim 1, wherein the first high refractive index layer and the first low refractive index layer have a refractive index difference of 0.49 to 1.25 at a wavelength of 500nm, and the second high refractive index layer and the second low refractive index layer have a refractive index difference of 0.49 to 1.25 at a wavelength of 500 nm.
4. The light emitting diode chip of claim 1, wherein the first distributed bragg reflector layer is flush with a back surface of the substrate.
5. The light emitting diode chip of claim 1, wherein the material of the first high refractive index layer comprises TiO 2 、ZnS、ZnSe、Ta 2 O 5 、HfO 2 、ZrO 2 At least one of the materials of the second high refractive index layer comprises TiO 2 、ZnS、ZnSe、Ta 2 O 5 、HfO 2 、ZrO 2 At least one of the materials of the first low refractive index layer comprises SiO 2 、MgF 2 、AlF 3 、Na 3 AlF 6 、BaF 2 At least one of the materials of the second low refractive index layer comprises SiO 2 、MgF 2 、AlF 3 、Na 3 AlF 6 、BaF 2 At least one of them.
6. The light emitting diode chip of any one of claims 1 to 5, wherein a side of the first distributed bragg reflective layer closest to the substrate is the first low refractive index layer and a side of the first distributed bragg reflective layer remote from the substrate is the first high refractive index layer.
7. The light emitting diode chip of claim 6, wherein a side of the second distributed bragg reflector layer proximate to the substrate is the second low refractive index layer and a side of the second distributed bragg reflector layer distal to the substrate is the second high refractive index layer.
8. The light emitting diode chip of any one of claims 1 to 5 and claim 7, wherein the depth of the groove is 1 μm to 5 μm.
9. The light emitting diode chip of claim 8, wherein the groove is a cylindrical groove, a quadrangular groove, or a hexagonal groove.
10. A method for manufacturing a light emitting diode chip, comprising:
forming a light-emitting structure on the front surface of the substrate;
forming at least one groove on the back surface of the substrate;
forming a first distributed Bragg reflection layer in the groove, wherein the first distributed Bragg reflection layer is positioned in the groove and comprises a plurality of first high refractive index layers and a plurality of first low refractive index layers;
and forming a second distributed Bragg reflection layer on the back surface of the substrate, wherein the second distributed Bragg reflection layer is positioned on the back surface of the substrate and covers the first distributed Bragg reflection layer, the second distributed Bragg reflection layer comprises a plurality of second high-refractive-index layers and a plurality of second low-refractive-index layers, and the refractive index difference value between the first high-refractive-index layers and the first low-refractive-index layers is larger than that between the second high-refractive-index layers and the second low-refractive-index layers.
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