CN117348909A - eMMC upgrading method, chip, equipment and storage medium - Google Patents
eMMC upgrading method, chip, equipment and storage medium Download PDFInfo
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Abstract
The invention provides an eMMC upgrading method, a chip, equipment and a storage medium, wherein the method comprises the following steps: if the firmware data capacity is smaller than the first storage threshold, receiving firmware data through the first cache interval; if the second storage interval has the cached data, transferring the cached data to the second storage interval; acquiring the residual capacity of the second cache interval, and if the residual capacity is smaller than the firmware data capacity; dividing the firmware data into first firmware data and second firmware data, storing the first firmware data into a second storage interval, and transferring the first firmware data into a second cache interval; packaging and storing the cached data and the first firmware data into a first storage interval, and storing the second firmware data into the first storage interval through a second cache interval; and upgrading according to the cached data, the first firmware data and the second firmware data received by the first storage interval. The invention can realize the power-down prevention of equipment firmware upgrading and the continuous transmission of firmware upgrading and power-down.
Description
Technical Field
The present invention relates to the field of computer memory technologies, and in particular, to an eMMC upgrade method, a chip, a device, and a storage medium.
Background
In a general eMMC chip, the available cache in the chip is limited, and when the chip firmware is upgraded, the conventional design scheme is to collect firmware upgrade data and complete the firmware upgrade operation at the same time; however, this scheme severely depends on that the chip can provide enough cache resources, and there is a resource preemption phenomenon in the firmware upgrading process, and there may be a risk of losing the firmware due to power failure.
Disclosure of Invention
In view of the above, the present invention aims to overcome the defects in the prior art, and provide an eMMC upgrading method, a chip, a device and a storage medium.
The invention provides the following technical scheme:
in a first aspect, the present application provides an eMMC upgrading method, including:
acquiring eMMC firmware data capacity, and comparing the eMMC firmware data capacity with a first storage threshold, wherein the first storage threshold is a capacity threshold of a first cache interval; if the eMMC firmware data capacity is smaller than the first storage threshold, receiving the eMMC firmware data through the first buffer interval;
determining whether cached data exists in a second storage interval, and if so, transferring the cached data to the second storage interval;
acquiring the residual capacity of the second buffer interval, and judging whether the residual capacity is smaller than the eMMC firmware data capacity;
if the content of the eMMC firmware data is smaller than the content of the eMMC firmware data, dividing the eMMC firmware data into first firmware data and second firmware data, storing the first firmware data into the second storage interval, enabling the first firmware data capacity to be equal to the residual capacity, and transferring the first firmware data into the second cache interval;
packaging and storing the cached data and the first firmware data into the first storage interval, and storing the second firmware data into the first storage interval through the second cache interval;
and performing eMMC upgrading according to the cached data, the first firmware data and the second firmware data received by the first storage interval.
In one embodiment, the comparing the eMMC firmware data capacity with a first storage threshold includes:
storing the eMMC firmware data into the first storage section if the eMMC firmware data capacity is greater than or equal to the first storage threshold;
or the eMMC firmware data is distributed to the first storage interval in a slicing mode, and the first storage interval stores the eMMC firmware data in a slicing mode after receiving the eMMC firmware data.
In one embodiment, the storing the second firmware data in the first storage section through the second buffer section includes:
judging whether the second firmware data is tail data of the eMMC firmware data or not;
if yes, determining that the eMMC firmware data is received, transferring the second firmware data to the second cache interval, and storing the second firmware data to the first storage interval through the second cache interval.
In one embodiment, the determining whether the second firmware data is tail data of the eMMC firmware data further includes:
if not, determining that the eMMC firmware data is not received completely, caching the second firmware data into the second storage interval, and waiting for receiving the next wave of the eMMC firmware data.
In one embodiment, after the second firmware data is stored in the first storage section through the second buffer section, the method includes:
and releasing the storage capacity of the second storage interval.
In one embodiment, the determining whether the cached data exists in the second storage interval includes:
and carrying out data read-back on the second storage interval, and if the cached data are read-back, determining that the cached data exist in the second storage interval.
In one embodiment, after determining whether the cached data exists in the second storage interval, the method further includes:
acquiring the cached data capacity, and if the cached data capacity is larger than the first storage threshold value, dividing the cached data into whole-memory data and residual data;
sequentially storing the whole data to the first storage interval through the second cache interval, and caching the residual data in the second storage interval; the data is the cached data equal to an integer multiple of the first storage threshold, and the remaining data is the cached data other than the data.
In a second aspect, the present application provides an eMMC chip, including:
the device comprises an acquisition module, a storage module and a storage module, wherein the acquisition module is used for acquiring the eMMC firmware data capacity, and comparing the eMMC firmware data capacity with a first storage threshold, wherein the first storage threshold is a capacity threshold of a first cache interval; if the eMMC firmware data capacity is smaller than the first storage threshold, receiving the eMMC firmware data through the first buffer interval;
the transfer module is used for determining whether cached data exist in a second storage interval, and if so, transferring the cached data to the second storage interval;
the judging module is used for acquiring the residual capacity of the second cache interval and judging whether the residual capacity is smaller than the eMMC firmware data capacity or not;
the division module is configured to divide the eMMC firmware data into first firmware data and second firmware data if the first firmware data is smaller than the second firmware data, store the first firmware data in the second storage section, and transfer the first firmware data to the second buffer section after the first firmware data capacity is equal to the remaining capacity;
the storage module is used for packaging and storing the cached data and the first firmware data into the first storage interval, and then storing the second firmware data into the first storage interval through the second cache interval;
and the upgrading module is used for carrying out eMMC upgrading according to the cached data, the first firmware data and the second firmware data received in the first storage interval.
In a third aspect, the present application provides an electronic device, including an eMMC chip, the eMMC chip further including a memory and at least one processor, the memory storing a computer program, the processor being configured to execute the computer program to implement the eMMC upgrade method according to the first aspect.
In a fourth aspect, the present application provides a computer readable storage medium storing a computer program, which when executed, implements the eMMC upgrade method according to the first aspect.
The embodiment of the invention has the following beneficial effects:
according to the eMMC upgrading method, the effect that the firmware of the eMMC equipment is upgraded and powered down and is not lost can be achieved through the two cache intervals and the two storage intervals, further, continuous transmission of the firmware upgrade and power failure can be achieved, and dependence of the eMMC upgrade on the storage space is reduced.
In order to make the above objects, features and advantages of the present invention more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 shows a flow diagram of an eMMC upgrade method;
FIG. 2 shows an eMMC chip memory space distribution schematic;
FIG. 3 is a flow chart of a method of cached data storage;
fig. 4 is a flowchart illustrating a method for determining the receiving completion of eMMC firmware data;
fig. 5 shows a schematic diagram of an eMMC chip frame structure.
Description of main reference numerals:
500. an eMMC chip; 501. an acquisition module; 502. a transfer module; 503. a judging module; 504. dividing the module; 505. a storage module; 506. and upgrading the module.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the invention.
It will be understood that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the templates herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Example 1
Referring to fig. 1, fig. 1 is a flow chart of an eMMC upgrading method provided in this embodiment, where the method may be used for eMMC upgrading, and may also be applicable to other scenarios similar to the eMMC upgrading flow, and the method includes:
s101, acquiring eMMC firmware data capacity, and comparing the eMMC firmware data capacity with a first storage threshold, wherein the first storage threshold is a capacity threshold of a first cache interval; and if the eMMC firmware data capacity is smaller than the first storage threshold value, receiving the eMMC firmware data through the first buffer interval.
When performing an eMMC upgrade, first, the eMMC firmware data issued by the server needs to be received, and then the eMMC upgrade is performed according to the eMMC firmware data, however, because the memory space of the eMMC chip is limited, in order to improve the upgrade efficiency, the capacity of the eMMC firmware data needs to be acquired first.
When the server issues the eMMC firmware data, all the firmware data may be issued at one time or may be issued for multiple times, so the obtained eMMC firmware data may be all the firmware data or may be the firmware data issued each time.
Due to the read-write mechanism of the SSD hard disk, when writing data, 8 sectors (4096 bytes), namely a 4K block, are used as a basic storage unit, or a 16K block is used as a basic storage unit. And after the SSD is full, continuing to write the next 4K block or 16K, if the SSD hard disk is not subjected to 4K or 16K alignment processing, the data writing can cause 4K or 16K 'out-of-limit', and when the data is read, the data is read repeatedly for a second time, the data reading time is increased, and the reading and writing efficiency is reduced.
Referring to fig. 2, fig. 2 is a schematic diagram illustrating a memory space distribution of an eMMC chip according to the present embodiment.
After obtaining the content of the eMMC firmware data, comparing the obtained content of the eMMC firmware data with a preset first storage threshold, where the first storage threshold may be a capacity threshold of the first buffer zone, and in order to achieve convenience in storing the firmware data, storing in a 4K alignment or 16K alignment manner is generally adopted during storing. Accordingly, the capacity of the first buffer section may be set to 16K, i.e., the first storage threshold is set to 16K. Then, it is determined whether the eMMC firmware data exceeds 16K, and if it is less than 16K, the eMMC firmware data is received through the first buffer interval.
Similarly, since the first buffer interval and the second buffer interval are only responsible for buffering and flushing the eMMC firmware data, no other operations are required, and therefore, the capacities of the first buffer interval and the second buffer interval can be set to 16K, so that the storage space can be saved, and the dependence on the storage space can be reduced.
For convenience of data transmission or reception, the size of the eMMC firmware data when the server transmits may be generally set, so the eMMC firmware data is generally transmitted in 3 manners:
first kind: one-time issuing all firmware data to the equipment;
second kind: the firmware data are distributed in a slicing mode according to a 16K alignment mode;
third kind: the firmware data is randomly issued for a plurality of times, and generally the firmware data issued each time does not exceed 16K.
When determining that the data is issued in the first mode or the second mode, if the eMMC firmware data capacity is greater than or equal to the first storage threshold, the eMMC firmware data may be directly stored in the first storage interval.
Or the eMMC firmware data is distributed to the first storage interval in a slicing way, and the first storage interval performs slicing storage after receiving the eMMC firmware data, so that 4K alignment or 16K alignment is realized.
For example: the capacity of the eMMC firmware data is 50K, it may be selected to store the firmware data of 50K to the first storage section at one time, or to fragment the firmware data of 50K, if the storage capacity of one sector of the first storage section is 16K, the firmware data of 50K may be divided into 16K, 16K and 2K and then stored into the first storage section for 4 times, so that secondary reciprocation reading is not caused when the firmware data is read subsequently.
After the eMMC firmware data are stored completely, the eMMC firmware data in the first storage interval can be updated. When determining that the third mode is to perform data transmission, the eMMC firmware data may be received through the first buffer interval, so as to perform subsequent processing on the firmware data.
S102, determining whether cached data exist in the second storage interval, and if so, transferring the cached data to the second storage interval.
Because the third issuing method is issued for multiple times, after each time the eMMC firmware data is received through the first buffer interval, it needs to determine whether there is cached data received in the second storage interval before, if there is cached data, it needs to transfer the cached data to the second buffer interval first, where the cached data can be transferred according to the sequence when the firmware data is stored or received during transferring.
The second storage section may be a Flash memory block, for example, a sector of Nand Flash, where Nand Flash is generally formed by a storage block, i.e. a block, and a basic unit of the block is a sector, i.e. a page, and generally a block is formed by multiple pages, and generally a sector has a capacity of 16K, and since Nand Flash has a characteristic of power failure and no data loss, integrity of firmware data can be ensured when firmware is upgraded, and firmware data is not required to be acquired from the beginning even if power is lost.
Whether the cached data is stored or not can be judged by carrying out data read-back on the second storage interval, and if the cached data is read-back, the cached data is determined to exist in the second storage interval.
The content of the cached data can be obtained through data read-back, the last received data when the eMMC firmware data is received last time can be known according to the content of the cached data, if power failure occurs in the receiving process, when power is supplied again, the server does not need to issue the eMMC firmware data from the beginning, the content of the cached data can be obtained through data read-back to determine the last issued data before power failure, and then continuous transmission of the eMMC firmware data is carried out according to the last issued data, so that a large amount of data retransmission time can be saved.
Referring to fig. 3, the eMMC upgrading method of the present embodiment further includes:
s1020, acquiring the cached data capacity, and if the cached data capacity is larger than the first storage threshold value, dividing the cached data into whole-memory data and residual data.
If there is cached data in the second storage interval, the cached data is generally transferred to the second storage interval before the second storage interval receives new eMMC firmware data, but when the cached data capacity is greater than the first threshold, that is, the storage threshold of the second storage interval, the cached data needs to be transferred to the second storage interval in batches and then to the first storage space, so that the cached data needs to be divided first to obtain the whole stored data and the residual data.
S1021, sequentially storing the whole data to the first storage interval through the second cache interval, and caching the residual data in the second storage interval; the data is the cached data equal to an integer multiple of the first storage threshold, and the remaining data is the cached data other than the data.
The whole data is the cached data which is equal to the integral multiple of the first storage threshold value, the residual data is the cached data except the whole data, firstly the whole data is sequentially transferred to a second cache interval, and each group of whole data can completely occupy one sector of the first storage interval without wasting resources or reading back the data because the capacity of the second cache interval is aligned with the first storage interval by 16K.
Since the remaining data does not reach the first storage threshold, it may be temporarily cached through the second storage section, waiting to receive new eMMC firmware data.
And S103, acquiring the residual capacity of the second buffer interval, and judging whether the residual capacity is smaller than the eMMC firmware data capacity.
The storage capacity of the second buffer interval is also set to 16K, so that the second buffer interval is aligned with one sector 16K of Nand Flash, and after the buffered data in the first storage interval is transferred to the second buffer interval, the storage capacity of the second buffer interval may be changed, possibly less than 16K, or all eMMC firmware data cannot be stored at one time. Therefore, it is necessary to first obtain the remaining capacity of the second buffer interval, then determine whether the remaining capacity is smaller than the eMMC firmware data capacity, and then perform a subsequent storage operation to avoid causing a storage error or a storage capacity shortage.
And S104, if the data size is smaller than the remaining capacity, dividing the eMMC firmware data into first firmware data and second firmware data, storing the first firmware data into the second storage interval, and transferring the first firmware data into the second cache interval.
If the remaining capacity of the second buffer interval is smaller than the eMMC firmware data, the eMMC firmware data needs to be divided by a specific value of the remaining capacity. For example: when the remaining capacity is 12K and the eMMC firmware data exceeds 12K, dividing the eMMC firmware data into first firmware data and second firmware data, wherein the first firmware data capacity is equal to the remaining capacity, namely 12K, the other firmware data are the second firmware data, transferring the first firmware data to the second cache section, and if the second firmware data still exceeds 16K, continuing to divide the second firmware data until all the eMMC firmware data are stored.
Referring to fig. 4, step S104 further includes:
s1041, judging whether the second firmware data is tail data of the eMMC firmware data.
Since the third issuing method is multiple issues, only a part of the eMMC firmware data may be issued each time, and the eMMC firmware data is required to be completely updated, it is further required to determine whether the eMMC firmware data is received before the eMMC update is performed.
Since the eMMC firmware data is generally issued in sequence when issued, whether the eMMC firmware data is received is determined by determining whether the second firmware data is tail data, for example: the tail data may be marked and then a determination of whether it is tail data may be made by detection of the mark.
S1042, if yes, determining that the eMMC firmware data has been received, transferring the second firmware data to the second buffer area, and storing the second firmware data to the first storage area through the second buffer area.
If the second firmware data is tail data or the second firmware data contains tail data, it can be determined that the eMMC firmware data is received, the server does not issue new eMMC firmware data any more, at this time, whether the second firmware data reaches the storage threshold of the second cache interval or not, the second firmware data can be transferred to the second cache interval and then stored to the first storage interval through the second cache interval, so that all the received eMMC firmware data are ensured to be stored in the first storage interval, and the success of eMMC upgrading is ensured.
S1043, if not, determining that the eMMC firmware data is not received completely, caching the second firmware data into the second storage interval, and waiting for receiving the next wave of the eMMC firmware data.
If it is determined that the second firmware data is not tail data or does not include tail data, it may be determined that the eMMC firmware data is not received, and then new eMMC firmware data may be issued, at this time, the second firmware data may be cached in the second storage section, and waiting for receiving the eMMC firmware data of the next wave, and when the new eMMC firmware data is received, storing the firmware data by repeatedly executing the method of steps S102 to S104.
The embodiment can judge whether the received second firmware data is the tail data of the eMMC firmware data or contains the tail data, so as to judge whether the eMMC firmware data is received completely or not, and determine the storage mode according to the judgment result, thereby ensuring the integrity of the eMMC firmware data and ensuring the success of eMMC upgrading.
In one embodiment, after storing the second firmware data in the first storage section through the second buffer section, the method includes:
and releasing the storage capacity of the second storage interval.
After the second firmware data is stored into the first storage section through the second cache section, the fact that all eMMC firmware data are received is indicated, the second storage section is not required to be used for data storage, and the capacity of the second storage section can be released at the moment, so that resource waste or occupation is avoided.
S105, packaging and storing the cached data and the first firmware data into the first storage interval, and storing the second firmware data into the first storage interval through the second cache interval.
After the first firmware data is transferred to the second cache interval, at this time, the data stored in the second cache interval is just 16K, then the cached data and the first firmware data are packaged and stored in the first storage interval for storage, then just one fan blade in the first storage interval can be fully stored, and at this time, the storage space in the second cache interval is restored to 16K again.
S106, performing eMMC upgrading according to the cached data, the first firmware data and the second firmware data received in the first storage interval.
Because the second buffer interval is aligned with the first storage interval 16K, the buffered data received by the first storage interval, the first firmware data and the second firmware data are all received according to the order when the second firmware data are issued by the server, and by judging the second firmware data, it can be determined that all the eMMC firmware data issued by the server are received completely when the second firmware data are received, and at this time, the data in the first storage interval are complete eMMC firmware data, thereby realizing the upgrade of eMMC without the risk of data loss.
Example 2
Referring to fig. 5, the present application further provides an eMMC chip 500, including:
an obtaining module 501, configured to obtain an eMMC firmware data capacity, compare the eMMC firmware data capacity with a first storage threshold, where the first storage threshold is a capacity threshold of a first cache interval; if the eMMC firmware data capacity is smaller than the first storage threshold, receiving the eMMC firmware data through the first buffer interval;
a transfer module 502, configured to determine whether cached data exists in a second storage interval, and if so, transfer the cached data to the second storage interval;
a determining module 503, configured to obtain a remaining capacity of the second buffer interval, and determine whether the remaining capacity is smaller than the eMMC firmware data capacity;
a dividing module 504, configured to divide the eMMC firmware data into first firmware data and second firmware data if the first firmware data is smaller than the second firmware data, store the first firmware data in the second storage section, and transfer the first firmware data to the second buffer section after the first firmware data capacity is equal to the remaining capacity;
a storage module 505, configured to package and store the cached data and the first firmware data into the first storage interval, and store the second firmware data into the first storage interval through the second cache interval;
and an upgrade module 506, configured to perform eMMC upgrade according to the cached data, the first firmware data, and the second firmware data received in the first storage interval.
The eMMC chip provided by the embodiment can realize the effect that the firmware of the eMMC equipment is updated and is not lost when power is lost, and can also realize continuous transmission of the firmware update and power failure, so that the dependence of the eMMC update on a storage space is reduced.
It will be appreciated that the implementation of the eMMC upgrading method described in the above embodiment 1 is equally applicable to this embodiment, and thus will not be repeated here.
Example 3
The embodiment of the application also provides a computer device, for example, but not limited to, a desktop computer, a notebook computer, etc., and the existence form of the computer device is not limited, and the computer device mainly depends on whether the computer device needs to support the interface display function of the browser webpage or not. The computer device includes a memory storing a computer program and at least one processor for executing the computer program to implement the eMMC upgrade method described in embodiment 1 above.
The processor may be an integrated circuit chip with signal processing capabilities. The processor may be a general purpose processor including at least one of a central processing unit (Central Processing Unit, CPU), a graphics processor (GraphicsProcessing Unit, GPU) and a network processor (Network Processor, NP), a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like that may implement or perform the methods, steps, and logic blocks disclosed in embodiments of the present application.
The Memory may be, but is not limited to, random access Memory (Random Access Memory, RAM), read Only Memory (ROM), programmable Read Only Memory (Programmable Read-OnlyMemory, PROM), erasable Read Only Memory (Erasable Programmable Read-Only Memory, EPROM), electrically erasable Read Only Memory (Electric Erasable Programmable Read-Only Memory, EEPROM), etc. The memory is used for storing a computer program, and the processor can correspondingly execute the computer program after receiving the execution instruction.
Further, the memory may include a storage program area and a storage data area, wherein the storage program area may store an operating system, at least one application program required for a function; the storage data area may store data created from the use of the computer device (e.g., iteration data, version data, etc.), and so on. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device.
Example 4
The present application also provides a computer-readable storage medium storing computer-executable instructions that, when invoked and executed by a processor, cause the processor to execute the eMMC upgrade method described in embodiment 1 above.
It will be appreciated that the implementation of the eMMC upgrading method described in the above embodiment 1 is equally applicable to this embodiment, and thus will not be repeated here.
The computer readable storage medium may be either a nonvolatile storage medium or a volatile storage medium. For example, the computer-readable storage medium may include, but is not limited to,: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other manners as well. The apparatus embodiments described above are merely illustrative, for example, of the flow diagrams and block diagrams in the figures, which illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, functional modules or units in the embodiments of the present application may be integrated together to form a single part, or each module may exist alone, or two or more modules may be integrated to form a single part.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a smart phone, a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application.
Any particular values in all examples shown and described herein are to be construed as merely illustrative and not a limitation, and thus other examples of exemplary embodiments may have different values.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
The above examples merely represent a few embodiments of the present invention, which are described in more detail and are not to be construed as limiting the scope of the present invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention.
Claims (10)
1. An eMMC upgrade method, comprising:
acquiring eMMC firmware data capacity, and comparing the eMMC firmware data capacity with a first storage threshold, wherein the first storage threshold is a capacity threshold of a first cache interval; if the eMMC firmware data capacity is smaller than the first storage threshold, receiving the eMMC firmware data through the first buffer interval;
determining whether cached data exists in a second storage interval, and if so, transferring the cached data to the second storage interval;
acquiring the residual capacity of the second buffer interval, and judging whether the residual capacity is smaller than the eMMC firmware data capacity;
if the content of the eMMC firmware data is smaller than the content of the eMMC firmware data, dividing the eMMC firmware data into first firmware data and second firmware data, storing the first firmware data into the second storage interval, enabling the first firmware data capacity to be equal to the residual capacity, and transferring the first firmware data into the second cache interval;
packaging and storing the cached data and the first firmware data into the first storage interval, and storing the second firmware data into the first storage interval through the second cache interval;
and performing eMMC upgrading according to the cached data, the first firmware data and the second firmware data received by the first storage interval.
2. The eMMC upgrade method of claim 1, wherein comparing the eMMC firmware data capacity to a first storage threshold comprises:
storing the eMMC firmware data into the first storage section if the eMMC firmware data capacity is greater than or equal to the first storage threshold;
or the eMMC firmware data is distributed to the first storage interval in a slicing mode, and the first storage interval stores the eMMC firmware data in a slicing mode after receiving the eMMC firmware data.
3. The eMMC upgrade method of claim 1, wherein the storing the second firmware data to the first storage section through the second buffer section comprises:
judging whether the second firmware data is tail data of the eMMC firmware data or not;
if yes, determining that the eMMC firmware data is received, transferring the second firmware data to the second cache interval, and storing the second firmware data to the first storage interval through the second cache interval.
4. The eMMC upgrade method of claim 3, wherein the determining whether the second firmware data is tail data of the eMMC firmware data further comprises:
if not, determining that the eMMC firmware data is not received completely, caching the second firmware data into the second storage interval, and waiting for receiving the next wave of the eMMC firmware data.
5. The eMMC upgrade method according to claim 1, wherein after the second firmware data is stored in the first storage section through the second buffer section, the method comprises:
and releasing the storage capacity of the second storage interval.
6. The eMMC upgrade method according to claim 1, wherein the determining whether cached data exists in the second storage interval comprises:
and carrying out data read-back on the second storage interval, and if the cached data are read-back, determining that the cached data exist in the second storage interval.
7. The eMMC upgrade method according to claim 1, wherein after determining whether there is cached data in the second storage interval, further comprising:
acquiring the cached data capacity, and if the cached data capacity is larger than the first storage threshold value, dividing the cached data into whole-memory data and residual data;
sequentially storing the whole data to the first storage interval through the second cache interval, and caching the residual data in the second storage interval; the data is the cached data equal to an integer multiple of the first storage threshold, and the remaining data is the cached data other than the data.
8. An eMMC chip, comprising:
the device comprises an acquisition module, a storage module and a storage module, wherein the acquisition module is used for acquiring the eMMC firmware data capacity, and comparing the eMMC firmware data capacity with a first storage threshold, wherein the first storage threshold is a capacity threshold of a first cache interval; if the eMMC firmware data capacity is smaller than the first storage threshold, receiving the eMMC firmware data through the first buffer interval;
the transfer module is used for determining whether cached data exist in the second storage interval, and if so, transferring the cached data to the second storage interval;
the judging module is used for acquiring the residual capacity of the second cache interval and judging whether the residual capacity is smaller than the eMMC firmware data capacity or not;
the division module is configured to divide the eMMC firmware data into first firmware data and second firmware data if the first firmware data is smaller than the second firmware data, store the first firmware data in the second storage section, and transfer the first firmware data to the second buffer section after the first firmware data capacity is equal to the remaining capacity;
the storage module is used for packaging and storing the cached data and the first firmware data into the first storage interval, and then storing the second firmware data into the first storage interval through the second cache interval;
and the upgrading module is used for carrying out eMMC upgrading according to the cached data, the first firmware data and the second firmware data received in the first storage interval.
9. An electronic device comprising an eMMC chip, characterized in that the eMMC chip further comprises a memory and at least one processor, the memory storing a computer program, the processor being configured to execute the computer program to implement the eMMC upgrade method of any one of claims 1 to 7.
10. A computer readable storage medium, wherein the computer readable storage medium stores a computer program that, when executed, implements the eMMC upgrade method of any one of claims 1 to 7.
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