CN117348178A - Photoelectric substrate co-packaged by optical fiber array and silicon optical chip and manufacturing method thereof - Google Patents
Photoelectric substrate co-packaged by optical fiber array and silicon optical chip and manufacturing method thereof Download PDFInfo
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- CN117348178A CN117348178A CN202311244256.2A CN202311244256A CN117348178A CN 117348178 A CN117348178 A CN 117348178A CN 202311244256 A CN202311244256 A CN 202311244256A CN 117348178 A CN117348178 A CN 117348178A
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- 239000000758 substrate Substances 0.000 title claims abstract description 266
- 230000003287 optical effect Effects 0.000 title claims abstract description 124
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 111
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 111
- 239000010703 silicon Substances 0.000 title claims abstract description 111
- 239000013307 optical fiber Substances 0.000 title claims abstract description 42
- 238000004519 manufacturing process Methods 0.000 title claims description 21
- 239000011521 glass Substances 0.000 claims description 253
- 229910052751 metal Inorganic materials 0.000 claims description 168
- 239000002184 metal Substances 0.000 claims description 168
- 239000010949 copper Substances 0.000 claims description 146
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 136
- 229910052802 copper Inorganic materials 0.000 claims description 136
- 238000005342 ion exchange Methods 0.000 claims description 75
- 239000010931 gold Substances 0.000 claims description 67
- 229910052737 gold Inorganic materials 0.000 claims description 67
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 66
- 230000008878 coupling Effects 0.000 claims description 53
- 238000010168 coupling process Methods 0.000 claims description 53
- 238000005859 coupling reaction Methods 0.000 claims description 53
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- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 20
- 238000004377 microelectronic Methods 0.000 claims description 18
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- 150000002500 ions Chemical class 0.000 claims description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 10
- 239000005388 borosilicate glass Substances 0.000 claims description 9
- 101710134784 Agnoprotein Proteins 0.000 claims description 7
- 238000001259 photo etching Methods 0.000 claims description 7
- 238000009713 electroplating Methods 0.000 claims description 6
- 229910052715 tantalum Inorganic materials 0.000 claims description 6
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 6
- 210000001503 joint Anatomy 0.000 claims description 5
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- 229910001415 sodium ion Inorganic materials 0.000 claims description 3
- 229910004353 Ti-Cu Inorganic materials 0.000 claims description 2
- 238000009740 moulding (composite fabrication) Methods 0.000 claims description 2
- 238000004806 packaging method and process Methods 0.000 abstract description 3
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Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
- G02B6/421—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical component consisting of a short length of fibre, e.g. fibre stub
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4249—Packages, e.g. shape, construction, internal or external details comprising arrays of active devices and fibres
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4274—Electrical aspects
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Optical Integrated Circuits (AREA)
Abstract
The invention discloses a photoelectric substrate with a silicon optical chip and an optical fiber array coupled and a preparation method thereof, belonging to the field of integrated circuits and photoelectron co-packaging.
Description
Technical field:
the invention belongs to the field of integrated circuit and photoelectron co-packaging, and relates to a photoelectric substrate co-packaged by an optical fiber array and a silicon optical chip and a manufacturing method thereof.
Technical background:
compared with electrons, photons have the advantages of high speed, low energy consumption, high capacity and the like, and the processing and transmission capacity of information can be greatly improved in the future, so that the photoelectric fusion system is considered to be an important direction for constructing high-efficiency, high-integration and low-energy information devices. Photoelectric fusion is based on the principle of photoelectric interconnection, and according to the characteristics of electrons and photons, the advantages of electron participation calculation and light responsible transmission are exerted, and the development is continuously going to the directions of high efficiency, high speed and small volume.
Among silicon-based optoelectronic chips, silicon-on-insulator (Silicon on insulator, SOI) optical chips are a new technology that is expected to break through moore's law of silicon-based integrated circuits, internationally recognized as "21 st century microelectronic technology". Currently, with the gradual perfection of the design and process conditions of silicon-based photonic integration, photonic integrated chips formed by combining various active devices and passive devices on a chip can well realize optical signal processing under small size. However, since silicon is an indirect bandgap semiconductor material, it has great difficulty in self-luminescence, and it is currently difficult to realize a high-performance integrated light source by means of only a silicon material. For a complete optical communication link, it is usually composed of three parts, i.e. transmitting, transmitting and receiving, so that on one hand, the silicon optical chip needs to process signals by means of the input of an external light source, and on the other hand, the optical signals processed by the silicon optical chip need to be coupled into optical fibers for transmission to places where the optical signals are needed. At present, the coupling packaging of a large-scale silicon optical switch array chip and a large-scale input/output optical fiber array is difficult, on one hand, the coupling between hundreds or thousands of optical fiber arrays and silicon optical chip waveguides has the problem that the coupling speed is slow because high alignment precision is required between array optical fibers and silicon optical chip waveguides, and on the other hand, because the silicon optical chip is small in size and the optical fiber array is large in size, the optical I/O ports of the silicon optical chip with high density are required to be fanned out so as to facilitate the coupling with the optical fiber arrays.
The traditional coupling of the silicon optical chip and the femtosecond laser direct writing waveguide is based on edge-to-edge coupling, on one hand, the coupling tolerance of the coupling mode is small, and the small position deviation during coupling can cause larger coupling loss, on the other hand, larger mode field mismatch exists between the silicon optical waveguide and the laser direct writing waveguide, and in order to improve the coupling efficiency, the coupling mode needs to perform mode expansion treatment on the waveguide of the silicon optical chip, and the waveguide is expanded into a coupler, so that the process difficulty and the manufacturing cost of the silicon optical chip are increased. Furthermore, laser direct writing methods have difficulty forming efficient waveguides on glass surfaces due to the low ablation threshold of the glass surface. Based on the above, the invention provides an optoelectronic substrate for bonding a silicon optical chip and an optical fiber array.
The invention comprises the following steps:
in order to solve the problem of coupling of a large-scale optical I/O port of a silicon optical chip and an optical fiber array, the invention provides an optoelectronic substrate for coupling the silicon optical chip and the optical fiber array, which is characterized in that an ion exchange process is firstly utilized to form an ion exchange waveguide on the upper surface of a glass substrate, then a laser direct-writing waveguide is processed on the glass substrate below the ion exchange waveguide through a laser direct-writing process, one end of the ion exchange waveguide is coupled with the silicon optical chip waveguide in an evanescent field, the other end of the ion exchange waveguide is coupled with one end of the laser direct-writing waveguide, the other end of the laser direct-writing waveguide extends outwards to the side surface of the glass substrate and can be coupled with the optical fiber array, the problem that laser is difficult to directly write the waveguide on the glass surface can be avoided, and a one-dimensional optical I/O port with high density of the silicon optical chip is fanned to the end surface of the glass substrate to form a two-dimensional waveguide array, so that the coupling with the optical fiber array is convenient.
The invention aims to solve the coupling difficulty of a silicon optical chip and an optical fiber array, takes a laser direct-writing waveguide with gradually changed depth as bridging, and provides a photoelectric interconnection method among the silicon optical chip, a microelectronic chip and the optical fiber array. The metal on the surface and the inside of the glass substrate is used for electric interconnection between chips and between the chips and the substrate, and the ion exchange waveguide on the surface of the glass substrate and the laser direct writing waveguide inside the glass substrate are used for optical connection between the silicon optical chip and the optical fiber array.
In order to achieve the above object, the optical fiber array and silicon photoelectric chip co-packaged photoelectric substrate comprises a glass substrate, a pit, a first through hole, a metal electrode, a metal circuit layer, a metal connecting column, an ion exchange waveguide and a laser direct writing waveguide, wherein the upper surface of the glass substrate is provided with a pit, the glass substrate below the pit is provided with a plurality of first through holes which are communicated up and down, the metal connecting column is filled in the first through holes, the metal electrode is positioned above the metal connecting column and is connected with the upper end of the metal connecting column, the silicon photoelectric chip is arranged above the pit, the metal electrode on the first through hole is used for butt joint with the electrode of the silicon photoelectric chip, the metal circuit layer is positioned on the lower surface of the glass substrate, the metal circuit layer is connected with the lower end of the metal connecting column, a plurality of ion exchange waveguides are arranged on the glass substrate outside the pit, the laser direct writing waveguide is arranged in the glass substrate below the ion exchange waveguides, the laser direct writing waveguide comprises a coupling part and a leading-out part, the coupling part is parallel to the ion exchange waveguides and is positioned under the ion exchange waveguides by 1-20 micrometers, one end of the leading-out part is connected with the coupling part, the other end of the leading-out part extends outwards to the side surface of the glass substrate, the leading-out ends of the plurality of laser direct writing waveguide leading-out parts connected with the side surface of the glass substrate are arranged in a plurality of rows and the heights of two adjacent rows are different, the leading-out ends form a two-dimensional waveguide array, the ion exchange waveguides are in butt joint with the silicon optical chip waveguides, and the two-dimensional waveguide array is connected with the optical fiber array.
Further, the photoelectric substrate comprises a second through hole, a plurality of second through holes which are communicated up and down are formed in the glass substrate outside the pit, metal connecting columns are filled in the second through holes, the upper ends of the metal connecting columns in the second through holes are connected with metal electrodes, the lower ends of the metal connecting columns in the second through holes are connected to the metal circuit layer, and the metal electrodes on the second through holes are connected with the electrodes of the microelectronic chip. The silicon optical chip and the microelectronic chip are connected with the metal circuit layer through corresponding metal electrodes and metal connecting posts under the metal electrodes.
Specifically, the glass substrate adopts borosilicate glass which contains 5-15 weight percent of Na + Ion, na in glass + The ions can be combined with Ag + Ion exchange is carried out on ions to manufacture an ion exchange waveguide, wherein the width of the ion exchange waveguide is 1-10 micrometers, and the length of the ion exchange waveguide is more than 0.5mm.
Specifically, the pit depth is 18-37 micrometers, the metal electrode comprises a metal seed layer, a copper layer and a gold layer, a metal seed layer is plated between the copper layer and the glass substrate, the metal seed layer is a Ti seed layer formed by evaporating Ti, a tantalum seed layer formed by evaporating tantalum, the Ti seed layer is formed by evaporating Ti and then evaporating Cu, the Cu seed layer formed by evaporating Cu is about 50-100nm, the thickness of the copper layer is about 17-35 micrometers, the thickness of the metal copper layer is lower than the pit depth by 1-2 micrometers, the degree of the gold layer is about 3-4 micrometers, and the metal electrode is 2-3 micrometers higher than the pit.
The invention relates to a manufacturing method of an optical fiber array and silicon optical chip co-packaged photoelectric substrate, which specifically comprises the following steps:
(1) Cleaning a glass substrate, performing focusing irradiation on the surface of the glass substrate within a certain thickness range by adopting laser to form a pit modification region, and performing full-thickness focusing irradiation on a specific region of a glass substrate at the lower part of the pit modification region to form a first through hole modification region; the specific area is determined by the electrode position of the installed silicon optical chip, and the laser focusing irradiation irradiates a certain area through a laser focus to damage or break the glass molecular chain;
(2) Placing the modified glass substrate into etching liquid for etching, grinding, polishing and cleaning, forming pits in the pit modification area, and forming a first through hole in the first through hole modification area;
(3) Covering the upper surface of the glass substrate with a first mask layer, covering the upper surface of the glass substrate with the first mask layer, forming a first window on the first mask layer by photoetching, exposing a part of the glass substrate close to the pit through the first window, and then placing the glass substrate into an AgNO at 250-400 DEG C 3 With NaNO 3 Forming ion exchange waveguide in the first window, and removing the first mask layer;
(4) Forming a laser direct-write waveguide in the glass substrate by using a laser direct-write process, wherein the laser direct-write waveguide comprises a coupling part and a lead-out part, the coupling part is 1-20 microns below the ion exchange optical waveguide, and the lead-out part extends outwards from the coupling part to the side surface of the glass substrate;
the ion exchange waveguides are in one-to-one correspondence with the silicon optical chip waveguides, the laser direct writing waveguides are in one-to-one correspondence with the ion exchange waveguides, the number of the laser direct writing waveguides and the number of the ion exchange waveguides are multiple, the ion exchange optical waveguides and the laser direct writing waveguides are arranged at intervals in parallel, the depths of the extraction parts are adjusted, the extraction ends of the laser direct writing waveguides, which are connected with the side face of the glass substrate, are arranged in multiple rows, the heights of two adjacent rows are different, and then the ports of the extraction parts which are regularly arranged in height are formed on the side face of the glass substrate.
(5) And (3) cleaning the surface of the glass substrate again, sputtering metal Ti on the upper surface and the lower surface of the glass substrate and the first through holes to form seed layers, respectively covering the upper surface and the lower surface of the glass substrate with second mask layers, respectively forming a second window and a third window on the second mask layers on the upper surface and the lower surface of the patterned glass substrate, wherein the second windows are in one-to-one correspondence with the first through holes, the second windows are communicated with the corresponding first through holes, the third windows are communicated with the first through holes, copper is electroplated on the first through holes, the second windows and the third windows, copper layers are formed in the second windows and the third windows, then the second mask layers outside the copper layers are removed, redundant seed layers on the glass substrate outside the copper layers are removed, then gold is electroplated on the surfaces of the copper layers to form gold layers, the seed layers, the copper layers and the gold layers in the pits form metal electrodes connected with the silicon optical chip, the seed layers and the copper layers in the first through holes form metal connecting columns, and the seed layers, the copper layers and the gold layers on the lower surfaces of the glass substrate form metal circuit layers.
Further, when preparing the metal electrode corresponding to the silicon optical chip, the metal electrode corresponding to the microelectronic chip is also prepared, and the metal electrode are connected through the metal connecting layer, specifically:
(1') preparing a first through hole modification region in the step (1), and performing full-thickness focusing irradiation on a certain position of the glass substrate 1 outside the pit 2 to form a second through hole modification region;
(2') when the modified glass substrate 1 is put into etching liquid for etching, grinding, polishing and cleaning, a second through hole 9 is formed in the second through hole modification area;
and (5') cleaning the surface of the glass matrix again, sputtering metal Ti into the upper surface and the lower surface of the glass substrate and the first through holes and the second through holes to form seed layers, respectively covering the upper surface and the lower surface of the glass substrate with second mask layers, respectively forming second windows, third windows and fourth windows on the second mask layers of the upper surface and the lower surface of the patterned glass substrate, wherein the second windows are a plurality of and correspond to the first through holes one by one, the second windows are communicated with the corresponding first through holes, the third windows are a plurality of and correspond to the second through holes one by one, the fourth windows are communicated with the corresponding second through holes, copper is electroplated on the first through holes, the second windows, the third windows and the fourth windows, copper in the second windows, the third windows and the fourth windows form copper layers, removing the second mask layers outside the copper layers, removing redundant seed layers on the copper layers, then electroplating gold on the surfaces of the copper layers, forming gold layers on the surfaces of the glass substrate, forming seed layers, the copper layers and the gold layers on the upper surfaces of the glass substrates in the pits, forming metal electrodes connected with silicon optical chips, the seed layers on the surfaces of the glass substrates, the copper layers and the gold layers on the copper layers on the surfaces of the glass substrates, the copper layers and the copper layers, the copper layers on the copper layers and the copper layers, the copper layers and the copper layers.
The step (1) comprises the following steps:
(101) Firstly, sequentially cleaning a glass substrate by using acetone, absolute ethyl alcohol and deionized water, wherein the glass substrate is borosilicate glass, and Na is contained in the borosilicate glass + The weight percentage of the ions is between 5 and 15 percent;
(102) Modifying a region of the surface of the glass substrate, which is required to be provided with a pit, wherein laser is incident from the upper surface of the glass substrate, is focused on the surface of the glass substrate, the laser is scanned along the XY direction on a plane parallel to the surface of the glass substrate by moving the laser source or the glass substrate, and the depth of a laser focus in the glass substrate is adjusted by adjusting the relative distance between the laser source and the glass substrate in the Z direction, so that a pit modification region is formed;
(103) And adjusting the relative distance between the laser source and the glass substrate in the Z direction, and carrying out laser focusing irradiation on a specific area of the glass substrate under the pit modification area within the full thickness range to form a first through hole modification area.
The step (2) comprises the following steps:
(201) Placing the modified glass substrate into HF and NH at 30-60deg.C 4 F, in the mixed solution, the etching rate of the area after laser modification is far higher than that of the area without modification, the pit modification area forms a pit by etching the solution, the first through hole modification area forms a first through hole, and the diameter of the first through hole is equal to that of the first through hole 30-60 microns;
(202) Grinding and polishing the front and back surfaces of the etched glass substrate to remove defective areas, and controlling the depth of the etched pits to be 18-37 microns by a grinding and polishing method;
(203) And cleaning the surface of the treated glass substrate by acetone, ethanol, deionized water and the like in sequence.
The step (2) comprises the following steps:
(301) The upper surface of the glass substrate is covered with a first mask layer, and the first mask layer covers the upper surface of the glass substrate and is filled with pits;
(302) Forming a first window on the first mask layer by photoetching, wherein the first window exposes a part of the glass substrate close to the pit, the length of the first window is more than 0.5mm, and the width of the first window is 1-10 micrometers;
(303) Placing the upper surface of the glass substrate into AgNO at 250-400 DEG C 3 With NaNO 3 At the first window, ag in the molten salt + And Na in glass matrix + And performing exchange to form an ion exchange waveguide on the surface of the glass substrate corresponding to the first window, removing the first mask layer, and forming an ion exchange optical waveguide outside the pit.
The step (5) comprises the following steps:
(501) Cleaning the surface of the glass by using acetone, absolute ethyl alcohol and deionized water;
(502) After cleaning, sputtering metal Ti on the upper and lower surfaces of the glass substrate and in the first through hole to form a seed layer, wherein the thickness of the seed layer is 50-100 nm;
(503) After the seed layer is manufactured, respectively covering second mask layers on the upper surface and the lower surface of the glass substrate, respectively forming a second window and a third window on the second mask layers on the upper surface and the lower surface of the patterned glass substrate, wherein the second windows are a plurality of and correspond to the first through holes one by one, the second windows are communicated with the corresponding first through holes, the first through holes are communicated with the third through holes, copper is electroplated in the first through holes, the second windows and the third through holes, copper layers are formed in the second windows and the third through holes, then the second mask layers outside the copper layers are removed, and then the redundant seed layers on the glass substrate outside the copper layers are removed by an etching method;
(504) Gold is electroplated on the surface of the copper layer through an electroplating process to form a gold layer, a seed layer, a copper layer and a gold layer on the upper surface of the glass substrate in the pit form a metal electrode, the thickness of the copper layer in the pit is 17-35 microns, the distance between the upper surface of the copper layer and the upper surface of the glass substrate is 1-2 microns, the thickness of the gold layer is 3-4 microns, the metal electrode is 2-3 microns higher than the pit, the seed layer, the copper layer and the gold layer on the lower surface of the glass substrate form a metal circuit layer, the thickness of the copper layer below the glass substrate is 17-35 microns, the thickness of the gold layer is 0.1-0.2 microns, and the copper and the seed layer in the first through hole form a metal connecting column.
Manufacturing a positioning mark on the surface of a smooth glass substrate, wherein the manufacturing of the positioning mark is performed between the step (2) and the step (3), and specifically comprises the following steps: and covering a third mask layer on the upper surfaces of the pits and the glass substrate, forming a first window on the third mask layer through photoetching, exposing part of the glass substrate outside the pits through the first window, sputtering a thin layer of metal at the first window to manufacture positioning marks, and then removing the third mask layer.
Compared with the prior art, the invention has the following beneficial effects: (1) The invention aims to solve the coupling difficulty of the silicon optical chip and the optical fiber array, and realizes photoelectric interconnection between the silicon optical chip and the optical fiber array by taking the ion exchange waveguide and the laser direct writing waveguide with gradually changed depth as bridging; (2) The metal electrode gold layer improves the welding reliability of the photoelectric substrate and the silicon optical chip electrode; (3) The metal circuit layer and the metal connecting column in the through hole realize the electric connection between different silicon optical chips and between the microelectronic chip and the silicon optical chip.
Description of the drawings:
fig. 1A is a state diagram of the connection of the optoelectronic substrate, the silicon photonics chip and the microelectronic chip according to embodiment 1 of the present invention.
Fig. 1B is a partial enlarged view of fig. 1.
Fig. 1C is a partial enlarged view of fig. 1.
Fig. 2A-I are cross-sectional views of the fabrication process of an optoelectronic substrate co-packaged with a silicon optical chip and an optical fiber array according to embodiment 1.
Fig. 3A-K are cross-sectional views of a process for fabricating an optoelectronic substrate co-packaged with a silicon optical chip and an optical fiber array as described in example 2.
Wherein 1 is a glass substrate; 2 is a pit; 3 is a first through hole; 4 is a metal electrode; 5 is a metal circuit layer; 6 is a metal connecting column; 7 is an ion exchange waveguide; 8 is a laser direct writing waveguide; 9 is a second through hole; 10 is a positioning mark; 11 is a first mask layer; 12 is a first window; 13 is a second mask layer; 14 is a second window; 15 is a third window; 16 is a fourth window; 17 is a third mask layer; 18 is a silicon optical chip; 19 is a microelectronic chip; 20 is a silicon optical chip waveguide; 401 is a seed layer in a metal electrode; 402 is a copper layer in a metal electrode; 401 is a gold layer in a metal electrode; 801 is a coupling section; reference numeral 802 denotes a lead portion.
The specific embodiment is as follows:
for the purpose of making the objects and technical solutions of the present invention more apparent, the technical solutions of the present invention will be further described with reference to the drawings in the embodiments, but the description of the present invention is not limited to the following description.
Example 1
As shown in fig. 1A-C, the optical fiber array and silicon optoelectronic chip co-packaged optoelectronic substrate according to this embodiment includes a glass substrate 1, a pit 2, a first through hole 3, a metal electrode 4, a metal circuit layer 5, a metal connection post 6, an ion exchange waveguide 7 and a laser direct writing waveguide 8, wherein the upper surface of the glass substrate 1 is provided with a pit 2, the glass substrate 1 under the pit 2 is provided with a plurality of first through holes 3 which are vertically communicated, the first through hole 3 is filled with the metal connection post 6, the metal electrode 4 is located above the metal connection post 6 and is connected with the upper end of the metal connection post 6, the silicon optoelectronic chip 18 is located above the pit 2, the metal electrode 4 on the first through hole 3 is used for butt joint with the electrode of the silicon optoelectronic chip 18, the metal circuit layer 5 is located on the lower surface of the glass substrate 1, the metal circuit layer 5 is connected with the lower end of the metal connecting column 6, a plurality of ion exchange waveguides 7 are arranged on the glass substrate 1 outside the pit 2, the laser direct-write waveguides 8 are arranged in the glass substrate 1 below the ion exchange waveguides 7, the laser direct-write waveguides 8 comprise a coupling part 801 and a lead-out part 802 which are connected, the coupling part 801 is parallel to the ion exchange waveguides 7 and is positioned below the ion exchange waveguides 7 by 1-20 micrometers, one end of the lead-out part 802 is connected with the coupling part 801, the other end extends outwards to the side surface of the glass substrate 1, the lead-out ends of the lead-out parts 802 of the laser direct-write waveguides 8 connected with the side surface of the glass substrate are arranged in a plurality of rows and the heights of two adjacent rows are different, the lead-out ends form a two-dimensional waveguide array, the ion exchange waveguides 7 are butted with the silicon optical chip waveguides 20, and the two-dimensional waveguide array is connected with the optical fiber array.
Since the metal electrode is used for interfacing with the electrode of the silicon photo chip 18, the number and positions of the first through holes 3 and the metal electrode 4 are determined by the electrode of the silicon photo chip 18 to be connected. The metal circuit layer 5 is connected with the corresponding metal connecting post 6 and the metal electrode to realize the connection of the silicon optical chip electrode to be connected, and the design of the metal circuit layer 5 is also determined by the connection relation of the silicon optical chip electrode. The metal electrodes to be connected under the same silicon optical chip are connected through the metal circuit layer, and different silicon optical chips are connected with the metal circuit layer 5 through the corresponding metal electrodes 4 and the metal connecting columns 6 under the metal electrodes 4, so that the electrical connection between the different silicon optical chips is realized.
Further, the optoelectronic substrate according to this embodiment further includes a second through hole 9, a plurality of second through holes 9 that are vertically communicated are provided on the glass substrate 1 outside the pit 2, the metal connecting columns 6 are filled in the second through holes 9, the upper ends of the metal connecting columns 6 in the second through holes 9 are connected with metal electrodes, the lower ends are connected to the metal circuit layer 5, and the metal electrodes 4 on the second through holes 9 are connected with the microelectronic chip electrodes. The silicon optical chip 18 and the microelectronic chip 19 are connected with the metal circuit layer 5 through the corresponding metal electrode 4 and the metal connecting post 6 under the metal electrode 4, so that the electrical connection between the silicon optical chip and the microelectronic chip is realized. In addition to the above, electrical interconnection of the microelectronic chip and the silicon optical chip may also be performed by wire bonding.
The metal electrode 4, the metal circuit layer 5 and the metal connecting column 6 are used for the electric connection between different silicon optical chips and between the silicon optical chip electric chips in the same silicon optical chip. The ion exchange waveguide 7 and the laser direct writing waveguide 8 are mainly used for optical connection between the optical I/O port of the silicon optical chip and the optical fiber array. Light between the silicon optical chip waveguide, the ion exchange waveguide 7 and the laser direct write waveguide 8 is coupled based on evanescent field coupling. The light of the silicon optical chip waveguide is coupled into the ion exchange waveguide 7 after being subjected to evanescent field coupling of the silicon optical chip waveguide and the ion exchange waveguide 7, the ion exchange waveguide 7 is further subjected to evanescent field coupling with the laser direct writing waveguide 8, so that the light is coupled into the laser direct writing waveguide 8, and the light of the laser direct writing waveguide 8 can be coupled into the optical fiber array in an end face coupling mode.
Specifically, the glass substrate 1 is made of borosilicate glass containing 5-15 wt% of Na + Ion, na in glass + The ions can be combined with Ag + The ions are ion exchanged to make an ion exchange waveguide 7. The ion exchange waveguide 7 has a width of 1-10 microns and a length of greater than 0.5mm.
Specifically, the depth of the pit 2 is 18-37 micrometers, and the metal electrode 4 comprises a metal seed layer, a copper layer and a gold layer. The metal seed layer is plated between the copper layer and the glass substrate 1, and the metal seed layer comprises but is not limited to a Ti seed layer formed by evaporating Ti, a tantalum seed layer formed by evaporating tantalum, a Ti-Cu seed layer formed by evaporating Ti and then Cu, and a Cu seed layer formed by evaporating Cu, wherein the metal seed layer can increase the binding force between metal and the glass substrate and prevent Cu from diffusing into glass. The gold plating layer is arranged outside the copper layer, the gold layer has certain softness, is easier to weld with the electrode on the chip, improves the welding reliability between the gold plating layer and the electrode of the silicon optical chip, and can also prevent the copper layer from being oxidized. The thickness of the seed layer is about 50-100nm, the thickness of the copper layer is about 17-35 microns, the thickness of the metal copper layer is 1-2 microns below the depth of the pit 2, the degree of the gold layer is about 3-4 microns, and the metal electrode 4 is 2-3 microns above the pit.
Further, in order to improve the coupling efficiency, a layer of refractive index matching liquid may be coated between the silicon optical chip waveguide and the ion exchange waveguide 7 when the silicon optical chip is bonded to the optoelectronic substrate.
The embodiment relates to a manufacturing method of an optical fiber array and silicon optical chip co-packaged photoelectric substrate, which specifically comprises the following steps:
(1) As shown in fig. 2A, cleaning a glass substrate 1, performing focusing irradiation on the surface of the glass substrate 1 within a certain thickness range by using laser to form a pit modification region, and performing full-thickness focusing irradiation on a specific region of a glass substrate 1 at the lower part of the pit modification region to form a first through hole modification region; the specific area is determined by the electrode position of the installed silicon optical chip, and the laser focusing irradiation irradiates a certain area through the laser focus to damage or break the glass molecular chain. The method comprises the following steps:
(101) Firstly, sequentially cleaning a glass substrate 1 by using acetone, absolute ethyl alcohol and deionized water, wherein the glass substrate 1 is borosilicate glass, and Na is contained in the borosilicate glass + The weight percentage of the ions is between 5 and 15 percent;
(102) Modifying the area of the surface of the glass substrate 1, where a pit is required to be manufactured, enabling laser to enter from the upper surface of the glass substrate 1, focusing on the surface of the glass substrate 1, scanning the laser on a plane parallel to the surface of the glass substrate 1 along the XY direction by moving a laser source or the glass substrate 1, and adjusting the depth of a laser focus in the glass substrate 1 by adjusting the relative distance between the laser source and the glass substrate 1 in the Z direction so as to form a pit modification area;
(103) By adjusting the relative distance between the laser source and the glass substrate 1 in the Z direction, laser focus irradiation is performed on a specific region of the glass substrate 1 under the pit-modified region in a full thickness range, forming a first through-hole-modified region.
(2) As shown in fig. 2B, the modified glass substrate 1 is put into an etching solution to be etched, ground, polished and cleaned, pits 2 are formed in the pit modification area, and first through holes 3 are formed in the first through hole modification area. The method comprises the following steps:
(201) Placing the modified glass substrate 1 into HF and NH at 30-60deg.C 4 In the mixed solution of F, the etching rate of the area after laser modification is far greater than that of the area without modification, the pit modification area forms a pit 2 through etching of the solution, the first through hole modification area forms a first through hole 3, and the diameter of the first through hole 3 is 30-60 microns;
(202) Grinding and polishing the front and back surfaces of the etched glass substrate 1 to remove defective areas, and controlling the depth of the etched pit 2 to be 18-37 microns by a grinding and polishing method;
(203) The surface of the glass substrate 1 after the treatment is washed with acetone, ethanol, deionized water, and the like in order.
(3) Covering the upper surface of the glass substrate 1 with a first mask layer 11, covering the upper surface of the glass substrate 1 with the first mask layer 11, forming a first window 12 on the first mask layer 11 by photolithography, exposing a part of the glass substrate 1 near the pit 2 to the first window 12, and then placing the glass substrate 1 in AgNO at 250-400 DEG C 3 With NaNO 3 In the mixed molten salt of (a), the ion exchange waveguide 7 is formed in the first window 12, and the first mask layer 11 is removed. The method comprises the following steps:
(301) As shown in fig. 2C, the upper surface of the glass substrate 1 is covered with the first mask layer 11, and the first mask layer 11 covers the upper surface of the glass substrate 1 while filling the pits 2;
(302) As shown in fig. 2D, a first window 12 is formed on the first mask layer 11 by photolithography, the first window 12 exposes a portion of the glass substrate 1 near the pit 2, the first window 12 has a length greater than 0.5mm and a width of 1 to 10 micrometers;
(303) As shown in FIG. 2E, the upper surface of the glass substrate 1 is put into AgNO at 250-400 DEG C 3 With NaNO 3 At the first window 12, ag in the molten salt + And Na in glass matrix + The ion exchange is performed to form an ion exchange waveguide 7 on the surface of the glass substrate corresponding to the first window 12, the first mask layer 11 is removed, and an ion exchange optical waveguide 7 is formed outside the pit 2.
(4) As shown in fig. 2F, a laser direct-write waveguide 8 is formed in the glass substrate by using a laser direct-write process, the laser direct-write waveguide 8 includes a coupling portion 801 and a lead-out portion 802, the coupling portion 801 is 1 to 20 micrometers below the ion exchange optical waveguide, and the lead-out portion 802 extends outward from the coupling portion 801 to the side surface of the glass substrate.
The ion exchange waveguides 7 are in one-to-one correspondence with the silicon optical chip waveguides, the laser direct-writing waveguides 8 are in one-to-one correspondence with the ion exchange waveguides 7, and the silicon optical chip waveguides often comprise dozens or even hundreds of the laser direct-writing waveguides 8 and the ion exchange waveguides 7 which are arranged in a row, the ion exchange optical waveguides 7 and the laser direct-writing waveguides 8 are arranged at intervals in parallel, the extraction ends of the extraction parts 802 connected with the side surfaces of the glass substrates are arranged in a plurality of rows and the heights of two adjacent rows are different by adjusting the depth of the extraction parts 802, so that the ports of the extraction parts 802 which are arranged in a high-low rule are formed on the side surfaces of the glass substrates, and the silicon optical chip waveguides which are arranged in a one-dimensional array are converted into the laser direct-writing waveguides 8 which are arranged in a two-dimensional array, so that the laser direct-writing waveguides are conveniently coupled with the optical fiber arrays.
The method comprises the following steps: laser is incident from the lower surface of the ion exchange optical waveguide 7 and focused in a range of 1-20 microns under the ion exchange optical waveguide 7, and a laser direct writing waveguide 8 is formed in a coupling region of the ion exchange optical waveguide 7 and the laser direct writing waveguide 8 by adopting a laser direct writing process.
(5) The surface of the glass substrate is cleaned again, metal Ti is sputtered on the upper surface and the lower surface of the glass substrate 1 and the first through holes 3 to form seed layers, the upper surface and the lower surface of the glass substrate 1 are respectively covered with a second mask layer 13, the second mask layers 13 on the upper surface and the lower surface of the patterned are respectively formed into a second window 14 and a third window 15, the second windows 14 are a plurality of and correspond to the first through holes 3 one by one, the second windows 14 are communicated with the corresponding first through holes 3, the third windows 15 are communicated with the first through holes 3, copper is electroplated on the first through holes 3, the second windows 14 and the third windows 15, copper in the second windows 14 and the third windows 15 is formed into copper layers, then the second mask layer 13 outside the copper layers is removed, redundant seed layers on the glass substrate 1 outside the copper layers are removed, gold is electroplated on the surfaces of the copper layers to form gold layers, the seed layers, the copper layers and the gold layers in pits form metal electrodes 4 connected with the silicon optical chips, the seed layers and the copper layers in the first through holes 3 form metal connecting posts 6, and the seed layers, the copper layers and the gold layers on the lower surfaces of the glass substrate form metal circuit layers 5. The method comprises the following steps:
(501) Cleaning the surface of the glass by using acetone, absolute ethyl alcohol and deionized water;
(502) After cleaning, sputtering metal Ti and the like on the upper surface and the lower surface of the glass substrate 1 and in the first through hole 3 to form a seed layer, wherein the thickness of the seed layer is 50-100 nm;
(503) As shown in fig. 2G-H, after the seed layer is manufactured, covering the upper and lower surfaces of the glass substrate 1 with a second mask layer 13 respectively, patterning the second mask layer 13 on the upper and lower surfaces to form a second window 14 and a third window 15 respectively, wherein the second windows 14 are multiple and correspond to the first through holes 3 one by one, the second windows 14 are communicated with the corresponding first through holes 3, the first through holes 3 are communicated with the third window 15, copper is electroplated in the first through holes 3, the second windows 14 and the third windows 15, copper in the second windows 14 and the third windows 15 forms a copper layer, then removing the second mask layer 13 outside the copper layer, and removing the redundant seed layer on the glass substrate 1 outside the copper layer by an etching method; preferably, the second window 14 is larger in cross section than the first through hole 3.
(604) As shown in fig. 2I, gold is electroplated on the surface of the copper layer by an electroplating process to form a gold layer, the seed layer, the copper layer and the gold layer in the pit 2 (upper surface of the glass substrate) form a metal electrode 4, the thickness of the copper layer in the pit is 17-35 micrometers, the distance between the upper surface of the copper layer and the upper surface of the glass substrate 1 is 1-2 micrometers, the thickness of the gold layer is 3-4 micrometers, the metal electrode 4 is higher than the pit by 2-3 micrometers, the seed layer, the copper layer and the gold layer on the lower surface of the glass substrate 1 form a metal circuit layer 5, the thickness of the copper layer under the glass substrate 1 is 17-35 micrometers, the thickness of the gold layer is 0.1-0.2 micrometers, and the copper and the seed layer in the first through hole form a metal connecting post 6.
Further, since the silicon optical chip is generally driven by the microelectronic chip when in use, when preparing the metal electrode corresponding to the silicon optical chip, the metal electrode corresponding to the microelectronic chip is also prepared, and the two are connected through the metal connecting layer. The method comprises the following steps:
(1') as shown in FIG. 2A, in the step (1), a first through hole modification region is prepared, and a second through hole modification region is formed by performing full-thickness focusing irradiation on a certain position of the glass substrate 1 outside the pit 2;
(2') as shown in FIG. 2B, in the step (2), when the modified glass substrate 1 is put into etching solution for etching, grinding, polishing and cleaning, a second through hole 9 is formed in the second through hole modification region;
(5') as shown in FIG. 2H, cleaning the surface of the glass substrate again, sputtering metal Ti into the upper and lower surfaces of the glass substrate 1 and the first through holes 3 and the second through holes 9 to form seed layers, respectively covering the upper and lower surfaces of the glass substrate 1 with second mask layers 13, respectively forming second windows 14, third windows 15 and fourth windows 16 on the second mask layers 13 on the upper and lower surfaces of the patterned layers, respectively, wherein the second windows 14 are a plurality of and are in one-to-one correspondence with the first through holes 3, the second windows 14 are communicated with the corresponding first through holes 3, the third windows 15 are communicated with the first through holes 3, the fourth windows 16 are a plurality of and are in one-to-one correspondence with the second through holes 9, the fourth windows 16 are communicated with the corresponding second through holes 9, copper is electroplated on the first through hole 3, the second window 14, the third window 15 and the fourth window 16, copper in the second window 14, the third window 15 and the fourth window 16 forms a copper layer, a second mask layer 13 outside the copper layer is removed, redundant seed layers on the glass substrate 1 outside the copper layer are removed, gold is electroplated on the surface of the copper layer to form a gold layer, the seed layers, the copper layers and the gold layers on the upper surface of the glass substrate in the pits form a metal electrode 4 connected with a silicon optical chip, the seed layers, the copper layers and the gold layers on the upper surface of the glass substrate outside the pits form a metal electrode 4 connected with a microelectronic chip, the seed layers and the copper layers in the first through hole 3 and the second through hole 9 form a metal connecting column 6, and the seed layers, the copper layers and the gold layers below the glass substrate form a metal circuit layer 5.
Example 2
Further, in order to facilitate accurate butt joint between the glass substrate and the silicon optical chip, positioning marks are made on the surface of the smooth glass substrate, and the positioning marks are made between the step (2) and the step (3) in embodiment 1, specifically:
the embodiment relates to a manufacturing method of an optical fiber array and silicon optical chip co-packaged photoelectric substrate, which specifically comprises the following steps:
(1) As in example 1.
(2) As in example 1.
(3) As shown in fig. 3C-D, the pit 2 and the upper surface of the glass substrate 1 are covered with a third mask layer 17, a first window is formed on the third mask layer 17 by photolithography, the first window exposes a part of the glass substrate 1 outside the pit 2, a thin layer of metal is sputtered at the first window to make the positioning mark 10, and then the third mask layer 17 is removed. The method comprises the following steps:
covering a third mask layer 17 on the upper surface of the glass substrate 1 in a mask mode, and exposing a positioning mark area required by subsequent processing alignment in a photoetching mode;
and sputtering a thin layer of metal on the glass substrate 1 in the positioning mark area by utilizing a magnetron sputtering mode to manufacture the positioning mark 10, wherein the metal can be Au, al, ti and the like, then removing the third mask layer by an etching method, and the positioning mark 10 is mainly used for processing and positioning the subsequent glass substrate 1 and providing auxiliary positioning when being used for bonding the subsequent silicon optical chip and the glass substrate 1.
(4) As shown in fig. 3E-G, a first mask layer 11 is coated on the upper surface of the glass substrate 1, the first mask layer 11 covers the upper surface of the glass substrate 1 and the positioning marks 10, a first window 12 is formed on the first mask layer 11 by photolithography, the first window 12 exposes a portion of the glass substrate 1 near the pit 2, and then the upper surface of the glass substrate 1 is placed in an AgNO of 250-400 deg.c 3 With NaNO 3 In the mixed molten salt of (a), the ion exchange waveguide 7 is formed in the first window 12, and the first mask layer 11 is removed. The method comprises the following steps:
(4) As shown in fig. 3H, a laser direct-write waveguide 8 is formed in a glass substrate by a laser direct-write process, the laser direct-write waveguide 8 includes a coupling portion 801 and a lead-out portion 802, the coupling portion 801 is 1 to 20 micrometers below the ion exchange optical waveguide, and the lead-out portion 802 extends outward from the coupling portion 801 to the side surface of the glass substrate.
(5) As shown in fig. 3I-K, the surface of the glass substrate is cleaned again, metal Ti is sputtered on the upper and lower surfaces of the glass substrate 1 and the first through holes 3 to form seed layers, the upper and lower surfaces of the glass substrate 1 are respectively covered with a second mask layer 13, the second mask layers 13 on the upper and lower surfaces of the patterned upper and lower surfaces are respectively formed with a second window 14 and a third window 15, the second windows 14 are in one-to-one correspondence with the first through holes 3, the second windows 14 are communicated with the corresponding first through holes 3, the third window 15 is communicated with the first through holes 3, copper is electroplated on the first through holes 3, the second windows 14 and the third windows 15, copper in the second windows 14 and the third windows 15 forms copper layers, then the second mask layer 13 outside the copper layers is removed, redundant seed layers on the glass substrate 1 outside the copper layers are removed, gold is electroplated on the surfaces of the copper layers to form gold layers, the seed layers, the copper layers in the pits form metal electrodes 4 connected with the silicon optical chips, the seed layers and the copper layers in the first through holes 3 form the metal connecting posts 6, and the seed layers, the copper layers and the gold layers on the lower surfaces of the glass substrate form the gold layers 5. The method comprises the following steps:
(501) Cleaning the surface of the glass by using acetone, absolute ethyl alcohol and deionized water;
(502) After cleaning, sputtering metal Ti and the like on the upper surface and the lower surface of the glass substrate 1 and in the first through hole 3 to form a seed layer, wherein the thickness of the seed layer is 50-100 nm;
(503) After the seed layer is manufactured, respectively covering a second mask layer 13 on the upper surface and the lower surface of the glass substrate 1, respectively forming a second window 14 and a third window 15 by patterning the second mask layer 13 on the upper surface and the lower surface, wherein the second windows 14 are a plurality of and correspond to the first through holes 3 one by one, the second windows 14 are communicated with the corresponding first through holes 3, the first through holes 3 are communicated with the third window 15, copper is electroplated in the first through holes 3, the second windows 14 and the third windows 15, copper in the second windows 14 and the third windows 15 forms a copper layer, then removing the second mask layer 13 outside the copper layer, and then removing the redundant seed layer on the glass substrate 1 outside the copper layer by an etching method; preferably, the second window 14 is larger in cross section than the first through hole 3.
(604) As shown in fig. 3I, gold is electroplated on the surface of the copper layer by an electroplating process to form a gold layer, the seed layer, the copper layer and the gold layer in the pit 2 (upper surface of the glass substrate) form a metal electrode 4, the thickness of the copper layer in the pit is 17-35 micrometers, the distance between the upper surface of the copper layer and the upper surface of the glass substrate 1 is 1-2 micrometers, the thickness of the gold layer is 3-4 micrometers, the metal electrode 4 is higher than the pit by 2-3 micrometers, the seed layer, the copper layer and the gold layer on the lower surface of the glass substrate 1 form a metal circuit layer 5, the thickness of the copper layer under the glass substrate 1 is 17-35 micrometers, the thickness of the gold layer is 0.1-0.2 micrometers, and the copper and the seed layer in the first through hole form a metal connecting post 6.
The specific use method of the photoelectric substrate comprises the following steps: the silicon optical chip is inverted, so that the silicon optical chip waveguide is aligned and attached to the ion exchange optical waveguide 7, the electrode of the silicon optical chip is aligned with the metal electrode 4 in the pit 2, under the combined action of downward pressure and upward supporting force of the ion exchange optical waveguide 7, the gold layer on the metal electrode 4 generates certain deformation at a certain temperature and under certain pressure, the reliable bonding of the electrode of the silicon optical chip and the metal electrode 4 on the photoelectric substrate is ensured, and the cold welding is prevented by the deformation of the gold, so that the electric connection between the photoelectric substrate and the silicon optical chip is completed. In the process, the optical waveguide of the silicon optical chip and the ion exchange optical waveguide 7 form coupling, the coupling part 801 of the ion exchange optical waveguide 7 and the laser direct writing waveguide 8 forms an evanescent field coupling state, and in this way, the one-dimensional high-density optical I/O port of the silicon optical chip can be fanned out to the side surface of the glass substrate 1, and a regular two-dimensional optical I/O port with uneven height is formed on the side surface of the glass substrate 1, so that the coupling with a large-scale optical fiber array is facilitated. Thus, the problem of fan-out of the high-density optical I/O port of the silicon optical chip and coupling with the large-scale optical fiber array can be solved.
Claims (10)
1. The photoelectric substrate is characterized by comprising a glass substrate, pits, first through holes, metal electrodes, a metal circuit layer, metal connecting columns, ion exchange waveguides and laser direct-write waveguides, wherein the pits are formed in the upper surface of the glass substrate, the glass substrate below the pits is provided with a plurality of first through holes which are communicated up and down, the metal connecting columns are filled in the first through holes, the metal electrodes are arranged above the metal connecting columns and connected with the upper ends of the metal connecting columns, the silicon photoelectric chip is arranged above the pits, the metal electrodes on the first through holes are used for being in butt joint with the electrodes of the silicon photoelectric chip, the metal circuit layer is arranged on the lower surface of the glass substrate, the metal circuit layer is connected with the lower ends of the metal connecting columns, a plurality of ion exchange waveguides are arranged on the glass substrate outside the pits, the laser direct-write waveguides are arranged in the glass substrate below the ion exchange waveguides, one ends of the laser direct-write waveguides are connected with the coupling parts and the leading-out parts, the coupling parts are parallel to the ion exchange waveguides and are arranged below the ion exchange waveguides by 1-20 microns, one ends of the coupling parts are connected with the coupling parts, the other ends of the coupling parts extend to the side surfaces of the glass substrate, the other ends of the coupling parts are connected with the leading-out waveguides, the two rows of the two adjacent arrays are arranged in a two-dimensional array mode, and the two-dimensional array waveguides are connected with the two-dimensional array waveguides, and the array waveguides are arranged in different from the two-dimensional array waveguide.
2. The optoelectronic substrate co-packaged by the optical fiber array and the silicon optoelectronic chip according to claim 1, further comprising a second through hole, wherein a plurality of second through holes which are communicated up and down are arranged on the glass substrate outside the pit, metal connecting columns are filled in the second through holes, the upper ends of the metal connecting columns in the second through holes are connected with metal electrodes, the lower ends of the metal connecting columns in the second through holes are connected with the metal circuit layer, and the metal electrodes on the second through holes are connected with the electrodes of the microelectronic chip. The silicon optical chip and the microelectronic chip are connected with the metal circuit layer through corresponding metal electrodes and metal connecting posts under the metal electrodes.
3. The optoelectronic substrate co-packaged with an optical fiber array and a silicon optoelectronic chip as set forth in claim 1, wherein the glass substrate is a borosilicate glass containing 5-15% by weight of Na + Ion, na in glass + The ions can be combined with Ag + Ion exchange is carried out on ions to manufacture an ion exchange waveguide, wherein the width of the ion exchange waveguide is 1-10 micrometers, and the length of the ion exchange waveguide is more than 0.5mm.
4. The optoelectronic substrate co-packaged with a silicon optoelectronic chip according to claim 1, wherein the depth of the pits is 18-37 microns, the metal electrode comprises a metal seed layer, a copper layer and a gold layer, the metal seed layer is a Ti seed layer formed by evaporating Ti, the tantalum seed layer is formed by evaporating tantalum, the Ti is evaporated first, then the Cu is evaporated to form a Ti-Cu seed layer, the Cu seed layer is formed by evaporating Cu, the thickness of the seed layer is about 50-100nm, the thickness of the copper layer is about 17-35 microns and the thickness of the metal copper layer is less than 1-2 microns of the depth of the pits, the degree of the gold layer is about 3-4 microns, and the metal electrode is 2-3 microns above the pits.
5. A method for manufacturing an optoelectronic substrate co-packaged by an optical fiber array and a silicon optical chip as claimed in claim 1, comprising the following steps:
(1) Cleaning a glass substrate, performing focusing irradiation on the surface of the glass substrate within a certain thickness range by adopting laser to form a pit modification region, and performing full-thickness focusing irradiation on a specific region of a glass substrate at the lower part of the pit modification region to form a first through hole modification region; the specific area is determined by the electrode position of the installed silicon optical chip, and the laser focusing irradiation irradiates a certain area through a laser focus to damage or break the glass molecular chain;
(2) Placing the modified glass substrate into etching liquid for etching, grinding, polishing and cleaning, forming pits in the pit modification area, and forming a first through hole in the first through hole modification area;
(3) Covering the upper surface of the glass substrate with a first mask layer, covering the upper surface of the glass substrate with the first mask layer, forming a first window on the first mask layer by photoetching, exposing a part of the glass substrate close to the pit through the first window, and then placing the glass substrate into an AgNO at 250-400 DEG C 3 With NaNO 3 Forming ion exchange waveguide in the first window, and removing the first mask layer;
(4) Forming a laser direct-write waveguide in the glass substrate by using a laser direct-write process, wherein the laser direct-write waveguide comprises a coupling part and a lead-out part, the coupling part is 1-20 microns below the ion exchange optical waveguide, and the lead-out part extends outwards from the coupling part to the side surface of the glass substrate;
the ion exchange waveguides are in one-to-one correspondence with the silicon optical chip waveguides, the laser direct writing waveguides are in one-to-one correspondence with the ion exchange waveguides, the number of the laser direct writing waveguides and the number of the ion exchange waveguides are multiple, the ion exchange optical waveguides and the laser direct writing waveguides are arranged at intervals in parallel, the depths of the extraction parts are adjusted, the extraction ends of the laser direct writing waveguides, which are connected with the side face of the glass substrate, are arranged in multiple rows, the heights of two adjacent rows are different, and then the ports of the extraction parts which are regularly arranged in height are formed on the side face of the glass substrate.
(5) And (3) cleaning the surface of the glass substrate again, sputtering metal Ti on the upper surface and the lower surface of the glass substrate and the first through holes to form seed layers, respectively covering the upper surface and the lower surface of the glass substrate with second mask layers, respectively forming a second window and a third window on the second mask layers on the upper surface and the lower surface of the patterned glass substrate, wherein the second windows are in one-to-one correspondence with the first through holes, the second windows are communicated with the corresponding first through holes, the third windows are communicated with the first through holes, copper is electroplated on the first through holes, the second windows and the third windows, copper layers are formed in the second windows and the third windows, then the second mask layers outside the copper layers are removed, redundant seed layers on the glass substrate outside the copper layers are removed, then gold is electroplated on the surfaces of the copper layers to form gold layers, the seed layers, the copper layers and the gold layers in the pits form metal electrodes connected with the silicon optical chip, the seed layers and the copper layers in the first through holes form metal connecting columns, and the seed layers, the copper layers and the gold layers on the lower surfaces of the glass substrate form metal circuit layers.
6. The method for manufacturing a photoelectric substrate co-packaged by an optical fiber array and a silicon optical chip according to claim 5, wherein when preparing a metal electrode corresponding to the silicon optical chip, a metal electrode corresponding to a microelectronic chip is also prepared, and the two are connected through a metal connecting layer, specifically:
(1') preparing a first through hole modification region in the step (1), and performing full-thickness focusing irradiation on a certain position of the glass substrate 1 outside the pit 2 to form a second through hole modification region;
(2') when the modified glass substrate 1 is put into etching liquid for etching, grinding, polishing and cleaning, a second through hole 9 is formed in the second through hole modification area;
and (5') cleaning the surface of the glass matrix again, sputtering metal Ti into the upper surface and the lower surface of the glass substrate and the first through holes and the second through holes to form seed layers, respectively covering the upper surface and the lower surface of the glass substrate with second mask layers, respectively forming second windows, third windows and fourth windows on the second mask layers of the upper surface and the lower surface of the patterned glass substrate, wherein the second windows are a plurality of and correspond to the first through holes one by one, the second windows are communicated with the corresponding first through holes, the third windows are a plurality of and correspond to the second through holes one by one, the fourth windows are communicated with the corresponding second through holes, copper is electroplated on the first through holes, the second windows, the third windows and the fourth windows, copper in the second windows, the third windows and the fourth windows form copper layers, removing the second mask layers outside the copper layers, removing redundant seed layers on the copper layers, then electroplating gold on the surfaces of the copper layers, forming gold layers on the surfaces of the glass substrate, forming seed layers, the copper layers and the gold layers on the upper surfaces of the glass substrates in the pits, forming metal electrodes connected with silicon optical chips, the seed layers on the surfaces of the glass substrates, the copper layers and the gold layers on the copper layers on the surfaces of the glass substrates, the copper layers and the copper layers, the copper layers on the copper layers and the copper layers, the copper layers and the copper layers.
7. The method for manufacturing an optoelectronic substrate co-packaged with a silicon optical chip and an optical fiber array according to claim 5, wherein the step (1) specifically comprises:
(101) Firstly, sequentially cleaning a glass substrate by using acetone, absolute ethyl alcohol and deionized water, wherein the glass substrate is borosilicate glass, and Na is contained in the borosilicate glass + The weight percentage of the ions is between 5 and 15 percent;
(102) Modifying a region of the surface of the glass substrate, which is required to be provided with a pit, wherein laser is incident from the upper surface of the glass substrate, is focused on the surface of the glass substrate, the laser is scanned along the XY direction on a plane parallel to the surface of the glass substrate by moving the laser source or the glass substrate, and the depth of a laser focus in the glass substrate is adjusted by adjusting the relative distance between the laser source and the glass substrate in the Z direction, so that a pit modification region is formed;
(103) The method comprises the steps that the relative distance between a laser source and a glass substrate is adjusted in the Z direction, and laser focusing irradiation is conducted on a specific area of the glass substrate under a pit modification area within a full thickness range, so that a first through hole modification area is formed;
the step (2) comprises the following steps:
(201) Placing the modified glass substrate into HF and NH at 30-60deg.C 4 F, the etching rate of the area after laser modification is far greater than that of the area without modification, the pit modification area forms pits by etching the solution, the first through hole modification area forms a first through hole, The diameter of the first through hole is 30-60 micrometers;
(202) Grinding and polishing the front and back surfaces of the etched glass substrate to remove defective areas, and controlling the depth of the etched pits to be 18-37 microns by a grinding and polishing method;
(203) And cleaning the surface of the treated glass substrate by acetone, ethanol, deionized water and the like in sequence.
8. The method for manufacturing an optoelectronic substrate co-packaged with a silicon optical chip and an optical fiber array according to claim 5, wherein the step (3) is specifically:
(301) The upper surface of the glass substrate is covered with a first mask layer, and the first mask layer covers the upper surface of the glass substrate and is filled with pits;
(302) Forming a first window on the first mask layer by photoetching, wherein the first window exposes a part of the glass substrate close to the pit, the length of the first window is more than 0.5mm, and the width of the first window is 1-10 micrometers;
(303) Placing the upper surface of the glass substrate into AgNO at 250-400 DEG C 3 With NaNO 3 At the first window, ag in the molten salt + And Na in glass matrix + And performing exchange to form an ion exchange waveguide on the surface of the glass substrate corresponding to the first window, removing the first mask layer, and forming an ion exchange optical waveguide outside the pit.
9. The method for manufacturing an optoelectronic substrate co-packaged with a silicon optical chip and an optical fiber array according to claim 5, wherein the step (5) specifically comprises:
(501) Cleaning the surface of the glass by using acetone, absolute ethyl alcohol and deionized water;
(502) After cleaning, sputtering metal Ti on the upper and lower surfaces of the glass substrate and in the first through hole to form a seed layer, wherein the thickness of the seed layer is 50-100 nm;
(503) After the seed layer is manufactured, respectively covering second mask layers on the upper surface and the lower surface of the glass substrate, respectively forming a second window and a third window on the second mask layers on the upper surface and the lower surface of the patterned glass substrate, wherein the second windows are a plurality of and correspond to the first through holes one by one, the second windows are communicated with the corresponding first through holes, the first through holes are communicated with the third through holes, copper is electroplated in the first through holes, the second windows and the third through holes, copper layers are formed in the second windows and the third through holes, then the second mask layers outside the copper layers are removed, and then the redundant seed layers on the glass substrate outside the copper layers are removed by an etching method;
(504) Gold is electroplated on the surface of the copper layer through an electroplating process to form a gold layer, a seed layer, a copper layer and a gold layer on the upper surface of the glass substrate in the pit form a metal electrode, the thickness of the copper layer in the pit is 17-35 microns, the distance between the upper surface of the copper layer and the upper surface of the glass substrate is 1-2 microns, the thickness of the gold layer is 3-4 microns, the metal electrode is 2-3 microns higher than the pit, the seed layer, the copper layer and the gold layer on the lower surface of the glass substrate form a metal circuit layer, the thickness of the copper layer below the glass substrate is 17-35 microns, the thickness of the gold layer is 0.1-0.2 microns, and the copper and the seed layer in the first through hole form a metal connecting column.
10. The method for manufacturing an optoelectronic substrate co-packaged by an optical fiber array and a silicon optical chip according to claim 5, wherein positioning marks are manufactured on the surface of a smooth glass substrate, and the positioning marks are manufactured between the step (2) and the step (3), specifically: and covering a third mask layer on the upper surfaces of the pits and the glass substrate, forming a first window on the third mask layer through photoetching, exposing part of the glass substrate outside the pits through the first window, sputtering a thin layer of metal at the first window to manufacture positioning marks, and then removing the third mask layer.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102590941A (en) * | 2012-04-05 | 2012-07-18 | 上海光芯集成光学股份有限公司 | Integrated optical chip based on glass-based ion exchange buried optical waveguide and manufacturing method |
| US20190170945A1 (en) * | 2016-07-29 | 2019-06-06 | Corning Optical Communications LLC | Waveguide connector elements and optical assemblies incorporating the same |
| US20200241220A1 (en) * | 2017-10-26 | 2020-07-30 | Corning Optical Communications LLC | Optical assemblies, interconnection substrates and methods for forming optical links in interconnection substrates |
| CN111902755A (en) * | 2018-02-05 | 2020-11-06 | 申泰公司 | Light adapter plate |
| CN116148990A (en) * | 2022-12-27 | 2023-05-23 | 华进半导体封装先导技术研发中心有限公司 | Novel optical integrated structure and preparation process thereof |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102590941A (en) * | 2012-04-05 | 2012-07-18 | 上海光芯集成光学股份有限公司 | Integrated optical chip based on glass-based ion exchange buried optical waveguide and manufacturing method |
| US20190170945A1 (en) * | 2016-07-29 | 2019-06-06 | Corning Optical Communications LLC | Waveguide connector elements and optical assemblies incorporating the same |
| US20200241220A1 (en) * | 2017-10-26 | 2020-07-30 | Corning Optical Communications LLC | Optical assemblies, interconnection substrates and methods for forming optical links in interconnection substrates |
| CN111902755A (en) * | 2018-02-05 | 2020-11-06 | 申泰公司 | Light adapter plate |
| CN116148990A (en) * | 2022-12-27 | 2023-05-23 | 华进半导体封装先导技术研发中心有限公司 | Novel optical integrated structure and preparation process thereof |
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