CN117319263A - Method and device for determining time delay compensation value and computer readable storage medium - Google Patents
Method and device for determining time delay compensation value and computer readable storage medium Download PDFInfo
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Abstract
The application provides a method, a device and a computer readable storage medium for determining a delay compensation value, which relate to the field of communication and can improve the accuracy of the delay compensation value determined in a distributed massive MIMO communication system and the consistency of each signal in the time domain. The method comprises the following steps: acquiring a first delay compensation value of each antenna of each pRRU in a plurality of pRRUs and a received signal of each pRRU; the pRRUs are positioned in the distributed massive MIMO communication system, and the first delay compensation value is the compensation value of the delay of the radio frequency channel of the antenna; for each pRRU, determining a second delay compensation value of the pRRU based on the first delay compensation value of each antenna of the pRRU and the received signal of the pRRU; the second delay compensation value is a compensation value of delay between pRRU and the baseband equipment except the first delay compensation value; and taking the sum of the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as the total delay compensation value of each antenna of the pRRU.
Description
Technical Field
The present invention relates to the field of communications, and in particular, to a method and apparatus for determining a delay compensation value, and a computer readable storage medium.
Background
Fig. 1 is a schematic structural diagram of a distributed massive multiple-in multiple-out (massive MIMO) communication system, as shown in fig. 1, a baseband device is respectively connected to 2 convergence devices, each convergence device is respectively connected to 2 pico base stations (pRRU) in a communication manner, each pRRU covers 1 physical cell, 4 physical cells can be combined into 1 logical cell by combining 4 prrus into one pRRU, and a subsequent user can access the logical cell for communication.
In order to ensure that signals of each antenna of the pRRU received by the baseband device are consistent in time domain, the existing scheme is to determine a delay compensation value of a radio frequency channel of each antenna of the pRRU, and then perform delay calibration on each antenna of the pRRU based on the delay compensation value.
However, in the distributed massive MIMO communication system, the delay of the antenna is affected by multiple aspects, and only the delay compensation value of the radio frequency channel is determined, and it cannot be guaranteed that each signal is consistent in the time domain, so that the accuracy of the delay compensation value determined by the existing scheme is low, and the consistency of each signal in the time domain is poor.
Disclosure of Invention
The application provides a method and a device for determining a time delay compensation value and a computer readable storage medium, which can improve the accuracy of the time delay compensation value determined in a distributed massive MIMO communication system and the consistency of each signal in the time domain.
In order to achieve the above purpose, the present application adopts the following technical scheme:
in a first aspect, a method for determining a delay compensation value is provided, the method including: acquiring a first delay compensation value of each antenna of each pRRU in a plurality of pRRUs and a received signal of each pRRU; the pRRUs are positioned in the distributed massive MIMO communication system, and the first delay compensation value is the compensation value of the delay of the radio frequency channel of the antenna; for each pRRU, determining a second delay compensation value of the pRRU based on the first delay compensation value of each antenna of the pRRU and the received signal of the pRRU; the second delay compensation value is a compensation value of delay between pRRU and the baseband equipment except the first delay compensation value; and taking the sum of the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as the total delay compensation value of each antenna of the pRRU.
Based on the scheme, by acquiring a first delay compensation value of each antenna of each pRRU in a plurality of pRRUs and a received signal of each pRRU, determining a second delay compensation value of pRRU based on the first delay compensation value of each antenna of pRRU and the received signal of pRRU for each pRRU, and finally taking the sum of the first delay compensation value of each antenna of pRRU and the second delay compensation value of pRRU as a total delay compensation value of each antenna of pRRU. The second time delay compensation value in the scheme of the application is a time delay compensation value between pRRU and baseband equipment except for the first time delay compensation value, so that the scheme of the application considers the time delay influence of a plurality of aspects on the antenna, the accuracy of the time delay compensation value determined in the distributed massive MIMO communication system is improved, and the consistency of each signal in the time domain is improved.
With reference to the first aspect, in certain implementation manners of the first aspect, obtaining a first delay compensation value of each antenna of each pRRU of the plurality of prrus includes: acquiring a plurality of first delay values of each antenna of each pRRU; the first delay value is the delay value of the radio frequency channel of the antenna; determining a first reference delay value of pRRU for each pRRU; the first reference delay value is the minimum value in the average first delay values of the plurality of antennas of the pRRU, and the average first delay value is the average value of the plurality of first delay values; for each antenna in the pRRU, a difference between the average first delay value of the antenna and the first reference delay value is taken as a first delay compensation value of the antenna.
Based on the scheme, since the first delay value is a delay value of a radio frequency channel of an antenna, the first delay compensation value of each antenna of the pRRU can be obtained by acquiring a plurality of first delay values of each antenna of the pRRU, determining a first reference delay value of each pRRU, and finally taking the difference between the average first delay value of each antenna and the first reference delay value of the pRRU where each antenna is located as the first delay compensation value of each antenna.
With reference to the first aspect, in certain implementations of the first aspect, determining a second delay compensation value of pRRU based on the plurality of first delay compensation values of pRRU and the received signal of pRRU includes: performing delay compensation on the received signal of the pRRU based on a plurality of first delay compensation values of the pRRU to obtain a second delay value of the received signal of the pRRU; and determining a second delay compensation value of the pRRU according to the second delay values of the pRRUs.
Based on the scheme, based on a plurality of first delay compensation values of each pRRU, delay compensation is carried out on received signals of the pRRU, a second delay value of the received signals of the pRRU is obtained, the second delay compensation value of the pRRU is determined according to the second delay value of the pRRU, and the scheme of determining the second delay compensation value of the pRRU based on the plurality of first delay compensation values of the pRRU and the received signals of the pRRU can be realized.
With reference to the first aspect, in certain implementations of the first aspect, determining a second delay compensation value for the pRRU from the second delay values for the plurality of prrus includes: determining a second reference delay value of the plurality of prrus; the second reference delay value is the minimum value in the second delay values of the pRRUs; and taking the difference between the second delay value of the pRRU and the second reference delay value as a second delay compensation value of the pRRU.
Based on the scheme, by determining the second reference delay values of the plurality of prrus and taking the difference between the second delay values of the prrus and the second reference delay values as the second delay compensation value of the pRRU, the scheme of determining the second delay compensation value of the pRRU according to the second delay values of the plurality of prrus can be realized.
In a second aspect, a delay compensation value determining apparatus is provided for implementing the delay compensation value determining method of the first aspect. The delay compensation value determining device comprises a corresponding module, unit or means (means) for realizing the method, wherein the module, unit or means can be realized by hardware, software or realized by executing corresponding software by hardware. The hardware or software includes one or more modules or units corresponding to the functions described above.
With reference to the second aspect, in certain embodiments of the second aspect, the delay compensation value determining apparatus includes: a transceiver module and a processing module; the transceiver module is used for acquiring a first delay compensation value of each antenna of each pRRU in the plurality of pRRUs and a received signal of each pRRU; the pRRUs are positioned in the distributed massive MIMO communication system, and the first delay compensation value is the compensation value of the delay of the radio frequency channel of the antenna; the processing module is used for determining a second delay compensation value of the pRRU based on the first delay compensation value of each antenna of the pRRU and the received signal of the pRRU for each pRRU; the second delay compensation value is a compensation value of delay between pRRU and the baseband equipment except the first delay compensation value; the processing module is further configured to use a sum of the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as a total delay compensation value of each antenna of the pRRU.
With reference to the second aspect, in certain embodiments of the second aspect, the transceiver module, configured to obtain a first delay compensation value of each antenna of each pRRU of the plurality of prrus, includes: acquiring a plurality of first delay values of each antenna of each pRRU; the first delay value is the delay value of the radio frequency channel of the antenna; determining a first reference delay value of pRRU for each pRRU; the first reference delay value is the minimum value in the average first delay values of the plurality of antennas of the pRRU, and the average first delay value is the average value of the plurality of first delay values; for each antenna in the pRRU, a difference between the average first delay value of the antenna and the first reference delay value is taken as a first delay compensation value of the antenna.
With reference to the second aspect, in certain embodiments of the second aspect, the processing module, configured to determine, based on the plurality of first delay compensation values of the pRRU and the received signal of the pRRU, a second delay compensation value of the pRRU includes: performing delay compensation on the received signal of the pRRU based on a plurality of first delay compensation values of the pRRU to obtain a second delay value of the received signal of the pRRU; and determining a second delay compensation value of the pRRU according to the second delay values of the pRRUs.
With reference to the second aspect, in certain implementation manners of the second aspect, the processing module is further configured to determine a second delay compensation value of the pRRU according to the second delay values of the plurality of prrus, including: determining a second reference delay value of the plurality of prrus; the second reference delay value is the minimum value in the second delay values of the pRRUs; and taking the difference between the second delay value of the pRRU and the second reference delay value as a second delay compensation value of the pRRU.
In a third aspect, a delay compensation value determining apparatus is provided, including: at least one processor, a memory for storing instructions executable by the processor; wherein the processor is configured to execute instructions to implement a method as provided by the first aspect and any one of its possible implementations.
In a fourth aspect, a computer readable storage medium is provided, which when executed by a processor of a delay compensation value determining apparatus, enables the delay compensation value determining apparatus to perform a method as provided in the first aspect and any one of its possible implementations.
In a fifth aspect, there is provided a computer program product comprising instructions which, when run on a computer, enable the computer to perform the method provided by the first aspect and any one of its possible embodiments.
In a sixth aspect, there is provided a chip system comprising: a processor and interface circuit; interface circuit for receiving computer program or instruction and transmitting to processor; the processor is configured to execute a computer program or instructions to cause the chip system to perform a method as provided in the first aspect and any one of its possible embodiments described above.
The technical effects of any one of the embodiments of the second aspect to the sixth aspect may be referred to the technical effects of the different embodiments of the first aspect, and are not described herein.
Drawings
Fig. 1 is a schematic structural diagram of a distributed massive MIMO communication system provided in the present application;
Fig. 2 is a schematic architecture diagram of a delay compensation value determining system provided in the present application;
fig. 3 is a flow chart of a method for determining a delay compensation value provided in the present application;
fig. 4 is a flow chart of another method for determining a delay compensation value provided in the present application;
fig. 5 is a flowchart of another method for determining a delay compensation value provided in the present application;
fig. 6 is a flowchart of another method for determining a delay compensation value provided in the present application;
fig. 7 is a flowchart of another method for determining a delay compensation value provided in the present application;
fig. 8 is a schematic structural diagram of a delay compensation value determining device provided in the present application;
fig. 9 is a schematic structural diagram of another delay compensation value determining apparatus provided in the present application.
Detailed Description
In the description of the present application, unless otherwise indicated, "a plurality" means two or more than two. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b, or c may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or plural.
In addition, in order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, the words "first", "second", and the like are used to distinguish the same item or similar items having substantially the same function and effect. It will be appreciated by those of skill in the art that the words "first," "second," and the like do not limit the amount and order of execution, and that the words "first," "second," and the like do not necessarily differ.
Meanwhile, in the embodiments of the present application, words such as "exemplary" or "such as" are used to mean serving as examples, illustrations, or descriptions. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion that may be readily understood.
It is appreciated that reference throughout this specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, various embodiments are not necessarily referring to the same embodiments throughout the specification. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in various embodiments of the present application, the sequence number of each process does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.
It is to be understood that in this application, the terms "when …," "if," and "if" are used to indicate that the corresponding process is to be performed under some objective condition, and are not intended to limit the time, nor do they require that the acts be performed with a judgment, nor are they intended to imply that other limitations are present.
It can be appreciated that some optional features of the embodiments of the present application may be implemented independently in some scenarios, independent of other features, such as the scheme on which they are currently based, to solve corresponding technical problems, achieve corresponding effects, or may be combined with other features according to requirements in some scenarios. Accordingly, the apparatus provided in the embodiments of the present application may also implement these features or functions accordingly, which is not described herein.
Throughout this application, unless specifically stated otherwise, identical or similar parts between the various embodiments may be referred to each other. In the present application, unless specifically stated or logic conflict, terms and/or descriptions between different embodiments and between implementation methods in the embodiments are consistent and may be mutually cited, technical features in the different embodiments and implementation methods in the embodiments may be combined to form a new embodiment, implementation, method, or implementation method according to their inherent logic relationship. The following embodiments of the present application are not to be construed as limiting the scope of the present application.
In a distributed massive MIMO communication system, for example, in an indoor distributed massive MIMO communication system, in order to make signals of respective antennas of a pRRU received by a baseband device have consistency in a time domain, an existing scheme generally determines a delay compensation value of a radio frequency channel of each antenna of the pRRU, and then performs delay calibration on each antenna of the pRRU based on the delay compensation value.
However, the delay of the antenna may be affected by a plurality of aspects besides the delay of the radio frequency channel, and only determining the delay compensation value of the radio frequency channel may not ensure that each signal is consistent in the time domain, so that the accuracy of the delay compensation value determined by the existing scheme is low, and the consistency of each signal in the time domain is poor.
In order to solve the above-mentioned problems, fig. 2 is a schematic architecture diagram of a delay compensation value determining system provided in the present application, and the technical solution of the embodiment of the present application may be applied to the delay compensation value determining system shown in fig. 2, where, as shown in fig. 2, the delay compensation value determining system 20 includes a delay compensation value determining device 21 and an electronic device 22.
The delay compensation value determining device 21 is directly connected or indirectly connected to the electronic device 22, and in this connection relationship, the connection may be wired or wireless.
The delay compensation value determining means 21 may be arranged to receive data from the electronic device 22.
The electronic device 22 may be arranged to send data to the delay compensation value determining means 21.
The electronic device 22 may be a data transceiving device and the electronic device 22 may send any data required by the delay compensation value determining means 21 to the delay compensation value determining means 21.
It should be noted that, the delay compensation value determining apparatus 21 and the electronic device 22 may be independent devices, or may be integrated in the same device, which is not limited in this application.
When the delay compensation value determining apparatus 21 and the electronic device 22 are integrated in the same device, the communication mode between the delay compensation value determining apparatus 21 and the electronic device 22 is communication between internal modules of the device. In this case, the communication flow therebetween is the same as "the communication flow therebetween in the case where the delay compensation value determining apparatus 21 and the electronic device 22 are independent of each other".
In the following embodiments provided in the present application, the present application will be described taking an example in which the delay compensation value determining means 21 and the electronic device 22 are provided independently of each other.
In practical applications, the method for determining a delay compensation value provided in the embodiments of the present application may be applied to the delay compensation value determining apparatus 21, or may be applied to an apparatus included in the delay compensation value determining apparatus 21.
The delay compensation value determining method provided in the embodiment of the present application will be described below by taking an example in which the delay compensation value determining method is applied to the delay compensation value determining apparatus 21 with reference to the accompanying drawings.
Fig. 3 is a flow chart of a method for determining a delay compensation value provided in the present application, as shown in fig. 3, the method includes the following steps:
s301, a time delay compensation value determining device obtains a first time delay compensation value of each antenna of each pRRU and a received signal of each pRRU.
The plurality of pRRUs are located in the distributed massive MIMO communication system, and the first delay compensation value is a compensation value of delay of a radio frequency channel of the antenna.
It should be noted that the received signal may be a time delay calibration signal, or the received signal may also be a time delay calibration signal, which is not specifically limited in this application. As a possible implementation manner, in connection with fig. 1, the delay compensation value determining apparatus receives a message from an electronic device, where the message includes a first delay compensation value of each antenna of each of the plurality of prrus and a received signal of each pRRU, and the delay compensation value determining apparatus obtains the first delay compensation value of each antenna of each of the plurality of prrus and the received signal of each pRRU from the message.
As a possible implementation manner, in connection with fig. 1, the delay compensation value determining apparatus receives a message from an electronic device, where the message includes a plurality of first delay values of each antenna of each pRRU of the plurality of prrus and a received signal of each pRRU, and the delay compensation value determining apparatus obtains, from the message, the plurality of first delay values of each antenna of each pRRU and the received signal of each pRRU.
The delay compensation value determination means determines, for each pRRU, a first delay compensation value for each antenna of the pRRU based on a plurality of first delay values for each antenna of the pRRU.
It should be noted that, for a specific description of this possible implementation manner, reference may be made to the related description in the subsequent part of the specific embodiment of the present application, which is not described herein.
S302, a delay compensation value determining device determines, for each pRRU, a second delay compensation value of the pRRU based on the first delay compensation value of each antenna of the pRRU and the received signal of the pRRU.
The second delay compensation value is a delay compensation value between pRRU and the baseband equipment except the first delay compensation value.
It should be noted that the second delay compensation value may be a sum of a compensation value of a delay generated by hardware except the radio frequency channel in the pRRU and a compensation value of a delay generated by a convergence device connected to the pRRU.
The hardware in pRRU other than the radio frequency channel may be a power amplifier, transceiver, etc.
As a possible implementation manner, the delay compensation value determining device performs delay compensation on the received signal of the pRRU based on a plurality of first delay compensation values of the pRRU, obtains a second delay value of the received signal of the pRRU, and then determines the second delay compensation value of the pRRU according to the second delay value of the pRRU.
It should be noted that, for a specific description of this possible implementation manner, reference may be made to the related description in the subsequent part of the specific embodiment of the present application, which is not described herein.
And S303, the delay compensation value determining device takes the sum of the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as the total delay compensation value of each antenna of the pRRU.
As a possible implementation manner, the delay compensation value determining device uses a sum of a first delay compensation value of a first antenna of a first pRRU and a second delay compensation value of the first pRRU as a total delay compensation value of the first antenna.
The delay compensation value determining means takes the sum of the first delay compensation value of the second antenna of the first pRRU and the second delay compensation value of the first pRRU as the total delay compensation value of the second antenna.
The delay compensation value determining means takes the sum of the first delay compensation value of the third antenna of the first pRRU and the second delay compensation value of the first pRRU as the total delay compensation value of the third antenna.
And the like, obtaining the total delay compensation value of each antenna of the first pRRU.
Further, the delay compensation value determining device executes the processing logic for each pRRU to obtain a total delay compensation value of each antenna of each pRRU.
Based on the scheme, by acquiring a first delay compensation value of each antenna of each pRRU in a plurality of pRRUs and a received signal of each pRRU, determining a second delay compensation value of pRRU based on the first delay compensation value of each antenna of pRRU and the received signal of pRRU for each pRRU, and finally taking the sum of the first delay compensation value of each antenna of pRRU and the second delay compensation value of pRRU as a total delay compensation value of each antenna of pRRU. The second time delay compensation value in the scheme of the application is a time delay compensation value between pRRU and baseband equipment except for the first time delay compensation value, so that the scheme of the application considers the time delay influence of a plurality of aspects on the antenna, the accuracy of the time delay compensation value determined in the distributed massive MIMO communication system is improved, and the consistency of each signal in the time domain is improved.
The foregoing generally describes the method for determining a delay compensation value provided by the present application, and the method for determining a delay compensation value provided by the present application will be further described below with reference to the accompanying drawings.
In one design, fig. 4 is a flowchart of another method for determining a delay compensation value provided in the present application, as shown in fig. 4, in a specific embodiment of the present application, the delay compensation value determining device obtains a first delay compensation value of each antenna of each pRRU in a plurality of prrus, and may specifically include the following steps:
s401, the delay compensation value determining device obtains a plurality of first delay values of each antenna of each pRRU.
The first delay value is a delay value of a radio frequency channel of the antenna.
The jth first delay value of the ith antenna of pRRU may be expressed as T i ， j Where i=0, 1,2, …, n-1, n represents the number of antennas in the pRRU, j=0, 1,2, …, m-1, m represents the total number of antennas of the plurality of prrus.
As a possible implementation manner, in connection with fig. 1, the delay compensation value determining apparatus receives a message from an electronic device, where the message includes a plurality of first delay values of each antenna of each pRRU, and the delay compensation value determining apparatus obtains, from the message, the plurality of first delay values of each antenna of each pRRU.
As yet another possible implementation manner, the delay compensation value determining device sends a first indication message to a first antenna of a first pRRU, makes a radio frequency channel of the first antenna in a receiving state, sends a second indication message to a target antenna in other antennas of the pRRU, makes the radio frequency channel of the target antenna in a sending state, sends a third indication message to each antenna except the target antenna in other antennas of the pRRU, makes each antenna in an off state, and then the delay compensating device determines a first delay value of the first antenna.
And by analogy, the delay compensation value determining device enables the radio frequency channel of the first antenna to be always in a receiving state, and enables other antennas of the pRRU to be sequentially used as target antennas of which the radio frequency channels are in a transmitting state, so that a plurality of first delay values of the first antenna are obtained.
Further, the delay compensation value determining device executes the processing logic for each antenna of each pRRU, so as to obtain a plurality of first delay values of each antenna of each pRRU.
For example, taking the number of the plurality of pRRU as 2, the first pRRU includes 2 antennas, which are respectively an antenna No. 1 and an antenna No. 2, the second pRRU includes 2 antennas, which are respectively an antenna No. 3 and an antenna No. 4, for example, the delay compensation value determining device sends a first indication message to the antenna No. 1, makes the radio frequency channel of the antenna No. 1 be in a receiving state, uses the antenna No. 2 as a target antenna, sends a second indication message to the antenna No. 2, makes the radio frequency channel of the antenna No. 2 be in a sending state, sends a third indication message to the antenna No. 3 and the antenna No. 4, makes the radio frequency channel of the antenna No. 3 and the radio frequency channel of the antenna No. 4 be in a closing state, and then the delay compensation value determining device determines a first delay value T of the antenna No. 1 1,1 。
The delay compensation value determining device takes the No. 3 antenna as a target antenna, sends a second indication message to the No. 3 antenna, enables the radio frequency channel of the No. 3 antenna to be in a sending state, respectively sends third indication messages to the No. 2 antenna and the No. 4 antenna, enables the radio frequency channel of the No. 2 antenna and the radio frequency channel of the No. 4 antenna to be in a closing state, and then determines another first delay value T of the No. 1 antenna 1,2 。
The delay compensation value determining device takes the No. 4 antenna as a target antenna, sends a second indication message to the No. 4 antenna, enables the radio frequency channel of the No. 4 antenna to be in a sending state, respectively sends third indication messages to the No. 3 antenna and the No. 2 antenna, enables the radio frequency channel of the No. 3 antenna and the radio frequency channel of the No. 2 antenna to be in a closing state, and then determines another first delay value T of the No. 1 antenna 1,3 。
Finally, the delay compensation value determining device obtains 3 first delay values of the No. 1 antenna.
And so on, the delay compensation value determining device executes the processing logic for the antennas 2, 3 and 4 to obtain a plurality of first delay values of each antenna of each pRRU.
It should be noted that, in this possible implementation manner and this example, a specific scheme for determining the first delay value of the antenna may refer to an existing scheme, which is not described herein.
S402, a delay compensation value determining device determines a first reference delay value of pRRU for each pRRU.
The first reference delay value is the minimum value in the average first delay values of the plurality of antennas of the pRRU, and the average first delay value is the average value of the plurality of first delay values.
It should be noted that the first reference delay value of the ith pRRU may be expressed as
Alternatively, if the average first delay value of the 0 th antenna of the 0 th pRRU isThe average first delay value of the 1 st antenna is +.>The first reference delay value of the 0 th pRRU may also be expressed as +.>
As a possible implementation manner, the delay compensation value determining device determines an average value of a plurality of first delay values of a first antenna of the first pRRU, to obtain an average first delay value of the first antenna.
The delay compensation value determining means determines an average value of a plurality of first delay values of a second antenna of the first pRRU, resulting in an average first delay value of the second antenna.
And so on, the delay compensation value determining device obtains the average first delay value of the plurality of antennas of the first pRRU, and determines the minimum value in the average first delay value of the plurality of antennas as the first reference delay value of the first pRRU.
Further, the delay compensation value determining device executes the processing logic for each pRRU to obtain a first reference delay value of each pRRU.
S403, the delay compensation value determining device uses the difference between the average first delay value of the antennas and the first reference delay value as the first delay compensation value of the antennas for each antenna in the pRRU.
As a possible implementation manner, the delay compensation value determining device uses a difference between the average first delay value of the first antenna of the first pRRU and the first reference delay value of the first pRRU as the first delay compensation value of the first antenna.
The delay compensation value determining means takes a difference between an average first delay value of a second antenna of the first pRRU and a first reference delay value of the first pRRU as a first delay compensation value of the second antenna.
By analogy, the delay compensation value determining means determines a first delay compensation value for each antenna in the first pRRU.
Further, the delay compensation value determining device executes the processing logic for each pRRU to obtain a first delay compensation value of each antenna of each pRRU.
Based on the scheme, since the first delay value is a delay value of a radio frequency channel of an antenna, the first delay compensation value of each antenna of the pRRU can be obtained by acquiring a plurality of first delay values of each antenna of the pRRU, determining a first reference delay value of each pRRU, and finally taking the difference between the average first delay value of each antenna and the first reference delay value of the pRRU where each antenna is located as the first delay compensation value of each antenna.
In one design, fig. 5 is a schematic flow chart of another method for determining a delay compensation value provided in the present application, as shown in fig. 5, S302 provided in the specific embodiment of the present application may specifically include the following steps:
s501, the time delay compensation value determining device performs time delay compensation on the received signal of the pRRU based on a plurality of first time delay compensation values of the pRRU to obtain a second time delay value of the received signal of the pRRU.
It should be noted that the second delay value of the received signal of the 0 th pRRU may be represented as T 0 。
As a possible implementation manner, the delay compensation value determining device processes, by using a digital signal processor or a field programmable gate array, the plurality of first delay compensation values of the first pRRU and the received signal of the first pRRU, to obtain a second delay value of the received signal of the first pRRU.
Further, the delay compensation value determining device executes the processing logic for each pRRU to obtain a second delay value of the received signal of each pRRU.
It should be noted that, the specific solution of this possible implementation may refer to the existing solution, which is not described here.
S502, the time delay compensation value determining device determines a second time delay compensation value of the pRRU according to the second time delay values of the pRRUs.
As a possible implementation manner, the delay compensation value determining device determines second reference delay values of the pRRU; and taking the difference between the second delay value of the pRRU and the second reference delay value as a second delay compensation value of the pRRU. Wherein the second reference delay value is a minimum value among the second delay values of the plurality of prrus.
It should be noted that, for a specific description of this possible implementation manner, reference may be made to the related description in the subsequent part of the specific embodiment of the present application, which is not described herein.
Based on the scheme, based on a plurality of first delay compensation values of each pRRU, delay compensation is carried out on received signals of the pRRU, a second delay value of the received signals of the pRRU is obtained, the second delay compensation value of the pRRU is determined according to the second delay value of the pRRU, and the scheme of determining the second delay compensation value of the pRRU based on the plurality of first delay compensation values of the pRRU and the received signals of the pRRU can be realized.
In one design, fig. 6 is a schematic flow chart of another method for determining a delay compensation value provided in the present application, as shown in fig. 6, S502 provided in the specific embodiment of the present application may specifically include the following steps:
s601, a delay compensation value determining device determines second reference delay values of a plurality of pRRUs.
Wherein the second reference delay value is a minimum value among the second delay values of the plurality of prrus.
It should be noted that if the second delay value of the received signal of the 0 th pRRU can be expressed as T 0 The second delay value of the received signal of the 1 st pRRU can be expressed as T 1 The second reference delay value may be expressed as min (T 0 ，T 1 )。
As a possible implementation manner, the delay compensation value determining means determines a minimum value of the second delay values of the plurality of prrus as the second reference delay value of the plurality of prrus.
S602, the delay compensation value determining device uses the difference between the second delay value of the pRRU and the second reference delay value as the second delay compensation value of the pRRU.
As a possible implementation manner, the delay compensation value determining device uses a difference between the second delay value of the first pRRU and the second reference delay value as the second delay compensation value of the first pRRU.
Further, the delay compensation value determining device executes the processing logic for each pRRU to obtain a second delay compensation value of each pRRU.
Based on the scheme, by determining the second reference delay values of the plurality of prrus and taking the difference between the second delay values of the prrus and the second reference delay values as the second delay compensation value of the pRRU, the scheme of determining the second delay compensation value of the pRRU according to the second delay values of the plurality of prrus can be realized.
In one design, fig. 7 is a flowchart of another method for determining a delay compensation value provided in the present application, and as shown in fig. 7, the method for determining a delay compensation value may include the following steps:
s701, a delay compensation value determining device obtains a plurality of first delay values of each antenna of each pRRU.
Note that, specific description of S701 may refer to the description related to S401 described above.
S702, a delay compensation value determining device determines a first reference delay value of pRRU for each pRRU.
Note that, specific description of S702 may refer to the description related to S402 described above.
S703, the delay compensation value determining device uses the difference between the average first delay value of the antennas and the first reference delay value as the first delay compensation value of the antennas for each antenna in the pRRU.
Note that, specific description of S703 may refer to the description related to S403 described above.
S704, a time delay compensation value determining device obtains the received signal of each pRRU
Note that, specific description of S704 may refer to the description related to S301 described above.
S705, the delay compensation value determining device determines, for each pRRU, a second delay compensation value of the pRRU based on the first delay compensation value of each antenna of the pRRU and the received signal of the pRRU.
Note that, specific description of S705 may refer to the description related to S302 described above.
And then, the time delay compensation value determining device adds the first time delay compensation value of one antenna of the pRRU and the second time delay compensation value of the pRRU, so that the total time delay compensation value of the one antenna of the pRRU can be obtained.
The above-mentioned scheme provided in the embodiment of the present application is mainly described in terms of performing the delay compensation value determining method by the delay compensation value determining device. In order to realize the functions, the delay compensation value determining device comprises a hardware structure and/or a software module for executing the functions. Those of skill in the art will readily appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The embodiment of the application may divide the function modules of the delay compensation value determining device according to the above method example, for example, each function module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated modules may be implemented in hardware or in software functional modules. Optionally, the division of the modules in the embodiments of the present application is schematic, which is merely a logic function division, and other division manners may be actually implemented. Further, "module" herein may refer to an application-specific integrated circuit (ASIC), an electrical circuit, a processor and memory that execute one or more software or firmware programs, an integrated logic circuit, and/or other devices that can provide the above-described functionality.
Fig. 8 shows a schematic diagram of a delay compensation value determining apparatus in the case of using functional block division. As shown in fig. 8, the delay compensation value determining apparatus 80 includes a transceiver module 801 and a processing module 802.
In some embodiments, the delay compensation value determining device 80 may further include a memory module (not shown in fig. 8) for storing program instructions and data.
The transceiver module 801 is configured to obtain a first delay compensation value of each antenna of each pRRU of the plurality of prrus, and a received signal of each pRRU; the pRRUs are positioned in the distributed massive MIMO communication system, and the first delay compensation value is the compensation value of the delay of the radio frequency channel of the antenna; a processing module 802, configured to determine, for each pRRU, a second delay compensation value of the pRRU based on the first delay compensation value of each antenna of the pRRU and the received signal of the pRRU; the second delay compensation value is a compensation value of delay between pRRU and the baseband equipment except the first delay compensation value; the processing module 802 is further configured to use the sum of the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as the total delay compensation value of each antenna of the pRRU.
Optionally, the transceiver module 801, configured to obtain a first delay compensation value of each antenna of each pRRU in the plurality of prrus, includes: acquiring a plurality of first delay values of each antenna of each pRRU; the first delay value is the delay value of the radio frequency channel of the antenna; determining a first reference delay value of pRRU for each pRRU; the first reference delay value is the minimum value in the average first delay values of the plurality of antennas of the pRRU, and the average first delay value is the average value of the plurality of first delay values; for each antenna in the pRRU, a difference between the average first delay value of the antenna and the first reference delay value is taken as a first delay compensation value of the antenna.
Optionally, the processing module 802 is configured to determine, based on the plurality of first delay compensation values of pRRU and the received signal of pRRU, a second delay compensation value of pRRU, including: performing delay compensation on the received signal of the pRRU based on a plurality of first delay compensation values of the pRRU to obtain a second delay value of the received signal of the pRRU; and determining a second delay compensation value of the pRRU according to the second delay values of the pRRUs.
Optionally, the processing module 802 is further configured to determine a second delay compensation value of the pRRU according to the second delay values of the prrus, including: determining a second reference delay value of the plurality of prrus; the second reference delay value is the minimum value in the second delay values of the pRRUs; and taking the difference between the second delay value of the pRRU and the second reference delay value as a second delay compensation value of the pRRU.
All relevant contents of each step related to the above method embodiment may be cited to the functional descriptions of the corresponding functional modules, which are not described herein.
In the case of implementing the functions of the above functional blocks in the form of hardware, fig. 9 shows a schematic configuration of a delay compensation value determining apparatus. As shown in fig. 9, the delay compensation value determining device 90 includes a processor 901, a memory 902, and a bus 903. The processor 901 and the memory 902 may be connected by a bus 903.
The processor 901 is a control center of the delay compensation value determining apparatus 90, and may be one processor or a generic name of a plurality of processing elements. For example, the processor 901 may be a general-purpose central processing unit (central processing unit, CPU), or may be another general-purpose processor. Wherein the general purpose processor may be a microprocessor or any conventional processor or the like.
As one example, processor 901 may include one or more CPUs, such as CPU 0 and CPU 1 shown in fig. 9.
The memory 902 may be, but is not limited to, read-only memory (ROM) or other type of static storage device that can store static information and instructions, random access memory (random access memory, RAM) or other type of dynamic storage device that can store information and instructions, as well as electrically erasable programmable read-only memory (EEPROM), magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
As a possible implementation, the memory 902 may exist separately from the processor 901, and the memory 902 may be connected to the processor 901 by a bus 903 for storing instructions or program code. The processor 901, when calling and executing instructions or program code stored in the memory 902, can implement the delay compensation value determining method provided in the embodiment of the present application.
In another possible implementation, the memory 902 may also be integrated with the processor 901.
Bus 903 may be an industry standard architecture (Industry Standard Architecture, ISA) bus, a peripheral component interconnect (Peripheral Component Interconnect, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, among others. The bus may be classified as an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in fig. 9, but not only one bus or one type of bus.
It should be noted that the configuration shown in fig. 9 does not constitute a limitation of the delay compensation value determining means 90. The delay compensation value determining means 90 may comprise more or less components than shown in fig. 9, or certain components may be combined, or a different arrangement of components may be provided.
As an example, in connection with fig. 8, the transceiver module 801 and the processing module 802 in the delay compensation value determining apparatus 80 realize the same functions as those of the processor 901 in fig. 9.
Optionally, as shown in fig. 9, the delay compensation value determining apparatus 90 provided in the embodiment of the present application may further include a communication interface 904.
A communication interface 904 for connecting with other devices via a communication network. The communication network may be an ethernet, a radio access network, a wireless local area network (wireless local area networks, WLAN), etc. The communication interface 904 may include a receiving unit for receiving data and a transmitting unit for transmitting data.
In a possible implementation manner, in the delay compensation value determining apparatus 90 provided in the embodiment of the present application, the communication interface 904 may also be integrated in the processor 901, which is not specifically limited in the embodiment of the present application.
As a possible product form, the delay compensation value determining apparatus of the embodiments of the present application may be further implemented using the following: one or more field programmable gate arrays (field programmable gate array, FPGA), programmable logic devices (programmable logic device, PLD), controllers, state machines, gate logic, discrete hardware components, any other suitable circuit or combination of circuits capable of performing the various functions described throughout this application.
From the above description of embodiments, it will be apparent to those skilled in the art that the foregoing functional unit divisions are merely illustrative for convenience and brevity of description. In practical applications, the above-mentioned function allocation may be performed by different functional units, i.e. the internal structure of the device is divided into different functional units, as needed, to perform all or part of the functions described above. The specific working processes of the above-described systems, devices and units may refer to the corresponding processes in the foregoing method embodiments, which are not described herein.
The present application also provides a computer-readable storage medium, on which a computer program or instructions are stored, which when executed cause a computer to perform the steps of the method flow shown in the above-described method embodiments.
Embodiments of the present application provide a computer program product comprising instructions which, when run on a computer, cause the computer to perform the steps of the method flows shown in the method embodiments described above.
An embodiment of the present application provides a chip system, including: a processor and interface circuit; interface circuit for receiving computer program or instruction and transmitting to processor; the processor is configured to execute the computer program or instructions to cause the chip system to perform the steps of the method flow shown in the method embodiments described above.
The computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium would include the following: electrical connections having one or more wires, portable computer diskette, hard disk. Random access Memory (Random Access Memory, RAM), read-Only Memory (ROM), erasable programmable Read-Only Memory (Erasable Programmable Read Only Memory, EPROM), registers, hard disk, optical fiber, portable compact disc Read-Only Memory (CD-ROM), an optical storage device, a magnetic storage device, or any other form of computer-readable storage medium suitable for use by a person or persons of skill in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in a special purpose ASIC. In the context of the present application, a computer-readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
Since the delay compensation value determining apparatus, the computer readable storage medium and the computer program product provided in this embodiment can be applied to the delay compensation value determining method provided in this embodiment, the technical effects that can be obtained by the delay compensation value determining apparatus, the computer readable storage medium and the computer program product can also refer to the method embodiments described above, and the embodiments of the present application are not repeated here.
Although the present application has been described herein in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed application, from a review of the figures, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.
Although the present application has been described in connection with specific features and embodiments thereof, it will be apparent that various modifications and combinations can be made without departing from the spirit and scope of the application. Accordingly, the specification and drawings are merely exemplary illustrations of the present application as defined in the appended claims and are considered to cover any and all modifications, variations, combinations, or equivalents that fall within the scope of the present application. It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims and the equivalents thereof, the present application is intended to cover such modifications and variations.
Claims (10)
1. A method for determining a delay compensation value, the method comprising:
acquiring a first delay compensation value of each antenna of each pRRU in a plurality of pRRUs and a received signal of each pRRU; the pRRUs are positioned in a distributed massive multiple-input multiple-output massive MIMO communication system, and the first delay compensation value is a compensation value of the delay of a radio frequency channel of an antenna;
for each pRRU, determining a second delay compensation value for the pRRU based on each antenna first delay compensation value for the pRRU and a received signal for the pRRU; the second delay compensation value is a delay compensation value between the pRRU and the baseband equipment except the first delay compensation value;
and taking the sum of the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as the total delay compensation value of each antenna of the pRRU.
2. The method of claim 1, wherein the obtaining the first delay compensation value for each antenna of each pRRU of the plurality of prrus comprises:
acquiring a plurality of first delay values of each antenna of each pRRU; the first delay value is the delay value of a radio frequency channel of the antenna;
Determining a first reference delay value of each pRRU for the pRRU; the first reference delay value is the minimum value in average first delay values of a plurality of antennas of the pRRU, and the average first delay value is the average value of the plurality of first delay values;
for each antenna in the pRRU, a difference between an average first delay value of the antenna and a first reference delay value is taken as a first delay compensation value of the antenna.
3. The method of claim 1 or 2, wherein the determining the second delay compensation value of the pRRU based on the plurality of first delay compensation values of the pRRU and the received signal of the pRRU comprises:
performing delay compensation on the received signal of the pRRU based on a plurality of first delay compensation values of the pRRU to obtain a second delay value of the received signal of the pRRU;
and determining a second delay compensation value of the pRRU according to the second delay values of the pRRUs.
4. The method of claim 3, wherein the determining the second delay compensation value for the pRRU from the second delay values for the plurality of prrus comprises:
determining a second reference delay value for the plurality of prrus; the second reference delay value is the minimum value of the second delay values of the plurality of prrus;
And taking the difference between the second time delay value of the pRRU and the second reference time delay value as a second time delay compensation value of the pRRU.
5. A delay compensation value determining apparatus, characterized in that the delay compensation value determining apparatus comprises: a transceiver module and a processing module;
the transceiver module is configured to obtain a first delay compensation value of each antenna of each pRRU in the plurality of pico base stations pRRU, and a received signal of each pRRU; the pRRUs are positioned in a distributed massive multiple-input multiple-output massive MIMO communication system, and the first delay compensation value is a compensation value of the delay of a radio frequency channel of an antenna;
the processing module is configured to determine, for each pRRU, a second delay compensation value of the pRRU based on each antenna first delay compensation value of the pRRU and a received signal of the pRRU; the second delay compensation value is a delay compensation value between the pRRU and the baseband equipment except the first delay compensation value;
the processing module is further configured to use a sum of the first delay compensation value of each antenna of the pRRU and the second delay compensation value of the pRRU as a total delay compensation value of each antenna of the pRRU.
6. The apparatus for determining a delay compensation value according to claim 5, wherein the transceiver module, configured to obtain the first delay compensation value for each antenna of each pRRU of the plurality of prrus, comprises:
acquiring a plurality of first delay values of each antenna of each pRRU; the first delay value is the delay value of a radio frequency channel of the antenna;
determining a first reference delay value of each pRRU for the pRRU; the first reference delay value is the minimum value in average first delay values of a plurality of antennas of the pRRU, and the average first delay value is the average value of the plurality of first delay values;
for each antenna in the pRRU, a difference between an average first delay value of the antenna and a first reference delay value is taken as a first delay compensation value of the antenna.
7. The apparatus according to claim 5 or 6, wherein the processing module configured to determine the second delay compensation value of the pRRU based on the plurality of first delay compensation values of the pRRU and the received signal of the pRRU, comprises:
performing delay compensation on the received signal of the pRRU based on a plurality of first delay compensation values of the pRRU to obtain a second delay value of the received signal of the pRRU;
And determining a second delay compensation value of the pRRU according to the second delay values of the pRRUs.
8. The apparatus for determining a delay compensation value according to claim 7, wherein the processing module is further configured to determine a second delay compensation value for the pRRU based on the second delay values for the plurality of prrus, comprising:
determining a second reference delay value for the plurality of prrus; the second reference delay value is the minimum value of the second delay values of the plurality of prrus;
and taking the difference between the second time delay value of the pRRU and the second reference time delay value as a second time delay compensation value of the pRRU.
9. A delay compensation value determining apparatus, characterized in that the delay compensation value determining apparatus comprises: a processor coupled to a memory for storing a program or instructions that, when executed by the processor, cause the apparatus to perform the method of any one of claims 1 to 4.
10. A computer readable storage medium having stored thereon a computer program or instructions, which when executed cause a computer to perform the method of any of claims 1 to 4.
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