CN117319126B

CN117319126B - Chip power consumption control method, device, computer equipment and storage medium

Info

Publication number: CN117319126B
Application number: CN202311609882.7A
Authority: CN
Inventors: 康锐; 刘建文
Original assignee: Contemporary Amperex Technology Co Ltd
Current assignee: Contemporary Amperex Technology Co Ltd
Priority date: 2023-11-29
Filing date: 2023-11-29
Publication date: 2024-04-02
Anticipated expiration: 2043-11-29
Also published as: CN117319126A

Abstract

The application relates to a chip power consumption control method, a chip power consumption control device, computer equipment and a storage medium. The method comprises the following steps: under the condition that a communication breakpoint exists in the daisy chain, a first communication direction of a target link obtained by splitting the daisy chain based on the communication breakpoint, a reading instruction and target duration are sent to a chip of the target link, acquisition data sent by the chip based on the reading instruction are received, and under the condition that the acquisition data are transmitted by the chip of the target link, the target duration is used for transmitting the acquisition data, a preset power consumption current is started based on the target duration, so that the power consumption of all the chips on the daisy chain is the same. Therefore, under the condition that the chips of the target link transmit the acquired data, the power consumption current is started, so that the power consumption of each chip on the daisy chain is the same, and the consistency of the residual capacity of the battery cell is improved.

Description

Chip power consumption control method, device, computer equipment and storage medium

Technical Field

The present disclosure relates to the field of chip power consumption control technologies, and in particular, to a chip power consumption control method, device, computer device, and storage medium.

Background

Battery systems for electric devices such as electric vehicles and electric ships are typically composed of hundreds or thousands of battery cells. Currently, an Analog Front End (AFE) chip is used to collect state data such as voltage and current of a current core, and the state data is transmitted to a battery management system (Battery Management System, BMS) in a daisy chain communication mode, and the battery management system controls battery charging and discharging according to the state data so as to prevent abnormal charging and discharging. At present, the difference of power consumption among chips is caused by different communication power consumption of the chips, and the chips directly take electricity from corresponding electric cores to consume electric core capacity when working, so that the communication power consumption of each chip is different, the consistency of the residual capacity of the electric cores is poor, and the communication power consumption of the acquisition chips is required to be balanced.

At present, the daisy chain communication direction is switched, so that the forward communication duration time and the reverse communication duration time of the daisy chain are equal, and the sum of the communication power consumption of each chip on the daisy chain is the same, so that the problem of inconsistent residual capacity of the battery core caused by the difference of the power consumption of the chips is solved.

However, in the case of a communication breakpoint, there is still a problem in that the remaining capacity of the battery cell is not uniform.

Disclosure of Invention

In view of the foregoing, it is desirable to provide a method, an apparatus, a computer device, and a storage medium for controlling power consumption of a chip, which improve the consistency of the remaining capacity of a battery cell in the presence of a communication breakpoint.

In a first aspect, the present application provides a method for controlling power consumption of a chip. The method is applied to a battery management system, and comprises the following steps:

under the condition that a communication breakpoint exists in the daisy chain, a reading instruction and target duration are sent to a chip of a target link based on a first communication direction of the target link obtained by splitting the daisy chain through the communication breakpoint; under the condition that the target time length is used for the chips of the target link to transmit the acquired data, starting a preset power consumption current based on the target time length, so that the power consumption of each chip on the daisy chain is the same;

The receiving chip is used for receiving the acquired data sent by the reading instruction.

According to the chip power consumption control method, under the condition that a communication breakpoint exists in a daisy chain, a first communication direction of a target link obtained by splitting the daisy chain based on the communication breakpoint is used for sending a reading instruction and target duration to a chip of the target link, receiving acquisition data sent by the chip based on the reading instruction, and under the condition that the target duration is used for the chip of the target link to transmit the acquisition data, starting a preset power consumption current based on the target duration, so that the power consumption of each chip on the daisy chain is the same. Therefore, under the condition that the chips of the target link transmit the acquired data, the power consumption current is started, so that the power consumption of each chip on the daisy chain is the same, and the consistency of the residual capacity of the battery cell is improved.

In one embodiment, the method further comprises:

determining a target link and a first communication direction according to the breakpoint position of the communication breakpoint;

the target duration is determined based on the number of chips of the target link and the first communication direction.

According to the method provided by the embodiment of the application, the target link and the first communication direction are determined according to the breakpoint position of the communication breakpoint, and the target duration is determined based on the number of chips of the target link and the first communication direction, so that a basic basis is provided for the chips to start the power consumption current based on the target duration, and the consistency of the power consumption among the chips is improved.

In one embodiment, determining the target duration based on the number of chips of the target link and the first communication direction includes:

determining a reference chip of the target link according to the first communication direction;

determining a first time length required by a reference chip of the target link to transmit acquired data to a battery management system based on the number of chips of the target link;

and determining the target time length according to the first time length required by the reference chip of the target link to transmit the acquired data to the battery management system.

According to the method and the device, the reference chip of the target link is determined according to the first communication direction, the first time length required by the reference chip of the target link for transmitting the collected data to the battery management system is determined based on the number of chips of the chip of the target link, and then the target time length is determined according to the first time length required by the reference chip of the target link for transmitting the collected data to the battery management system, so that the accuracy of the determined target time length is improved, a basic basis is provided for the chips to start the power consumption current based on the target time length, and the consistency of the power consumption among the chips is improved.

In one embodiment, determining a first time period required for a reference chip of a target link to transmit acquisition data to a battery management system based on a chip number of chips of the target link includes:

Determining a second time length required by the chip of the target link to transmit the target data; the chip with the target data being the target link acquires acquisition data based on the reading instruction;

taking the product of the second time length and the number of chips as the first time length.

According to the method provided by the embodiment of the application, the second time length required by the chip of the target link for transmitting the target data is determined, and the product of the second time length and the number of the chips is used as the first time length, so that the accuracy of the determined first time length can be improved.

In one embodiment, determining the target link and the first communication direction according to the breakpoint location of the communication breakpoint includes:

if the breakpoint position is located on a link between chips on the daisy chain, determining two target links and determining a first communication direction of each target link;

wherein the first communication directions of the two label links are opposite.

In the embodiment of the application, under the condition that the breakpoint positions are positioned on the links between the chips on the daisy chain, two target links are determined, and the first communication direction of each target link is determined, so that a basis can be provided for sending a reading instruction and target duration to the chips of each target link based on the first communication direction of each target link, further, the power consumption difference between the chips is reduced, and the consistency of the residual capacity of the battery cells is improved.

In one embodiment, determining the target time length according to the first time length required by the reference chip of the target link to transmit the collected data to the battery management system includes:

and taking the maximum value in the first time periods corresponding to the two target links as a target time period.

In the embodiment of the application, the maximum value in the first time length corresponding to the two target links is taken as the target time length, so that the time length for opening the power consumption current per se can be determined by taking the target time length as a reference for the chips on the target links, and the power consumption current is opened based on the time length, so that the consistency of the power consumption among the chips is improved.

if the breakpoint position is located on a link between a chip on the daisy chain and the battery management system, determining an entry mark link, and taking the second communication direction as a first communication direction of the target link;

wherein the second communication direction is opposite to the communication direction before the communication breakpoint exists.

In the embodiment of the application, in the case that the breakpoint position is located on a link between a chip on the daisy chain and the battery management system, an entry target link is determined, and the second communication direction is taken as a first communication direction of the target link. Therefore, a basis can be provided for sending a reading instruction and target duration to the chips of the target link based on the first communication direction of the target link, and further, the power consumption difference among the chips is reduced, and the consistency of the residual capacity of the battery cells is improved.

and taking the first time length required by the reference chip of the target link for transmitting the acquired data to the battery management system as the target time length.

In the embodiment of the application, the first time length required by the reference chip of the target link for transmitting the acquired data to the battery management system is taken as the target time length, so that the time length for opening the power consumption current of the chip on the target link by taking the target time length as a reference can be determined, the power consumption current is opened based on the time length, and the consistency of the power consumption among the chips is improved.

In one embodiment, the method further comprises:

under the condition that the battery management system is powered on at the current time, acquiring the communication direction of the daisy chain stored before the battery management system is powered off at the current time;

determining power consumption current according to power consumption when the first chip on the daisy chain transmits collected data to the second chip; the second chip is the last chip of the first chip;

power consumption current is sent to the chips on the daisy chain based on the communication direction.

According to the method and the device, under the condition that the battery management system is electrified at the current time, the communication direction of the daisy chain stored before the battery management system is electrified last time is obtained, the power consumption current is determined according to the power consumption when the first chip on the daisy chain transmits the collected data to the second chip, the power consumption current is sent to the chips on the daisy chain based on the communication direction, the accuracy of the determined power consumption current is improved, and under the condition that the chips transmit the collected data, the power consumption of the power consumption current can be started, so that the power consumption consistency of each chip on the daisy chain is improved.

In one embodiment, the method further comprises:

under the condition that the battery management system is powered on at the current time, acquiring the historical duration of the daisy chain stored before the battery management system is powered off at the last time in the communication direction;

if the daisy chain does not have a communication breakpoint and the battery management system does not receive a power-down instruction sent by the controller, determining a comparison result of the total duration time in the communication direction and the preset duration time; the total duration is equal to the sum of the historical duration and the current duration in the communication direction after the current power-on;

if the comparison result is that the total duration is longer than or equal to the preset duration, the communication direction is switched, and the historical duration and the current duration are set to be zero.

In the embodiment of the application, under the condition that the battery management system is powered on last time, the historical duration of the daisy chain in the communication direction stored before the battery management system is powered down last time is obtained, if the daisy chain does not have a communication breakpoint and the battery management system does not receive a power-down instruction sent by the controller, a comparison result of the total duration in the communication direction and the preset duration is determined, if the comparison result is that the total duration is greater than or equal to the preset duration, the communication direction is switched, the historical duration and the current duration are set to zero, and accordingly the forward communication direction and the reverse communication direction of the daisy chain are alternately conducted, the total duration of the forward communication direction is the same as the total duration of the reverse communication direction, the consistency of power consumption of chips is improved, and therefore the consistency of the power consumption of the chips and the consistency of the residual capacity of the battery cells can be improved under the condition that the communication breakpoint does not exist.

In one embodiment, the method further comprises:

if the daisy chain does not have a communication breakpoint and the battery management system receives a power-down instruction, the communication direction and the total duration of the daisy chain are stored.

In the embodiment of the application, under the condition that a communication breakpoint does not exist in the daisy chain and the battery management system receives a power-down instruction, the communication direction and the total duration of the daisy chain are stored, so that the BMS can conveniently read the communication direction and the total duration after power-up next time, the total duration is used as the historical duration of the communication direction, further a comparison result of the new total duration and the preset duration is determined, and whether the communication direction is to be switched is determined based on the comparison result.

In a second aspect, the present application further provides a method for controlling power consumption of a chip, where the method is applied to the chip, and the method includes:

under the condition that a communication breakpoint exists in the daisy chain, receiving a reading instruction and target duration sent by a first communication direction of a target link, which are obtained by splitting the daisy chain by a battery management system based on the communication breakpoint;

transmitting acquisition data to a superior chip of the chip in response to the reading instruction;

under the condition that the acquired data is transmitted, starting a pre-configured power consumption current based on the target duration, so that the power consumption of each chip on the daisy chain is the same.

In a third aspect, the present application further provides a chip power consumption control device. The device is arranged in the battery management system, and the device comprises:

the sending module is used for sending a reading instruction and target duration to a chip of the target link based on a first communication direction of the target link obtained by splitting the daisy chain based on the communication breakpoint when the daisy chain has the communication breakpoint; under the condition that the target time length is used for the chips of the target link to transmit the acquired data, starting a preset power consumption current based on the target time length, so that the power consumption of each chip on the daisy chain is the same;

and the receiving module is used for receiving the acquisition data sent by the chip based on the reading instruction.

In a fourth aspect, the present application further provides a chip power consumption control device. The device is set up in the chip, and the device includes:

the receiving module is used for receiving a reading instruction and target duration sent by a first communication direction of a target link, which are obtained by splitting the daisy chain by the battery management system based on the communication breakpoint, under the condition that the daisy chain has the communication breakpoint;

the transmission module is used for responding to the reading instruction and transmitting the acquired data to the upper chip of the chip;

and the starting module is used for starting the preset power consumption current based on the target duration under the condition that the acquired data are transmitted, so that the power consumption of each chip on the daisy chain is the same.

In a fifth aspect, the present application also provides a computer device. The computer device comprises a memory storing a computer program and a processor implementing the steps of the method provided by the above embodiments when the processor executes the computer program.

In a sixth aspect, the present application also provides a computer-readable storage medium. A computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method provided by the above embodiments.

In a seventh aspect, the present application also provides a computer program product. Computer program product comprising a computer program which, when executed by a processor, implements the steps of the method provided by the above embodiments.

The foregoing description is only an overview of the technical solutions of the present application, and may be implemented according to the content of the specification in order to make the technical means of the present application more clearly understood, and in order to make the above-mentioned and other objects, features and advantages of the present application more clearly understood, the following detailed description of the present application will be given.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to designate like parts throughout the accompanying drawings. In the drawings:

FIG. 1 is a schematic diagram of a daisy-chain communication direction provided in an embodiment of the present application;

fig. 2 is a schematic flow chart of a chip power consumption control method according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a communication breakpoint dividing a daisy chain into two label links according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a communication breakpoint dividing a daisy chain into an entry target link provided by an embodiment of the present application;

fig. 5 is a flowchart of a method for determining a target duration according to an embodiment of the present application;

fig. 6 is a flowchart of another method for determining a target duration according to an embodiment of the present application;

fig. 7 is a flowchart of a first time length determining method according to an embodiment of the present application;

fig. 8 is a schematic flow chart of a power consumption current sending method provided in an embodiment of the present application;

fig. 9 is a flow chart of a communication direction switching method provided in an embodiment of the present application;

FIG. 10 is a flow chart of another method for controlling power consumption of a chip provided by the present application;

FIG. 11 is a flowchart of another method for controlling power consumption of a chip according to an embodiment of the present disclosure;

fig. 12 is a flow chart of a method for alternately performing forward and reverse communication according to an embodiment of the present application;

Fig. 13 is a schematic structural diagram of a chip power consumption control device according to an embodiment of the present application;

FIG. 14 is a second schematic diagram of a chip power consumption control device according to the embodiment of the present disclosure;

FIG. 15 is a third schematic diagram of a chip power consumption control device according to an embodiment of the present disclosure;

FIG. 16 is a schematic diagram of a chip power consumption control device according to an embodiment of the present disclosure;

FIG. 17 is a fifth schematic diagram of a chip power consumption control device according to an embodiment of the present disclosure;

fig. 18 is an internal structural view of a computer device in one embodiment.

Detailed Description

Embodiments of the technical solutions of the present application will be described in detail below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical solutions of the present application, and thus are only examples, and are not intended to limit the scope of protection of the present application.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having" and any variations thereof in the description and claims of the present application and in the description of the figures above are intended to cover non-exclusive inclusions.

In the description of the embodiments of the present application, the technical terms "first," "second," etc. are used merely to distinguish between different objects and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, a particular order or a primary or secondary relationship. In the description of the embodiments of the present application, the meaning of "plurality" is two or more unless explicitly defined otherwise.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

In the description of the embodiments of the present application, the term "and/or" is merely an association relationship describing an association object, which means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

In the description of the embodiments of the present application, the term "plurality" refers to two or more (including two), and similarly, "plural sets" refers to two or more (including two), and "plural sheets" refers to two or more (including two).

Battery systems for electric devices such as electric vehicles and electric ships are typically composed of hundreds or thousands of battery cells. At present, an Analog Front End (AFE) chip is adopted to collect state data such as voltage and current of a current core, the state data is transmitted to a battery management system in a daisy chain communication mode, and the battery management system controls battery charging and discharging according to the state data so as to prevent abnormal charging and discharging. At present, the difference of power consumption among chips is caused by different communication power consumption of the chips, and the chips directly take electricity from corresponding battery cores to consume battery core capacity when in work, so that the communication power consumption of each chip is different, and consistency of residual capacity of the battery cores is poor.

Currently, there are two daisy chain communication directions, namely a forward communication direction and a reverse communication direction, as shown in fig. 1, and fig. 1 is a schematic diagram of one daisy chain communication direction according to an embodiment of the present application. Assuming that there are 5 chips in the daisy chain, a daisy chain communication mode is provided between the 5 chips and B0, and B0 is used for executing a translation function, and can translate an instruction sent by the battery management system into information which can be identified by the chip, and can translate data sent by the chip into information which can be identified by the battery management system. As shown in fig. 1 (a), the forward communication direction of the daisy chain is that the battery management system sends a read command to B0 on the daisy chain, B0 sends the read command to chip 1, chip 1 sends the read command to chip 2, chip 2 sends the read command to chip 3, and so on, chip 4 sends the read command to chip 5, and each chip on the daisy chain acquires data such as voltage or current of the chip based on the read command and sends the data to the battery management system in a daisy chain communication manner. The solid arrow in (a) in fig. 1 indicates a flow of transmitting a read instruction to the chip in the forward communication direction.

For example, after sending a read command to each chip in the forward communication direction, the chip 5 sends the collected data 5 to the chip 4, the chip 4 sends the collected data 4 collected by the chip 4 to the chip 3, and the collected data 5 collected by the chip 5 needs to be sent to the chip 3. The chip 3 receives the collected data 4 and the collected data 5, the chip 3 needs to send the collected data 3 collected by the chip 3 to the chip 2, and the chip 2 needs to send the collected data 4 and the collected data 5. Also, the chip 2 needs to transmit the acquired data 2 acquired by the chip 2 to the chip 1, and also needs to transmit the acquired data 3, the acquired data 4 and the acquired data 5 to the chip 1. The chip 1 sends the acquired data 1, the acquired data 2, the acquired data 3, the acquired data 4 and the acquired data 5 acquired by the chip 1 to the B0, and the B0 sends the acquired data 1, the acquired data 2, the acquired data 3, the acquired data 4 and the acquired data 5 to the battery management system, so that the battery management system acquires the acquired data of each chip. The dashed arrow in fig. 1 (a) indicates a flow of the collected data sent by the BMS receiving chip when the forward communication direction is adopted.

Under the condition of adopting the forward communication direction, the chip 5 only needs to send the acquired data 5 acquired by itself to the chip 4, and the chip 4 needs to send the acquired data 5 and the acquired data 4 to the chip 3, so that the communication power consumption of the chip 4 is higher than that of the chip 4, and similarly, the communication power consumption of the chip 3 is higher than that of the chip 4, and the communication power consumption of the chip 1 is highest. And assuming that the communication power consumption of the chip 5 is W, the communication power consumption of the chip 4 is 2W, the communication power consumption of the chip 3 is 3W, the communication power consumption of the chip 2 is 4W, and the communication power consumption of the chip 1 is 5W.

As shown in fig. 1 (B), the reverse communication direction is that the battery management system transmits a read command to B0, B0 transmits a read command to chip 5 on the daisy chain, chip 5 transmits a read command to chip 4, chip 4 transmits a read command to chip 3, chip 3 transmits a read command to chip 2, chip 2 transmits a read command to chip 1, and each chip on the daisy chain acquires data such as voltage or current of the chip based on the read command and transmits the data to the battery management system in the daisy chain communication manner. The solid arrows in (b) in fig. 1 represent a flow of transmitting a read command to the chip in the reverse communication direction, and the dotted arrows in (b) in fig. 1 represent a flow of receiving the collected data transmitted from the chip in the reverse communication direction.

For example, after a reading instruction is sent to each chip in a reverse communication direction, the chip 1 sends the collected data 1 to the chip 2, the chip 2 sends the collected data 2 collected by the chip 2 to the chip 3, and the collected data 1 collected by the chip 1 needs to be sent to the chip 3. The chip 3 receives the acquired data 1 and the acquired data 2, the chip 3 needs to send the acquired data 3 acquired by the chip 3 to the chip 4, and the chip 4 needs to send the acquired data 1 and the acquired data 2. Also, the chip 4 needs to transmit the acquired data 4 acquired by the chip 4 to the chip 5, and also needs to transmit the acquired data 1, the acquired data 2, and the acquired data 3 to the chip 5. The chip 5 sends the acquired data 5 acquired by the chip 5 to the B0, and the acquired data 1, the acquired data 2, the acquired data 3 and the acquired data 4 received by the chip 5, and the B0 sends the acquired data 1, the acquired data 2, the acquired data 3, the acquired data 4 and the acquired data 5 to the battery management system, so that the battery management system acquires the acquired data of each chip.

Under the condition of adopting the reverse communication direction, the chip 1 only needs to send the acquired data 1 acquired by itself to the chip 2, and the chip 2 needs to send the acquired data 1 and the acquired data 2 to the chip 3, so that the communication power consumption of the chip 2 is higher than that of the chip 1, and similarly, the communication power consumption of the chip 3 is higher than that of the chip 2, and the communication power consumption of the chip 5 is highest. And assuming that the communication power consumption of the chip 1 is W, the communication power consumption of the chip 2 is 2W, the communication power consumption of the chip 3 is 3W, the communication power consumption of the chip 4 is 4W, and the communication power consumption of the chip 5 is 5W.

Therefore, if the forward communication direction is always adopted or the reverse communication direction is always adopted, the communication power consumption difference of the chip is large, and the consistency of the residual capacity of the battery cell is poor.

At present, when a battery management system is powered on, the recorded daisy chain communication direction and the historical duration in the daisy chain communication direction are read, whether the interval time from the last query time reaches the second preset time or not is judged, if the second preset time is reached, whether the sum of the historical duration and the duration in the communication direction after the current power on reaches the first preset time or not is judged, if the first preset time is reached, the daisy chain communication direction is switched, so that the daisy chain forward communication duration is equal to the daisy chain forward communication duration, and the sum of the communication power consumption of each chip on the daisy chain is equal, and the problem that the residual capacity of the battery core is inconsistent due to the difference of the power consumption of the chips is solved. In connection with the above description, that is, the forward communication duration and the reverse communication duration are equal, the power consumption at the time of forward communication of the chip 1 is 5W, the power consumption at the time of reverse communication is 1W, and the total communication power consumption of the chip 1 is 6W. The total communication power consumption of the other 4 chips is also 6W, so that the sum of the communication power consumption of each chip on the daisy chain is the same.

However, when the above scheme is adopted, under the condition that a communication breakpoint exists, the problem of inconsistent residual capacity of the battery cell still exists. For example, if there is a communication breakpoint between the chip 2 and the chip 3, in the case of adopting the forward communication direction, the chip 3 cannot transmit the collected data to the chip 2, the chip 3, the chip 4 and the chip 5 may not receive the read command, there is no communication power consumption, only the chip 1 and the chip 2 operate, and the BMS cannot acquire the collected data of the chip 3, the chip 4 and the chip 5 based on the forward communication direction. Under the condition of switching to the reverse communication direction, only the chip 3, the chip 4 and the chip 5 have communication power consumption, so that the communication power consumption among the chips is different, and the residual capacity of the battery core is inconsistent due to the difference of the power consumption of the chips.

In order to solve the above technical problems, the embodiments of the present application provide a method for controlling chip power consumption, where the method may be applied to a battery management system as shown in fig. 1, and fig. 2 is a flow chart of a method for controlling chip power consumption provided in the embodiments of the present application. The method includes S201-S202.

S201, under the condition that a communication breakpoint exists in the daisy chain, a reading instruction and target duration are sent to a chip of the target link based on a first communication direction of the target link obtained by splitting the daisy chain through the communication breakpoint.

Under the condition that the chips of the target link are used for transmitting the acquired data, starting the preset power consumption current based on the target time, so that the power consumption of each chip on the daisy chain is the same.

In the case of a communication breakpoint, this means that the communication breakpoint breaks the daisy chain into at least one target link. Under the condition that the daisy chain is divided into two target links by the communication breakpoint, the two target links cannot communicate with the BMS in the same communication direction, the BMS can communicate with chips on the two target links only by adopting opposite communication directions, and after one target link in the two target links is communicated with the BMS, the BMS performs communication with the other target link, so that acquired data of the chips on the two links are acquired. In the case where a communication breakpoint breaks the daisy chain into a target link, then the first communication direction of the target link needs to be opposite to the communication direction before the communication breakpoint exists, so that the BMS can communicate with the target link.

In one possible implementation, as shown in fig. 3, fig. 3 is a schematic diagram of a communication breakpoint dividing a daisy chain into two label links according to an embodiment of the present application. If there is a communication break between chip 2 and chip 3, the communication break breaks the daisy chain into a target link 31 shown in fig. 3 (a) and a target link 32 shown in fig. 3 (b). Assuming that the communication direction before the existence of the communication break point is the forward communication direction, the solid line in (a) in fig. 3 indicates the transmission direction of the read instruction, and the broken line indicates the transmission direction of the collected data of the chip. The first communication direction of the target link 31 refers to the forward communication direction, that is, the first communication direction is the direction in which the battery management system transmits a read instruction to the chip 1 and the chip 2. The solid line in (b) of fig. 3 indicates the transmission direction of the read command, and the broken line indicates the transmission direction of the acquisition data of the chip. The first communication direction of the target link 32 refers to the reverse communication direction, that is, the first communication direction is the direction in which the battery management system transmits a read instruction to the chip 5, the chip 4, and the chip 3. I.e. the communication direction of the two label links is opposite.

In another possible implementation, assuming that the communication direction before the existence of the communication break is the reverse communication direction, as shown in fig. 3 (b), the first communication direction of the target link 32 refers to the reverse communication direction, and the first communication direction of the target link 31 is the forward communication direction, that is, the communication directions of the two target links are opposite.

For the above two implementations, the battery management system may send a read instruction and a target duration to the chip on the target link 31 based on the first communication direction of the target link 31; and transmitting a read instruction and a target duration to the chip on the target link 32 based on the first communication direction of the target link 32.

In yet another possible implementation, if there is a communication break between chips 1 and B0, the communication break breaks the daisy chain into an entry link. As shown in fig. 4, fig. 4 is a schematic diagram of a communication breakpoint dividing a daisy chain into a target link according to an embodiment of the present application. In this case, fig. 4 shows that the communication direction before the communication break point is the forward communication direction, and in the case where the communication break point exists between the chips 1 and B0, the forward communication direction is switched to the reverse communication direction, that is, the first communication direction of the target link is the reverse communication direction, that is, the reverse communication direction as shown in (B) of fig. 1 is used to communicate with the chips.

In yet another possible implementation, if there is a communication break between chip 5 and B0, the communication break breaks the daisy chain into an entry link. Assuming that the communication direction before the communication breakpoint is the reverse communication direction, the battery management system switches the reverse communication direction to the forward communication direction in the case that the communication breakpoint exists, that is, the first communication direction of the target link is the forward communication direction.

In the case where the communication breakpoint breaks the daisy chain into a target link, the battery management system may send a read instruction and a target duration to each chip on the target link based on the first communication direction of the target link.

In this embodiment of the present application, the target duration is used for starting a preset power consumption current based on the target duration when the first chip of the target link transmits the acquired data to the second chip. The target duration is determined based on the data transmission duration of a reference chip on the target link, which refers to a chip that communicates directly with B0. Illustratively, the reference chip of the target link 31 in (a) of fig. 3 is chip 1, and the reference chip of the target link 32 in (b) of fig. 3 is chip 5. In the case where the first communication direction of the target link in fig. 4 is the forward communication direction, the reference chip of the target link in fig. 4 is chip 1; in the case where the first communication direction of the target link in fig. 4 is the reverse communication direction, the reference chip of the target link in fig. 4 is chip 5.

In one possible implementation, described in connection with fig. 3, in the case where there are two target links, the data transmission duration of the reference chip of the target link with a large number of chips may be taken as the target duration. For example, assuming that the time period required for transmitting only the acquired data acquired by one chip is t, the data transmission time period of the reference chip of the target link 31 is 2t, the data transmission time period of the reference chip of the target link 32 is 3t, and since the number of chips on the target link 32 is greater than the number of chips of the target link 31, 3t is taken as the target time period, and 3t is the data transmission time period required for transmitting the acquired data of the chip 3, the chip 4 and the chip 5 by the chip 5. And sending the target time length to chips on two links, and transmitting collected data to a battery management system by the chips on the two links based on different communication directions.

In another possible implementation manner, in the case that an entry target link exists, the data transmission duration of the reference chip of the target link may be taken as the target duration. For example, in fig. 4, when the first communication direction of the target link is the forward communication direction, the reference chip of the target link in fig. 4 is the chip 1, and then the data transmission duration of the chip 1 is taken as the target duration, and the data transmission duration of the chip 1 is the duration required by the chip 1 to transmit the collected data of each chip to the battery management system, that is, the duration required by the chip 1 to transmit the collected data of the chip 5, the chip 4, the chip 3, the chip 2 and the chip 1 to the battery management system.

And under the condition that the target time length is used for the chips of the target link to transmit the acquired data, starting the power consumption current which is preset based on the target time length, so that the power consumption of each chip on the daisy chain is the same. Referring to fig. 3, where fig. 3 includes two target links, for chips on target link 31, chip 1 and chip 2 may turn on a pre-configured power consumption current based on a target time period. Because the data transmission time length required by the chip 1 to transmit the collected data to the B0 is 2t, and the target time length is 3t, the power consumption of the chip 1 to transmit the collected data is less than the power consumption of the chip 5, and the consumed power consumption is 2/3 times of that of the chip 5, namely if the power consumption of the chip 5 is 3W, the power consumption of the chip 1 is 2W, the power consumption of the chip 1 can be started for a power consumption current with the time length equal to 3t-2 t=t, so that the power consumption of the chip 1 is consumed again, the power consumption of the chip 1 with the value W is consumed additionally by a measure of starting the power consumption current on the basis that the power consumption of the collected data is consumed by 2W after the transmission of the chip is completed, and the total power consumption of the chip 1 is 3W, and the consistency with the power consumption of the chip 5 is realized.

Similarly, the data transmission time length required by the chip 2 for transmitting the collected data to the chip 1 is t, and the target time length is 3t, so that the chip 2 can start the power consumption current with the time length equal to 3 t-t=2t to consume 2 times of the power consumption of the chip 2, so that the total power consumption of the chip 2 is 3W, and the consistency with the power consumption of the chip 5 is realized. By turning on the power consumption current in the case where the chip 1 and the chip 2 have transmitted the collected data, the power consumption of the chip 1 and the chip 2 is forcibly consumed, and thus, the uniformity of the power consumption of the chip 1 and the chip 2 on the target link 31 can be improved.

In the case that the collected data of the chip on the target link 31 is transmitted to the BMS in the forward communication direction, the BMS realizes communication with the chip on the target link 32 in the reverse communication direction. For example, for the chips on the target link 32, the chip 3 and the chip 4 may turn on the power consumption current configured in advance based on the target duration, the data transmission duration required for transmitting the collected data to the chip 4 by the chip 3 is t, and the target duration is 3t, and then the chip 3 may turn on the power consumption current with the duration equal to 3 t-t=2t, so that the power consumption of the chip 3 consumes 2W again. The data transmission time length required by the chip 4 for transmitting the collected data to the chip 5 is 2t, the target time length is 3t, and then the chip 4 can start the power consumption current with the time length equal to 3t-2 t=t, so that the power consumption of the chip 4 consumes W again, the total power consumption of the chip 3 is 3W, and the total power consumption of the chip 4 is 3W, so that the total power consumption of the chip 1, the chip 2, the chip 3, the chip 4 and the chip 5 is 3W.

The chips on the target link start the pre-configured power consumption current based on the target time length, so that the power consumption of each chip on the daisy chain is the same, and the communication power consumption of each chip on the daisy chain is the same under the condition that communication breakpoints exist.

S202, collecting data sent by the receiving chip based on the reading instruction.

Taking fig. 3 as an example, the chip 2 on the target link 31 sends the collected data 2 of the chip 2 to the chip 1, the chip 1 sends the collected data 2 and the collected data 1 collected by the chip 1 to the chip B0, and the B0 sends the collected data 1 and the collected data 2 to the battery management system. Chip 3 on target link 32 sends the collection data 3 of chip 3 to chip 4, and chip 4 sends the collection data 3 of chip 3 and the collection data 4 that chip 4 gathered to chip 5, and chip 5 sends collection data 3, collection data 4 and the collection data 5 that chip 5 gathered to B0, and B0 sends collection data 3, collection data 4 and collection data 5 to battery management system.

Referring to fig. 5, fig. 5 is a flowchart of a target duration determining method according to an embodiment of the present application. The method may include S501-S502.

S501, determining a target link and a first communication direction according to the breakpoint position of the communication breakpoint.

In one possible implementation, as shown in fig. 3, if there is a communication break between chip 2 and chip 3, the communication break breaks the daisy chain into target links 31 and 32. Assuming that the communication direction before the existence of the communication break point is the forward communication direction, the first communication direction of the target link 31 refers to the forward communication direction. The first communication direction of the target link 32 refers to the reverse communication direction.

S502, determining a target duration based on the number of chips of the target link and the first communication direction.

In one possible implementation, described in connection with fig. 3, in the case where there are two target links, the data transmission duration of the reference chip of the target link with a large number of chips may be taken as the target duration. For example, assuming that the time period required for transmitting only the acquired data acquired by one chip is t, the number of chips of the target link 31 is 2, the data transmission time period of the reference chips of the target link 31 is 2t, the number of chips of the target link 32 is 3, the data transmission time period of the reference chips of the target link 32 is 3t, and since the number of chips on the target link 32 is greater than the number of chips of the target link 31, 3t is taken as the target time period.

Referring to fig. 6, fig. 6 is a flowchart of another method for determining a target duration according to an embodiment of the present application. This embodiment relates to one possible implementation of how the target duration is determined based on the number of chips of the target link and the first communication direction. On the basis of the above embodiment, the above S502 may include S601 to S603.

S601, determining a reference chip of a target link according to a first communication direction.

The determination of the reference chip of the target link is related to the first communication direction of the target link, taking fig. 3 as an example, the reference chip of the target link 31 is chip 1, and the reference chip of the target link 32 is chip 5. That is, a chip that directly communicates with B0 in the first communication direction is used as a reference chip based on the first communication direction.

S602, determining a first time length required by a reference chip of the target link to transmit acquired data to a battery management system based on the chip number of the chips of the target link.

In one possible implementation, the first time period required for the reference chip of the target link to transmit the collected data to the battery management system is equal to the product of the number of chips on the target link and the second time period required for the chip on the target link to transmit the collected data. For example, for (a) in fig. 3, the chip 2 transmits only the acquired data 2 acquired by itself, and the period of time required for the chip 2 to transmit the acquired data 2 of itself to the chip 1 is equal to the second period of time. For (b) in fig. 3, the chip 3 transmits only the acquired data 3 acquired by itself, and the period of time required for the chip 3 to transmit the acquired data 3 of itself to the chip 4 is equal to the second period of time. It should be noted that, the duration required for transmitting the acquired data acquired by each chip is the same. For example, the duration required for the chip 2 to transmit its own acquisition data 2 to the chip 1 is equal to the duration required for the chip 3 to transmit its own acquisition data 3 to the chip 4.

For example, if the chips of the target link 31 are 2 in total, the first time period required for the reference chip of the target link 31 to transmit the collected data to the battery management system is equal to 2t. The total number of chips of the target link 32 is 3, and the first time period required for the reference chip of the target link 32 to transmit the collected data to the battery management system is equal to 3t.

In another possible implementation manner, a product of the number of chips on the target link and the second duration is determined, and a result obtained by multiplying the product by a preset coefficient is taken as the first duration.

S603, determining the target duration according to the first duration required by the reference chip of the target link to transmit the acquired data to the battery management system.

For the two target links shown in fig. 3, the target duration is determined according to the first duration required by the reference chip of the target link 31 to transmit the collected data to the battery management system and the first duration required by the reference chip of the target link 32 to transmit the collected data to the battery management system, and the maximum first duration can be used as the target duration. As described herein in connection with fig. 3, 3t may be the target duration. And determining the target time length by combining the first time length of the two target links, thereby improving the accuracy of the determined target time length.

For the one-entry link shown in fig. 4, the first time period required for the reference chip of the target link to transmit the collected data to the battery management system may be taken as a target time period, and for example, 5t may be taken as the target time period.

Referring to fig. 7, fig. 7 is a flowchart of a first time length determining method according to an embodiment of the present application. This embodiment relates to one possible implementation of how to determine the first time period required for the reference chip of the target link to transmit the collected data to the battery management system based on the number of chips of the target link. On the basis of the above embodiment, the above S602 may include S701 to S702.

S701, determining a second time length required by a chip of a target link to transmit target data; the chip with the target data being the target link is based on the acquisition data acquired by the reading instruction.

The chip with the target data being the target link is based on the acquired data acquired by the reading instruction, namely the target data is acquired by the chip on the target link. The chip of the target link here may be any chip on the target link.

S702, taking the product of the second duration and the number of chips as the first duration.

In one embodiment, the determining the target link and the first communication direction according to the breakpoint position of the communication breakpoint in S501 may be implemented by the following steps:

if the breakpoint position is located on a link between chips on the daisy chain, determining two target links and determining a first communication direction of each target link; wherein the first communication directions of the two label links are opposite.

As shown in fig. 3, the breakpoint position is located on a link between chips on the daisy chain, and then the target link 31 and the target link 32 are determined as two target links in total, and the first communication direction of the target link 31 and the first communication direction of the target link 32 are determined. The first communication direction of the target link 31 is opposite to the first communication direction of the target link 32.

In one embodiment, if the breakpoint position is located on the link between the chips in the daisy chain, the step S603 described above is implemented by determining the target duration according to the first time required for the reference chip of the target link to transmit the collected data to the battery management system, by:

if the breakpoint position is located on a link between a chip on the daisy chain and the battery management system, determining an entry mark link, and taking the second communication direction as a first communication direction of the target link; wherein the second communication direction is opposite to the communication direction before the communication breakpoint exists.

For example, as shown in fig. 4, if the communication direction before the communication break point is the forward communication direction, the reverse communication direction is taken as the first communication direction of the target link. If the communication direction before the communication break point is the reverse communication direction, the forward communication direction is taken as the first communication direction of the target link.

In one embodiment, if the breakpoint position is located on the link between the chip on the daisy chain and the battery management system, the step S603 described above is implemented by determining the target duration according to the first duration required for the reference chip of the target link to transmit the collected data to the battery management system, by:

In one embodiment, a power consumption current sending method is further provided, and referring to fig. 8, fig. 8 is a schematic flow chart of the power consumption current sending method provided in the embodiment of the application, where the method may include S801-S803.

S801, under the condition that the battery management system is powered on last time, the communication direction of the daisy chain stored before the battery management system is powered off last time is obtained.

Under the condition that the BMS receives the power-down instruction sent by the controller, the BMS powers down, before the BMS powers down, the BMS can store the current communication direction of daisy chain, and the communication direction before the BMS powers down is a forward communication direction, and then the BMS can store the forward communication direction. The communication direction before power down is the reverse communication direction, and the BMS stores the reverse communication direction. And powering up the BMS after receiving the power-on instruction sent by the controller again, and acquiring the stored communication direction of the daisy chain before last power-off.

For example, if the BMS uses the forward direction to communicate with the daisy chain after the BMS is powered on for the first time, and before the BMS powers off for the first time, the communication direction of the stored daisy chain is the forward communication direction, and after the BMS powers on for the second time, the BMS obtains the communication direction of the stored daisy chain before the BMS powers off for the first time, that is, the communication direction obtained by the BMS is the forward communication direction. If the total duration of the forward communication direction reaches the preset duration, the BMS can switch the forward communication direction to the reverse communication direction, and if the BMS receives a power-down instruction sent by the controller under the condition of the reverse communication direction, the BMS stores the daisy-chain communication direction as the reverse communication direction before power-down for the second time. The communication direction of the stored daisy chain acquired by the BMS is a reverse communication direction in case the BMS is powered up for the third time. And so on, other power-up processes are similar to those described above, and will not be repeated here.

S802, determining power consumption current according to power consumption when a first chip on a daisy chain transmits collected data to a second chip; the second chip is the last chip of the first chip.

Taking fig. 1 as an example, if a forward communication direction is adopted, in the case that the first chip is the chip 5, the second chip is the chip 4; in the case where the first chip is chip 4, the second chip is chip 3; in the case where the first chip is chip 3, the second chip is chip 2; in the case where the first chip is chip 2, the second chip is chip 1, wherein chip 1 is the highest level chip. If the reverse communication direction is adopted, the second chip is the chip 2 under the condition that the first chip is the chip 1; in the case where the first chip is chip 2, the second chip is chip 3; in the case where the first chip is chip 3, the second chip is chip 4; in case the first chip is the chip 4, the second chip is the chip 5, wherein the chip 5 is the highest level chip. I.e. the chip communicating directly with B0 in the communication direction is the highest level.

Assuming that the power consumption of the chip is 1 when idle and the power consumption of the first chip when transmitting data to the second chip is 2, if the power consumption consistency of each chip is improved by starting the power consumption current of the load of the chip, the power consumption current of the load can be calculated by a formula of the power consumption of the load of the chip+the power consumption 1=the power consumption 2. Meanwhile, since the power consumption 1 is relatively small and negligible, the power consumption=2 of the load of the chip can be regarded as approximate. Therefore, the power consumption current of the load can be calculated based on the formula of the power consumption=power consumption 2 of the load of the chip. I.e. the product of the square of the current and the resistance of the load is equal to the power consumption 2, the current can be calculated based on this formula, since the power consumption 2 and the resistance of the load can be determined, and in one possible implementation the calculated current can be directly taken as the power consumption current.

In another possible implementation manner, the current calculated based on the above formula may be corrected, and the corrected current may be used as the power consumption current. For example, the result obtained by multiplying the calculated current by a preset coefficient is used as the power consumption current. Since the above formula calculation is approximate to consider that the power consumption=2 of the load of the chip, and actually the power consumption of the load of the chip is slightly smaller than 2 of the power consumption, the current calculated by the above formula can be corrected, and the result obtained by multiplying the current by a preset coefficient close to 1 and smaller than 1 is taken as the power consumption current, so that the accuracy of the determined power consumption current is further improved.

The BMS can execute the initialization flow of the chip according to the communication direction of the daisy chain stored before the last power-down under the condition of the current power-up, the initialization flow of the chip refers to waking up the chip, and the chip is instructed to receive instructions or information sent by the BMS according to the communication direction of the daisy chain stored before the last power-down. After the initialization flow of the chip is executed, the power consumption current is sent to the chip according to the communication direction of the daisy chain stored before the last power-down, and the chip on the daisy chain receives the power consumption current and stores the power consumption current.

S803, power consumption current is sent to the chips on the daisy chain based on the communication direction.

In one embodiment, a communication direction switching method is also provided. Referring to fig. 9, fig. 9 is a flow chart of a communication direction switching method according to an embodiment of the present application. The method may include S901-S903.

And S901, under the condition that the battery management system is powered on at the current time, acquiring the historical duration of the daisy chain in the communication direction stored before the battery management system is powered off at the last time.

Under the condition that the BMS receives a power-down instruction sent by the controller, the BMS is powered down, and before the BMS is powered down, the BMS stores duration time in the current communication direction of the daisy chain, wherein the duration time is historical duration time. For example, if the power is continued for 8 hours in the forward communication direction before the power is turned off, the BMS stores 8 hours in the forward communication direction. If the power is turned off for 8 hours in the reverse communication direction, the BMS stores 8 hours in the reverse communication direction. And powering up the BMS after receiving the power-on instruction sent by the controller again, and acquiring the stored historical duration in the communication direction before powering down the BMS last time.

For example, if the BMS continues for 8 hours in the forward communication direction after the BMS is powered on for the first time, and stores the 8 hours before the BMS is powered off for the first time, the BMS acquires 8 hours in the forward communication direction stored before the BMS is powered off for the first time after the BMS is powered on for the second time, and takes the 8 hours as the history duration in the forward communication direction.

S902, if a daisy chain does not have a communication breakpoint and the battery management system does not receive a power-down instruction sent by the controller, determining a comparison result of total duration time and preset duration time in the communication direction; the total duration is equal to the sum of the historical duration and the current duration in the communication direction after the current power-up.

And under the condition that the daisy chain does not have a communication breakpoint, if the battery management system does not receive a power-down instruction sent by the controller, the BMS compares the total duration with a preset duration to obtain a comparison result. The total duration is equal to the sum of the historical duration and the current duration in the communication direction after the current power-up. If the current duration in the communication direction after the current power-on is 2 hours and the historical duration is 8 hours, the total duration is 10 hours, and if the preset duration is 10 hours, the total duration is equal to the preset duration.

S903, if the comparison result is that the total duration is longer than or equal to the preset duration, the communication direction is switched, and the historical duration and the current duration are set to be zero.

If the comparison result is that the total duration is longer than or equal to the preset duration, the communication direction is switched, and the historical duration and the current duration are set to be zero. For example, if the total duration is 10 hours, if the preset duration is 10 hours, the total duration is equal to the preset duration, and if the communication direction after the battery management system is powered on at the present time is a forward communication direction, the communication direction after switching is a reverse communication direction. If the communication direction after the battery management system is electrified at the present time is a reverse communication direction, the communication direction after switching is a forward communication direction. I.e. after switching the communication direction, the communication direction after switching is opposite to the communication direction before switching.

Because in the conventional technology, it is required to determine whether the interval time from the last inquiry time reaches the second preset time, if the interval time reaches the second preset time, it is determined whether the sum of the duration of the history and the duration in the communication direction after the current power-up reaches the first preset time. As the driving time increases, the power consumption deviation between chips increases. In the conventional technology, if the historical duration is 8.5 hours and the second preset duration is 3 hours, then, if the duration in the communication direction of the current power-up is equal to 3 hours after the current power-up, then, whether the sum of the historical duration and the duration in the communication direction after the current power-up reaches the first preset time can be judged, and when the sum of the historical duration and the duration in the communication direction after the current power-up is judged at this time, the sum of the historical duration and the duration in the communication direction after the current power-up already reaches 8.5+3=11.5 hours, if the first preset time is 10 hours, because the 11.5 hours is greater than the first preset time, the daisy-chain communication direction is switched, and if the communication direction before the switching is the forward communication direction, the communication direction after the switching is the reverse communication direction is performed. And then, executing the reverse communication direction, if the reverse communication duration is equal to 9.5 hours and then powering down, and then powering up again, and before switching the communication direction again, the reverse communication duration is actually 9.5 hours+3 hours=12.5 hours, and it is seen that the total duration in the forward communication direction is 11.5 hours and is not equal to 12.5 hours in the reverse communication direction, so that the power consumption among the chips on the daisy chain is different, and the power consumption deviation is larger and larger as the driving duration is increased.

The second preset time is not required to be spaced, and whether the total duration is longer than the preset duration can be judged, so that the power consumption difference of the chip along with the increase of the driving duration under the condition that the communication breakpoint does not exist in the traditional technology can be reduced, and the power consumption consistency of the chip is improved.

In one embodiment, the method further comprises:

If the daisy chain does not have a communication breakpoint after the battery management system is powered on the current time, and the battery management system receives a power-down instruction sent by the controller, the communication direction and the total duration of the daisy chain are stored. Illustratively, in the case that the battery management system is powered up the current time, the BMS receives a power-down command after the total duration is equal to 9 hours, and the communication direction of the daisy chain is the forward communication direction, the BMS stores the forward communication direction and 9 hours.

Referring to fig. 10, fig. 10 is a flowchart of another chip power consumption control method provided in the present application, the method is applied to chips on a daisy chain, and the method includes S1001-S1003.

S1001, under the condition that a communication breakpoint exists in the daisy chain, receiving a reading instruction and target duration sent in a first communication direction of a target link obtained by splitting the daisy chain by a battery management system based on the communication breakpoint.

S1002, in response to the reading instruction, the acquired data is transmitted to a chip at the upper stage of the chip.

S1003, under the condition that the acquired data is transmitted, starting a preset power consumption current based on a target duration, so that the power consumption of each chip on the daisy chain is the same.

In one embodiment, S1003, when the collected data is transmitted, starting the pre-configured power consumption current based on the target duration may be implemented as follows:

determining a time difference value between the target time and the transmission time; the transmission time length is the time length required by the chip to transmit the acquired data to the upper chip; and under the condition that the acquired data are transmitted, the power consumption current of the load of the chip is started for a time length difference value.

For a clearer understanding of the embodiments of the present application, this is described herein in connection with fig. 11. Fig. 11 is a flowchart of another method for controlling power consumption of a chip according to an embodiment of the present application, where the method includes the following steps:

After the BMS is powered on, S1101 is performed.

S1101, in the case where the battery management system is powered up last time, a communication direction of the daisy chain stored before the battery management system was powered down last time, and a history duration of the daisy chain stored before the battery management system was powered down last time in the communication direction are obtained.

If S1101 acquires the stored communication direction of the daisy chain and the history duration of the daisy chain in the communication direction, S1102 is performed. If the stored daisy chain communication direction or history duration is not acquired, S1101 is repeatedly performed to acquire the daisy chain communication direction and history duration.

S1102, the chip initialization process is executed according to the stored daisy chain communication direction.

If the initialization is successful, executing S1103; otherwise, S1102 is executed to repeat the initialization flow.

S1103, power consumption current is sent to the chips on the daisy chain based on the communication direction.

S1104, whether the daisy chain has a communication break point.

If there is no communication breakpoint in the daisy chain, S1105 is performed. The absence of a communication breakpoint means that the daisy chain can implement uniformity of power consumption of the chip according to an operation mode in which normal forward communication direction and reverse communication direction are alternately performed.

If there is a communication breakpoint in the daisy chain, S1106 is performed.

S1105, controlling the power consumption of the chip according to the strategy of alternately executing forward and reverse communication.

A specific implementation manner of controlling power consumption of the chip according to the policy of alternately performing forward and reverse communication may be referred to fig. 11.

And S1106, the BMS transmits a reading instruction and a target duration to a chip of the target link based on a first communication direction of the target link obtained by splitting the daisy chain by the communication breakpoint.

S1107, the chip receives the read instruction and the target duration sent by the battery management system.

S1108, the chip responds to the reading instruction and transmits the acquired data to the upper chip of the chip.

S1109, under the condition that the chips transmit the acquired data, starting a pre-configured power consumption current based on the target duration, so that the power consumption of each chip on the daisy chain is the same.

S1110, the BMS receives the collected data sent by the chip based on the read command.

Fig. 12 is a flow chart of a method for alternately performing forward and reverse communication according to an embodiment of the present application. The method comprises the following steps:

s1201, the BMS records the current duration in the communication direction of the daisy chain after the current power-up in real time.

S1202, judging whether a power-down instruction is received.

If a power-down instruction is received, S1203 is executed; if the power-down instruction is not received, S1205 is executed.

S1203, whether the daisy chain is a forward communication direction or a reverse communication direction.

If the daisy chain is the forward communication direction or the reverse communication direction, S1204 is performed. Otherwise, the flow is ended.

S1204, storing the communication direction and the total duration of the daisy chain.

S1205, judging whether the total duration is longer than a preset duration.

If the total duration is greater than or equal to the preset duration, then S1206 is performed; if the total duration is less than the preset duration, the process returns to S1201.

S1206, the communication direction is switched, and the history duration and the current duration are set to zero.

It should be understood that, although the steps in the flowcharts related to the above embodiments are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.

Based on the same inventive concept, the embodiment of the application also provides a chip power consumption control device for realizing the above related chip power consumption control method. The implementation of the solution provided by the device is similar to the implementation described in the above method, so the specific limitation in the embodiments of the chip power consumption control device or devices provided below may be referred to the limitation of the chip power consumption control method hereinabove, and will not be described herein.

In one embodiment, as shown in fig. 13, fig. 13 is one of schematic structural diagrams of a chip power consumption control device according to an embodiment of the present application, where the device 1300 is disposed in a battery management system, and the device 1300 includes:

the first sending module 1301 is configured to send a reading instruction and a target duration to a chip of a target link based on a first communication direction of the target link obtained by splitting the daisy chain according to a communication breakpoint when the daisy chain has the communication breakpoint; under the condition that the target time length is used for the chips of the target link to transmit the acquired data, starting a preset power consumption current based on the target time length, so that the power consumption of each chip on the daisy chain is the same;

the receiving module 1302 is configured to receive the collected data sent by the chip based on the reading instruction.

In one embodiment, as shown in fig. 14, fig. 14 is a second schematic structural diagram of a chip power consumption control device according to the embodiment of the present application, where the device 1400 includes:

a first determining module 1401, configured to determine, according to a breakpoint position of the communication breakpoint, a target link and a first communication direction;

a second determining module 1402, configured to determine a target duration based on a number of chips of the target link and the first communication direction.

In one embodiment, as shown in fig. 15, fig. 15 is a third schematic structural diagram of a chip power consumption control device provided in the embodiment of the present application, and the second determining module 1402 includes:

a first determining unit 1501 for determining a reference chip of a target link according to a first communication direction;

a second determining unit 1502, configured to determine, based on the number of chips of the target link, a first time period required for the reference chip of the target link to transmit the collected data to the battery management system;

and a third determining unit 1503, configured to determine a target duration according to the first duration required for transmitting the collected data to the battery management system by the reference chip of the target link.

In one embodiment, the second determining unit 1502 is specifically configured to determine a second duration required for the chip of the target link to transmit the target data; the chip with the target data being the target link acquires acquisition data based on the reading instruction; taking the product of the second time length and the number of chips as the first time length.

In one embodiment, the first determining module 1401 is specifically configured to determine two target links if the breakpoint position is located on a link between chips on the daisy chain, and determine a first communication direction of each target link; wherein the first communication directions of the two label links are opposite.

In one embodiment, the third determining unit 1503 is specifically configured to take, as the target duration, a maximum value in the first durations corresponding to the two target links.

In one embodiment, the first determining module 1401 is specifically configured to determine a target link if the breakpoint position is located on a link between a chip on the daisy chain and the battery management system, and take the second communication direction as a first communication direction of the target link; wherein the second communication direction is opposite to the communication direction before the communication breakpoint exists.

In one embodiment, the third determining unit 1503 is specifically configured to use a first time period required for the reference chip of the target link to transmit the collected data to the battery management system as the target time period.

In one embodiment, as shown in fig. 16, fig. 16 is a fourth schematic structural diagram of a chip power consumption control device according to an embodiment of the present application, where the device 1600 includes:

An acquiring module 1601, configured to acquire, in a case where the battery management system is powered up last time, a communication direction of a daisy chain stored before the battery management system is powered down last time;

a third determining module 1602, configured to determine a power consumption current according to power consumption when the first chip transmits the collected data to the second chip on the daisy chain; the second chip is the last chip of the first chip;

a second transmitting module 1603 is used for transmitting power consumption current to the chips on the daisy chain based on the communication direction.

In one embodiment, the obtaining module 1601 is further configured to obtain, when the battery management system is powered up last time, a historical duration of the daisy chain in the communication direction stored before the battery management system is powered down last time;

the third determining module 1602 is further configured to determine a comparison result between the total duration in the communication direction and the preset duration if the daisy chain does not have a communication breakpoint and the battery management system does not receive the power-down instruction sent by the controller; the total duration is equal to the sum of the historical duration and the current duration in the communication direction after the current power-on; if the comparison result is that the total duration is longer than or equal to the preset duration, the communication direction is switched, and the historical duration and the current duration are set to be zero.

In one embodiment, the acquiring module 1601 is further configured to store the communication direction and the total duration of the daisy chain if the daisy chain does not have a communication breakpoint and the battery management system receives the power-down instruction.

In one embodiment, as shown in fig. 17, fig. 17 is a fifth schematic structural diagram of a chip power consumption control device according to an embodiment of the present application, where the device 1700 is disposed on a chip, and the device 1700 includes:

the receiving module 1701 is configured to receive a read instruction and a target duration sent in a first communication direction of a target link, where the read instruction and the target duration are obtained by splitting the daisy chain by using the battery management system based on the communication breakpoint when the daisy chain has the communication breakpoint;

the transmission module 1702 is configured to transmit acquisition data to a previous chip of the chip in response to a read instruction;

and a starting module 1703, configured to start a pre-configured power consumption current based on a target duration, so that the power consumption of each chip on the daisy chain is the same.

In one embodiment, the starting module is specifically configured to determine a duration difference between the target duration and the transmission duration when the acquired data is transmitted; the transmission time length is the time length required by the chip to transmit the acquired data to the upper chip; and under the condition that the acquired data are transmitted, the power consumption current of the load of the chip is started for a time length difference value.

The above-described respective modules in the chip power consumption control apparatus may be implemented in whole or in part by software, hardware, and a combination thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.

In one embodiment, a computer device is provided, which may be a terminal, and the internal structure thereof may be as shown in fig. 18. The computer device includes a processor, a memory, a communication interface, a display screen, and an input device connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The communication interface of the computer device is used for carrying out wired or wireless communication with an external terminal, and the wireless mode can be realized through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. The computer program, when executed by a processor, implements a method for controlling chip power consumption. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, can also be keys, a track ball or a touch pad arranged on the shell of the computer equipment, and can also be an external keyboard, a touch pad or a mouse and the like.

It will be appreciated by those skilled in the art that the structure shown in fig. 18 is merely a block diagram of a portion of the structure associated with the present application and is not limiting of the computer device to which the present application is applied, and that a particular computer device may include more or fewer components than shown, or may combine certain components, or have a different arrangement of components.

In an embodiment, a computer device is provided comprising a memory and a processor, the memory having stored therein a computer program, the processor implementing the steps of the method provided by the above embodiments when the computer program is executed.

In one embodiment, a computer readable storage medium is provided, on which a computer program is stored which, when executed by a processor, implements the steps of the method provided by the above embodiments.

In an embodiment, a computer program product is provided, comprising a computer program which, when being executed by a processor, implements the steps of the method provided by the above embodiments.

It should be noted that, user information (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, presented data, etc.) referred to in the present application are information and data authorized by the user or sufficiently authorized by each party.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in the various embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magnetic random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (Phase Change Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in the form of a variety of forms, such as Static Random access memory (Static Random access memory AccessMemory, SRAM) or dynamic Random access memory (Dynamic Random Access Memory, DRAM), and the like. The databases referred to in the various embodiments provided herein may include at least one of relational databases and non-relational databases. The non-relational database may include, but is not limited to, a distributed database based on regional block chains, and the like. The processors referred to in the embodiments provided herein may be general purpose processors, central processing units, graphics processors, digital signal processors, programmable logic units, quantum computing-based data processing logic units, etc., without being limited thereto.

The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.

Claims

1. A method for controlling power consumption of a chip, the method being applied to a battery management system, the method comprising:

under the condition that a communication breakpoint exists in a daisy chain, a reading instruction and target duration are sent to a chip of a target link based on a first communication direction of the target link obtained by splitting the daisy chain through the communication breakpoint; the target time length is used for starting a preset power consumption current based on the target time length under the condition that the chips of the target link are used for transmitting collected data, so that the power consumption of each chip on the daisy chain is the same;

Receiving acquisition data sent by the chip based on the reading instruction;

if the breakpoint position is located on a link between chips on the daisy chain, determining two target links, and determining a first communication direction of each target link; the first communication directions of the two target links are opposite;

if the breakpoint position is located on a link between a chip on the daisy chain and the battery management system, determining an entry target link, and taking a second communication direction as a first communication direction of the target link; the second communication direction is opposite to the communication direction before the communication breakpoint exists.

2. The method according to claim 1, wherein the method further comprises:

determining the target link and the first communication direction according to the breakpoint position of the communication breakpoint;

and determining the target duration based on the number of chips of the target link and the first communication direction.

3. The method of claim 2, wherein the determining the target time period based on the number of chips of the target link and the first communication direction comprises:

and determining the target duration according to the first duration required by the reference chip of the target link to transmit the acquired data to the battery management system.

4. The method of claim 3, wherein determining a first time period required for the reference chip of the target link to transmit the collected data to the battery management system based on the number of chips of the target link comprises:

determining a second time length required by the chip of the target link to transmit target data; the target data are acquired data acquired by a chip of the target link based on the reading instruction;

and taking the product of the second time length and the number of chips as the first time length.

5. The method of claim 3 or 4, wherein determining the target time period from a first time period required for the reference chip of the target link to transmit the collected data to the battery management system comprises:

And if the breakpoint position is positioned on a link between chips on the daisy chain, taking the maximum value in the first time periods corresponding to the two target links as the target time period.

6. The method of claim 3 or 4, wherein determining the target time period from a first time period required for the reference chip of the target link to transmit the collected data to the battery management system comprises:

and if the breakpoint position is positioned on a link between the chip on the daisy chain and the battery management system, taking a first time length required by the reference chip of the target link for transmitting collected data to the battery management system as the target time length.

7. The method according to any one of claims 1-4, further comprising:

under the condition that a battery management system is electrified at the current time, acquiring the communication direction of the daisy chain stored before the battery management system is electrified at the current time;

determining the power consumption current according to the power consumption when the first chip on the daisy chain transmits collected data to the second chip; the second chip is a last chip of the first chip;

the power consumption current is sent to the chips on the daisy chain based on the communication direction.

8. The method of claim 7, wherein the method further comprises:

under the condition that the battery management system is powered on last time, acquiring the historical duration of the daisy chain in the communication direction stored before the battery management system is powered off last time;

if the daisy chain does not have a communication breakpoint and the battery management system does not receive a power-down instruction sent by the controller, determining a comparison result of the total duration time in the communication direction and a preset duration time; the total duration is equal to the sum of the historical duration and the current duration in the communication direction after the current power-on;

and if the comparison result shows that the total duration is longer than or equal to the preset duration, switching the communication direction, and setting the historical duration and the current duration to be zero.

9. The method of claim 8, wherein the method further comprises:

and if the daisy chain does not have a communication breakpoint and the battery management system receives the power-down instruction, storing the communication direction and the total duration of the daisy chain.

10. A method for controlling power consumption of a chip, the method being applied to the chip, the method comprising:

Under the condition that a communication breakpoint exists in a daisy chain, receiving a reading instruction and target duration sent by a first communication direction of a target link, wherein the reading instruction and the target duration are obtained by a battery management system by splitting the daisy chain based on the communication breakpoint;

transmitting acquisition data to a chip of a higher level of the chip in response to the reading instruction;

under the condition that the acquired data is transmitted, starting a preset power consumption current based on the target duration, so that the power consumption of each chip on the daisy chain is the same;

if the breakpoint position is located on a link between chips on the daisy chain, the target link includes two target links determined by the battery management system, and the first communication direction includes a first communication direction of each target link; the first communication directions of the two target links are opposite;

if the breakpoint position is located on a link between a chip on the daisy chain and the battery management system, the target link comprises a target link determined by the battery management system, and the first communication direction comprises a second communication direction; the second communication direction is opposite to the communication direction before the communication breakpoint exists.

11. The method of claim 10, wherein, upon transmission of the acquired data, the turning on a pre-configured power consumption current based on the target time period comprises:

determining a time length difference value between the target time length and the transmission time length; the transmission time length is the time length required by the chip to transmit the acquired data to the upper chip;

and under the condition that the acquired data is transmitted, opening the power consumption current of the load of the chip by the time length difference value.

12. A chip power consumption control apparatus, the apparatus being provided in a battery management system, the apparatus comprising:

the first sending module is used for sending a reading instruction and target duration to a chip of a target link based on a first communication direction of the target link obtained by splitting the daisy chain based on the communication breakpoint when the daisy chain has the communication breakpoint; the target time length is used for starting a preset power consumption current based on the target time length under the condition that the chips of the target link are used for transmitting collected data, so that the power consumption of each chip on the daisy chain is the same;

the receiving module is used for receiving acquisition data sent by the chip based on the reading instruction;

13. A chip power consumption control apparatus, wherein the apparatus is provided to a chip, the apparatus comprising:

the receiving module is used for receiving a reading instruction and target duration sent by a first communication direction of a target link, which are obtained by splitting the daisy chain by a battery management system based on the communication breakpoint, under the condition that the daisy chain has the communication breakpoint;

the transmission module is used for responding to the reading instruction and transmitting acquisition data to a chip at the upper stage of the chip;

the starting module is used for starting a preset power consumption current based on the target duration under the condition that the acquired data are transmitted, so that the power consumption of each chip on the daisy chain is the same;

14. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any of claims 1-11 when the computer program is executed.

15. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1-11.