CN117318829A - Integrated coherent receiving chip - Google Patents
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- CN117318829A CN117318829A CN202311218810.XA CN202311218810A CN117318829A CN 117318829 A CN117318829 A CN 117318829A CN 202311218810 A CN202311218810 A CN 202311218810A CN 117318829 A CN117318829 A CN 117318829A
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- 230000001427 coherent effect Effects 0.000 title claims abstract description 76
- 230000003287 optical effect Effects 0.000 claims abstract description 113
- 230000010355 oscillation Effects 0.000 claims abstract description 70
- 238000012360 testing method Methods 0.000 claims description 140
- 238000012544 monitoring process Methods 0.000 claims description 36
- 230000010287 polarization Effects 0.000 claims description 22
- 238000010079 rubber tapping Methods 0.000 claims description 13
- 230000008878 coupling Effects 0.000 claims description 8
- 238000010168 coupling process Methods 0.000 claims description 8
- 238000005859 coupling reaction Methods 0.000 claims description 8
- 238000011156 evaluation Methods 0.000 abstract description 15
- 238000003908 quality control method Methods 0.000 abstract description 3
- 238000012216 screening Methods 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 8
- 238000012545 processing Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000004891 communication Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
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- 238000013461 design Methods 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- 230000009365 direct transmission Effects 0.000 description 1
- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/61—Coherent receivers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/07—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
- H04B10/075—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
- H04B10/079—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
- H04B10/0795—Performance monitoring; Measurement of transmission parameters
- H04B10/07955—Monitoring or measuring power
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/61—Coherent receivers
- H04B10/615—Arrangements affecting the optical part of the receiver
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/61—Coherent receivers
- H04B10/616—Details of the electronic signal processing in coherent optical receivers
- H04B10/6165—Estimation of the phase of the received optical signal, phase error estimation or phase error correction
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Abstract
The invention discloses an integrated coherent receiving chip, comprising: the compact seven-channel mixer group is used for mixing the signal light with the local oscillator light and demodulating the coherent signal; the photoelectric detector group is used for converting the demodulated optical signals into electric signals; the power monitor group is used for converting the optical signals of the signal light and the local oscillator light distributed in a certain proportion in the group into electric signals; a power monitor tap set for distributing a proportion of light to the power monitor set; and the adjustable attenuator group is used for carrying out attenuation treatment on the signal light so as to enable the intensity ratio of the signal light entering the mixer to the local oscillation light to be within a preset range. Realizing the real-time adjustment of the light intensity of the signal light participating in the mixing; the on-chip evaluation structure for introducing the phase error of the coherent receiving chip is supported, the phase error information of the chip can be obtained more simply, and the requirement for constructing a phase error evaluation link for quality control and screening of the coherent receiving chip is reduced.
Description
Technical Field
The invention relates to the technical field of coherent communication, in particular to an integrated coherent receiving chip.
Background
The coherent detection refers to that by means of a coherent receiving chip, received signal light and local oscillation light generated by a local laser are interfered under the action of a mixer, amplitude, frequency or phase information of the signal light is extracted, and an optical signal is converted into an electric signal through a photoelectric detector to be output.
The mixer, which is the core optics of the coherent receiving chip, has two main performance indicators: common mode rejection ratio and phase error, when the common mode rejection ratio is too low or the phase error is too large, can cause error code increase in the subsequent digital signal processing process. The prior solution is to improve two main performance indexes of the mixer, evaluate common mode rejection ratio and phase error of the coherent receiving chip during wafer level or chip level test, reject unqualified chips in advance, and effectively reduce probability of risk overflow to the coherent receiving module or the coherent communication system.
In the existing traditional evaluation flow, the common mode rejection ratio of the coherent receiving chip can be evaluated through the result of the responsivity test, and the phase error needs to be introduced into a special test, if a special structure which is convenient for the phase error test is not arranged on the chip in advance, a special phase error test system needs to be built, so that the cost is increased, the operation is complex, and the test is not convenient enough.
Disclosure of Invention
In order to solve the technical problems, the invention provides an integrated coherent receiving chip. The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview and is intended to neither identify key/critical elements nor delineate the scope of such embodiments. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.
The invention adopts the following technical scheme:
the invention provides an integrated coherent receiving chip, comprising:
the compact seven-channel mixer group is used for mixing the signal light with the local oscillator light and demodulating the coherent signal;
the photoelectric detector group is used for converting the demodulated optical signals into electric signals;
the power monitor group is used for converting the optical signals of the signal light and the local oscillation light distributed in a certain proportion into electric signals, and the converted electric signals are used for determining the optical power information of the signal light and the local oscillation light input into the chip;
the power monitoring tapping unit is arranged on the signal light receiving optical link and the local oscillator light receiving optical link of the mixer and is used for distributing a certain proportion of light to the power monitoring unit;
the adjustable attenuator group is arranged on a signal light receiving optical link of the mixer and is used for carrying out attenuation treatment on the signal light so that the intensity ratio of the signal light entering the mixer to the local oscillator light is within a preset range.
Further, the integrated coherent receiving chip further includes: and the polarization beam splitting rotator is used for splitting the double-polarized signal light into two paths according to polarization and respectively distributing the two paths of signal light to the signal light receiving optical links of the two mixers.
Further, the integrated coherent receiving chip further includes: and the local oscillator beam splitter is used for dividing the local oscillator light which is not distributed to the power monitor group into two paths and distributing the two paths of local oscillator light to local oscillator light input ports of the two mixers.
Further, the integrated coherent receiving chip further includes: a test optocoupler for coupling test light into the chip; the test light one-stage beam splitting structure is used for dividing the test light coupled into the chip into two paths according to a certain proportion, wherein one path of test light is distributed to the signal light input port of the mixer, and the other path of test light is distributed to the local oscillation light input port of the mixer.
Further, the integrated coherent receiving chip further includes: and the crossed waveguide is arranged on the signal light receiving optical link and/or the local oscillator light receiving optical link of the mixer, so that light is transmitted in a target direction.
Further, the first-stage beam splitting structure of the test light is a test light directional coupler; the test light directional coupler divides the test light coupled into the chip into two paths according to a certain proportion, wherein one path of test light is distributed to the signal light input port of the mixer, and the other path of test light is distributed to the local oscillation light input port of the mixer through the power monitoring tapping device.
Further, the integrated coherent receiving chip further includes: the test light secondary beam splitting structure is arranged on the output side of the test light primary beam splitting structure and is used for distributing the test light again and then inputting the test light to the signal light input ports of the two mixers respectively.
Furthermore, the first-order beam splitting structure of the test light is a 1×2 test light beam splitter, the 1×2 test light beam splitter divides the test light coupled into the chip into two paths according to a certain proportion, one path of test light is distributed to the signal light input port of the mixer, and the other path of test light is directly distributed to the local oscillator light receiving port of the mixer.
The invention has the beneficial effects that:
1. by additionally arranging the power monitor group, the power monitoring tapping device group and the adjustable attenuator group on the chip, the real-time adjustment of the integrated coherent receiving chip on the input light intensity is realized, a power monitoring and attenuating device is not required to be arranged outside the chip, and the cost for constructing the coherent receiving module is saved;
2. an on-chip evaluation structure for phase errors of the coherent receiving chip is introduced, so that the phase error information of the chip can be obtained more simply, and the requirement for constructing a phase error evaluation link for quality control and screening of the coherent receiving chip is reduced.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a prior art compact seven-channel mixer;
FIG. 2 is a schematic diagram of a conventional coherent receiving chip constructed based on a compact seven-channel mixer;
FIG. 3 is a schematic diagram of one of the structures of the single-polarization integrated coherent receiving chip of the present invention;
FIG. 4 is a schematic diagram of another structure of a single polarization integrated coherent receiving chip according to the present invention;
FIG. 5 is a schematic diagram of a dual-polarization integrated coherent receiving chip according to the present invention;
FIG. 6 is a schematic diagram of a single polarization integrated coherent receiving chip with a phase error evaluating structure according to the present invention;
fig. 7 is a schematic structural diagram of one of the dual-polarization integrated coherent receiving chips with the phase error evaluating structure according to the present invention;
fig. 8 is a schematic diagram of another structure of a dual-polarization integrated coherent receiving chip with a phase error evaluating structure according to the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the described embodiments are merely some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The invention provides an integrated coherent receiving chip, comprising: the compact seven-channel mixer group is used for mixing signal light and local oscillation light and demodulating coherent signals, and generally comprises 1 or 2 compact seven-channel mixers. The invention provides an integrated coherent receiving chip, which further comprises: and the photoelectric detector group is used for converting the demodulated optical signal into an electric signal.
The invention discloses an integrated coherent receiving chip, in particular to an integrated coherent receiving chip constructed based on a compact seven-channel mixer, which is firstly explained for facilitating the understanding of the technical scheme of the invention.
As shown in fig. 1, the compact seven-channel mixer includes: 2×2 beam splitter, 1×2 beam splitter 21.
Wherein the 2x 2 beam splitter and the 1 x 2 beam splitter 21 can be designed based on the principles of waveguide coupling or multimode interference. In the use or test case, the non-uniformity of the output light intensity is measured by parameters such as common mode rejection ratio, and the deviation value of the output phase from the ideal phase is measured by phase error.
The number of 2x 2 beam splitters is three, respectively designated as a first 2x 2 beam splitter 11, a second 2x 2 beam splitter 12 and a third 2x 2 beam splitter 13. When an optical signal is input from only one port of the 2x 2 beam splitter, the two paths of output light are equal in size and are 90 degrees out of phase theoretically.
The two input ends of the first 2×2 splitter 11 are signal light input ports of the mixer, and are respectively denoted as a first signal light input port 01 and a second signal light input port 03.
Two outputs of the second 2x 2 splitter 12 and two outputs of the third 2x 2 splitter 13 are the optical output ports 04 of the mixer, i.e. the mixer has four optical output ports 04.
The 1×2 splitter 21 is one, and its input terminal is the local oscillation optical input port 02 of the mixer. Theoretically, the output light of the 1×2 beam splitter 21 is equal in size and identical in phase.
As shown in fig. 2, in a conventional structure of a coherent receiving chip constructed based on the compact seven-channel mixer, specifically, one photo detector 31 may be disposed at each of four optical output ports 04 of the mixer, for converting the optical signal demodulated by the mixer into an electrical signal, and a photo diode may be used, or an avalanche photo diode may be used, that is, a photo detector group is formed by the photo detectors 31 disposed at the optical output ports 04.
While an optical coupler is designed to receive off-chip optical signals into the chip. The optical coupler may be an end-face coupler, such as a forward tapered or reverse tapered waveguide, etc.; but also vertical couplers such as grating couplers. In fig. 2, the optical couplers are denoted as a signal optical coupler 41 and a local oscillator optical coupler 42, respectively. The signal optical coupler 41 is configured to couple the off-chip signal light into the integrated coherent receiving chip, and may be connected to the first signal optical input port 01 or the second signal optical input port 03, only one of which is illustrated in fig. 2. And the local oscillation optical coupler 42 is connected with a local oscillation optical input port 02 of the mixer and is used for coupling off-chip local oscillation optical coupling into the integrated coherent receiving chip.
The conventional structure based on the compact seven-channel mixer shown in fig. 2 for realizing the integrated coherent receiving chip has the characteristics of simple structure, and can obtain higher common mode rejection ratio during direct current test, but in practical application occasions, the adjustment of signal light and local oscillation light intensity can be realized only after external power monitoring and attenuation devices and equipment are needed, and the use cost is increased.
As shown in fig. 3, the invention provides an integrated coherent receiving chip, in particular a single polarization coherent receiving chip framework, and related devices are additionally arranged on the chip, so that the integrated coherent receiving chip based on a compact seven-channel mixer can adjust the input light intensity in real time, and therefore, a power monitoring and attenuation device and equipment are not required to be arranged outside the chip, and the cost for constructing a coherent receiving module is saved. Specifically, the integrated coherent receiving chip includes, in addition to the parts of the conventional structure: a power monitoring tap set, a power monitoring set, and an adjustable attenuator set.
The power monitor group is used for converting the optical signals of the signal light and the local oscillator light distributed in a certain proportion into electric signals, and the converted electric signals are used for determining the optical power information of the signal light and the local oscillator light input into the chip, and specifically comprises the following steps: a signal optical power monitor 61 and a local oscillation optical power monitor 62. A signal light power monitor 61 for monitoring the light power of the signal light inputted into the chip; and a local oscillation optical power monitor 62 for monitoring the optical power of the local oscillation light inputted into the chip.
The power monitoring tapping unit is arranged on a signal light receiving optical link and a local oscillator light receiving optical link of the mixer and is used for distributing a certain proportion of light to the power monitoring unit, and specifically comprises: a first signal optical power monitor tap 51, and a local oscillation optical power monitor tap 52.
The signal light receiving optical link of the mixer herein refers to an optical transmission line, specifically, a transmission line of signal light, and uses the signal optical coupler 41 of the chip as a starting point and uses the signal light input port of the mixer as an ending point. The first signal light power monitoring tap 51 is provided on the signal light receiving optical link of the mixer, and is configured to split part of the signal light output from the signal optical coupler 41 and distribute the split part to the signal light power monitor 61, thereby monitoring the light power of the signal light.
The local oscillation optical receiving optical link of the mixer refers to an optical transmission line, specifically, a local oscillation optical transmission line, and uses a local oscillation optical coupler 42 of the chip as a starting point and uses a local oscillation optical input port 02 of the mixer as an ending point. The local oscillation optical power monitoring tapping device 52 is arranged on a local oscillation optical receiving optical link of the mixer, and is used for tapping part of local oscillation light output by the local oscillation optical coupler 42 and distributing the part of the local oscillation light to the local oscillation optical power monitor 62, so that the monitoring of the optical power of the local oscillation light is realized, and the local oscillation light which is not input to the local oscillation optical power monitor 62 is input into the mixer from the local oscillation optical input port 02.
The adjustable attenuator group is arranged on a signal light receiving optical link of the mixer and is used for carrying out attenuation treatment on the signal light so that the intensity ratio of the signal light entering the mixer to the local oscillator light is within a preset range, and the adjustable attenuator group specifically comprises: a first adjustable attenuator 71. In fig. 3, the first adjustable attenuator 71 is located on the output side of the first signal optical power monitor tap 51, and the signal light which is not input to the signal optical power monitor 61 is input to the mixer from any one of the signal optical input ports of the mixer after passing through the first adjustable attenuator 71. As shown in fig. 4, the present invention may also provide the first adjustable attenuator 71 on the input side of the first signal optical power monitoring tap 51 to meet the customization needs of some users and to accommodate some wiring designs with special requirements.
The signal light and the local oscillation light are demodulated by the first 2×2 beam splitter 11, the second 2×2 beam splitter 12, the third 2×2 beam splitter 13, the 1×2 beam splitter 21, and the waveguides connecting them, and the demodulated optical signals are input to the photodetector 31 and converted into electric signals. Compared with the conventional design method, the chip structure shown in fig. 3 and fig. 4 can monitor the optical power coupled into the chip in real time on the chip, and perform the attenuation processing on the signal light in a targeted manner, so that the intensity of the signal light and the local oscillator light entering the mixer meets the ratio of the requirements, and external power monitoring and attenuation devices and equipment are not needed.
As shown in fig. 5, the integrated coherent receiving chip of the present invention further includes: the polarization beam splitter rotator 81 is configured to split the dual-polarized signal light into two paths according to polarization, and respectively distribute the two paths of signal light to the signal light receiving optical links of the two mixers. The signal light with double polarization is input into the chip by the signal optical coupler 41, and two mixers are arranged on the chip and used for respectively mixing two paths of signal light, each mixer is provided with a signal light receiving optical link (the optical links can be partially overlapped), and the chip formed at the moment is a framework of the double-polarization integrated coherent receiving chip.
The transverse electric polarization in the dual-polarization signal light is still the transverse electric polarization after being processed by the polarization beam splitting rotator 81, and the transverse magnetic polarization is converted into the transverse electric polarization. The local oscillation light is single polarized, and the transverse electric polarization is maintained after the local oscillation light is input by the local oscillation optical coupler 42. Since there are two mixers at this time, the power monitoring tap set further comprises: the second signal light power monitoring tap 53 is provided on the signal light receiving optical link of the mixer, and is configured to split part of the signal light output from the signal optical coupler 41 and distribute the split part to the signal light power monitor 61, thereby monitoring the light power of the signal light. Meanwhile, in order to realize the attenuation processing of the two paths of signal light, the adjustable attenuator group further comprises: a second adjustable attenuator 72 is disposed on the signal light receiving optical link of the mixer.
Meanwhile, the integrated coherent receiving chip of the present invention further comprises: the local oscillation beam splitter 23 is configured to split the local oscillation light not allocated to the power monitor group into two paths, and allocate the two paths of local oscillation light to the two mixers. Specifically, the local oscillation light which is not input to the local oscillation optical power monitor 62 is split into two paths by the local oscillation optical splitter 23, and the split two paths of local oscillation light are respectively input to the local oscillation optical input ports 02 of the two mixers.
In fig. 5, after the two signal lights after polarization beam splitting rotation and the local oscillation light coupled into the chip pass through the first signal light power monitor tap 51, the local oscillation light power monitor tap 52, and the second signal light power monitor tap 53, respectively, a part of the light enters the signal light power monitor 61 and the local oscillation light power monitor 62 for monitoring the signal light and the local oscillation light power. The other part of the signal light which does not enter the signal light power monitor 61 is distributed to the first adjustable attenuator 71 and the second adjustable attenuator 72, and the intensity is adjusted and then is respectively input into the two compact seven-channel mixers through the ports of the first 2×2 beam splitter 11. The local oscillation light which is not distributed to the local oscillation optical power monitor 62 passes through one local oscillation optical beam splitter 23, is split into two beams, and is respectively input into two compact seven-channel mixers through ports of the 1×2 beam splitter 21.
The local oscillation light and the two polarized signal lights are demodulated in a compact seven-channel mixer and then output to a photodetector 31 to be converted into an electric signal. The chip structure shown in fig. 5, compared with the chip structures shown in fig. 3 and 4, has increased channel capacity of the communication system based on the integrated coherent receiving chip due to the support of processing the signal light multiplexed by dual polarization.
As shown in fig. 6, 7 and 8, the integrated coherent receiving chip of the present invention further includes: a test optocoupler 43, a test light-level splitting structure 100, and a crossover waveguide 90. The test optical coupler 43 and the test light primary beam splitting structure 100 are additionally arranged on the chip, the test light is introduced into the mixer, and the chip formed at the moment is a framework of an integrated coherent receiving chip with a phase error evaluating structure.
A test optocoupler 43 for coupling test light into the chip.
The test light primary beam splitting structure 100 is configured to split test light coupled into a chip into two paths according to a certain proportion, where one path of test light is distributed to a signal light input port of a mixer, and the other path of test light is distributed to a local oscillation light input port 02 of the mixer. This process may be performed by interleaving the existing waveguides on the waveguide wiring, and the crossover waveguide 90 may be introduced when the interleaving occurs, where the crossover waveguide 90 is disposed on the signal light receiving optical link and/or the local oscillator light receiving optical link of the mixer, so as to ensure the direct transmission of the light to the target direction. The position of the crossing waveguide 90 is not necessarily arranged between the first tunable attenuator 71 and the first 2×2 splitter 11 in fig. 6, and may be flexibly arranged at a position where any optical link waveguide wiring may cross, the number of which is not limited to 1, but may be 0 or more.
As shown in fig. 6, when the phase error evaluation structure is applied to a single polarization coherent receiving chip architecture, the test light primary beam splitting structure 100 is a directional coupler, and the test light primary beam splitting structure 100 in fig. 6 is hereinafter referred to as a test light directional coupler. The test light directional coupler divides the test light coupled into the chip by the test light coupler 43 into two paths according to a certain proportion, one path of test light is distributed to the signal light input port of the mixer, namely one output end of the test light directional coupler is connected with the signal light input port of the mixer, and the test light is introduced into the mixer. The other path of test light is distributed to the local oscillation light input port 02 of the mixer through the power monitoring tapping device, namely the other output end of the test light directional coupler is connected with the input end of the local oscillation light power monitoring tapping device 52.
A part of the test light inputted into the local oscillation optical power monitoring tap 52 is distributed to the local oscillation optical input port 02, and is transmitted along the waveguide to enter the 1×2 beam splitter 21, and interferes with another part of the test light entering the first 2×2 beam splitter 11 in the mixer, and outputs four interference optical signals to the photodetector 31, and is converted into an electrical signal.
By receiving the electric signals and performing data processing, the phase error of the single polarization coherent receiving chip constructed based on the compact seven-channel mixer can be calculated. Wherein, when the test optical coupler 43 is a vertical coupler, the phase error of the single polarization coherent receiving chip can be evaluated at the wafer level or the chip level; when the test optocoupler 43 is a face coupler, the phase error can be evaluated at the chip level. The wafer level horizontal evaluation phase error has the advantages that evaluation can be performed before chip dicing, unqualified chips are marked by using methods such as inking, and the like, and the evaluation efficiency is high. The advantage of chip-level horizontal evaluation of phase errors is that the coupling mode is flexible to choose.
As shown in fig. 7, when the phase error evaluation structure is applied to the dual-polarization coherent receiving chip architecture, the test light primary beam splitting structure 100 is a directional coupler, and the test light primary beam splitting structure 100 in fig. 7 is hereinafter referred to as a test light directional coupler. The test light directional coupler divides the test light coupled into the chip by the test light coupler 43 into two paths according to a certain proportion, one path of test light is distributed to the signal light input ports of the mixers, and the coherent receiving chip further comprises: the test light secondary beam splitting structure 24 is disposed at the output side of the test light directional coupler, and is used for splitting the test light again, and the two paths of distributed test light are respectively input to the signal light input ports of the two mixers.
The other path of test light split by the test light directional coupler is distributed to the local oscillation light input port 02 of the mixer through the power monitoring tapping device, namely, one output end of the test light directional coupler is connected with the input end of the local oscillation light power monitoring tapping device 52, and the other output end is connected with the input end of the test light secondary beam splitting structure 24.
The chip structure shown in fig. 7 is based on the chip structure shown in fig. 5, and a test optical coupler 43 is added to couple test light into the chip, and the test light is respectively input into ports of the test light secondary beam splitting structure 24 and the local oscillator optical power monitoring tap 52 by the test light primary beam splitting structure 100 according to a certain proportion. The test light input to the test light two-stage splitting structure 24 is again split into two beams and directed into two compact seven-channel mixers by the first 2x 2 beam splitter 11, respectively. The partial test light inputted into the local oscillation optical power monitoring tap 52 is distributed to the local oscillation optical splitter 23 by the local oscillation optical power monitoring tap 52, and finally enters the compact seven-channel mixer by the 1×2 splitter 21.
The test lights are interfered in the two seven-channel mixers, respectively, and the interference result is output to the photodetector 31 and converted into an electric signal. By processing the received electric signals, the phase error of the constructed dual-polarization coherent receiving chip based on the compact seven-channel mixer can be calculated. Wherein, when the test optical coupler 43 is a vertical coupler, the phase error of the dual-polarization coherent receiving chip can be evaluated at the wafer level or the chip level; when the test optocoupler 43 is a face coupler, the phase error can be evaluated at the chip level.
When the phase error evaluation structure is applied to the integrated coherent receiving chip architecture, the test light one-stage beam splitting structure 100 may also be a 1×2 beam splitter, and the test light one-stage beam splitting structure 100 is hereinafter referred to as a 1×2 test light beam splitter. The 1×2 test beam splitter divides the test light coupled into the chips into two paths according to a certain proportion, one path of test light is distributed to the signal light input port of the mixer, and the other path of test light is directly distributed to the local oscillation light receiving port of the mixer instead of via the local oscillation light power monitoring tapping device 52, so that the test light can be prevented from being input into the power monitor group for monitoring the light power, the test light utilization rate is higher, and further, the test of the phase error can be realized by using smaller test light input, and the following is specifically described by taking the dual polarization coherent receiving chip as an example:
as shown in fig. 8, since there are two mixers, the input of the local oscillation light and the test light introduced from the local oscillation side is replaced by a 1×2 splitter with a 2×2 test splitter 17 (or by a directional coupler with a splitting ratio of 50%: 50%) compared to fig. 7. And because of having two mixers, set up the second-stage beam splitting structure 24 of test light too, the second-stage beam splitting structure 24 of test light sets up in the output side of the first-stage beam splitting structure 100 of test light, is used for splitting the test light again, and two paths of test light after distributing are input to the signal light input port of two mixers respectively.
The test light secondary beam splitting structure 24 in fig. 8 has the same function as the test light secondary beam splitting structure 24 in fig. 7, and is used for splitting the test light again, and two output ends of the test light secondary beam splitting structure 24 are directly connected to the second signal light input ports 03 of the two mixers.
After the test light is led in from the test optical coupler 43, the test light is uniformly split into two beams by the test light primary beam splitting structure 100, namely, a 1×2 test light beam splitter, wherein one beam is directly input into the 2×2 test beam splitter 17, and the other beam is led into two compact seven-channel mixers by the first 2×2 beam splitter 11 after being split again by the test light secondary beam splitting structure 24. The advantage of the chip structure shown in fig. 8 over fig. 7 is that the test light input power monitor set can be avoided, so that the test light utilization is high and the phase error can be tested using a smaller test light input. In fig. 8, the crossover waveguide is left empty in the other direction, where there is no wiring crossover but still introduces a crossover waveguide, in order to balance the loss of the two polarized signal light in the two optical paths on the chip. The crossing waveguides at each position can be added or removed according to the specific requirements of chip optical waveguide wiring and loss balance.
The invention adds a structure which is convenient for testing the phase error on the coherent chip using the compact seven-channel mixer, namely, the test light is connected into a chip loop through adding specific structures such as input coupling, beam splitting and cross waveguide of the test light, so that the wafer-level or chip-level phase error evaluation can be conveniently carried out, namely, the invention can be used for evaluating the coherent receiving chip integrated with various optical function devices and photoelectric detectors and has the advantage of wide application range. Meanwhile, due to the on-chip evaluation structure introducing the phase error, the phase error information of the chip can be obtained more simply, and the requirement of building a phase error evaluation link for quality control and screening of the coherent receiving chip is reduced.
The waveguide material of the integrated coherent receiving chip disclosed by the invention can be silicon, silicon nitride, silicon oxide, a III-V semiconductor and lithium niobate; the waveguide shape may preferably be rectangular or ridge-shaped. When the waveguide material is preferably silicon, the top silicon thickness of the chip may preferably be 220nm.
In fig. 3 to 8, the first signal optical power monitor tap 51, the local oscillation optical power monitor tap 52, and the second signal optical power monitor tap 53 may preferably have a splitting ratio (100-x): x% is 97%:3%, or 95%:5%.
In fig. 6 and 7, the test light one-stage beam splitting structure 100 may preferably have a beam splitting ratio of (100-y): y% is (100-2 x)%: 2x%; alternatively, a 1 x 2 beam splitter is used.
In fig. 3 to 8, the signal light power monitor 61 and the local oscillation light power monitor 62 may preferably be side junction type or vertical junction type photodiodes.
In fig. 6 to 8, the free spectral range after interference due to control delay between the probe light input to the mixer through the optical path on the side of the signal light and the probe light input to the mixer through the optical path of the local oscillator light may be preferably 0.5 to 2nm.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present invention should be included in the present invention. Therefore, the protection scope of the invention is subject to the protection scope of the claims.
Claims (8)
1. An integrated coherent receiving chip, comprising:
the compact seven-channel mixer group is used for mixing the signal light with the local oscillator light and demodulating the coherent signal;
the photoelectric detector group is used for converting the demodulated optical signals into electric signals;
the power monitor group is used for converting the optical signals of the signal light and the local oscillation light distributed in a certain proportion into electric signals, and the converted electric signals are used for determining the optical power information of the signal light and the local oscillation light input into the chip;
the power monitoring tapping unit is arranged on the signal light receiving optical link and the local oscillator light receiving optical link of the mixer and is used for distributing a certain proportion of light to the power monitoring unit;
the adjustable attenuator group is arranged on a signal light receiving optical link of the mixer and is used for carrying out attenuation treatment on the signal light so that the intensity ratio of the signal light entering the mixer to the local oscillator light is within a preset range.
2. The integrated coherent receiving chip of claim 1, further comprising: and the polarization beam splitting rotator is used for splitting the double-polarized signal light into two paths according to polarization and respectively distributing the two paths of signal light to the signal light receiving optical links of the two mixers.
3. The integrated coherent receiving chip of claim 2, further comprising: and the local oscillator beam splitter is used for dividing the local oscillator light which is not distributed to the power monitor group into two paths and distributing the two paths of local oscillator light to local oscillator light input ports of the two mixers.
4. An integrated coherent receiving chip according to claim 1 or 3, further comprising:
a test optocoupler for coupling test light into the chip;
the test light one-stage beam splitting structure is used for dividing the test light coupled into the chip into two paths according to a certain proportion, wherein one path of test light is distributed to the signal light input port of the mixer, and the other path of test light is distributed to the local oscillation light input port of the mixer.
5. The integrated coherent receiving chip of claim 4, further comprising: and the crossed waveguide is arranged on the signal light receiving optical link and/or the local oscillator light receiving optical link of the mixer, so that light is transmitted in a target direction.
6. The integrated coherent receiving chip of claim 5, wherein said test light level splitting structure is a test light directional coupler; the test light directional coupler divides the test light coupled into the chip into two paths according to a certain proportion, wherein one path of test light is distributed to the signal light input port of the mixer, and the other path of test light is distributed to the local oscillation light input port of the mixer through the power monitoring tapping device.
7. The integrated coherent receiving chip of claim 6, further comprising: the test light secondary beam splitting structure is arranged on the output side of the test light primary beam splitting structure and is used for distributing the test light again and then inputting the test light to the signal light input ports of the two mixers respectively.
8. The integrated coherent receiving chip according to claim 5, wherein the primary beam splitting structure of the test light is a 1 x 2 test beam splitter, the 1 x 2 test beam splitter splits the test light coupled into the chip into two paths according to a certain proportion, one path of test light is distributed to the signal light input port of the mixer, and the other path of test light is directly distributed to the local oscillator light receiving port of the mixer.
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| CN202311218810.XA CN117318829A (en) | 2023-09-21 | 2023-09-21 | Integrated coherent receiving chip |
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| CN202311218810.XA CN117318829A (en) | 2023-09-21 | 2023-09-21 | Integrated coherent receiving chip |
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