CN117317032A - Groove type SiC Schottky diode and manufacturing method thereof - Google Patents
Groove type SiC Schottky diode and manufacturing method thereof Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims description 59
- 239000002184 metal Substances 0.000 claims description 59
- 239000000758 substrate Substances 0.000 claims description 43
- 238000000151 deposition Methods 0.000 claims description 14
- 239000012535 impurity Substances 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- 239000013078 crystal Substances 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000002800 charge carrier Substances 0.000 claims description 6
- 150000002500 ions Chemical class 0.000 claims description 6
- 150000002739 metals Chemical class 0.000 claims description 6
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- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- 239000000956 alloy Substances 0.000 claims description 3
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- 238000009499 grossing Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 abstract description 8
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 20
- 229910010271 silicon carbide Inorganic materials 0.000 description 19
- 230000004888 barrier function Effects 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 5
- 230000005684 electric field Effects 0.000 description 5
- 239000000243 solution Substances 0.000 description 5
- 239000010408 film Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
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- 230000007704 transition Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
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Abstract
The invention provides a groove type SiC Schottky diode and a manufacturing method thereof, which relate to the technical field of semiconductor devices.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a groove type SiC Schottky diode and a manufacturing method thereof.
Background
Silicon carbide (SiC) belongs to a third-generation semiconductor material, has characteristics of wide forbidden band, high breakdown electric field, high thermal conductivity, high electron saturation drift velocity and the like, and has better performance in high-temperature, high-electric field and high-frequency environments compared with the traditional silicon semiconductor, so that SiC power devices are receiving wide attention.
The Schottky diode based on SiC is a power diode manufactured by utilizing the principle that a Schottky barrier is formed by a contact interface of metal and a semiconductor, and the structure mainly comprises a high-N-type doped SiC substrate and a low-N-type doped epitaxial drift region, wherein the bottom of the SiC substrate is plated with metal to serve as a cathode, and the surface of an epitaxial layer is plated with metal to form a Schottky junction to serve as an anode. Compared with the traditional silicon-based PIN junction diode, the silicon-based PIN junction diode has lower switching loss and faster switching speed.
The schottky junction has a mirror barrier lowering effect that is present to enlarge reverse leakage current of the device when reverse bias is applied, resulting in deterioration of reverse characteristics. In order to solve the above problems, a junction barrier diode (JBS) is constructed by introducing a PIN structure on the basis of a schottky diode. When reverse bias voltage is applied, the space charge region of the PN junction can be exhausted to the region of the Schottky junction, and the electric field of the Schottky junction is reduced, so that the mirror barrier reduction effect is inhibited, and the reverse leakage current of the device is reduced.
The JBS structure of the trench SiC schottky diode can well increase the anti-surge capability of the device, but the conventional JBS structure of the trench SiC schottky diode at present has the advantages that the conventional trench is usually positioned in a PIN junction area and is mostly a vertical trench, the corners of the trench are not smooth enough, so that the forward on-resistance is larger, and the tips of the corners are easy to accumulate a high electric field so as to be broken down.
Disclosure of Invention
The present invention is directed to a trench SiC schottky diode and a method for manufacturing the same, which solve the problems set forth in the background art.
In order to achieve the above purpose, the present invention provides the following technical solutions:
a trench SiC schottky diode comprising:
the Schottky unit comprises a substrate layer, an epitaxial layer is arranged above the substrate layer, an inverted trapezoid groove is formed in the upper end of the epitaxial layer, and the substrate layer and the epitaxial layer are made of SiC;
the electrode metal layer comprises cathode metal and anode metal, the cathode metal covers the bottom of the substrate layer, the anode metal covers the upper end face of the epitaxial layer, the contact between the cathode metal and the bottom of the substrate layer is ohmic contact, and the contact between the anode metal and the upper end face of the epitaxial layer is Schottky contact;
the positive charge doped region is positioned in the epitaxial layer and at the bottom of the groove, and the positive charge doped region is symmetrically provided with two groups of corners respectively positioned at the bottom of the groove.
Further, the positive charge doped region is formed by injecting positive charge carrier ions into the epitaxial layer, and the internal doping concentration of the positive charge doped region is 1×10 19 cm ―3 Up to 1X 10 20 cm ―3 The distance between the positive charge doped region and the anode metal is 1-2 μm.
Further, the width of the upper end of the groove is 3-5 times of the width of the semi-cellular structure of the SiC crystal, and the depth of the groove is 0.6-1.5 mu m.
Further, the inclination angle of the side wall of the groove is 45-60 degrees, the corner of the bottom of the groove is subjected to smoothing treatment, and the smooth curvature radius is 0.1-0.3 mu m.
Further, the substrate layer and the epitaxial layer are both SiC materials with N-type properties;
the impurity concentration of the doping inside the substrate layer is 1×10 19 cm ―3 ~1×10 20 cm ―3 ;
The impurity concentration of the doped epitaxial layer is 1×10 15 cm ―3 ~1×10 16 cm ―3 。
Further, the thickness of the substrate layer is 150-400 μm, and the thickness of the epitaxial layer is 5-15 μm.
Further, the electrode metal layer is made of one of Ti, ni and Al metals or an alloy formed by combining at least two metals.
The invention further provides a manufacturing method of the schottky diode, which is suitable for manufacturing the groove type SiC schottky diode, and comprises the following specific steps:
s1, depositing an epitaxial layer on a substrate layer, oxidizing the surface of the epitaxial layer, and forming a silicon oxide film on the surface of the epitaxial layer;
s2, depositing photoresist on the surface of the epitaxial layer, exposing and developing according to a layout, and injecting positive charge carrier ions into the epitaxial layer to form a positive charge doping region;
s3, etching the photoresist and the deposited silicon oxide film, and forming a groove with an inverted trapezoid structure through multiple times of etching by using ICP etching;
and S4, depositing anode metal above the epitaxial layer by adopting a magnetron sputtering process, and depositing cathode metal at the bottom of the substrate layer.
Compared with the prior art, the invention has the beneficial effects that:
according to the invention, the groove is arranged at the Schottky junction, so that the channel distance of the Schottky diode in forward conduction is reduced, the forward conduction resistance of the Schottky diode can be obviously reduced, the forward conduction current density is improved, the two sides of the groove are etched at a certain angle to form an inverted trapezoid groove, the electric field intensity at the edge is greatly reduced due to gentle transition between the bottom and the sides of the groove, and the reverse voltage endurance capability of the Schottky diode is improved.
Drawings
FIG. 1 is a schematic diagram of the overall exploded construction of the present invention;
FIG. 2 is a schematic cross-sectional view of the present invention;
FIG. 3 is a schematic view of the trench bottom structure of the present invention;
FIG. 4 is a schematic cross-sectional view of a positively charged doped region according to the prior art;
FIG. 5 is a graph of the characteristics of a Schottky diode of the present invention and prior art applying a forward voltage;
FIG. 6 is a graph of the characteristics of a Schottky diode of the present invention and prior art applying a reverse voltage;
fig. 7 is a flow chart of a schottky diode manufacturing method according to the present invention.
In the figure: schottky cell 10, substrate layer 11, epitaxial layer 12, trench 13, electrode metal layer 20, cathode metal 21, anode metal 22, positively charged doped region 30.
Detailed Description
The present invention will be further described in detail with reference to specific embodiments in order to make the objects, technical solutions and advantages of the present invention more apparent.
It is to be noted that unless otherwise defined, technical or scientific terms used herein should be taken in a general sense as understood by one of ordinary skill in the art to which the present invention belongs. The terms "first," "second," and the like, as used herein, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "up", "down", "left", "right" and the like are used only to indicate a relative positional relationship, and when the absolute position of the object to be described is changed, the relative positional relationship may be changed accordingly.
Example 1:
referring to fig. 1 to 3, the present invention provides a technical solution:
a trench SiC schottky diode comprising a schottky cell 10, an electrode metal layer 20 and a positively doped region 30, wherein:
the schottky cell 10 comprises a substrate layer 11, wherein the substrate layer 11 is a basal layer of semiconductor material, the basal layer provides a basis for growing an epitaxial layer 12, the epitaxial layer 12 is arranged above the substrate layer 11, an inverted trapezoid groove 13 is arranged at the upper end of the epitaxial layer 12, and the materials of the substrate layer 11 and the epitaxial layer 12 are SiC.
In this embodiment, the epitaxial layer 12 is formed by depositing a layer of thin film formed by depositing a material having the same or similar crystal structure as the substrate layer 11 on the surface of the substrate layer 11 by chemical vapor deposition or molecular beam epitaxy, etc. the deposition process makes the crystal structure of the epitaxial layer 12 highly match with the crystal structure of the substrate layer 11, and has better crystal quality.
In this embodiment, the substrate layer 11 and the epitaxial layer 12 are SiC materials with N-type properties;
the impurity concentration of the doping inside the substrate layer 11 is 1×10 19 cm ―3 ~1×10 20 cm ―3 ;
The impurity concentration of the doping inside the epitaxial layer 12 is 1×10 15 cm ―3 ~1×10 16 cm ―3 。
Further, the thickness of the substrate layer 11 is 150 to 400 μm, and the thickness of the epitaxial layer 12 is 5 to 15 μm.
Since the substrate layer 11 and the epitaxial layer 12 are internally doped with different impurity concentrations, the conductive properties and other properties of the substrate layer 11 are adjusted by doping impurity atoms, the doping concentration is adjusted and controlled by the concentration of the dopant and the conditions during the growth of the epitaxial layer 12, different impurity doping schemes can be selected to achieve the desired characteristics during the epitaxy of the epitaxial layer 12, and the doping concentration of the epitaxial layer 12 is also controlled by the concentration of the dopant and the growth conditions.
In this embodiment, the width of the upper end of the trench 13 is 3-5 times the width of the half cell structure of the SiC crystal, the depth of the trench 13 is 0.6-1.5 μm, the inclination angle of the sidewall of the trench 13 is 45-60 degrees, and the corner of the trench bottom is smoothed, and the smoothed radius of curvature is 0.1-0.3 μm.
In this embodiment, the trench 13 is placed at the schottky junction barrier, which reduces the channel distance when the schottky diode is forward turned on, and can significantly reduce the forward on resistance of the schottky diode and improve the forward on current density.
The 13 sides of the groove are etched at a certain angle to form an inverted trapezoid groove, the electric field intensity of the edge is greatly reduced due to gentle transition between the groove 13 and the sides, and the reverse voltage withstand capability of the Schottky diode is improved.
The electrode metal layer 20 includes a cathode metal 21 and an anode metal 22, the cathode metal 21 covers the bottom of the substrate layer 11, the anode metal 22 covers the upper end surface of the epitaxial layer 12, the contact between the cathode metal 21 and the bottom of the substrate layer 11 is ohmic contact, and the contact between the anode metal 22 and the upper end surface of the epitaxial layer 12 is schottky contact.
In this embodiment, the contact between the anode metal 22 and the epitaxial layer 12 forms a metal-semiconductor junction, and the anode metal 22 acts as a contact region for the N-type semiconductor, forming a low resistance contact having fast switching characteristics and low forward voltage drop.
In this embodiment, the cathode metal 21 and the anode metal 22 are used for current injection and collection of the schottky diode, the electrode metal layer of the schottky diode is used for current injection and collection, the schottky diode is connected with an external circuit through the cathode metal 21 and the anode metal 22, so that the current can enter and exit the device, the cathode metal 21 and the anode metal 22 are used as conductive media, a low-resistance path is provided, and efficient current injection and collection is ensured.
Further, the material of the electrode metal layer 20 is one of Ti, ni, al metals, or an alloy composed of a combination of at least two metals.
In this embodiment, the contact between the cathode metal 21 and the bottom of the substrate layer 11 is an ohmic contact, in which the cathode metal 21 and the bottom of the substrate layer 11 can form a good contact, and the current can flow freely between the cathode metal 21 and the substrate layer 11 without significant voltage drop or contact resistance.
The positively-charged doped region 30 is located inside the epitaxial layer 12 and at the bottom of the trench 13, the positively-charged doped region 30 is formed by injecting positive charge carrier ions into the epitaxial layer 12, and the doping concentration inside the positively-charged doped region 30 is 1×10 19 cm ―3 Up to 1X 10 20 cm ―3 The distance between the anode metal 22 and the top of the positively charged doped region 30 is 1-2 μm.
In this embodiment, the positive charge doped region 30 is symmetrically provided with two groups of corners respectively located at the bottom of the trench 13, the P-type impurity is introduced through the positive charge doped region 30, and a PN junction is formed inside the schottky diode to form a barrier structure, referring to fig. 4, in the prior art, one positive charge doped region 30 is generally adopted, and the barrier to current is larger in the substrate layer 11 located at the bottom of the trench 13.
In this embodiment, TCAD software is used to build the existing schottky diode and the schottky diode device structure provided in this embodiment, voltage is applied to the anode of the diode to obtain a forward voltage curve, as shown in fig. 5, where a trunk 1 dotted line represents a forward conduction characteristic curve of the schottky diode with a reversed trapezoidal trench structure at a conventional trench position, corresponding to the structure of fig. 4 in this embodiment, a trunk 2 dotted line represents a forward conduction characteristic curve of the schottky diode with a conventional trench type schottky diode, a trunk 3 solid line represents a forward conduction characteristic curve of the schottky diode with a reversed trapezoidal trench structure in this embodiment, as can be obtained from fig. 5, the on-resistance shown by a trunk 1 dotted line is 17.2mΩ, and the forward on-resistance of this embodiment is 10.9mΩ, so that the forward on-resistance of the trapezoidal trench structure in this embodiment is reduced by 36.6% compared with that of the conventional trench structure at a conventional trench position.
Applying a voltage to the cathode of the ohmic contact of the schottky diode to obtain a reverse voltage curve, as shown in fig. 6, wherein a dotted line of a trench1 represents a reverse conduction characteristic curve of the schottky diode of the inverted trapezoidal trench structure at the conventional trench position, corresponding to the structure of fig. 4 in this embodiment, a dotted line of a trench2 represents a reverse conduction characteristic curve of the schottky diode of the inverted trapezoidal trench structure in this embodiment, a solid line of a trench3 represents a reverse conduction characteristic curve of the schottky diode of the inverted trapezoidal trench structure in this embodiment, as can be obtained from fig. 6, the reverse breakdown voltage of the schottky diode at the conventional trench position is 1347V, the reverse breakdown voltage of the schottky diode of the inverted trapezoidal trench structure at the conventional trench position is 1696V, and the reverse breakdown voltage of this embodiment is 1622V, which is 20% higher than the reverse breakdown voltage of the inverted trapezoidal trench structure in this embodiment.
Referring to fig. 7, the present invention further provides a method for manufacturing a schottky diode, which is suitable for manufacturing the trench SiC schottky diode, and the method specifically includes the steps of:
s1, depositing an epitaxial layer 12 on a substrate layer 11, oxidizing the surface of the epitaxial layer 12, and forming a silicon oxide film on the surface of the epitaxial layer;
s2, depositing photoresist on the surface of the epitaxial layer 12, exposing and developing according to a layout, and injecting positive charge carrier ions into the epitaxial layer 12 to form a positive charge doped region 30;
s3, etching the photoresist and the deposited silicon oxide film, and forming a groove 13 with an inverted trapezoid structure through multiple times of etching by using ICP etching;
and S4, depositing anode metal 22 above the epitaxial layer 12 by using a magnetron sputtering process, and depositing cathode metal 21 at the bottom of the substrate layer 11.
The above embodiments may be implemented in whole or in part by software, hardware, firmware, or any other combination. When implemented in software, the above-described embodiments may be implemented in whole or in part in the form of a computer program product. Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application.
Claims (8)
1. A trench SiC schottky diode comprising:
the Schottky unit (10), the Schottky unit (10) comprises a substrate layer (11), an epitaxial layer (12) is arranged above the substrate layer (11), an inverted trapezoid groove (13) is formed in the upper end of the epitaxial layer (12), and the substrate layer (11) and the epitaxial layer (12) are made of SiC;
the electrode metal layer (20), the electrode metal layer (20) comprises cathode metal (21) and anode metal (22), the cathode metal (21) covers the bottom of the substrate layer (11), the anode metal (22) covers the upper end face of the epitaxial layer (12), the contact between the cathode metal (21) and the bottom of the substrate layer (11) is ohmic contact, and the contact between the anode metal (22) and the upper end face of the epitaxial layer (12) is Schottky contact;
the positive charge doped region (30), the positive charge doped region (30) is located inside the epitaxial layer (12) and is located at the bottom of the groove (13), and the positive charge doped region (30) is symmetrically provided with two groups of corners located at the bottom of the groove (13) respectively.
2. A trench SiC schottky diode according to claim 1, characterized in that: the positive charge doped region (30) is formed by injecting positive charge carrier ions into the epitaxial layer (12), and the doping concentration inside the positive charge doped region (30) is 1×10 19 cm ―3 Up to 1X 10 20 cm ―3 The distance between the positive charge doped region (30) and the anode metal (22) is 1 to the maximum2μm。
3. A trench SiC schottky diode according to claim 1, characterized in that: the width of the upper end of the groove (13) is 3-5 times of the width of a half cell structure of the SiC crystal, and the depth of the groove (13) is 0.6-1.5 mu m.
4. A trench SiC schottky diode according to claim 3, characterized in that: the inclination angle of the side wall of the groove (13) is 45-60 degrees, the corner of the bottom of the groove is subjected to smoothing treatment, and the smooth curvature radius is 0.1-0.3 mu m.
5. A trench SiC schottky diode according to claim 1, characterized in that: the substrate layer (11) and the epitaxial layer (12) are made of SiC materials with N-type properties;
the substrate layer (11) has an impurity concentration of 1X 10 19 cm ―3 ~1×10 20 cm ―3 ;
The impurity concentration of the doped epitaxial layer (12) is 1×10 15 cm ―3 ~1×10 16 cm ―3 。
6. A trench SiC schottky diode according to claim 5, characterized in that: the thickness of the substrate layer (11) is 150-400 mu m, and the thickness of the epitaxial layer (12) is 5-15 mu m.
7. A trench SiC schottky diode according to claim 1, characterized in that: the electrode metal layer (20) is made of one of Ti, ni and Al metals or an alloy formed by combining at least two metals.
8. A manufacturing method of a Schottky diode is characterized by comprising the following steps: the manufacturing method is suitable for manufacturing the trench type SiC Schottky diode as claimed in any one of claims 1 to 7, and comprises the following specific steps:
s1, depositing an epitaxial layer (12) on a substrate layer (11), oxidizing the surface of the epitaxial layer (12), and forming a silicon oxide film on the surface of the epitaxial layer;
s2, depositing photoresist on the surface of the epitaxial layer (12), exposing and developing according to a layout, and injecting positive charge carrier ions into the epitaxial layer (12) to form a positive charge doping region (30);
s3, etching the photoresist and the deposited silicon oxide film, and forming a groove (13) with an inverted trapezoid structure through multiple times of etching by using ICP etching;
and S4, depositing anode metal (22) above the epitaxial layer (12) by adopting a magnetron sputtering process, and depositing cathode metal (21) at the bottom of the substrate layer (11).
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CN113193053A (en) * | 2021-05-20 | 2021-07-30 | 电子科技大学 | Trench Schottky diode with high forward current density |
CN113644117A (en) * | 2021-08-11 | 2021-11-12 | 芜湖启迪半导体有限公司 | Silicon carbide JBS device cellular structure with novel deep groove and preparation method thereof |
CN115020498A (en) * | 2021-03-04 | 2022-09-06 | 现代自动车株式会社 | Schottky barrier diode and method for manufacturing the same |
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Publication number | Priority date | Publication date | Assignee | Title |
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CN115020498A (en) * | 2021-03-04 | 2022-09-06 | 现代自动车株式会社 | Schottky barrier diode and method for manufacturing the same |
CN113193053A (en) * | 2021-05-20 | 2021-07-30 | 电子科技大学 | Trench Schottky diode with high forward current density |
CN113644117A (en) * | 2021-08-11 | 2021-11-12 | 芜湖启迪半导体有限公司 | Silicon carbide JBS device cellular structure with novel deep groove and preparation method thereof |
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