CN117316815A - Wafer cutting engineering static monitoring marking system - Google Patents

Wafer cutting engineering static monitoring marking system Download PDF

Info

Publication number
CN117316815A
CN117316815A CN202311147726.3A CN202311147726A CN117316815A CN 117316815 A CN117316815 A CN 117316815A CN 202311147726 A CN202311147726 A CN 202311147726A CN 117316815 A CN117316815 A CN 117316815A
Authority
CN
China
Prior art keywords
wafer
server
scanning device
monitoring
processed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311147726.3A
Other languages
Chinese (zh)
Inventor
董瑞
诸敏敏
钱伟
曾红
于贤利
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitech Semiconductor Wuxi Co Ltd
Original Assignee
Hitech Semiconductor Wuxi Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitech Semiconductor Wuxi Co Ltd filed Critical Hitech Semiconductor Wuxi Co Ltd
Priority to CN202311147726.3A priority Critical patent/CN117316815A/en
Publication of CN117316815A publication Critical patent/CN117316815A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67276Production flow monitoring, e.g. for increasing throughput
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67253Process monitoring, e.g. flow or thickness monitoring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67294Apparatus for monitoring, sorting or marking using identification means, e.g. labels on substrates or labels on containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05FSTATIC ELECTRICITY; NATURALLY-OCCURRING ELECTRICITY
    • H05F3/00Carrying-off electrostatic charges

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The invention provides a wafer cutting engineering static monitoring marking system which comprises a label scanning device, a static eliminator, a photoelectric sensor, a PC end and a server.

Description

Wafer cutting engineering static monitoring marking system
Technical Field
The invention relates to the field of semiconductor processing, in particular to the technical field of electrostatic product monitoring and marking, and specifically relates to an electrostatic monitoring and marking system for wafer cutting engineering.
Background
At present, in the wafer cutting engineering and in the wafer cutting waiting area, the electrostatic discharge phenomenon can occur in the wafer cutting process, so that the wafer is broken down by static electricity, the yield of the processed semiconductor can be reduced, the technicians can make wrong judgment when optimizing the processing procedure when the processing problem is required to be separately classified or otherwise processed in the subsequent arrangement, and negative optimization change is made to the processing procedure, but the full-automatic batched processing cannot be specifically distinguished and tracked, and products with the electrostatic discharge phenomenon exist in the cutting process.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide an electrostatic monitoring and marking system for wafer dicing engineering, which is used for solving the difficulties of the prior art.
To achieve the above and other related objects, the present invention provides an electrostatic monitoring and marking system for wafer dicing process, comprising:
a wafer waiting area 1, wherein a label scanning device 11 is arranged in the wafer waiting area 1, and the label scanning device 11 scans the wafer number and transmits the wafer number to a server 5;
the wafer transmission area 2, one side of the wafer transmission area 2 is connected with the wafer waiting area 1, and the other side of the wafer transmission area 2 is connected with the wafer cutter 3;
the wafer cutting machine 3, wherein a photoelectric sensor 31 is additionally arranged in the wafer cutting machine 3, and the photoelectric sensor 31 monitors optical signals in the wafer cutting process in the wafer cutting machine 3 in real time and transmits monitoring data to the PC end 4;
the PC end 4 reads the serial numbers of the processed wafers in the server 5 and receives the real-time data monitored by the photoelectric sensor 31, analyzes whether the electrostatic discharge phenomenon occurs in the processing, and generates a monitoring report to be recorded in a folder of the serial number wafers after the wafer processing is completed;
and the server 5 receives the wafer ID transmitted by the label scanning device 11 and the monitoring report transmitted by the PC end 4.
According to a preferred embodiment, the wafer transfer area 2 is provided with a static eliminator 21 on the side close to the wafer cutter 3.
According to a preferred scheme, the specific flow of the electrostatic monitoring and marking system for the wafer cutting engineering comprises the following steps:
step S1: the wafer to be processed enters a wafer waiting area 1, and ID information of the surface imprinting of the wafer is scanned by a label scanning device 11 and is transmitted to a server 5;
step S2: the server 5 receives the wafer ID information transmitted by the label scanning device 11, and establishes a processing file in the information of the ID wafer after detecting that the coding format is correct;
step S2.1: the server 5 detects the error of the wafer ID coding format, generates a rechecking instruction and transmits the rechecking instruction back to the tag scanning device 11, and the tag scanning device 11 scans again;
step S3: the wafer to be processed enters the wafer transmission area 2, the static electricity of the wafer is eliminated by the static eliminator 21, and then the wafer enters the wafer cutting machine 3 for processing;
step S4: the photoelectric sensor 31 in the wafer cutting machine 3 monitors optical signals in the wafer cutting process in the wafer cutting machine 3 in real time, and transmits monitoring data to the PC end 4;
step S5: the PC end 4 reads the number of the processed wafer in the server 5, enters a processing file of the number of the wafer, receives monitoring data transmitted by the photoelectric sensor 31, and judges whether electrostatic discharge occurs or not;
step S5.1: the PC end 4 detects the electrostatic discharge phenomenon, generates a warning file and records the warning file into a processing file of the wafer number;
step S5.2: the PC end 4 does not detect the electrostatic discharge phenomenon, generates a processing report file and inputs the processing report file into the processing file of the wafer number.
The invention adopts a label scanning device, a static eliminator, a photoelectric sensor, a PC end and a server, wherein the label scanning device is additionally arranged in a wafer waiting area before cutting the wafer, ID information of the wafer to be processed is acquired and transmitted into the server, the server checks the ID information and establishes a processing file, the photoelectric sensor is additionally arranged in the wafer cutter and monitors and transmits the processing file to the PC end in real time, the PC end judges whether the wafer has static discharge phenomenon according to monitoring data and records the static discharge phenomenon in the processing file of a resume in the server, the wafer with the static discharge phenomenon in cutting can be rapidly acquired through the information in the server to track the processing data of the wafer, and defective product detection data caused by the problem of the wafer material due to static breakdown is eliminated when technicians optimize the processing program.
Preferred embodiments for carrying out the present invention will be described in more detail below with reference to the attached drawings so that the features and advantages of the present invention can be easily understood.
Drawings
FIG. 1 is a schematic flow chart of the present invention;
description of the reference numerals
1. A wafer waiting area; 11. a label scanning device; 2. a wafer transfer area; 21. a static eliminator; 3. a wafer cutter; 31. a photoelectric sensor; 4. a PC end; 5. a server;
Detailed Description
In order to make the objects, technical solutions and advantages of the technical solutions of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of specific embodiments of the present invention. Like reference numerals in the drawings denote like parts. It should be noted that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be made by a person skilled in the art without creative efforts, based on the described embodiments of the present invention fall within the protection scope of the present invention.
Possible embodiments within the scope of the invention may have fewer components, have other components not shown in the drawings, different components, differently arranged components or differently connected components, etc. than the examples shown in the drawings. Furthermore, two or more of the elements in the figures may be implemented in a single element or a single element shown in the figures may be implemented as multiple separate elements.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The terms "first," "second," and the like in the description and in the claims, are not used for any order, quantity, or importance, but are used for distinguishing between different elements. Likewise, the terms "a" or "an" and the like do not necessarily denote a limitation of quantity. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
The invention provides an electrostatic monitoring marking system for wafer cutting engineering, which is used in a wafer cutting monitoring marking process, the invention does not limit the type of a cut wafer, but the structures of a tag scanning device 11 and a photoelectric sensor 31 are particularly suitable for distinguishing and tracking the wafer with electrostatic discharge in the wafer cutting process.
In the wafer cutting engineering static monitoring marking system, a label scanning device 11 is additionally arranged in a wafer waiting area 1 before wafer cutting, ID information of a wafer to be processed is acquired and transmitted to a server 5, the server 5 checks the ID information and establishes a processing file, a photoelectric sensor 31 is additionally arranged in a wafer cutting machine 3 to monitor and transmit the ID information to a PC end 4 in real time, the PC end 4 judges whether the wafer is subjected to static discharge phenomenon during processing according to monitoring data and records the static discharge phenomenon in the processing file in the server 5, the wafer subjected to static discharge phenomenon during cutting can be rapidly acquired through information in the server to track the processing data of the wafer, and defective product detection data caused by the problem of wafer materials due to static breakdown are eliminated when technicians optimize the processing program.
The wafer transfer area 2 is provided with a static eliminator 21 at a side close to the wafer cutter 3, so as to reduce the probability of static electricity released during wafer cutting.
The specific flow of the wafer cutting engineering static monitoring marking system comprises the following steps:
step S1: the wafer to be processed enters a wafer waiting area 1, and ID information of the surface imprinting of the wafer is scanned by a label scanning device 11 and is transmitted to a server 5;
step S2: the server 5 receives the wafer ID information transmitted by the label scanning device 11, and establishes a processing file in the information of the ID wafer after detecting that the coding format is correct;
step S2.1: the server 5 detects the error of the wafer ID coding format, generates a rechecking instruction and transmits the rechecking instruction back to the tag scanning device 11, and the tag scanning device 11 scans again;
step S3: the wafer to be processed enters the wafer transmission area 2, the static electricity of the wafer is eliminated by the static eliminator 21, and then the wafer enters the wafer cutting machine 3 for processing;
step S4: the photoelectric sensor 31 in the wafer cutting machine 3 monitors optical signals in the wafer cutting process in the wafer cutting machine 3 in real time, and transmits monitoring data to the PC end 4;
step S5: the PC end 4 reads the number of the processed wafer in the server 5, enters a processing file of the number of the wafer, receives monitoring data transmitted by the photoelectric sensor 31, and judges whether electrostatic discharge occurs or not;
step S5.1: the PC end 4 detects the electrostatic discharge phenomenon, generates a warning file and records the warning file into a processing file of the wafer number;
step S5.2: the PC end 4 does not detect the electrostatic discharge phenomenon, generates a processing report file and inputs the processing report file into the processing file of the wafer number.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims (3)

1. An electrostatic monitoring and marking system for wafer dicing engineering, comprising:
a wafer waiting area (1), wherein the wafer waiting area (1) is provided with a label scanning device (11), and the label scanning device (11) scans a wafer number and transmits the wafer number to a server (5);
the wafer transmission area (2), one side of the wafer transmission area (2) is connected with the wafer waiting area (1), and the other side of the wafer transmission area (2) is connected with the wafer cutting machine (3);
the wafer cutting machine (3), a photoelectric sensor (31) is additionally arranged in the wafer cutting machine (3), the photoelectric sensor (31) monitors optical signals in the wafer cutting process in the wafer cutting machine (3) in real time, and monitoring data are transmitted into the PC end (4);
the PC end (4) reads the serial number of the processed wafer in the server (5) and receives the monitored real-time data of the photoelectric sensor (31), whether the electrostatic discharge phenomenon occurs in the processing is analyzed, and a monitoring report is generated and recorded in a folder of the wafer with the serial number after the wafer is processed;
and the server (5) is used for receiving the wafer ID transmitted by the label scanning device (11) and receiving the monitoring report transmitted by the PC end (4).
2. A wafer dicing engineering electrostatic monitoring marking system according to claim 3, characterized in that the side of the wafer transfer area (2) close to the wafer dicing machine (3) is provided with an electrostatic eliminator (21).
3. The electrostatic monitoring and marking system for wafer dicing engineering according to claim 4, wherein the specific flow of the electrostatic monitoring and marking system for wafer dicing engineering comprises the steps of:
step S1: the wafer to be processed enters a wafer waiting area (1), and ID information of the surface imprinting of the wafer is scanned by a label scanning device (11) and is transmitted to a server (5);
step S2: the server (5) receives the wafer ID information transmitted by the label scanning device (11), and after detecting that the coding format is correct, a processing file is built in the information of the ID wafer;
step S2.1: the server (5) detects the error of the wafer ID coding format, generates a rechecking instruction and transmits the rechecking instruction back to the tag scanning device (11), and the tag scanning device (11) scans again;
step S3: the wafer to be processed enters a wafer transmission area (2) to be processed, static electricity of the wafer is eliminated by a static eliminator (21), and then the wafer enters a wafer cutting machine (3) to be processed;
step S4: a photoelectric sensor (31) in the wafer cutting machine (3) monitors optical signals in the wafer cutting process in the wafer cutting machine (3) in real time, and transmits monitoring data to a PC end (4);
step S5: the PC end (4) reads the number of the processed wafer in the server (5), enters a processing file of the number of the wafer, receives monitoring data transmitted by the photoelectric sensor (31) and judges whether electrostatic discharge occurs or not;
step S5.1: the PC end (4) detects the electrostatic discharge phenomenon, generates a warning file and records the warning file into a processing file of the wafer number;
step S5.2: the PC end (4) does not detect the electrostatic discharge phenomenon, and a processing report file is generated and recorded into the processing file of the wafer number.
CN202311147726.3A 2023-09-06 2023-09-06 Wafer cutting engineering static monitoring marking system Pending CN117316815A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311147726.3A CN117316815A (en) 2023-09-06 2023-09-06 Wafer cutting engineering static monitoring marking system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311147726.3A CN117316815A (en) 2023-09-06 2023-09-06 Wafer cutting engineering static monitoring marking system

Publications (1)

Publication Number Publication Date
CN117316815A true CN117316815A (en) 2023-12-29

Family

ID=89287493

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311147726.3A Pending CN117316815A (en) 2023-09-06 2023-09-06 Wafer cutting engineering static monitoring marking system

Country Status (1)

Country Link
CN (1) CN117316815A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117723850A (en) * 2024-02-07 2024-03-19 泓浒(苏州)半导体科技有限公司 Electrostatic detection system and method for wafer transfer mechanical arm in ultra-vacuum environment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117723850A (en) * 2024-02-07 2024-03-19 泓浒(苏州)半导体科技有限公司 Electrostatic detection system and method for wafer transfer mechanical arm in ultra-vacuum environment
CN117723850B (en) * 2024-02-07 2024-04-26 泓浒(苏州)半导体科技有限公司 Electrostatic detection system and method for wafer transfer mechanical arm in ultra-vacuum environment

Similar Documents

Publication Publication Date Title
CN117316815A (en) Wafer cutting engineering static monitoring marking system
CN100520651C (en) Method and appts. for fault detection of processing tool and control thereof using advanced process control framework
CN108268892B (en) Fault in production management analysis method
CN103674590B (en) Semiconductor chip full-automatic sealed in unit automatic alarm system implementation method
CN106681930A (en) Distributed automatic application operation abnormity detecting method and system
CN201143502Y (en) Device for testing, analyzing and counting bar-code
JP4768942B2 (en) Method and apparatus for integrating near real-time defect detection into an APC framework
US20050010311A1 (en) Data collection and diagnostic system for a semiconductor fabrication facility
CN101807061B (en) Vision detection control system and method for integrated circuit tendon-cut system
US6546508B1 (en) Method and apparatus for fault detection of a processing tool in an advanced process control (APC) framework
JP2010537434A (en) Photovoltaic manufacturing
CN107220969A (en) The method of testing and detecting system of product lamp position
CN110223152B (en) Method and system for acquiring plate production data in furniture manufacturing execution system
EP0348704A3 (en) Apparatus and method for simultaneously presenting error interrupt and error data to a support processor
US20120078409A1 (en) Electronic Supervisor
CN114429256A (en) Data monitoring method and device, electronic equipment and storage medium
CN111026065A (en) Quality control system for automatic production line of silicon steel sheets
CN108111328A (en) A kind of abnormality eliminating method and device
CN117240594A (en) Multi-dimensional network security operation and maintenance protection management system and method
CN115087853A (en) Vibration processing device, vibration processing method, and program
CN102881619A (en) Yield monitoring system and monitoring method thereof
CN108170825A (en) Distributed energy data monitoring cleaning method based on cloud platform
CN113965529A (en) LonWorks communication control method and system based on priority queue
CN101989534B (en) Particle automatic control method and system thereof
CN107244539B (en) A kind of tracking control system for long range belt transmission line

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication