CN117309603B - Method, device, equipment and medium for detecting strength of welding spot of surface mount of circuit board - Google Patents

Method, device, equipment and medium for detecting strength of welding spot of surface mount of circuit board Download PDF

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Publication number
CN117309603B
CN117309603B CN202311596739.9A CN202311596739A CN117309603B CN 117309603 B CN117309603 B CN 117309603B CN 202311596739 A CN202311596739 A CN 202311596739A CN 117309603 B CN117309603 B CN 117309603B
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tested
component
circuit board
test
result
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CN117309603A (en
Inventor
慈维琦
谢田亮
李祚婷
李洋
张志宝
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Tianjin Xintian Electronic Technology Co ltd
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Tianjin Xintian Electronic Technology Co ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N3/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N3/08—Investigating strength properties of solid materials by application of mechanical stress by applying steady tensile or compressive forces
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N3/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N3/02—Details
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N3/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N3/02—Details
    • G01N3/06—Special adaptations of indicating or recording means
    • G01N3/068—Special adaptations of indicating or recording means with optical indicating or recording means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/0002—Inspection of images, e.g. flaw detection
    • G06T7/0004—Industrial image inspection
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/70—Determining position or orientation of objects or cameras
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2203/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N2203/0001—Type of application of the stress
    • G01N2203/0003—Steady
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2203/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N2203/0014—Type of force applied
    • G01N2203/0016—Tensile or compressive
    • G01N2203/0019—Compressive
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2203/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N2203/02—Details not specific for a particular testing method
    • G01N2203/026—Specifications of the specimen
    • G01N2203/0296—Welds
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2203/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N2203/02—Details not specific for a particular testing method
    • G01N2203/06—Indicating or recording means; Sensing means
    • G01N2203/0641—Indicating or recording means; Sensing means using optical, X-ray, ultraviolet, infrared or similar detectors
    • G01N2203/0647—Image analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/10—Image acquisition modality
    • G06T2207/10016—Video; Image sequence
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/30—Subject of image; Context of image processing
    • G06T2207/30108—Industrial image inspection
    • G06T2207/30141—Printed circuit board [PCB]

Abstract

The application relates to a method, a device, equipment and a medium for detecting the strength of a welding spot of a patch of a circuit board, which are applied to the technical field of circuit board detection, and the method comprises the following steps: acquiring first image information, wherein the first image information comprises a circuit board image to be tested; performing image recognition on the image of the circuit board to be detected to obtain attribute information of each component on the circuit board to be detected; determining the components to be tested according to the image information of the components to be tested and the first test times of the components; testing the components to be tested to obtain a first test result; updating the first test times according to the first test result; judging whether each first test frequency reaches the preset test frequency, if not, turning to acquiring first image information; if yes, determining a second test result according to the plurality of first test results. The method has the advantages that the circuit board can be subjected to multiple welding spot strength tests, and the cost of the welding spot strength test of the circuit board is controlled.

Description

Method, device, equipment and medium for detecting strength of welding spot of surface mount of circuit board
Technical Field
The application relates to the technical field of circuit board detection, in particular to a method, a device, equipment and a medium for detecting the strength of a welding spot of a patch of a circuit board.
Background
Circuit boards are one of the important components of the electronics industry, SMT patches being one of the most popular techniques and technologies in the electronics assembly industry today. The circuit mounting technology is that no-pin or short-lead components are mounted on the surface of a PCB, and then soldered and assembled by reflow soldering or dip soldering and other methods. In the actual production process of soldering electronic components, quality problems occur at the solder joints.
In the actual production process, in order to enable the quality of the circuit board to meet the use requirement, the condition that the normal use of the circuit board is affected due to insufficient strength of welding spots is reduced. The strength of the solder joints of each electronic component of the circuit board needs to be detected for multiple times to evaluate the soldering quality of the pins of each component.
The existing strength detection mode of the welding spots of the circuit board patch is that an operator fixes the circuit board and then applies thrust to the components to test the strength of the welding spots of the components. In the strength test process, a large amount of test data are required to be acquired so as to evaluate the welding spot strength of the components, but each circuit board can only be tested once by default because the welding spot strength test is a destructive test, and a large amount of circuit boards are required to be consumed when a plurality of components are tested for many times, so that the test cost is high.
Disclosure of Invention
In order to enable a circuit board to perform multiple welding spot strength tests, the cost of the welding spot strength test of the circuit board is controlled, and the method, the device, the equipment and the medium for detecting the welding spot strength of the patch of the circuit board are provided.
In a first aspect, the present application provides a method for detecting the strength of a solder joint of a patch of a circuit board, which adopts the following technical scheme:
a method for detecting the strength of a welding spot of a patch of a circuit board comprises the following steps: acquiring first image information, wherein the first image information comprises a circuit board image to be tested; performing image recognition on the image of the circuit board to be tested to obtain attribute information of each component on the circuit board to be tested, wherein the attribute information comprises component images, first test times and preset test times; determining the components to be tested according to the first image information and the first test times of the components, wherein the first test times are times of testing each component; testing the components to be tested to obtain a first test result, wherein the first test result comprises a standard result and a limit result of the components to be tested; updating the first test times according to the first test result; judging whether the first test times reach the preset test times or not, and if not, turning to the step of acquiring the first image information; if yes, determining a second test result according to the first test results, wherein the second test result comprises an intensity test result of each welding point of the component to be tested on the circuit board to be tested.
By adopting the technical scheme, when the patch welding spot strength test is carried out on the circuit board, a test strategy is scientifically formulated according to the first image information, and after one component on one circuit board is tested, the test strategy is formulated again, so that the circuit board can be tested for multiple times, and the consumption of materials in the test process is reduced; and obtaining a second test result according to the plurality of first test results, wherein the data volume is larger and more comprehensive, and the second test result is more accurate.
Optionally, before determining the component to be tested according to the first image information and the first test times of the components, the method further includes: judging whether an abnormality exists according to the circuit board image to be detected, and obtaining a circuit board judging result; if the circuit board judging result is that the image on the surface of the circuit board to be tested is not abnormal, determining a testing strategy according to the image information of the components to be tested and the first testing times of the components; if the image on the surface of the circuit board to be tested is abnormal, determining an abnormal type according to the judging result of the circuit board, wherein the abnormal type comprises structural abnormality and non-structural abnormality; and if the abnormal type is the unstructured abnormal, continuously determining the component to be tested according to the first image information and the first test times of each component.
By adopting the technical scheme, the method and the device for testing the circuit board strength of the circuit board have the advantages that whether the circuit board strength is qualified or not is judged before a testing strategy is determined, whether the circuit board strength is qualified or not is judged according to whether the circuit board has structural abnormality or not, the detection efficiency is improved, and the occurrence of the condition that a first testing result is inaccurate due to the fact that the circuit board strength is unqualified is reduced.
Optionally, before the device under test is tested to obtain the first test result, the method further includes: judging whether the welding spot of the component to be tested is abnormal or not according to the component image; if the welding spot of the component to be tested is abnormal, the first test result is obtained, and the first test result also comprises abnormal welding spots; and if the welding spot of the component to be tested is not abnormal, continuing to test the component to be tested to obtain a first test result.
By adopting the technical scheme, the welding spot state of the first component is judged, whether the strength of the first component is qualified or not is judged through the image, the testing steps are saved, and the detection efficiency is improved.
Optionally, the determining the component to be tested according to the first image information and the first test times of each component includes: according to the first image information, grading the components to be tested to obtain a processing grade, wherein the processing grade comprises a primary component and a secondary component; determining a first component according to the first test times, wherein the first component is the primary component with the minimum first test times; judging whether the first test times of the first component reach preset test times or not; and if the first test times of the first component do not reach the preset test times, taking the first component as the component to be tested.
By adopting the technical scheme, when the testing strategy is determined, the components to be tested are classified according to actual conditions, so that the situation that the testing strategy cannot be implemented due to component shielding when the testing strategy is determined is avoided; after the test, the components are classified again, and the primary and secondary components can be divided into primary components, so that the scientificity of the test strategy is improved.
Optionally, the testing the component to be tested to obtain a first test result includes: fixing the circuit board to be tested based on the position of the component to be tested; acquiring second image information and third image information, wherein the second image information is acquired over against a patch surface of the circuit board, and the third image information is acquired over against any one of two sides of the circuit board; determining the relative position of the push head and the component to be tested according to the second image information and the third image information; judging whether the relative position is abnormal or not; if the relative position is abnormal, the method is switched to fixing the circuit board to be tested based on the position of the component to be tested; and if the relative position is not abnormal, the test is carried out on the component to be tested, and the first test result is obtained.
By adopting the technical scheme, before the push head applies the thrust to the component to be tested, whether the position of the contact point between the push head and the component to be tested is abnormal or not is judged, so that the conditions of inaccurate test result and material waste caused by abnormal position of the push head are reduced.
Optionally, the testing the component to be tested to obtain a first test result includes: acquiring video data, wherein the video data is right opposite to any one of two sides of a circuit board for acquisition; judging whether the offset distance of the circuit board endpoint is greater than a preset offset threshold according to the video data; if the offset distance of the circuit board endpoint is not greater than a preset offset threshold value, continuing to obtain a first test result; if the offset distance of the circuit board endpoint is greater than a preset offset threshold, the strength of the circuit board is abnormal.
By adopting the technical scheme, the offset value of the circuit board endpoint is monitored in the process that the push head applies thrust to the component to be tested, so that the condition that the detection result is influenced by deflection deformation of the circuit board is avoided.
Optionally, the testing the component to be tested to obtain a first test result, where the first test result includes a standard result and a limit result of the component to be tested, and the first test result includes: obtaining a stress curve of the component to be tested; determining a limit result according to the stress curve, wherein the limit result comprises the limit stress of the component to be tested; judging whether the limit result is larger than a preset standard stress value, if so, determining that the to-be-tested component meets the preset standard; and if the limit result is not greater than the preset standard stress value, the standard result is that the component to be tested does not meet the preset standard.
By adopting the technical scheme, the first test result is more comprehensive through acquisition, the acquired data is more accurate and scientific, and the accuracy of the test result is improved.
In a second aspect, the present application provides a circuit board patch solder joint strength detection device, which adopts the following technical scheme:
a circuit board patch solder joint strength detection device, comprising:
the acquisition module is used for acquiring first image information, wherein the first image information comprises a circuit board image to be detected;
the identification module is used for carrying out image identification on the image of the circuit board to be tested to obtain attribute information of each component on the circuit board to be tested, wherein the attribute information comprises component images, first test times and preset test times;
the determining module is used for determining the components to be tested according to the first image information and the first test times of the components, wherein the first test times are times of testing each component;
the testing module is used for testing the components to be tested to obtain a first testing result, wherein the first testing result comprises a standard result and a limit result of the components to be tested;
the updating module is used for updating the first test times according to the first test result;
The judging module is used for judging whether the first test times reach the preset test times or not, if so, executing the result determining module, and if not, executing the acquiring module;
the result determining module is used for determining a second test result according to the plurality of first test results, wherein the second test result comprises an intensity test result of each welding point of the component to be tested on the circuit board to be tested.
By adopting the technical scheme, when the patch welding spot strength test is carried out on the circuit board, a test strategy is scientifically formulated according to the first image information, and after one component on one circuit board is tested, the test strategy is formulated again, so that the circuit board can be tested for multiple times, and the consumption of materials in the test process is reduced; and obtaining a second test result according to the plurality of first test results, wherein the data volume is larger and more comprehensive, and the second test result is more accurate.
In a third aspect, the present application provides an electronic device, which adopts the following technical scheme:
an electronic device comprising a processor coupled with a memory;
the memory has stored thereon a computer program that can be loaded by a processor and that performs the method for detecting solder joint strength of a circuit board patch according to any one of the first aspects.
In a fourth aspect, the present application provides a computer readable storage medium, which adopts the following technical scheme:
a computer-readable storage medium storing a computer program capable of being loaded by a processor and executing the circuit board patch pad intensity detection method of any one of the first aspects.
Drawings
Fig. 1 is a schematic flow chart of a method for detecting the strength of a soldering point of a circuit board according to an embodiment of the present application.
Fig. 2 is a block diagram of a circuit board patch solder joint strength detection device according to an embodiment of the present application.
Fig. 3 is a block diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The present application is described in further detail below with reference to the accompanying drawings.
The embodiment of the application provides a method for detecting the strength of a welding spot of a circuit board, which can be executed by electronic equipment, wherein the electronic equipment can be a server or terminal equipment, and the server can be an independent physical server, a server cluster or a distributed system formed by a plurality of physical servers, or a cloud server for providing cloud computing service. The terminal device may be, but is not limited to, a smart phone, a tablet computer, a desktop computer, etc.
As shown in fig. 1, a method for detecting the strength of a solder joint of a patch of a circuit board is described as follows (steps S101 to S107):
step S101, acquiring first image information, where the first image information includes an image of a circuit board to be tested.
In this embodiment, when the circuit board is to be tested, the circuit board needs to be vertically fixed on the fixture, and the first camera acquires the first image information on the surface, opposite to the surface, with the patch, of the circuit board. And acquiring the image of the circuit board to be tested according to the first image information.
Step S102, image recognition is carried out on the image of the circuit board to be tested, so that attribute information of each component on the circuit board to be tested is obtained, wherein the attribute information comprises the image of the component, the first test times and the preset test times.
In the embodiment, image recognition is performed on each component according to component image information, so that the position of each component, the image of each component, the first test times and the preset test times of each component are determined; on the other hand, the type information of each component is determined by carrying out image recognition on each component, wherein the type information comprises the type of the component and the welding spot strength standard of the type of the component
Step S103, determining the components to be tested according to the first image information and the first test times of the components, wherein the first test times are the times of testing each component.
In this embodiment, the test policy specifically includes determining a component to be tested, and a placement position of the circuit board when the component to be tested is tested.
Specifically, before determining the component to be tested according to the first image information and the first test times of each component, the method further includes: judging whether an abnormality exists according to the circuit board image to be detected, and obtaining a circuit board judging result; if the circuit board judging result is that the image on the surface of the circuit board to be tested is not abnormal, continuously determining a testing strategy according to the image information of the components to be tested and the first testing times of the components; if the image on the surface of the circuit board to be tested is abnormal, determining an abnormal type according to the judging result of the circuit board, wherein the abnormal type comprises structural abnormality and non-structural abnormality; if the abnormal type is the unstructured abnormal, the components to be tested are continuously determined according to the first image information and the first test times of the components.
In this embodiment, the test result of the solder joint strength of the component should be established under the premise that the strength of the circuit board is qualified, so as to reduce the influence of the unqualified circuit board on the solder joint strength of the component. In this scheme, the welding spot intensity of a plurality of components on a circuit board needs to be tested, and each time the welding spot intensity test is destructive test, the circuit board structure is liable to be damaged, so the condition that the circuit board intensity is affected happens, therefore, whether the circuit board intensity is qualified should be judged according to the first image information before determining the test strategy each time.
When judging the strength of the circuit board, firstly judging whether the circuit board is abnormal, if so, judging whether the circuit board is structurally abnormal, and if so, the strength of the circuit board cannot meet the test requirement, and the circuit board needs to be replaced to acquire the first image information again. If the circuit board has no abnormality or has no structural abnormality, the component to be tested can be continuously determined according to the first image information and the first test times of the components.
The circuit board abnormality is judged according to the circuit board image through image recognition, and after the circuit board abnormality is recognized, the abnormality type can be determined according to the circuit board image. The abnormal types comprise structural abnormality and non-structural abnormality, wherein the structural abnormality comprises holes, cracks and scratches, and the structural abnormality is an abnormal type affecting the strength of the circuit board; the non-structural anomalies include dirt and adhesive, which are anomalies that only change the appearance of the circuit board and do not affect the strength of the circuit board.
Specifically, determining the component to be tested according to the first image information and the first test times of each component includes: according to the first image information, grading the components to be tested to obtain a processing grade, wherein the processing grade comprises a primary component and a secondary component; determining a first component according to the first test times, wherein the first component is a primary component with the minimum first test times; judging whether the first test times of the first component reach preset test times or not; and if the first test times of the first component do not reach the preset test times, taking the first component as the component to be tested.
In this embodiment, there are multiple components on one circuit board, when performing the solder joint strength test, according to the test standard, the edge of the component to be tested is required to be perpendicular to the force application direction of the push head, and on the layout of the circuit board, there is a case that the component is blocked by other components and cannot be tested.
When determining a test strategy, classifying the components according to the first image information, wherein the components which are not blocked are primary components, and the components which are blocked and cannot be tested are secondary components. When a circuit board is subjected to a plurality of solder joint strength tests, because the solder joint strength tests are destructive tests, there are cases in which an original secondary component is changed into a primary component due to separation of a type of component from the circuit board. Therefore, before each test strategy is formulated, the component level should be classified again according to the first image information acquired again.
After determining the first-stage components, acquiring first test times of all the first-stage components, wherein the first-stage component with the least first test times is the first component, judging whether the first test times of the first component reach a preset data volume, if not, testing the first component by a test strategy, and if so, acquiring the first test times of all the second-stage components. If the secondary component does not exist or the first test times of the secondary component reach the preset data quantity, finishing data acquisition; and if the first test times of the secondary components do not reach the preset data quantity, sending a manual modification instruction. And the operator replaces the circuit board or modifies the circuit board according to the manual modification instruction so that at least one secondary component is not blocked.
Step S104, testing the components to be tested to obtain a first test result, wherein the first test result comprises a standard result and a limit result of the components to be tested.
In this embodiment, the pushing head applies a pushing force to the component to be tested along a direction parallel to the circuit board, the pushing force direction is perpendicular to the edge of the component to be tested, and the contact point of the pushing head and the component to be tested should be at the middle position of the edge of the component to be tested, so that the force applied by the pushing head to the component to be tested is uniformly increased until the component to be tested is separated from the PCB board.
According to the test standard, three separation modes are provided for separating the components from the circuit board:
separation mode a: the components are sheared off, broken chips or broken elements remain on the base, namely only the component body is damaged;
separation mode B: separating the components from the bonding material, namely, separating solder paste from pins at the welding points;
separation mode C: the components and the bonding material are separated from the substrate, namely, the solder paste is separated from the bonding pad or the bonding pad is separated from the PCB.
Specifically, before testing the component to be tested to obtain the first test result, the method further includes: judging whether the welding spot of the component to be tested is abnormal or not according to the component image; if the welding spot of the component to be tested is abnormal, a first test result is obtained, and the first test result also comprises the abnormal welding spot; and if the welding spot of the component to be tested is not abnormal, continuously testing the component to be tested according to the condition to obtain a first test result.
In this embodiment, after determining the component to be tested according to the test policy, the test policy should be executed to obtain the first test result of the solder joint of the component to be tested, but there may be a connection problem between the component to be tested and the circuit board, which affects the strength of the solder joint, including at least one of voids, solder missing, solder leg breakage and solder missing.
Because the position of the circuit board needs to be repeatedly adjusted every time the welding spot strength test is carried out, the process is complicated, and the connection problems can be judged through image information, before the welding spot strength test is carried out, the image of the current component to be tested needs to be firstly identified according to first image information, whether at least one of holes, missing welding, welding leg breakage and tin deficiency exists is judged, and if the at least one of holes, missing welding, welding leg breakage and tin deficiency does not exist, the pushing head is continuously used for applying pushing force to the current component to be tested to obtain a first test result; if the first test result is abnormal, the first test result is obtained as a welding spot, the standard result does not meet the standard, and the limit result is null.
Specifically, testing the component to be tested to obtain a first test result includes: fixing the circuit board to be tested based on the position of the component to be tested; acquiring second image information and third image information, wherein the second image information is acquired over against a patch surface of the circuit board, and the third image information is acquired over against any one of two sides of the circuit board; determining the relative position of the push head and the component to be tested according to the second image information and the third image information; judging whether the relative position is abnormal; if the relative position is abnormal, the method is transferred to the fixing of the circuit board to be tested based on the position of the component to be tested; if the relative position is not abnormal, the test is carried out on the component to be tested, and a first test result is obtained.
In this embodiment, when the pushing head applies a pushing force to the component to be tested, according to the test standard, the pushing head should apply a pushing force to the component to be tested along a direction parallel to the circuit board, and the pushing direction is perpendicular to the edge of the component to be tested, and the contact point between the pushing head and the component to be tested should be located in the middle of the edge of the component to be tested.
The first image acquisition device is arranged opposite to the surface of the circuit board, and the second image acquisition device is arranged opposite to any one of the left side and the right side of the circuit board. The second image information is acquired by the first image acquisition device, and the third image information is acquired by the second image acquisition device. And determining whether the relative positions of the push head and the component to be tested meet the test standard according to the second image information and the third image information, if not, determining that the relative positions are abnormal, and fixing the circuit board to be tested according to the test strategy again to repeatedly acquire the second image information and the third image information. If yes, continuing to test the component to be tested according to the test strategy.
Whether the relative positions of the push head and the component to be tested meet the test standard is determined according to the second image information and the third image information, and the image recognition technology is adopted, which is a conventional technical means in the field, and is not repeated herein.
In addition, the first image information may be acquired by the first image acquisition device, or may be acquired by another image acquisition device.
Specifically, testing the component to be tested to obtain a first test result includes: acquiring video data, wherein the video data is right opposite to any one of two sides of the circuit board for acquisition; judging whether the offset distance of the circuit board endpoint is greater than a preset offset threshold according to the video data; if the offset distance of the circuit board endpoint is not greater than the preset offset threshold value, continuing to obtain a first test result; if the offset distance of the end points of the circuit board is larger than the preset offset threshold value, the strength of the circuit board is abnormal.
When a pushing force is applied to the component to be tested, a moment for deflecting the circuit board is generated, so that the circuit board is deflected and deformed. If the deflection degree of the circuit board is too large, the accuracy of the first test result is affected, so that the deflection degree of the circuit board is concerned at the moment when the welding spot strength test is carried out.
In this embodiment, video data is acquired through the second image acquisition device, and feature recognition is performed on the video data to obtain an upper endpoint and a lower endpoint of the circuit board, and horizontal distances of the upper endpoint and the lower endpoint are determined according to positions of the upper endpoint and the lower endpoint. Judging whether the horizontal distance is larger than a preset offset threshold value, if so, stopping the test, and replacing the circuit board to acquire the first image information again without obtaining the first test result; if not, the circuit board strength is normal and the test is continued.
Wherein the preset offset distance should be 0.005 times the length of the circuit board in the vertical direction, for example: if the length of the circuit board is 20cm, the preset offset distance is 0.1cm, if the horizontal offset distance is more than 0.1cm, the strength of the circuit board is abnormal, the test is stopped, a first test result is not generated, and the circuit board is replaced to acquire the first image information again.
Specifically, the to-be-tested component is tested to obtain a first test result, wherein the first test result comprises a standard result and a limit result of the to-be-tested component, and the first test result comprises: obtaining a stress curve of a component to be tested; determining a limit result according to the stress curve, wherein the limit result comprises the limit stress of the component to be tested; judging whether the limit result is larger than a preset standard stress value, if so, judging that the component to be tested meets the preset standard; if the limit result is not greater than the preset standard stress value, the standard result is that the component to be tested does not meet the preset standard.
In this embodiment, when the push head tests the component to be tested, the push force sensor obtains a stress curve of the component to be tested, and the stress curve is observed to obtain a standard result and a limit result. If the limit of the bearing force of the component to be tested is reached, the cliff-type decline of the thrust curve occurs, and the highest point value of the thrust curve is the limit result.
Step S105, updating the first test times according to the first test result.
In this embodiment, in order to obtain more test data and obtain more accurate test results, a plurality of first test results need to be obtained for each component. When the test is started, the first test times of each component are stored in a database as the preset data quantity 0. When a first test result is obtained, the first test times of the component are required to be modified in the following manner: and if the first test result is obtained, adding one to the first test times, and if the first test result is not generated, keeping the first test times unchanged.
Step S106, judging whether each first test frequency reaches the preset test frequency, and if not, turning to acquiring the first image information.
In this embodiment, it is determined that the first test times of all the components reach the preset test times, and if the collection of the first test results of all the components to be tested is completed, a second test result is obtained according to all the first test results.
And if the first test times of the components to be tested do not reach the preset data quantity, acquiring the first image information again, and continuing to test the welding spot strength.
And step S107, if yes, determining a second test result according to the plurality of first test results, wherein the second test result comprises an intensity test result of each welding point of the component to be tested on the circuit board to be tested.
And determining the qualification rate of each component according to the standard result of each component, and judging whether the qualification rate of each component is greater than a preset qualification rate. The test is intended to test the solder joint strength of the circuit board patch to determine the reliability of the circuit board. Therefore, if the qualification rate of all the components to be tested is larger than the preset qualification rate, the second test result is that the strength of the welding spot of the patch of the circuit board is qualified; if the qualification rate of the components is not more than the preset qualification rate, the strength of the welding spots of the patch of the circuit board is unqualified, and the types of the components with the qualification rate not more than the preset qualification rate are displayed.
On the other hand, after the strength of the welding spots of the patch of the circuit board is determined to be qualified, a plurality of limit results of each component are obtained, and average value calculation is carried out to obtain an average limit result of each component.
Fig. 2 is a block diagram of a circuit board patch solder joint strength detection device 200 according to an embodiment of the present application.
As shown in fig. 2, the circuit board patch pad strength detection device 200 mainly includes:
An acquisition module 201, configured to acquire first image information;
the identification module 202 is used for carrying out image identification on the image of the circuit board to be tested to obtain attribute information of each component on the circuit board to be tested;
a determining module 203, configured to determine a component to be tested according to the first image information and the first test times of each component;
the testing module 204 is used for testing the components to be tested to obtain a first testing result;
an updating module 205, configured to update the first test times according to the first test result;
the judging module 206 judges whether each first test frequency reaches the preset test frequency, if so, the result determining module is executed, and if not, the obtaining module is executed;
the result determining module 207 determines a second test result according to the plurality of first test results, where the second test result includes an intensity test result of each of the soldered dots of the component under test on the circuit board under test.
As an optional implementation manner of this embodiment, the determining module 203 is further specifically configured to, before determining the component to be tested according to the first image information and the first test times of the respective components, the method further includes: judging whether an abnormality exists according to the circuit board image to be detected, and obtaining a circuit board judging result; if the circuit board judging result is that the image on the surface of the circuit board to be tested is not abnormal, continuously determining a testing strategy according to the image information of the components to be tested and the first testing times of the components; if the image on the surface of the circuit board to be tested is abnormal, determining an abnormal type according to the judging result of the circuit board, wherein the abnormal type comprises structural abnormality and non-structural abnormality; if the abnormal type is the unstructured abnormal, the components to be tested are continuously determined according to the first image information and the first test times of the components.
As an optional implementation manner of this embodiment, the test module 204 is further specifically configured to, before testing the component to be tested to obtain the first test result, further include: judging whether the welding spot of the component to be tested is abnormal or not according to the component image; if the welding spot of the component to be tested is abnormal, a first test result is obtained, and the first test result also comprises the abnormal welding spot; and if the welding spot of the component to be tested is not abnormal, continuously testing the component to be tested according to the condition to obtain a first test result.
As an optional implementation manner of this embodiment, the determining module 203 is further specifically configured to determine, according to the first image information and the first test times of each component, that a component to be tested includes: according to the first image information, grading the components to be tested to obtain a processing grade, wherein the processing grade comprises a primary component and a secondary component; determining a first component according to the first test times, wherein the first component is a primary component with the minimum first test times; judging whether the first test times of the first component reach preset test times or not; and if the first test times of the first component do not reach the preset test times, taking the first component as the component to be tested.
As an optional implementation manner of this embodiment, the test module 204 is further specifically configured to test a component to be tested, and the obtaining a first test result includes: fixing the circuit board to be tested based on the position of the component to be tested; acquiring second image information and third image information, wherein the second image information is acquired over against a patch surface of the circuit board, and the third image information is acquired over against any one of two sides of the circuit board; determining the relative position of the push head and the component to be tested according to the second image information and the third image information; judging whether the relative position is abnormal; if the relative position is abnormal, the method is transferred to the fixing of the circuit board to be tested based on the position of the component to be tested; if the relative position is not abnormal, the test is carried out on the component to be tested, and a first test result is obtained.
As an optional implementation manner of this embodiment, the test module 204 is further specifically configured to test a component to be tested, and the obtaining a first test result includes: acquiring video data, wherein the video data is right opposite to any one of two sides of the circuit board for acquisition; judging whether the offset distance of the circuit board endpoint is greater than a preset offset threshold according to the video data; if the offset distance of the circuit board endpoint is not greater than the preset offset threshold value, continuing to obtain a first test result; if the offset distance of the end points of the circuit board is larger than the preset offset threshold value, the strength of the circuit board is abnormal.
As an optional implementation manner of this embodiment, the test module 204 is further specifically configured to test a component to be tested to obtain a first test result, where the first test result includes a standard result and a limit result of the component to be tested, and the first test result includes: obtaining a stress curve of a component to be tested; determining a limit result according to the stress curve, wherein the limit result comprises the limit stress of the component to be tested; judging whether the limit result is larger than a preset standard stress value, if so, judging that the component to be tested meets the preset standard; if the limit result is not greater than the preset standard stress value, the standard result is that the component to be tested does not meet the preset standard.
In one example, a module in any of the above apparatuses may be one or more integrated circuits configured to implement the above methods, for example: one or more application specific integrated circuits (application specific integratedcircuit, ASIC), or one or more digital signal processors (digital signal processor, DSP), or one or more field programmable gate arrays (field programmable gate array, FPGA), or a combination of at least two of these integrated circuit forms.
For another example, when a module in an apparatus may be implemented in the form of a scheduler of processing elements, the processing elements may be general-purpose processors, such as a central processing unit (central processing unit, CPU) or other processor that may invoke a program. For another example, the modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).
It will be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working process of the apparatus and modules described above may refer to the corresponding process in the foregoing method embodiment, which is not repeated herein.
Fig. 3 is a block diagram of an electronic device 300 according to an embodiment of the present application.
As shown in FIG. 3, electronic device 300 includes a processor 301 and memory 302, and may further include an information input/information output (I/O) interface 303, one or more of a communication component 304, and a communication bus 305.
The processor 301 is configured to control the overall operation of the electronic device 300, so as to complete all or part of the steps of the method for detecting the strength of the solder joint of the circuit board; the memory 302 is used to store various types of data to support operation at the electronic device 300, which may include, for example, instructions for any application or method operating on the electronic device 300, as well as application-related data. The Memory 302 may be implemented by any type or combination of volatile or non-volatile Memory devices, such as one or more of static random access Memory (Static Random Access Memory, SRAM), electrically erasable programmable Read-Only Memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), erasable programmable Read-Only Memory (Erasable Programmable Read-Only Memory, EPROM), programmable Read-Only Memory (Programmable Read-Only Memory, PROM), read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk, or optical disk.
The I/O interface 303 provides an interface between the processor 301 and other interface modules, which may be a keyboard, mouse, buttons, etc. These buttons may be virtual buttons or physical buttons. The communication component 304 is used for wired or wireless communication between the electronic device 300 and other devices. Wireless communication, such as Wi-Fi, bluetooth, near field communication (Near Field Communication, NFC for short), 2G, 3G, or 4G, or a combination of one or more thereof, and accordingly the communication component 304 can include: wi-Fi part, bluetooth part, NFC part.
The electronic device 300 may be implemented by one or more application specific integrated circuits (Application Specific Integrated Circuit, abbreviated as ASIC), digital signal processors (Digital Signal Processor, abbreviated as DSP), digital signal processing devices (Digital Signal Processing Device, abbreviated as DSPD), programmable logic devices (Programmable Logic Device, abbreviated as PLD), field programmable gate arrays (Field Programmable Gate Array, abbreviated as FPGA), controllers, microcontrollers, microprocessors, or other electronic components for performing the circuit board patch pad intensity detection method as set forth in the above embodiments.
Communication bus 305 may include a pathway to transfer information between the aforementioned components. The communication bus 305 may be a PCI (Peripheral Component Interconnect, peripheral component interconnect standard) bus or an EISA (Extended Industry Standard Architecture ) bus, or the like. The communication bus 305 may be divided into an address bus, a data bus, a control bus, and the like.
The electronic device 300 may include, but is not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), car terminals (e.g., car navigation terminals), and the like, and fixed terminals such as digital TVs, desktop computers, and the like, and may also be a server, and the like.
The application also provides a computer readable storage medium, and the computer readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for detecting the intensity of the welding spot of the circuit board patch are realized.
The computer readable storage medium may include: a U-disk, a removable hard disk, a read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
The foregoing description is only of the preferred embodiments of the present application and is presented as a description of the principles of the technology being utilized. It will be appreciated by persons skilled in the art that the scope of the application referred to in this application is not limited to the specific combinations of features described above, but it is intended to cover other embodiments in which any combination of features described above or their equivalents is possible without departing from the spirit of the application. Such as the above-mentioned features and the technical features having similar functions (but not limited to) applied for in this application are replaced with each other.

Claims (8)

1. The method for detecting the strength of the welding spot of the patch of the circuit board is characterized by comprising the following steps of:
acquiring first image information, wherein the first image information comprises a circuit board image to be tested;
performing image recognition on the image of the circuit board to be tested to obtain attribute information of each component on the circuit board to be tested, wherein the attribute information comprises component images, first test times and preset test times;
Determining the components to be tested according to the first image information and the first test times of the components, wherein the first test times are times of testing each component;
testing the components to be tested to obtain a first test result, wherein the first test result comprises a standard result and a limit result of the components to be tested;
updating the first test times according to the first test result;
judging whether the first test times reach the preset test times or not, and if not, turning to the step of acquiring the first image information;
if yes, determining a second test result according to the first test results, wherein the second test result comprises an intensity test result of each welding point of the component to be tested on the circuit board to be tested;
before determining the component to be tested according to the first image information and the first test times of each component, the method further comprises:
judging whether an abnormality exists according to the circuit board image to be detected, and obtaining a circuit board judging result;
if the circuit board judging result is that the image on the surface of the circuit board to be tested is not abnormal, determining a testing strategy according to the image information of the components to be tested and the first testing times of the components;
If the image on the surface of the circuit board to be tested is abnormal, determining an abnormal type according to the judging result of the circuit board, wherein the abnormal type comprises structural abnormality and non-structural abnormality;
if the abnormal type is the unstructured abnormal, continuously determining the components to be tested according to the first image information and the first test times of the components;
and testing the component to be tested to obtain a first test result, wherein the first test result comprises a standard result and a limit result of the component to be tested, and the first test result comprises:
obtaining a stress curve of the component to be tested;
determining a limit result according to the stress curve, wherein the limit result comprises the limit stress of the component to be tested;
judging whether the limit result is larger than a preset standard stress value, if so, determining that the to-be-tested component meets a preset standard;
if the limit result is not greater than the preset standard stress value, the standard result is that the component to be tested does not meet the preset standard;
determining the qualification rate of each component according to the standard result of each component, judging whether the qualification rate of each component is greater than a preset qualification rate, and if the qualification rate of all components to be tested is greater than the preset qualification rate, determining that the strength of the patch welding spot of the circuit board is qualified as a second test result; if the qualification rate of the components is not more than the preset qualification rate, the strength of the welding spots of the patch of the circuit board is unqualified, and the types of the components with the qualification rate not more than the preset qualification rate are displayed.
2. The method of claim 1, wherein prior to testing the component under test to obtain a first test result, the method further comprises:
judging whether the welding spot of the component to be tested is abnormal or not according to the component image;
if the welding spot of the component to be tested is abnormal, the first test result is obtained, and the first test result also comprises abnormal welding spots;
and if the welding spot of the component to be tested is not abnormal, continuing to test the component to be tested to obtain a first test result.
3. The method of claim 1, wherein determining the component under test based on the first image information and the first number of tests of each component comprises:
according to the first image information, grading the components to be tested to obtain a processing grade, wherein the processing grade comprises a primary component and a secondary component;
determining a first component according to the first test times, wherein the first component is the primary component with the minimum first test times;
judging whether the first test times of the first component reach preset test times or not;
And if the first test times of the first component do not reach the preset test times, taking the first component as the component to be tested.
4. The method of claim 1, wherein the testing the component to be tested to obtain a first test result comprises:
fixing the circuit board to be tested based on the position of the component to be tested;
acquiring second image information and third image information, wherein the second image information is acquired over against a patch surface of the circuit board, and the third image information is acquired over against any one of two sides of the circuit board;
determining the relative position of the push head and the component to be tested according to the second image information and the third image information;
judging whether the relative position is abnormal or not;
if the relative position is abnormal, the method is switched to fixing the circuit board to be tested based on the position of the component to be tested;
and if the relative position is not abnormal, the test is carried out on the component to be tested, and the first test result is obtained.
5. The method of claim 1, wherein the testing the component to be tested to obtain a first test result comprises:
Acquiring video data, wherein the video data is right opposite to any one of two sides of a circuit board for acquisition;
judging whether the offset distance of the circuit board endpoint is greater than a preset offset threshold according to the video data;
if the offset distance of the circuit board endpoint is not greater than a preset offset threshold value, continuing to obtain a first test result;
if the offset distance of the circuit board endpoint is greater than a preset offset threshold, the strength of the circuit board is abnormal.
6. A circuit board paster solder joint intensity detection device, characterized by comprising:
the acquisition module is used for acquiring first image information, wherein the first image information comprises a circuit board image to be detected;
the identification module is used for carrying out image identification on the image of the circuit board to be tested to obtain attribute information of each component on the circuit board to be tested, wherein the attribute information comprises component images, first test times and preset test times;
the determining module is used for determining the components to be tested according to the first image information and the first test times of the components, wherein the first test times are times of testing each component;
the testing module is used for testing the components to be tested to obtain a first testing result, wherein the first testing result comprises a standard result and a limit result of the components to be tested;
The updating module is used for updating the first test times according to the first test result;
the judging module is used for judging whether the first test times reach the preset test times or not, if so, executing the result determining module, and if not, executing the acquiring module;
the result determining module is used for determining a second test result according to the plurality of first test results, wherein the second test result comprises an intensity test result of each welding point of the component to be tested on the circuit board to be tested;
the determining module is further specifically configured to determine whether an abnormality exists according to the image of the circuit board to be tested before determining the component to be tested according to the first image information and the first test times of each component, so as to obtain a circuit board determination result;
if the circuit board judging result is that the image on the surface of the circuit board to be tested is not abnormal, determining a testing strategy according to the image information of the components to be tested and the first testing times of the components;
if the image on the surface of the circuit board to be tested is abnormal, determining an abnormal type according to the judging result of the circuit board, wherein the abnormal type comprises structural abnormality and non-structural abnormality;
If the abnormal type is the unstructured abnormal, continuously determining the components to be tested according to the first image information and the first test times of the components;
the test module is further specifically configured to test the component to be tested to obtain a first test result, where the first test result includes a standard result and a limit result of the component to be tested, and the first test result includes:
obtaining a stress curve of the component to be tested;
determining a limit result according to the stress curve, wherein the limit result comprises the limit stress of the component to be tested;
judging whether the limit result is larger than a preset standard stress value, if so, determining that the to-be-tested component meets a preset standard;
if the limit result is not greater than the preset standard stress value, the standard result is that the component to be tested does not meet the preset standard;
determining the qualification rate of each component according to the standard result of each component, judging whether the qualification rate of each component is greater than a preset qualification rate, and if the qualification rate of all components to be tested is greater than the preset qualification rate, determining that the strength of the patch welding spot of the circuit board is qualified as a second test result; if the qualification rate of the components is not more than the preset qualification rate, the strength of the welding spots of the patch of the circuit board is unqualified, and the types of the components with the qualification rate not more than the preset qualification rate are displayed.
7. An electronic device comprising a processor coupled to a memory;
the processor is configured to execute a computer program stored in the memory to cause the electronic device to perform the method of any one of claims 1-5.
8. A computer readable storage medium comprising a computer program or instructions which, when run on a computer, cause the computer to perform the method of any of claims 1-5.
CN202311596739.9A 2023-11-28 2023-11-28 Method, device, equipment and medium for detecting strength of welding spot of surface mount of circuit board Active CN117309603B (en)

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