CN117293835A - Method, device, equipment and storage medium for optimizing power flow of boost converter group - Google Patents
Method, device, equipment and storage medium for optimizing power flow of boost converter group Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/04—Circuit arrangements for ac mains or ac distribution networks for connecting networks of the same frequency but supplied from different sources
- H02J3/06—Controlling transfer of power between connected networks; Controlling sharing of load between connected networks
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/28—Arrangements for balancing of the load in a network by storage of energy
- H02J3/32—Arrangements for balancing of the load in a network by storage of energy using batteries with converting means
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
- H02J3/381—Dispersed generators
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2300/00—Systems for supplying or distributing electric power characterised by decentralized, dispersed, or local generation
- H02J2300/20—The dispersed energy generation being of renewable origin
- H02J2300/22—The renewable source being solar energy
- H02J2300/24—The renewable source being solar energy of photovoltaic origin
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Abstract
The disclosure provides a power flow optimization method, a device, equipment and a storage medium for a boost converter group, which relate to the technical field of converter control and power flow optimization and comprise the following steps: acquiring the working duty ratio and the corresponding equivalent defined internal resistance of each boost converter; calculating the equivalent consumption micro-increment rate corresponding to each boost converter according to the input current, the working duty ratio, the bus output voltage and the equivalent defined internal resistance corresponding to each boost converter; controlling the equivalent consumption micro-increment rates corresponding to the boost converters to be the same so as to calculate the distribution weight corresponding to each input current; and carrying out power flow optimization control on the boost converter group based on the distribution weight corresponding to each input current. Thus, by optimizing the current distribution of the converter, the overall boost converter group efficiency can be optimized without being affected by parasitic parameters of the line and the converter, as well as the different converter input voltages.
Description
Technical Field
The disclosure relates to the technical field of converter control and power flow optimization, in particular to a power flow optimization method, a power flow optimization device, power flow optimization equipment and a power flow optimization storage medium for a boost converter group.
Background
In recent years, the fields of new energy power generation, energy storage systems, direct current micro-grids, electric automobiles and the like are rapidly developed, and more occasions of grid-connected power distribution are more and more performed in the form of multiple Boost converter groups, for example, multiple groups of light storage systems are led into a direct current bus through the Boost direct current converters, and for example, multiple energy storage elements or batteries are led into the direct current bus through the Boost converters, and the application of the occasions relates to the parallel operation of the Boost converters, so that the problem of power flow optimization is generated.
In the conventional control method, a plurality of Boost converters are operated in parallel, and are generally set to equalize input and output currents of the respective converters. The control method is established under ideal conditions that parasitic parameters of the Boost converters are consistent, the running states are the same, and the lengths of lines connecting the Boost converters are consistent. However, in practical applications, in most cases, parasitic parameters of each converter are different along with line aging, different line lengths and aging of converter elements, and input voltages of Boost converters are also different along with different electric quantities of energy storage, storage batteries and the like, so that a direct current converter set formed by a plurality of Boost converters is not symmetrical in parameters, which results in that a traditional current sharing operation strategy is not an operation strategy with optimal efficiency and most economy.
Disclosure of Invention
The present disclosure aims to solve, at least to some extent, one of the technical problems in the related art.
An embodiment of a first aspect of the present disclosure provides a power flow optimization method for a boost converter group, including:
acquiring the working duty ratio and the corresponding equivalent defined internal resistance of each boost converter;
calculating the equivalent consumption micro-increment rate corresponding to each boost converter according to the input current, the working duty ratio, the bus output voltage and the equivalent defined internal resistance corresponding to each boost converter;
controlling the equivalent consumption micro-increment rates corresponding to the boost converters to be the same so as to calculate the distribution weight corresponding to each input current;
and carrying out power flow optimization control on the boost converter group based on the distribution weight corresponding to each input current.
An embodiment of a second aspect of the present disclosure provides a power flow optimizing apparatus for a boost converter set, including:
the acquisition module is used for acquiring the working duty ratio and the corresponding equivalent defined internal resistance of each boost converter;
the first calculation module is used for calculating the equivalent consumption micro-increment rate corresponding to each boost converter according to the input current, the working duty ratio, the bus output voltage and the equivalent defined internal resistance corresponding to each boost converter;
the second calculation module is used for controlling the equivalent consumption micro-increment rates corresponding to the boost converters to be the same so as to calculate the distribution weight corresponding to each input current;
and the control module is used for carrying out power flow optimization control on the boost converter group based on the distribution weight corresponding to each input current.
An embodiment of a third aspect of the present disclosure provides an electronic device, including: the power flow optimization method for the boost converter set comprises a memory, a processor and a computer program stored on the memory and capable of running on the processor, wherein the processor executes the program to realize the power flow optimization method for the boost converter set.
An embodiment of a fourth aspect of the present disclosure proposes a non-transitory computer readable storage medium storing a computer program which, when executed by a processor, implements a power flow optimization method of a boost converter set as proposed by an embodiment of the first aspect of the present disclosure.
The power flow optimization method, the power flow optimization device, the power flow optimization equipment and the storage medium for the boost converter group have the following beneficial effects:
in the embodiment of the disclosure, the device firstly acquires a working duty ratio and corresponding equivalent defined internal resistance of each boost converter, then calculates an equivalent consumption micro-increment rate corresponding to each boost converter according to an input current corresponding to each boost converter, the working duty ratio, a bus output voltage and the equivalent defined internal resistance, then controls the equivalent consumption micro-increment rate corresponding to each boost converter to be the same so as to calculate an allocation weight corresponding to each input current, and then performs power flow optimization control on a boost converter group based on the allocation weight corresponding to each input current. Thus, by optimizing the current distribution of the converter, the overall boost converter group efficiency can be optimized without being affected by parasitic parameters of the line and the converter, as well as the different converter input voltages.
Additional aspects and advantages of the disclosure will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the disclosure.
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The foregoing and/or additional aspects and advantages of the present disclosure will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:
fig. 1 is a schematic flow chart of a power flow optimization method of a boost converter set according to an embodiment of the disclosure;
fig. 2 is a schematic diagram of an application scenario of a power flow optimization method of a boost converter set according to an embodiment of the disclosure;
FIG. 3 is a schematic diagram of an equivalent model of two boost converters according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of an input/output power curve according to an embodiment of the disclosure;
FIG. 5 is a schematic diagram of an equivalent circuit model of a boost converter provided by an embodiment of the present disclosure;
FIG. 6 is a schematic diagram illustrating the variation of the input/output power curve of the same boost converter with the duty cycle under different duty cycle operating conditions provided by the embodiments of the present disclosure;
fig. 7 is a schematic flow chart of a power flow optimization method of a boost converter set according to an embodiment of the disclosure;
FIG. 8 is a schematic diagram of a multiphase boost converter set flow optimization control strategy provided by an embodiment of the present disclosure;
FIG. 9 is a diagram of the operating state and efficiency of a current sharing control converter set without adopting a power flow optimization control strategy;
FIG. 10 is a diagram of the operating state and efficiency of a current sharing control converter set employing a power flow optimization control strategy;
fig. 11 is a block diagram of a power flow optimizing apparatus of a boost converter set according to an embodiment of the present disclosure;
FIG. 12 illustrates a block diagram of an exemplary computer device suitable for use in implementing embodiments of the present disclosure.
Detailed Description
Embodiments of the present disclosure are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and intended for the purpose of explaining the present disclosure and are not to be construed as limiting the present disclosure.
The flow optimization method, apparatus, computer device, and storage medium of the boost converter group of the embodiments of the present disclosure are described below with reference to the accompanying drawings.
It should be noted that, the execution body of the power flow optimization method of the boost converter group in the embodiment of the disclosure is a power flow optimization device of the boost converter group, and the device may be implemented by software and/or hardware, and the device may be configured in any electronic device. In the context of the present disclosure, the flow optimization method of the boost converter group set forth in the embodiments of the present disclosure will be described below with "flow optimization apparatus of the boost converter group" as an execution subject, and is not limited thereto.
At the power system level, by considering the line loss caused by the transmission line parameters, many intensive researches are carried out to realize the optimal economic dispatch at the power system side, however, at the system end, the grid connection and distribution of various converters are often considered as load nodes, so that the deeper characterization research on the node converters is often lacking from the system level, and meanwhile, the economic dispatch optimization method for the converter groups is also lacking.
In summary, how to determine the optimal operation condition of the Boost converter set and how to implement the optimal power flow and control of the converter set is a problem to be solved in parallel operation of the current converters.
Fig. 1 is a flow chart of a power flow optimizing method of a boost converter set according to an embodiment of the disclosure.
As shown in fig. 1, the power flow optimization method of the boost converter group may include the steps of:
step 101, obtaining the working duty ratio and the corresponding equivalent defined internal resistance of each boost converter.
Specifically, the duty cycle of each boost converter may be obtained first, and then the equivalent defined internal resistance corresponding to each boost converter is calculated according to the duty cycle, the inductance equivalent direct current resistance, the on-resistance of the switching device, the capacitance equivalent series resistance of each boost converter, and the internal resistance of the cable connected to each boost converter.
Specifically, the duty cycle of the boost converter is first determined by the input-output current. For the ith converter in the Boost converter group, the relationship between the input and output current and the Boost converter duty cycle is:
I ii ＝I oi /(1-d i )
wherein I is ii 、I oi 、d i Is the input current, output current and duty cycle of the ith boost converter.
As shown in FIG. 2, an application of the present invention is that the optical storage system is assembled into the DC bus through the Boost converter, and a schematic diagram of the application is shown in FIG. 2.
For example, two Boost converters can be used to transfer the energy of the optical storage system into the dc bus under different line and converter parameters and different operation states, and the equivalent model is shown in fig. 3. Wherein V is o For bus-side voltage, voltage support is provided by both converters Boost1 and Boost2 together, V i1 And V i2 The input voltages of the two converters are respectively, rs1 and rs2 are respectively cable resistance values for connecting the Boost1 converter and the Boost2 converter, the cable resistance values also change along with the distance between the optical storage and the direct current bus, the input sides of the two converters are wide-range voltage input, and the output sides reach constant bus voltage through closed loop control.
It should be noted that, the equivalent circuit model of the Boost converter with parasitic parameters is shown in fig. 4. Wherein r is s For the internal resistance of the cable connecting the converter r L Equivalent direct current resistance for converter inductance, r DS R is the on-resistance of the switching device of the converter C The equivalent series resistance of the converter capacitor is represented by R, which is the equivalent resistance of the system side. By writing a state space equation to the equivalent circuit model column shown in fig. 3, the relationship between each input and output voltage and each current can be obtained, and then the efficiency expression of the converter is obtained as follows:
wherein M is V And M I The voltage gain and the current gain of the converter, respectively. By rewriting the efficiency expression, the relationship between input and output power can be obtained as follows:
for example, when the cable internal resistance r s 0.5 omega, inductance equivalent direct current resistance r L 0.05Ω, on-resistance r of switching device DS 0.27 omega, capacitance equivalent series resistance r C When the output voltage is 24V and the output power is increased from 10W to 1kW, the input and output power curves are shown in fig. 5, and the input and output power curves are concave functions with gradually increased slopes, which are similar to the coal consumption curves of the thermal power plant in power system optimization.
It should be noted that, in practical application, various internal resistances are not easy to measure, and as the running time increases, the running temperature changes, and these internal resistances also have a possibility of changing, so that the input/output power characteristics of the converter change with different internal resistance parameters, different input voltages and different running states, as shown in fig. 6. The graph shows that the input-output power curve of the same Boost converter can change along with the change of the working duty ratio under the operation state of different duty ratios, and different internal resistance parameters and different input voltages can also cause corresponding changes.
To further solve the above problem, a calculation formula of the equivalent internal resistance Σr is defined as:
Σr＝r s +r L +r DS +(1-d)r C
step 102, calculating an equivalent consumption micro-increment rate corresponding to each boost converter according to the input current, the duty cycle, the bus output voltage and the equivalent defined internal resistance corresponding to each boost converter.
It should be noted that, when the converter operates at a lower output power, the input power increment required to increase a portion of the output power is smaller than the input power increment required to operate at a higher output power. The expression defining the equivalent consumption micro-increment rate lambda of the converter is as follows, based on the economic dispatch rule of the equivalent consumption micro-increment rate of the analog thermal power plant:
that is to say,
wherein lambda is i For the equivalent consumption micro-increment rate corresponding to the boost converter i, Σr i Defining internal resistance, d, for equivalent corresponding to boost converter i i For the corresponding duty cycle of boost converter i, V o For bus output voltage, I ii Is the input current for boost converter i.
And step 103, controlling the equivalent consumption micro-increment rates corresponding to the boost converters to be the same, so as to calculate the distribution weight corresponding to each input current.
Further, after the equivalent consumption micro-increment rate of each boost converter is sequentially calculated, the input current distribution weight is calculated by making the equivalent consumption micro-increment rate of each converter equal, that is, by satisfying the following formula:
λ 1 ＝λ 2 ＝…＝λ n
obtaining an optimized input current distribution ratio:
I i1 :I i2 :…:I in ＝K 1 :K 2 :…:K n
wherein Iii is the input current control amount of the ith converter, ki is the input current assignment weight of the ith converter, i=1, 2,3 … …, n, λ i The equivalent consumption corresponding to the boost converter i is increased slightly.
And 104, carrying out power flow optimization control on the boost converter group based on the distribution weight corresponding to each input current.
After the calculation of the input current distribution ratio of each converter is completed, the input current distribution weight is introduced into a closed-loop control strategy of the Boost converter group, and the input current control proportion of each Boost converter is redistributed to realize power flow optimization control.
In the embodiment of the disclosure, the device firstly acquires a working duty ratio and corresponding equivalent defined internal resistance of each boost converter, then calculates an equivalent consumption micro-increment rate corresponding to each boost converter according to an input current corresponding to each boost converter, the working duty ratio, a bus output voltage and the equivalent defined internal resistance, then controls the equivalent consumption micro-increment rate corresponding to each boost converter to be the same so as to calculate an allocation weight corresponding to each input current, and then performs power flow optimization control on a boost converter group based on the allocation weight corresponding to each input current. Therefore, the current distribution of the converter is optimized, the efficiency of the whole boost converter can be optimized, the influence of parasitic parameters of a circuit and the converter and the influence of different input voltages of the converter are avoided, the total efficiency of the boost converter can be further improved, the power flow operation of the converter is more economical, and the loss is further reduced.
Fig. 7 is a flow chart of a power flow optimizing method of a boost converter set according to an embodiment of the disclosure.
As shown in fig. 7, the power flow optimization method of the boost converter group may include the steps of:
step 201, obtaining an input current, an output current and an input voltage of each boost converter.
Step 202, calculating the corresponding working duty ratio of each boost converter according to the input current and the output current of each boost converter.
The relationship between the input current and the output current of the ith converter in the boost converter group and the converter duty cycle is as follows:
I ii ＝I oi /(1-d i )
wherein I is ii 、I oi 、d i Is the input current, output current and duty cycle of the ith boost converter.
And step 203, calculating equivalent defined internal resistance corresponding to each boost converter according to the input current, the output current and the input voltage of each boost converter, the working duty ratio and the bus output voltage.
It should be noted that, the voltage gain formula can be deduced through the state space equation, and then the equivalent internal resistance calculation expression can be deduced as follows:
wherein V is o For bus output voltage, I o To output current, V i For the input voltage, d is the duty cycle, Σr is the equivalent defined internal resistance.
And 204, calculating the equivalent consumption micro-increment rate corresponding to each boost converter according to the input current corresponding to each boost converter, the working duty ratio, the bus output voltage and the equivalent defined internal resistance.
And step 205, controlling the equivalent consumption micro-increment rates corresponding to the boost converters to be the same, so as to calculate the distribution weight corresponding to each input current.
It should be noted that, the specific implementation manner of the steps 204-205 may refer to the above embodiments, and will not be described herein.
Step 206, comparing the bus output voltage with a preset voltage value to determine a first difference value.
The first difference may be obtained by comparing the dc bus voltage (bus output voltage) output from the acquisition converter group with a bus voltage given value (preset voltage value).
In step 207, the first difference is input to the first PI regulator to obtain a current reference value.
It should be noted that the first difference value may be outputted through the first PI regulator as a current reference value, that is, a current reference value.
Step 208, multiplying the current reference value by an assigned weight corresponding to each boost converter to determine a current closed-loop control reference value corresponding to each boost converter.
The current reference value may be multiplied by the assigned weight corresponding to each boost converter to obtain the input current closed-loop control reference value of each boost converter.
And step 209, carrying out power flow optimization control on the boost converter group based on the current closed-loop control reference value corresponding to each boost converter.
Alternatively, a second difference value may be determined based on a current closed-loop control reference value corresponding to each boost converter, an actual operation reference value corresponding to each boost converter, and then each second difference value is input to a second PI regulator corresponding to each boost converter to determine a control duty cycle corresponding to each boost converter, and then an input current corresponding to each boost converter is determined based on the control duty cycle corresponding to each boost converter.
It should be noted that, the current closed-loop control reference value corresponding to each Boost converter may be compared with the actual operation reference value of the converter, and the corresponding control duty ratio of each converter is output through the second PI regulator, so as to implement the power flow optimization control of the whole Boost converter group.
As shown in fig. 8, fig. 8 is a diagram of a variator dual closed-loop control proposed in an embodiment of the present disclosure.
Wherein v is the bus output voltage, i.e. the DC bus voltage output by the converter group, v ref Is a preset voltage value G PIv (s) is a first PI regulator, i ref For the current reference value, K 1 ,K 2 ,…,K n Weights are allocated to the boost converters, and iref1, iref2 and irefn are current closed-loop control reference values corresponding to the 1 st boost converter, the 2 nd boost converter and the nth boost converter respectively. GPIN(s) isAnd the second PI regulator corresponding to the nth boost converter is provided, in is the input current corresponding to the nth boost converter, and dn is the control duty ratio corresponding to the nth boost converter.
As an exemplary illustration, the optimization effect of the converter under different line parameters and different working states can be verified through simulation by connecting two-phase Boost groups in parallel. In the parallel simulation of the two-phase Boost converter of the preferred embodiment, the internal resistance of a cable of the Boost1 converter is 0.5 omega, the equivalent internal resistance of an inductance direct current is 0.05 omega, the equivalent series resistance of a capacitance is 0.05 omega, the on resistance of a switching device is 0.27 omega, the input voltage is 12V, and the voltage of an output bus is 48V; the internal resistance of the cable of the Boost2 converter is 0.1 omega, the equivalent internal resistance of the inductor direct current is 0.05 omega, the equivalent series resistance of the capacitor is 0.05 omega, the on resistance of the switching device is 0.27 omega, the input voltage is 36V, and the output bus voltage is 48V. When the converter adopts the traditional current sharing control method, the simulation result is shown in figure 9, the total efficiency of the converter group is 96.8%, and the two converters are in a current sharing state; when the converter adopts the traditional current sharing control method, the simulation result is shown in fig. 10, the total efficiency of the converter group is 97.8%, and compared with the traditional current sharing control method, the total efficiency is improved by about 1%, and after the optimization algorithm is adopted, the input current of the Boost2 converter is about 2 times of the input current of the Boost2 converter.
Theoretical analysis and simulation experiments of preferred embodiment examples show that compared with the traditional multiphase converter current sharing control scheme, the Boost converter set current optimization strategy provided by the invention can further improve the total efficiency of the Boost converter set, so that the converter set current operation is more economical, and the loss is further reduced.
In the embodiment of the disclosure, firstly, an input current, an output current and an input voltage of each boost converter are obtained, according to the input current and the output current of each boost converter, a corresponding work duty ratio of each boost converter is calculated, according to the input current, the output current and the input voltage of each boost converter, the work duty ratio and the bus output voltage of each boost converter, an equivalent defined internal resistance of each boost converter is calculated, according to the input current, the work duty ratio, the bus output voltage and the equivalent defined internal resistance of each boost converter, an equivalent consumption micro-increment rate of each boost converter is calculated, then the equivalent consumption micro-increment rate of each boost converter is controlled to be the same, so as to calculate an allocation weight of each input current, then the bus output voltage is compared with a preset voltage value, so as to determine a first difference value, then the first difference value is input to a first PI regulator, so as to obtain a current reference value, the current is multiplied by the corresponding boost converter, the corresponding weight of each boost converter is calculated, the corresponding current micro-increment rate is controlled to be equal to each equivalent consumption micro-increment rate of each boost converter, and the optimal current is controlled based on a closed loop, and the optimal current is controlled to achieve a closed loop condition.
In order to achieve the above embodiment, the present disclosure further provides a power flow optimizing device of a boost converter group.
Fig. 11 is a block diagram of a power flow optimizing apparatus of a boost converter set according to a third embodiment of the present disclosure.
As shown in fig. 11, the power flow optimizing apparatus 300 of the boost converter group may include:
an obtaining module 310, configured to obtain a duty cycle of each boost converter and a corresponding equivalent defined internal resistance;
a first calculation module 320, configured to calculate an equivalent consumption micro-increment rate corresponding to each boost converter according to an input current corresponding to each boost converter, the duty cycle, a bus output voltage, and the equivalent defined internal resistance;
a second calculation module 330, configured to control the equivalent consumption micro-increase rates corresponding to the boost converters to be the same, so as to calculate an allocation weight corresponding to each input current;
and the control module 340 is configured to perform power flow optimization control on the boost converter set based on the allocation weight corresponding to each input current.
Optionally, the acquiring module is specifically configured to:
acquiring the working duty ratio of each boost converter;
and calculating the equivalent defined internal resistance corresponding to each boost converter according to the working duty ratio, the inductance equivalent direct current resistance, the on-resistance of the switching device and the capacitance equivalent series resistance of each boost converter and the internal resistance of a cable connected with each boost converter.
Optionally, the control module includes:
the determining unit is used for comparing the bus output voltage with a preset voltage value to determine a first difference value;
the acquisition unit is used for inputting the first difference value into the first PI regulator to obtain a current reference value;
an allocation unit, configured to multiply the current reference value by an allocation weight corresponding to each boost converter, so as to determine a current closed-loop control reference value corresponding to each boost converter;
and the control unit is used for carrying out power flow optimization control on the boost converter groups based on the current closed-loop control reference value corresponding to each boost converter.
Optionally, the control unit is specifically configured to:
determining a second difference value based on current closed-loop control reference values corresponding to each of the boost converters and actual operation reference values corresponding to each of the boost converters;
inputting each second difference value to a second PI regulator corresponding to each boost converter to determine a control duty cycle corresponding to each boost converter;
and determining the corresponding input current of each boost converter based on the corresponding control duty cycle of each boost converter.
Optionally, the acquiring module is specifically configured to:
obtaining input current, output current and input voltage of each boost converter;
calculating the corresponding work duty ratio of each boost converter according to the input current and the output current of each boost converter;
and calculating the equivalent defined internal resistance corresponding to each boost converter according to the input current, the output current and the input voltage of each boost converter, the working duty ratio and the bus output voltage.
In the embodiment of the disclosure, the device firstly acquires a working duty ratio and corresponding equivalent defined internal resistance of each boost converter, then calculates an equivalent consumption micro-increment rate corresponding to each boost converter according to an input current corresponding to each boost converter, the working duty ratio, a bus output voltage and the equivalent defined internal resistance, then controls the equivalent consumption micro-increment rate corresponding to each boost converter to be the same so as to calculate an allocation weight corresponding to each input current, and then performs power flow optimization control on a boost converter group based on the allocation weight corresponding to each input current. Therefore, the current distribution of the converter is optimized, the efficiency of the whole boost converter can be optimized, the influence of parasitic parameters of a circuit and the converter and the influence of different input voltages of the converter are avoided, the total efficiency of the boost converter can be further improved, the power flow operation of the converter is more economical, and the loss is further reduced.
To achieve the above embodiments, the present disclosure further proposes a computer device including: the power flow optimization method for the boost converter set according to the foregoing embodiments of the present disclosure is implemented when the processor executes the program.
To achieve the above-mentioned embodiments, the present disclosure also proposes a non-transitory computer-readable storage medium storing a computer program which, when executed by a processor, implements a power flow optimization method of a boost converter set as proposed in the foregoing embodiments of the present disclosure.
To achieve the above embodiments, the present disclosure also proposes a computer program product which, when executed by an instruction processor in the computer program product, performs a power flow optimization method of a boost converter group as proposed by the previous embodiments of the present disclosure.
FIG. 12 illustrates a block diagram of an exemplary computer device suitable for use in implementing embodiments of the present disclosure. The computer device 12 shown in fig. 12 is merely an example and should not be construed as limiting the functionality and scope of use of the disclosed embodiments.
As shown in FIG. 12, the computer device 12 is in the form of a general purpose computing device. Components of computer device 12 may include, but are not limited to: one or more processors or processing units 16, a system memory 28, a bus 18 that connects the various system components, including the system memory 28 and the processing units 16.
Bus 18 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, and a local bus using any of a variety of bus architectures. By way of example, and not limitation, such architectures include industry Standard architecture (Industry Standard Architecture; hereinafter ISA) bus, micro channel architecture (Micro Channel Architecture; hereinafter MAC) bus, enhanced ISA bus, video electronics standards Association (Video Electronics Standards Association; hereinafter VESA) local bus, and peripheral component interconnect (Peripheral Component Interconnection; hereinafter PCI) bus.
Computer device 12 typically includes a variety of computer system readable media. Such media can be any available media that is accessible by computer device 12 and includes both volatile and nonvolatile media, removable and non-removable media.
Memory 28 may include computer system readable media in the form of volatile memory, such as random access memory (Random Access Memory; hereinafter: RAM) 30 and/or cache memory 32. The computer device 12 may further include other removable/non-removable, volatile/nonvolatile computer system storage media. By way of example only, storage system 34 may be used to read from or write to non-removable, nonvolatile magnetic media (not shown in FIG. 12, commonly referred to as a "hard disk drive"). Although not shown in fig. 12, a magnetic disk drive for reading from and writing to a removable nonvolatile magnetic disk (e.g., a "floppy disk"), and an optical disk drive for reading from or writing to a removable nonvolatile optical disk (e.g., a compact disk read only memory (Compact Disc Read Only Memory; hereinafter CD-ROM), digital versatile read only optical disk (Digital Video Disc Read Only Memory; hereinafter DVD-ROM), or other optical media) may be provided. In such cases, each drive may be coupled to bus 18 through one or more data medium interfaces. Memory 28 may include at least one program product having a set (e.g., at least one) of program modules configured to carry out the functions of the various embodiments of the disclosure.
A program/utility 40 having a set (at least one) of program modules 42 may be stored in, for example, memory 28, such program modules 42 including, but not limited to, an operating system, one or more application programs, other program modules, and program data, each or some combination of which may include an implementation of a network environment. Program modules 42 generally perform the functions and/or methods in the embodiments described in this disclosure.
The computer device 12 may also communicate with one or more external devices 14 (e.g., keyboard, pointing device, display 24, etc.), one or more devices that enable a user to interact with the computer device 12, and/or any devices (e.g., network card, modem, etc.) that enable the computer device 12 to communicate with one or more other computing devices. Such communication may occur through an input/output (I/O) interface 22. Moreover, the computer device 12 may also communicate with one or more networks such as a local area network (Local Area Network; hereinafter LAN), a wide area network (Wide Area Network; hereinafter WAN) and/or a public network such as the Internet via the network adapter 20. As shown, network adapter 20 communicates with other modules of computer device 12 via bus 18. It should be appreciated that although not shown, other hardware and/or software modules may be used in connection with computer device 12, including, but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, data backup storage systems, and the like.
The processing unit 16 executes various functional applications and data processing by running programs stored in the system memory 28, for example, implementing the methods mentioned in the foregoing embodiments.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present disclosure. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present disclosure, the meaning of "a plurality" is at least two, such as two, three, etc., unless explicitly specified otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and additional implementations are included within the scope of the preferred embodiment of the present disclosure in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present disclosure.
Logic and/or steps represented in the flowcharts or otherwise described herein, e.g., a ordered listing of executable instructions for implementing logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It should be understood that portions of the present disclosure may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. As with the other embodiments, if implemented in hardware, may be implemented using any one or combination of the following techniques, as is well known in the art: discrete logic circuits having logic gates for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
Those of ordinary skill in the art will appreciate that all or a portion of the steps carried out in the method of the above-described embodiments may be implemented by a program to instruct related hardware, where the program may be stored in a computer readable storage medium, and where the program, when executed, includes one or a combination of the steps of the method embodiments.
Furthermore, each functional unit in the embodiments of the present disclosure may be integrated in one processing module, or each unit may exist alone physically, or two or more units may be integrated in one module. The integrated modules may be implemented in hardware or in software functional modules. The integrated modules may also be stored in a computer readable storage medium if implemented in the form of software functional modules and sold or used as a stand-alone product.
The above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, or the like. Although embodiments of the present disclosure have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the present disclosure, and that variations, modifications, alternatives, and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the present disclosure.
Claims (10)
1. A method of optimizing power flow for a boost converter set, comprising:
acquiring the working duty ratio and the corresponding equivalent defined internal resistance of each boost converter;
calculating the equivalent consumption micro-increment rate corresponding to each boost converter according to the input current, the working duty ratio, the bus output voltage and the equivalent defined internal resistance corresponding to each boost converter;
controlling the equivalent consumption micro-increment rates corresponding to the boost converters to be the same so as to calculate the distribution weight corresponding to each input current;
and carrying out power flow optimization control on the boost converter group based on the distribution weight corresponding to each input current.
2. The method of claim 1, wherein said obtaining the duty cycle and corresponding equivalent defined internal resistance of each boost converter comprises:
acquiring the working duty ratio of each boost converter;
and calculating the equivalent defined internal resistance corresponding to each boost converter according to the working duty ratio, the inductance equivalent direct current resistance, the on-resistance of the switching device and the capacitance equivalent series resistance of each boost converter and the internal resistance of a cable connected with each boost converter.
3. The method according to claim 1, wherein the power flow optimization control of the boost converter group based on the assigned weight corresponding to each of the input currents includes:
comparing the bus output voltage with a preset voltage value to determine a first difference value;
inputting the first difference value to a first PI regulator to obtain a current reference value;
multiplying the current reference value by an allocation weight corresponding to each boost converter to determine a current closed-loop control reference value corresponding to each boost converter;
and carrying out power flow optimization control on the boost converter group based on the current closed-loop control reference value corresponding to each boost converter.
4. A method according to claim 3, wherein said performing power flow optimization control on the boost converter group based on the current closed-loop control reference value corresponding to each of the boost converters comprises:
determining a second difference value based on current closed-loop control reference values corresponding to each of the boost converters and actual operation reference values corresponding to each of the boost converters;
inputting each second difference value to a second PI regulator corresponding to each boost converter to determine a control duty cycle corresponding to each boost converter;
and determining the corresponding input current of each boost converter based on the corresponding control duty cycle of each boost converter.
5. The method of claim 1, wherein said obtaining the duty cycle and corresponding equivalent defined internal resistance of each boost converter comprises:
obtaining input current, output current and input voltage of each boost converter;
calculating the corresponding work duty ratio of each boost converter according to the input current and the output current of each boost converter;
and calculating the equivalent defined internal resistance corresponding to each boost converter according to the input current, the output current and the input voltage of each boost converter, the working duty ratio and the bus output voltage.
6. A power flow optimizing apparatus for a boost converter set, comprising:
the acquisition module is used for acquiring the working duty ratio and the corresponding equivalent defined internal resistance of each boost converter;
the first calculation module is used for calculating the equivalent consumption micro-increment rate corresponding to each boost converter according to the input current, the working duty ratio, the bus output voltage and the equivalent defined internal resistance corresponding to each boost converter;
the second calculation module is used for controlling the equivalent consumption micro-increment rates corresponding to the boost converters to be the same so as to calculate the distribution weight corresponding to each input current;
and the control module is used for carrying out power flow optimization control on the boost converter group based on the distribution weight corresponding to each input current.
7. The apparatus of claim 6, wherein the obtaining module is specifically configured to:
acquiring the working duty ratio of each boost converter;
and calculating the equivalent defined internal resistance corresponding to each boost converter according to the working duty ratio, the inductance equivalent direct current resistance, the on-resistance of the switching device and the capacitance equivalent series resistance of each boost converter and the internal resistance of a cable connected with each boost converter.
8. The apparatus of claim 6, wherein the control module is configured to:
comparing the bus output voltage with a preset voltage value to determine a first difference value;
inputting the first difference value to a first PI regulator to obtain a current reference value;
multiplying the current reference value by an allocation weight corresponding to each boost converter to determine a current closed-loop control reference value corresponding to each boost converter;
and carrying out power flow optimization control on the boost converter group based on the current closed-loop control reference value corresponding to each boost converter.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing a method of optimizing the power flow of a boost converter bank according to any one of claims 1-5 when the program is executed by the processor.
10. A computer readable storage medium storing a computer program, characterized in that the computer program, when executed by a processor, implements a method for optimizing the power flow of a boost converter set according to any one of claims 1-5.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107508327A (en) * | 2017-10-20 | 2017-12-22 | 云南电网有限责任公司 | The grid-connected Poewr control method in power distribution network autonomous area based on Model Predictive Control |
| CN108233431A (en) * | 2017-12-26 | 2018-06-29 | 中国电力科学研究院有限公司 | A kind of active distribution network distributed optimization dispatching method and system |
| JP2020005396A (en) * | 2018-06-27 | 2020-01-09 | 日産自動車株式会社 | Control method of step-up converter, and control device |
| CN112383057A (en) * | 2020-11-27 | 2021-02-19 | 哈尔滨工程大学 | Power grid flow-based mutual inductance and self-inductance design method for power coupling system |
| CN114123334A (en) * | 2021-11-27 | 2022-03-01 | 广东电网有限责任公司广州供电局 | Control method, system and device of photovoltaic direct-current boost converter and storage medium |
| WO2022246607A1 (en) * | 2021-05-24 | 2022-12-01 | 深圳欣锐科技股份有限公司 | Control method and apparatus for input signal of direct-current converter, and storage medium |
-
2023
- 2023-03-31 CN CN202310343910.9A patent/CN117293835A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107508327A (en) * | 2017-10-20 | 2017-12-22 | 云南电网有限责任公司 | The grid-connected Poewr control method in power distribution network autonomous area based on Model Predictive Control |
| CN108233431A (en) * | 2017-12-26 | 2018-06-29 | 中国电力科学研究院有限公司 | A kind of active distribution network distributed optimization dispatching method and system |
| JP2020005396A (en) * | 2018-06-27 | 2020-01-09 | 日産自動車株式会社 | Control method of step-up converter, and control device |
| CN112383057A (en) * | 2020-11-27 | 2021-02-19 | 哈尔滨工程大学 | Power grid flow-based mutual inductance and self-inductance design method for power coupling system |
| WO2022246607A1 (en) * | 2021-05-24 | 2022-12-01 | 深圳欣锐科技股份有限公司 | Control method and apparatus for input signal of direct-current converter, and storage medium |
| CN114123334A (en) * | 2021-11-27 | 2022-03-01 | 广东电网有限责任公司广州供电局 | Control method, system and device of photovoltaic direct-current boost converter and storage medium |
Non-Patent Citations (3)
| Title |
|---|
| 万黎, 袁荣湘: "最优潮流算法综述", 继电器, no. 11, 1 November 2005 (2005-11-01), pages 83 - 90 * |
| 卓生荣;皇甫宜耿;: "一种光伏用高升压比高效率直流变换器", 电源学报, no. 05, 15 September 2016 (2016-09-15), pages 86 - 92 * |
| 王正风: "论等耗量微增率和等网损微增率与最优潮流的关系", 《电力自动化设备》, vol. 27, no. 04, 10 April 2007 (2007-04-10), pages 39 - 41 * |
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