CN117289055A - Chip testing method, electronic device and storage medium - Google Patents
Chip testing method, electronic device and storage medium Download PDFInfo
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- 230000007849 functional defect Effects 0.000 abstract description 10
- 239000000243 solution Substances 0.000 description 11
- 230000008569 process Effects 0.000 description 9
- 238000004458 analytical method Methods 0.000 description 6
- 230000007547 defect Effects 0.000 description 5
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 239000000446 fuel Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- 230000007613 environmental effect Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 241000976924 Inca Species 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
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- 238000010295 mobile communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000010705 motor oil Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000013618 particulate matter Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/005—Testing of electric installations on transport means
- G01R31/006—Testing of electric installations on transport means on road vehicles, e.g. automobiles or trucks
- G01R31/007—Testing of electric installations on transport means on road vehicles, e.g. automobiles or trucks using microprocessors or computers
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- G01M—TESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES; TESTING OF STRUCTURES OR APPARATUS, NOT OTHERWISE PROVIDED FOR
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
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Abstract
The application provides a chip testing method, electronic equipment and a storage medium, and belongs to the technical field of whole vehicle testing. The method firstly accesses the electronic control unit with the chip into the test table to perform corresponding test so as to test each function of the chip, can verify whether the chip has functional defects, and can find out in time when the chip has the functional defects, thereby avoiding executing subsequent test and saving test time and cost. After the test bench is verified to be qualified, the electronic control unit with the chip is connected to the bench test system to carry out a simulation operation test, and after the simulation operation test is qualified, the electronic control unit with the chip is arranged in a real vehicle to carry out a endurance test, so that problems can be found as early as possible in a step-by-step test mode, and the test time and cost are saved.
Description
Technical Field
The application relates to the technical field of whole vehicle testing, in particular to a chip testing method, electronic equipment and a storage medium.
Background
The existing chip test is a bench test or a real vehicle test, and when partial functional defects exist in the chip, the chip cannot be found in time to directly perform the bench test or the real vehicle test, so that the test time and the cost can be increased.
Disclosure of Invention
The embodiment of the application mainly aims to provide a chip testing method, electronic equipment and a storage medium. The test bench test is carried out before the bench test, so that whether the chip has functional defects can be verified, meanwhile, problems can be found as early as possible in a step-by-step test mode, and the test time and cost are saved.
To achieve the above object, a first aspect of the embodiments of the present application proposes a chip testing method, in which the chip is mounted in an electronic control unit, the method including:
determining a test scheme according to the function to be tested of the chip, and connecting the electronic control unit with the chip to a test bench for corresponding test to obtain functional test data, wherein the test bench comprises a load box and an upper computer, and the load box is connected with the upper computer;
when the test of the test bench is determined to be qualified according to the functional test data, the electronic control unit provided with the chip is connected into a bench test system to perform a simulation operation test, so that test data are obtained;
when the simulation operation test is determined to be qualified according to the test data, loading the electronic control unit with the chip into a real vehicle for endurance test to obtain endurance test data;
And when the endurance test is determined to be qualified according to the endurance test data, determining that the chip meets the replacement condition.
In the embodiment of the application, the electronic control unit provided with the chip is accessed to the test table to perform corresponding test so as to test each function of the chip, so that whether the chip has a functional defect can be verified, and the chip is found out in time when the chip has the functional defect, thus the subsequent test is not required to be executed, and the test time and the cost can be saved. After the test bench is verified to be qualified, the electronic control unit with the chip is connected to the bench test system to carry out a simulation operation test, and after the simulation operation test is qualified, the electronic control unit with the chip is arranged in a real vehicle to carry out a endurance test, so that problems can be found as early as possible in a step-by-step test mode, and the test time and cost are saved.
In one embodiment of the present application, the function to be tested of the chip includes a communication function, and determining the test scheme according to the function to be tested of the chip includes:
determining the function to be detected of the chip as the communication function;
detecting the communication condition of the electronic control unit provided with the chip and a bus in an under-voltage state so as to perform a low-voltage communication test;
Detecting whether the electronic control unit provided with the chip maintains communication with the bus under high-voltage power supply or not so as to perform high-voltage communication test;
detecting whether the dominant output voltage and the recessive output voltage meet the standard values or not so as to perform a dominant-recessive output voltage test;
and sending the message and detecting whether the message data is complete or not so as to perform the message integrity test.
In the embodiment of the application, the chip needs to be tested in a targeted manner based on different functional test requirements of the chip. Namely, corresponding test schemes are determined according to the functions to be tested of the chip. Specifically, when the communication function of the chip needs to be tested, a low-voltage communication test, a high-voltage communication test, a implicit output voltage test and a message integrity test need to be formulated correspondingly, so that whether the communication function of the chip has defects or does not meet the function requirement can be judged effectively.
In one embodiment of the present application, the function to be tested of the chip includes a driving function, and determining the test scheme according to the function to be tested of the chip includes:
determining the function to be tested of the chip as the driving function;
the electronic control unit provided with the chip is electrified, and the time of the action of the voltage of each driving pin and the change condition of the voltage are measured to carry out electrification test;
The duty cycle, period and high level voltage of the pwm output pin are measured to perform pwm testing.
In the embodiment of the application, the chip needs to be tested in a targeted manner based on different functional test requirements of the chip. Namely, corresponding test schemes are determined according to the functions to be tested of the chip. Specifically, when the driving function of the chip needs to be tested, a power-on test and a pulse width modulation test need to be formulated correspondingly, so that whether the driving function of the chip has defects or does not meet the functional requirements can be judged effectively.
In one embodiment of the present application, the function to be tested of the chip includes a diagnostic function, and determining the test scheme according to the function to be tested of the chip includes:
determining the function to be detected of the chip as the diagnosis function;
carrying out undervoltage and overvoltage tests on the voltage output pins and the power input pins, and carrying out short-circuit tests, short power tests and open-circuit tests on the driving pins so as to carry out fault injection tests;
and removing the injected faults, and detecting whether each pin can recover normal functions.
In the embodiment of the application, the chip needs to be tested in a targeted manner based on different functional test requirements of the chip. Namely, corresponding test schemes are determined according to the functions to be tested of the chip. Specifically, when the diagnostic function of the chip needs to be tested, it is necessary to correspondingly make a fault injection test and detect whether the injected fault is removed, and whether each pin can recover the normal function can be effectively judged whether the diagnostic function of the chip has defects or does not meet the functional requirements.
In one embodiment of the present application, the accessing the electronic control unit with the chip to the test bench for corresponding testing to obtain functional test data includes:
connecting the electronic control unit provided with the chip with the load box, wherein the load box is used for providing a simulation running environment for the electronic control unit;
running a corresponding test program and setting corresponding test parameters through an upper computer so as to execute a corresponding test scheme;
outputting and executing the functional test data corresponding to the test scheme, wherein the functional test data comprises software functional test data and hardware functional test data.
In this application embodiment, provide a set of functional test mode based on testboard, wherein, the testboard includes load box and host computer, and load box is connected with the host computer. In the test process, the electronic control unit with the chip is connected with the load box, so that the load box can provide a simulated running environment for the electronic control unit, and meanwhile, a corresponding test program is run and corresponding test parameters are set through the upper computer, and a corresponding test scheme can be executed to detect various functions to be tested of the chip. After the test is finished, the upper computer can output functional test data corresponding to each functional test, so that whether each function of the chip meets the functional requirement or whether defects exist can be judged according to the functional test data. The method can be found in time when the chip has functional defects, so that subsequent testing is not required to be executed, and testing time and cost can be saved.
In one embodiment of the present application, after obtaining the functional test data, the method further comprises:
comparing and analyzing the functional test data with the functional data of the original chip to determine whether each function of the chip meets the functional requirement of the original chip;
when part of functions of the chip do not meet the functional requirements of the original chip, judging whether the part of functions of the chip which do not meet the functional requirements of the original chip influence the normal operation of the automobile;
and when all functions of the chip meet the functional requirements of the original chip or part of functions of the chip which do not meet the functional requirements of the original chip do not influence the normal running of the automobile, determining that the test bench is qualified.
In the embodiment of the application, whether each function of the chip meets the functional requirement of the original chip can be determined by comparing and analyzing the functional test data with the functional data of the original chip. When partial functions of the chip do not meet the functional requirements of the original chip, whether the partial functions of the chip do not meet the functional requirements of the original chip affect the normal operation of the automobile can be further judged, and if the partial functions do not affect the normal operation of the automobile, the test of the test bench can be determined to be qualified. Namely, each function of the chip is regarded as qualified in function test as long as the function of the chip does not completely meet the function requirement of the original chip and the normal operation of the automobile is not influenced.
In one embodiment of the present application, the bench test system includes a measurement control system, a test target engine and an auxiliary system, where the measurement control system and the auxiliary system are both connected to the test target engine, and the electronic control unit with the chip is connected to the bench test system to perform a simulation operation test to obtain test data, and the method includes:
accessing the electronic control unit provided with the chip to the test target engine;
the rotation speed and the load of the test target engine are simulated and adjusted through the measurement control system so as to simulate different operation conditions;
collecting engine parameters under different operation conditions through the auxiliary system;
and outputting test data under different operation conditions, wherein the test data does not comprise the engine parameters under different operation conditions.
In the embodiment of the application, after the test bench is qualified, the bench test system is required to further perform a simulation operation test, and the performance and the reliability of the chip in actual use can be tested by simulating various operation conditions of the automobile in the actual running process and acquiring the operation data under different operation conditions.
In one embodiment of the present application, after obtaining the test data, the method further comprises:
comparing and analyzing the test data with standard data to judge whether the engine parameters under different operation conditions are normal or not;
when the engine parameters under different operation conditions are normal, comparing and analyzing the test data with the original chip operation data to judge whether the performance of the chip under different operation conditions is consistent with the original chip;
and when the performance of the chip under different operation conditions is consistent with that of the original chip, determining that the simulation operation test is qualified.
In the embodiment of the application, the test data and the standard data are compared and analyzed to judge whether the engine parameters under different operation conditions are normal or not. And when the engine parameters under different operation conditions are normal, further comparing and analyzing the test data with the operation data of the original chip to judge whether the performance of the chip under different operation conditions is consistent with the original chip. The obviously unqualified chips can be screened out through standard data, so that the analysis efficiency can be improved.
To achieve the above object, a second aspect of the embodiments of the present application proposes an electronic device, which includes a memory and a processor, the memory storing a computer program, the processor implementing the method according to the first aspect when executing the computer program.
To achieve the above object, a third aspect of the embodiments of the present application proposes a computer-readable storage medium storing a computer program which, when executed by a processor, implements the method of the first aspect.
Drawings
FIG. 1 is a flow chart of a chip testing method provided in an embodiment of the present application;
FIG. 2 is a flowchart of steps for determining a test scheme according to a function to be tested of a chip according to an embodiment of the present application;
FIG. 3 is a flowchart of another step of determining a test scheme according to the function to be tested of the chip according to the embodiment of the present application;
FIG. 4 is a flowchart of another step of determining a test scheme according to the function to be tested of the chip according to the embodiment of the present application;
FIG. 5 is a flowchart of steps for accessing an electronic control unit with a chip to a test board for corresponding testing to obtain functional test data according to an embodiment of the present application;
FIG. 6 is a flowchart of steps performed after functional test data is obtained, provided by an embodiment of the present application;
FIG. 7 is a flowchart of steps for accessing an electronic control unit with a chip to a bench test system for performing a simulation operation test to obtain test data according to the embodiment of the present application;
FIG. 8 is a flowchart of steps performed after obtaining test data provided by an embodiment of the present application;
fig. 9 is a schematic hardware structure of an electronic device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
It should be noted that although functional block division is performed in a device diagram and a logic sequence is shown in a flowchart, in some cases, the steps shown or described may be performed in a different order than the block division in the device, or in the flowchart. The terms first, second and the like in the description and in the claims and in the above-described figures, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of the present application only and is not intended to be limiting of the present application.
With the strong support and promotion of national policies to the chip semiconductor industry, more and more domestic enterprises start to put into the research, development and production of chips. The domestic automobile chip market is gradually rich, and the technical level is gradually mature. For cost reduction and support to the domestic chip semiconductor industry, more and more host factories and component parts production factories begin to use domestic chips to replace original foreign chips. The replacement of the chip involves test verification at the component level and the whole vehicle level. First, it is confirmed that the chip satisfies the functional requirements required for the system operation. Second, the performance of the chip and system is verified to meet the criteria. Since chip replacement is rarely performed in the past, a perfect test method is not formed.
The existing test is a bench test or a real vehicle test, however, when the chip has a part of functional defects, the chip cannot be found in time to directly perform the bench test or the real vehicle test, which increases the test time and the cost.
Based on this, the embodiment of the application provides a chip testing method, which can verify whether the chip has a functional defect by testing the test bench before the bench test, and can discover problems as early as possible by a step-by-step test mode, thereby saving testing time and cost.
Referring to fig. 1, fig. 1 is a flowchart of a chip testing method provided in an embodiment of the present application, and the method in fig. 1 may include, but is not limited to, steps S110 to S140.
Step S110, determining a test scheme according to the function to be tested of the chip, and connecting the electronic control unit with the chip to a test bench for corresponding test to obtain functional test data, wherein the test bench comprises a load box and an upper computer, and the load box is connected with the upper computer.
In the embodiment of the application, in order to confirm whether the chip meets the functional requirements required by the system operation, each function of the chip needs to be tested. Specifically, the function to be tested of the chip is determined first, and then a specific test scheme is constructed based on the function to be tested. And simultaneously, the electronic control unit with the chip is connected to the test table for corresponding test, so that functional test data corresponding to various functions can be obtained. The test bench comprises a load box and an upper computer, and the load box is connected with the upper computer. The load box is internally integrated with a virtual load, and can simulate the load condition of an engine and other parts after being connected with an Electronic Control Unit (ECU). Meanwhile, the load box can provide different output voltages, generate Pulse Width Modulation (PWM) signals, generate rotating speed sensor signals, crankshaft phase sensor signals and the like, and can simulate the running state of an engine. The upper computer runs a corresponding test program, such as a program corresponding to calibration software (INCA) engineering. Meanwhile, the upper computer can also display a corresponding test interface, so that corresponding test parameters can be set through the test interface.
Referring to fig. 2, fig. 2 is a flowchart of steps for determining a test scheme according to a function to be tested of a chip according to an embodiment of the present application, including but not limited to steps S210 to S250.
Step S210, determining the function to be tested of the chip as a communication function;
step S220, detecting the communication condition of the electronic control unit with the chip and the bus in the under-voltage state so as to perform a low-voltage communication test;
step S230, detecting whether the electronic control unit with the chip maintains communication with the bus under high-voltage power supply so as to perform high-voltage communication test;
step S240, detecting whether the dominant output voltage and the recessive output voltage both accord with standard values so as to perform a dominant-recessive output voltage test;
step S250, a message is sent and whether the message data is complete is detected so as to perform a message integrity test.
In the embodiment of the application, when the function to be tested of the chip is determined to be a communication function, that is, when the communication function of the chip needs to be tested, a low-voltage communication test, a high-voltage communication test, a implicit output voltage test and a message integrity test need to be performed, so that whether the communication function corresponding to the chip meets the functional requirement of the system can be verified. Thus, the test schemes to be formulated include a low voltage communication test, a high voltage communication test, a explicit implicit output voltage test, and a message integrity test. The low-voltage communication test is to detect the communication condition between the electronic control unit with the chip and the bus under the undervoltage state. Specifically, the power supply voltage of an Electronic Control Unit (ECU) is set to be a rated voltage, and then the power supply voltage is reduced in step length until the bus stops sending messages. And then the power supply voltage is increased in a step length, until the bus restarts to send the message, and the threshold voltage in the process is recorded. The high-voltage communication test is to detect whether an Electronic Control Unit (ECU) maintains communication with a bus under high-voltage power supply. Specifically, the power supply voltage of an Electronic Control Unit (ECU) is set to be a rated voltage, and then the power supply voltage is increased to a fixed value in a step-by-step manner, so as to observe whether the Electronic Control Unit (ECU) communicates normally. And the obvious and implicit output voltage test is to measure whether the dominant output voltage and the implicit output voltage meet the standard values. The message integrity test is to send a frame of message and observe whether the data of each bit of the message is complete.
In the embodiment of the application, the function of the chip to be tested is determined to be the communication function, and then the test scheme capable of verifying the communication function is determined. And executing a corresponding test scheme through the test board, so that functional test data corresponding to the communication functional test can be obtained. And whether the communication function of the chip meets the functional requirement of the system can be judged according to the functional test data.
Referring to fig. 3, fig. 3 is a flowchart illustrating another step of determining a test scheme according to a function to be tested of a chip according to an embodiment of the present application, including but not limited to steps S310 to S330.
Step S310, determining the function to be tested of the chip as a driving function;
step S320, performing power-on operation on the electronic control unit with the chip, and measuring the time and voltage change condition of each driving pin voltage occurrence action to perform power-on test;
in step S330, the duty cycle, period and high level voltage of the pwm output pin are measured to perform the pwm test.
In the embodiment of the application, when the function to be tested of the chip is determined to be the driving function, that is, the driving function of the chip needs to be tested, the power-on test and the pulse width modulation test need to be performed, so that whether the driving function corresponding to the chip meets the functional requirement of the system can be verified. Thus, the test schemes that need to be formulated include power-up tests and pulse width modulation tests. The power-on test is to perform power-on operation on an Electronic Control Unit (ECU) and measure the time and voltage change condition of each driving pin voltage. The pulse width modulation test is to measure the duty ratio, period and high level voltage of a Pulse Width Modulation (PWM) output pin to detect whether the pulse width modulation output pin meets the functional requirement of a system.
In the embodiment of the application, the function of the chip to be tested is determined to be the driving function, and then a test scheme capable of verifying the driving function is formulated. And executing a corresponding test scheme through the test board, so that functional test data corresponding to the driving functional test can be obtained. And whether the driving function of the chip meets the functional requirement of the system can be judged according to the functional test data.
Referring to fig. 4, fig. 4 is a flowchart illustrating another step of determining a test scheme according to a function to be tested of a chip according to an embodiment of the present application, including but not limited to steps S410 to S430.
Step S410, determining the function to be tested of the chip as a diagnosis function;
step S420, performing undervoltage and overvoltage tests on the voltage output pins and the power input pins, and performing short-circuit tests, short power tests and open circuit tests on the driving pins to perform fault injection tests;
step S430, removing the injected fault, and detecting whether each pin can recover normal function.
In the embodiment of the application, when the function to be tested of the chip is determined to be a diagnosis function, that is, when the diagnosis function of the chip needs to be tested, a fault injection test needs to be performed to verify whether the diagnosis function corresponding to the chip meets the function requirement of the system. Meanwhile, it is further required to verify whether each pin can recover normal functions after removing the injected fault. The fault injection test comprises under-voltage and over-voltage tests on a voltage output pin, a power input pin and the like, and can record fault reporting conditions and protection functions by gradually increasing or reducing the voltage to a fixed value. Meanwhile, the fault injection test comprises short-circuit test, short-power test and open-circuit test on the driving pins, and the test process records the activation time of the protection strategy and the error reporting message. Meanwhile, after the test is completed, the injected faults are removed, and whether the pins can recover normal functions is detected.
In the embodiment of the application, the function of the chip to be tested is determined to be the diagnosis function, and then a test scheme capable of verifying the diagnosis function is formulated. And executing a corresponding test scheme through the test board, so that functional test data corresponding to the diagnostic functional test can be obtained. And whether the diagnosis function of the chip meets the functional requirement of the system can be judged according to the functional test data.
Referring to fig. 5, fig. 5 is a flowchart of steps for accessing an electronic control unit with a chip to a test board for corresponding testing to obtain functional test data, which includes, but is not limited to, steps S510 to S530.
Step S510, connecting an electronic control unit with a chip with a load box, wherein the load box is used for providing a simulation running environment for the electronic control unit;
step S520, running a corresponding test program and setting corresponding test parameters through the upper computer so as to execute a corresponding test scheme;
in step S530, the functional test data corresponding to the execution test scheme is output, where the functional test data includes software functional test data and hardware functional test data.
In the embodiment of the application, after the test scheme is determined, the electronic control unit with the chip is connected with the load box, the load box is connected with the upper computer, the corresponding test program is run on the upper computer, and the corresponding test interface is displayed. And setting and adjusting various test parameters through the test interface to execute a corresponding test scheme. After the test is completed, corresponding functional test data are generated, so that whether each function of the chip meets the functional requirement of the system can be judged according to the functional test data.
According to the test bench testing scheme for testing various functions of the chip, the test bench can be found in time when the chip has functions (including software functions and hardware functions) defects, so that subsequent bench testing and real vehicle testing processes with high cost and long time consumption are not needed, and testing time and cost can be greatly reduced.
Referring to fig. 6, fig. 6 is a flowchart of steps performed after obtaining functional test data, including but not limited to steps S610 to S630, provided in an embodiment of the present application.
Step S610, comparing and analyzing the functional test data with the functional data of the original chip to determine whether each function of the chip meets the functional requirement of the original chip;
step S620, when partial functions of the chip do not meet the functional requirements of the original chip exist, judging whether the partial functions of the chip which do not meet the functional requirements of the original chip influence the normal operation of the automobile;
in step S630, when each function of the chip meets the functional requirement of the original chip, or some functions of the chip which do not meet the functional requirement of the original chip do not affect the normal operation of the automobile, the test of the test bench is determined to be qualified.
In the embodiment of the application, after the test bench tests and obtains the corresponding functional test data, the functional test data can be further compared with the functional data of the original chip for analysis, so that whether each function of the chip meets the functional requirement of the original chip can be determined. The analysis includes signal amplitude, noise condition, response time, fault response strategy, etc. If all the functions of the chip meet the functional requirements of the original chip, the test bench of the chip can be determined to be tested to be qualified, namely all the functions (including software functions and hardware functions) of the chip meet the functional requirements of the system. If the partial functions of the chip do not meet the functional requirements of the original chip, whether the partial functions of the chip do not meet the functional requirements of the original chip can influence the normal operation of the automobile is further judged. If the chip does not meet the function requirement of the original chip and partial functions do not influence the normal operation of the automobile, the test bench of the chip can be determined to be tested to be qualified, namely, all functions (including software functions and hardware functions) of the chip meet the function requirement of a system.
In this embodiment of the present application, as a chip of an original chip, all functions corresponding to the chip are not necessarily identical to functions of the original chip, and as long as the normal operation of the automobile is not affected by the different functions, the functions of the chip are considered to meet the functional requirements of the system.
And step S120, when the test of the test bench is qualified according to the functional test data, the electronic control unit with the chip is connected into the bench test system for performing a simulation operation test to obtain test data.
In the embodiment of the application, after the test bench tests and obtains the corresponding functional test data, whether each function of the chip meets the functional requirement of the system can be determined through comparison and analysis of the functional test data. When part of the functions of the chip do not meet the functional requirements of the system, namely, the replaced core has functional defects, the test of the test bench is failed, namely, the chip does not pass the test of the test bench, and the chip does not need to enter the subsequent test. When each function of the chip meets the functional requirement of the system, the test of the test board is qualified. At this point, testing into the bench test system is required. The electronic control unit with the chip is connected to the bench test system to perform the simulation operation test, so as to obtain test data.
Referring to fig. 7, fig. 7 is a flowchart of steps for accessing an electronic control unit with a chip to a bench test system for performing a simulation operation test to obtain test data, including but not limited to steps S710 to S740.
Step S710, connecting the electronic control unit with the chip to a test target engine;
step S720, simulating and adjusting the rotating speed and the load of the test target engine through the measurement control system so as to simulate different operation conditions;
step S730, collecting engine parameters under different operation conditions through an auxiliary system;
step S740, outputting test data under different operation conditions, where the test data does not include engine parameters under different operation conditions.
In the embodiment of the application, the bench test system comprises a measurement control system, a test target engine and an auxiliary system, wherein the measurement control system and the auxiliary system are connected with the test target engine. The auxiliary system comprises various sensors, such as an upstream oxygen sensor, an intake pressure temperature sensor, a cooling liquid temperature sensor, a boost pressure temperature sensor, a crank shaft position sensor, an intake/exhaust phase sensor, an engine oil pressure sensor and a knock sensor. The auxiliary system also comprises a cylinder pressure sensor, a combustion analyzer, an emission analyzer, a solid particulate matter analyzer, a fuel temperature control and transient fuel consumption meter and the like. The measurement control system is used for controlling the operation condition of the test target engine. The specific testing process comprises the following steps: the electronic control unit provided with the chip is connected with the test target engine, then the rotation speed and the load of the test target engine are simulated and adjusted through the measurement control system so as to simulate different operation conditions, and engine parameters under different operation conditions, such as actual measurement torque, actual measurement power, fuel consumption rate, excess air coefficient, air inflow, air inlet pressure and temperature, intercooling inlet/outlet pressure and temperature, air inlet channel temperature of each cylinder, exhaust manifold temperature of each cylinder and the like, are collected through the auxiliary system. Thus, test data under different operation conditions can be output.
In the embodiment of the application, after the chip passes the test of the test board, if each function of the chip meets the function requirement of the system, the electronic control unit provided with the chip is further connected into the bench test system to perform the simulation operation test, so that the performance and the reliability of the chip can be verified through the simulation operation test executed by the bench test system.
Referring to fig. 8, fig. 8 is a flowchart of steps performed after obtaining test data, including but not limited to steps S810 to S830, provided in an embodiment of the present application.
Step S810, comparing and analyzing the test data with the standard data to judge whether the engine parameters under different operation conditions are normal or not;
step S820, comparing and analyzing the test data with the original chip operation data to judge whether the performance of the chip under different operation conditions accords with the original chip or not when the engine parameters under different operation conditions are normal;
and step S830, when the performance of the chip under different operation conditions is consistent with that of the original chip, determining that the simulation operation test is qualified.
In the embodiment of the application, after the test data is obtained through the simulation operation test executed by the bench test system, whether the simulation operation test corresponding to the chip is qualified or not can be further judged according to the test data. Specifically, test data and standard data are required to be compared and analyzed, and whether engine parameters under different operation conditions are normal or not can be judged. If the engine parameters under different operation conditions are abnormal, the chip is unqualified, and the chip which obviously does not meet the standard can be screened out. If the engine parameters under different operation conditions are normal, the test data and the original chip operation data are further compared and analyzed, so that whether the performance of the chip under different operation conditions is consistent with the original chip can be judged. If the performance of the chip under different operation conditions is consistent with that of the original chip, the simulation operation test is determined to be qualified, and if the performance of the chip under different operation conditions is inconsistent with that of the original chip, the simulation operation test is determined to be unqualified.
It should be noted that, when the performance of the chip under different operation conditions is inconsistent with the original chip, the reason of the inconsistency can be further analyzed, related parts and control modules thereof are found, the output control pins of the chip are traced back, and the difference analysis is performed according to the operation logic, the fault response strategy and the like of the chip.
In the embodiment of the application, the test data and the standard data are compared and analyzed, so that the chips which obviously do not accord with the standard can be screened out, and the analysis efficiency can be improved.
And step S130, when the simulation operation test is determined to be qualified according to the test data, the electronic control unit with the chip is installed in a real vehicle for endurance test, and endurance test data are obtained.
In the embodiment of the application, when the simulation operation test is determined to be unqualified according to the test data, that is, the performance requirement and the reliability corresponding to the chip are not in accordance with the system requirement, the chip can be directly judged to be unqualified, and the subsequent test step is not required to be entered. And when the simulation operation test is determined to be qualified according to the test data, namely, the performance requirement and the reliability corresponding to the chip are both in accordance with the system requirement, the endurance test of the real vehicle is further required. Specifically, the electronic control unit with the chip is required to be installed in a real vehicle for endurance test, that is, the real vehicle with the chip is tested in a large number under different road conditions and different environmental conditions, so as to evaluate the durability, reliability and safety of the chip in the use process. If the test is carried out according to a specified test route and the vehicle speed, and the measurement and recording of parameters are carried out according to a specified time interval, so as to obtain the endurance test data under different road conditions and different environmental conditions.
In this embodiment, after the endurance test is performed to obtain the endurance test data, the endurance test data may be further analyzed to determine whether the performance (including endurance, security, and reliability) of the chip meets the system requirements and whether the mass production conditions are met.
And step S140, when the endurance test is determined to be qualified according to the endurance test data, determining that the chip meets the replacement condition.
In the embodiment of the application, when the endurance test is judged to be unqualified according to the endurance test data, the chip is determined to be unqualified. And when the endurance test is determined to be qualified according to the endurance test data, determining that the chip meets the replacement condition, and replacing the chip with the original chip.
According to the test bench test system, the test bench test is firstly carried out on the chip, after the test bench test is qualified, the simulation operation test is carried out through the bench test system, after the simulation operation test is qualified, the endurance test of the real vehicle is carried out, namely, the problem can be found as early as possible in a step-by-step test mode, and the test time and cost are saved.
The embodiment of the application also provides electronic equipment, which comprises a memory and a processor, wherein the memory stores a computer program, and the processor realizes the chip testing method when executing the computer program. The electronic equipment can be any intelligent terminal including a tablet personal computer, a vehicle-mounted computer and the like.
Referring to fig. 9, fig. 9 illustrates a hardware structure of an electronic device according to another embodiment, the electronic device includes:
the processor 901 may be implemented by a general purpose CPU (central processing unit), a microprocessor, an application specific integrated circuit (ApplicationSpecificIntegratedCircuit, ASIC), or one or more integrated circuits, etc. for executing related programs to implement the technical solutions provided by the embodiments of the present application;
the memory 902 may be implemented in the form of read-only memory (ReadOnlyMemory, ROM), static storage, dynamic storage, or random access memory (RandomAccessMemory, RAM). The memory 902 may store an operating system and other application programs, and when the technical solutions provided in the embodiments of the present disclosure are implemented by software or firmware, relevant program codes are stored in the memory 902, and the processor 901 invokes a chip testing method for executing the embodiments of the present disclosure;
an input/output interface 903 for inputting and outputting information;
the communication interface 904 is configured to implement communication interaction between the device and other devices, and may implement communication in a wired manner (e.g. USB, network cable, etc.), or may implement communication in a wireless manner (e.g. mobile network, WIFI, bluetooth, etc.);
A bus 905 that transfers information between the various components of the device (e.g., the processor 901, the memory 902, the input/output interface 903, and the communication interface 904);
wherein the processor 901, the memory 902, the input/output interface 903 and the communication interface 904 are communicatively coupled to each other within the device via a bus 905.
The embodiment of the application also provides a storage medium, which is a computer readable storage medium, and the storage medium stores a computer program, and the computer program realizes the chip testing method when being executed by a processor.
The memory, as a non-transitory computer readable storage medium, may be used to store non-transitory software programs as well as non-transitory computer executable programs. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes memory remotely located relative to the processor, the remote memory being connectable to the processor through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The embodiments described in the embodiments of the present application are for more clearly describing the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application, and as those skilled in the art can know that, with the evolution of technology and the appearance of new application scenarios, the technical solutions provided by the embodiments of the present application are equally applicable to similar technical problems.
It will be appreciated by those skilled in the art that the technical solutions shown in the figures do not constitute limitations of the embodiments of the present application, and may include more or fewer steps than shown, or may combine certain steps, or different steps.
The above described apparatus embodiments are merely illustrative, wherein the units illustrated as separate components may or may not be physically separate, i.e. may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Those of ordinary skill in the art will appreciate that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof.
The terms "first," "second," "third," "fourth," and the like in the description of the present application and in the above-described figures, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the present application described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be understood that in this application, "at least one" means one or more, and "a plurality" means two or more. "and/or" for describing the association relationship of the association object, the representation may have three relationships, for example, "a and/or B" may represent: only a, only B and both a and B are present, wherein a, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b or c may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural.
In the several embodiments provided in this application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the above-described division of units is merely a logical function division, and there may be another division manner in actual implementation, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in part or all of the technical solution or in part in the form of a software product stored in a storage medium, including multiple instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of the various embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing a program.
Preferred embodiments of the present application are described above with reference to the accompanying drawings, and thus do not limit the scope of the claims of the embodiments of the present application. Any modifications, equivalent substitutions and improvements made by those skilled in the art without departing from the scope and spirit of the embodiments of the present application shall fall within the scope of the claims of the embodiments of the present application.
Claims (10)
1. A method of testing a chip, wherein the chip is mounted in an electronic control unit, the method comprising:
determining a test scheme according to the function to be tested of the chip, and connecting the electronic control unit with the chip to a test bench for corresponding test to obtain functional test data, wherein the test bench comprises a load box and an upper computer, and the load box is connected with the upper computer;
when the test of the test bench is determined to be qualified according to the functional test data, the electronic control unit provided with the chip is connected into a bench test system to perform a simulation operation test, so that test data are obtained;
when the simulation operation test is determined to be qualified according to the test data, loading the electronic control unit with the chip into a real vehicle for endurance test to obtain endurance test data;
and when the endurance test is determined to be qualified according to the endurance test data, determining that the chip meets the replacement condition.
2. The method of claim 1, wherein the function under test of the chip comprises a communication function, and wherein determining the test scheme based on the function under test of the chip comprises:
Determining the function to be detected of the chip as the communication function;
detecting the communication condition of the electronic control unit provided with the chip and a bus in an under-voltage state so as to perform a low-voltage communication test;
detecting whether the electronic control unit provided with the chip maintains communication with the bus under high-voltage power supply or not so as to perform high-voltage communication test;
detecting whether the dominant output voltage and the recessive output voltage meet the standard values or not so as to perform a dominant-recessive output voltage test;
and sending the message and detecting whether the message data is complete or not so as to perform the message integrity test.
3. The method of claim 1, wherein the function under test of the chip includes a driving function, and wherein determining the test scheme based on the function under test of the chip includes:
determining the function to be tested of the chip as the driving function;
the electronic control unit provided with the chip is electrified, and the time of the action of the voltage of each driving pin and the change condition of the voltage are measured to carry out electrification test;
the duty cycle, period and high level voltage of the pwm output pin are measured to perform pwm testing.
4. The method of claim 1, wherein the function under test of the chip comprises a diagnostic function, and wherein determining the test plan based on the function under test of the chip comprises:
determining the function to be detected of the chip as the diagnosis function;
carrying out undervoltage and overvoltage tests on the voltage output pins and the power input pins, and carrying out short-circuit tests, short power tests and open-circuit tests on the driving pins so as to carry out fault injection tests;
and removing the injected faults, and detecting whether each pin can recover normal functions.
5. The method of claim 1, wherein said accessing said electronic control unit with said chip to a test station for corresponding testing to obtain functional test data comprises:
connecting the electronic control unit provided with the chip with the load box, wherein the load box is used for providing a simulation running environment for the electronic control unit;
running a corresponding test program and setting corresponding test parameters through an upper computer so as to execute a corresponding test scheme;
outputting and executing the functional test data corresponding to the test scheme, wherein the functional test data comprises software functional test data and hardware functional test data.
6. The method of claim 1, wherein after obtaining the functional test data, the method further comprises:
comparing and analyzing the functional test data with the functional data of the original chip to determine whether each function of the chip meets the functional requirement of the original chip;
when part of functions of the chip do not meet the functional requirements of the original chip, judging whether the part of functions of the chip which do not meet the functional requirements of the original chip influence the normal operation of the automobile;
and when all functions of the chip meet the functional requirements of the original chip or part of functions of the chip which do not meet the functional requirements of the original chip do not influence the normal running of the automobile, determining that the test bench is qualified.
7. The method of claim 1, wherein the bench test system comprises a measurement control system, a test target engine, and an auxiliary system, wherein the measurement control system and the auxiliary system are connected with the test target engine, the electronic control unit with the chip is connected to the bench test system for performing a simulation operation test to obtain test data, and the method comprises the following steps:
Accessing the electronic control unit provided with the chip to the test target engine;
the rotation speed and the load of the test target engine are simulated and adjusted through the measurement control system so as to simulate different operation conditions;
collecting engine parameters under different operation conditions through the auxiliary system;
and outputting test data under different operation conditions, wherein the test data does not comprise the engine parameters under different operation conditions.
8. The method of claim 1, wherein after obtaining the test data, the method further comprises:
comparing and analyzing the test data with standard data to judge whether the engine parameters under different operation conditions are normal or not;
when the engine parameters under different operation conditions are normal, comparing and analyzing the test data with the original chip operation data to judge whether the performance of the chip under different operation conditions is consistent with the original chip;
and when the performance of the chip under different operation conditions is consistent with that of the original chip, determining that the simulation operation test is qualified.
9. An electronic device comprising a memory storing a computer program and a processor implementing the method of any of claims 1 to 8 when the computer program is executed by the processor.
10. A computer readable storage medium storing a computer program, characterized in that the computer program, when executed by a processor, implements the method of any one of claims 1 to 8.
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| CN118275857A (en) * | 2024-03-19 | 2024-07-02 | 广芯微电子（广州）股份有限公司 | Chip open-short circuit test method, device, equipment and storage medium |
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| CN118275857A (en) * | 2024-03-19 | 2024-07-02 | 广芯微电子（广州）股份有限公司 | Chip open-short circuit test method, device, equipment and storage medium |
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