CN117278007A - Solid-state power controller based on software definition and processing method - Google Patents
Solid-state power controller based on software definition and processing method Download PDFInfo
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- CN117278007A CN117278007A CN202311345010.4A CN202311345010A CN117278007A CN 117278007 A CN117278007 A CN 117278007A CN 202311345010 A CN202311345010 A CN 202311345010A CN 117278007 A CN117278007 A CN 117278007A
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- 238000003672 processing method Methods 0.000 title abstract description 7
- 238000006243 chemical reaction Methods 0.000 claims abstract description 8
- 238000004891 communication Methods 0.000 claims abstract description 5
- 238000009825 accumulation Methods 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 12
- 238000002955 isolation Methods 0.000 claims description 11
- 238000005070 sampling Methods 0.000 claims description 11
- 239000007787 solid Substances 0.000 claims description 8
- 238000004364 calculation method Methods 0.000 claims description 7
- 230000017525 heat dissipation Effects 0.000 claims description 4
- 230000015556 catabolic process Effects 0.000 claims description 3
- 230000010354 integration Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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Abstract
The invention relates to the technical field of electric machinery, in particular to a solid-state power controller based on software definition and a processing method. The MOS transistor comprises a processing module, a current acquisition module, an MOS transistor and a driving module, wherein the current acquisition module acquires the current of a power supply; the current acquisition module is used for transmitting the acquired current signals to the processor through AD conversion, the current acquisition module is connected with the source electrode of the MOS tube, and the load is connected with the drain electrode of the MOS tube; the processor is connected to the grid electrode of the MOS tube through driving, and the FPGA is connected to a communication interface of the processor. Judging whether the collected current exceeds the rated current or not, and if so, integrating the heat generated by the current; judging whether the heat integral exceeds a heat threshold value; if yes, searching a heat threshold and trip time comparison table, and sending a shutdown instruction. The software configuration realizes rated output current, I 2 T inverse time limit protection, overcurrent protection threshold and short circuit protection threshold change, meeting the production requirementThe universality requirement of the product reduces the cost of repeated development.
Description
Technical Field
The invention relates to the technical field of electric machinery, in particular to a solid-state power controller based on software definition and a processing method.
Background
The Solid State Power Controller (SSPC) is a high reliability intelligent switch that controls the on-off of the circuit by driving a switching tube. When overload and short-circuit faults occur in the circuit, the solid-state power controller controls overload time based on the I2t anti-time protection characteristic, so that protection of subsequent loads is achieved.
At present, once the overcurrent and short-circuit protection threshold value of thick film products in each factory is determined, the overcurrent and short-circuit protection threshold value cannot be changed, if the overcurrent and short-circuit protection threshold value needs to be changed, the overcurrent and short-circuit protection threshold value can be realized only by replacing devices, and the use is not flexible. Based on this problem, a software-defined based solid state power controller was designed.
Disclosure of Invention
The invention provides a solid-state power controller based on software definition, which aims to realize flexible configuration in application by setting a power distribution rated value, overcurrent and short-circuit protection threshold values and selecting an I2t protection curve through software.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
the invention provides a solid-state power controller based on software definition, which comprises a processing module, a current acquisition module, a MOS tube and a driving module, wherein the current acquisition module acquires the current of a power supply; the current acquisition module is used for transmitting the acquired current signals to the processor through AD conversion, the current acquisition module is connected with the source electrode of the MOS tube, and the load is connected with the drain electrode of the MOS tube; the processor is connected to the grid electrode of the MOS tube through driving, and the FPGA is connected to a communication interface of the processor.
Further, the current acquisition module is provided with a signal isolation module, and signals are transmitted to the AD conversion through isolation of the signal isolation module.
The processing method comprises the steps of firstly, judging whether the collected current exceeds the rated current or not;
step two, judging whether the current signal is acquired continuously or not; if yes, integrating heat generated by the current;
step three, judging whether the heat integral exceeds a heat threshold value; if not, continuing integration; if yes, searching a comparison table of the heat threshold and the tripping time, and sending a shutdown instruction.
Further, the rated current of the solid-state power controller is I 0 The overcurrent protection threshold is set to 1.5 times I 0 The turn-off protection threshold is set to 4 times I 0 1.5 to 4 times of I 0 Time-off time is in accordance with I 2 T curve, turn-off time is set to 300ms at the longest, and is lower than 10ms at the shortest, and is 4 times of I 0 And above, the off time is not more than 30us.
Further, the heat threshold is not higher than 1/4 of avalanche breakdown energy of the MOS tube, the FPGA averages the sampling current of multiple paths, and when the sampling current average value is larger than rated current I 0 And when the FPGA starts to perform heat accumulation calculation, and simultaneously performs a simulated heat dissipation process.
Further, the FPGA is realized in a lookup table mode, the corresponding relation between the heat threshold and the tripping time is firstly stored in the processor, and the accumulated heat is calculated and compared with the tripping time in the table, so that whether the shutdown condition is met or not is determined.
Further, if the current is 1.5 to 4 times I 0 Interval according to preset I 2 And (3) performing turn-off control in the time T, judging whether heat accumulation reaches a turn-off threshold value or not, if the heat accumulation exceeds the turn-off time but reaches the heat turn-off threshold value, rapidly performing trip protection by the solid-state power controller, and if the heat accumulation is smaller than the heat threshold value, entering the next sampling period to perform the next heat accumulation calculation.
The beneficial effects achieved by the invention are as follows:
according to the solid-state power controller and the processing method based on software definition, the rated output current, the I2t inverse time limit protection, the overcurrent protection threshold and the short-circuit protection threshold are changed through software configuration, so that the universality requirement of products is met, and the cost of repeated development is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a block diagram of a software-defined-based implementation of a solid state power controller circuit;
FIG. 2 is a process flow diagram of a software-defined-based solid state power controller;
the achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that, if directional indications (such as up, down, left, right, front, and rear … …) are included in the embodiments of the present invention, the directional indications are merely used to explain the relative positional relationship, movement conditions, etc. between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are correspondingly changed.
In addition, if there is a description of "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, if the meaning of "and/or" is presented throughout this document, it is intended to include three schemes in parallel, taking "a and/or B" as an example, including a scheme, or B scheme, or a scheme where a and B meet simultaneously. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent and not within the scope of protection claimed in the present invention.
As shown in fig. 1-2, the invention provides a solid-state power controller based on software definition, which comprises a processing module, a current acquisition module, a MOS tube and a driving module, wherein the current acquisition module acquires the current of a power supply; the current acquisition module is used for transmitting the acquired current signals to the processor through AD conversion, the current acquisition module is connected with the source electrode of the MOS tube, and the load is connected with the drain electrode of the MOS tube; the processor is connected to the grid electrode of the MOS tube through driving, and the FPGA is connected to a communication interface of the processor.
The current acquisition module is provided with a signal isolation module, and signals are transmitted to the AD conversion through isolation of the signal isolation module.
The processor system comprises a processor, a memory, a communication interface circuit, a crystal oscillator, AD conversion and a power supply circuit; signal isolation is realized by adopting an on-chip isolation transformer technology; the current collection is realized by a current sensor; the MOS tube is a novel GaN device with low power consumption, so that the heat consumption of the product is reduced.
The core is based on I2t theory and thermal memory theory, and adopts software to realize inverse time-limit overcurrent protection algorithm. The software strategy is as follows: to prevent errors in the current sensor acquisition process, it is therefore necessary to average multiple samples and then use the average for algorithm implementation. When the current average value is smaller than the rated current, heat accumulation is not needed, only the heat dissipation process is simulated, and when the current average value is larger than the rated current, software starts to perform heat accumulation calculation and simultaneously performs the simulated heat dissipation process. And the accumulated heat is multiplied by the sampling times and is compared with a heat threshold, when the accumulated heat is larger than the heat threshold, the SSPC needs to rapidly perform trip protection, and if the accumulated heat is smaller than the heat threshold, the SSPC enters the next sampling period to perform the next heat accumulation calculation.
The processing method comprises the steps of firstly, judging whether the collected current exceeds the rated current or not;
step two, judging whether the current signal is acquired continuously or not; if yes, integrating heat generated by the current;
step three, judging whether the heat integral exceeds a heat threshold value; if not, continuing integration; if yes, searching a comparison table of the heat threshold and the tripping time, and sending a shutdown instruction.
The rated current of the solid-state power controller is I0, the overcurrent protection threshold is set to be 1.5 times of I0, the turn-off protection threshold is set to be 4 times of I0, the turn-off time accords with an I2T curve when the turn-off time is 1.5 times to 4 times of I0, the longest turn-off time is set to be 300ms, and the turn-off time is not more than 30us when the shortest turn-off time is lower than 10ms and 4 times of I0 and above.
The heat threshold value is set to be not higher than 1/4 of avalanche breakdown energy of the MOS tube, the FPGA calculates an average value of sampling currents of multiple paths, when the average value of the sampling currents is larger than rated current I0, the FPGA starts to perform FPGA to achieve the effect in a lookup table mode, firstly, the corresponding relation between the heat threshold value and trip time is stored in a processor, and the accumulated heat is calculated and compared with the trip time in the table, so that whether the shutdown condition is met or not is determined.
If the current is 1.5-4 times of I 0 Interval according to preset I 2 And (3) performing turn-off control in the time T, judging whether heat accumulation reaches a turn-off threshold value or not, if the heat accumulation exceeds the turn-off time but reaches the heat turn-off threshold value, rapidly performing trip protection by the solid-state power controller, and if the heat accumulation is smaller than the heat threshold value, entering the next sampling period to perform the next heat accumulation calculation.
The foregoing description is only of the optional embodiments of the present invention, and is not intended to limit the scope of the invention, and all the equivalent structural changes made by the description of the present invention and the accompanying drawings or the direct/indirect application in other related technical fields are included in the scope of the invention.
Claims (7)
1. A software-defined-based solid state power controller, characterized by: the MOS transistor comprises a processing module, a current acquisition module, an MOS transistor and a driving module, wherein the current acquisition module acquires the current of a power supply; the current acquisition module is used for transmitting the acquired current signals to the processor through AD conversion, the current acquisition module is connected with the source electrode of the MOS tube, and the load is connected with the drain electrode of the MOS tube; the processor is connected to the grid electrode of the MOS tube through driving, and the FPGA is connected to a communication interface of the processor.
2. A software-defined solid state power controller according to claim 1, wherein: the current acquisition module is provided with a signal isolation module, and signals are transmitted to the AD conversion through isolation of the signal isolation module.
3. A method of processing, characterized in that the method of processing is based on a solid state power controller according to any of claims 1-2, step one, determining if the current collected exceeds a rated current;
step two, judging whether the current signal is acquired continuously or not; if yes, integrating heat generated by the current;
step three, judging whether the heat integral exceeds a heat threshold value; if not, continuing integration; if yes, searching a comparison table of the heat threshold and the tripping time, and sending a shutdown instruction.
4. A process according to claim 3, characterized in that: rated current of solid state power controller is I 0 The overcurrent protection threshold is set to 1.5 times I 0 The turn-off protection threshold is set to 4 times I 0 1.5 to 4 times of I 0 Time-off time is in accordance with I 2 T curve, turn-off time is set to 300ms at the longest and lower than 10m at the shortests,4 times I 0 And above, the off time is not more than 30us.
5. A method of treatment according to claim 1, characterized in that: the heat threshold value is not higher than 1/4 of avalanche breakdown energy of the MOS tube, the FPGA averages the sampling current of multiple paths, and when the sampling current average value is larger than rated current I 0 And when the FPGA starts to perform heat accumulation calculation, and simultaneously performs a simulated heat dissipation process.
6. A method of treatment according to claim 1, characterized in that: the FPGA is realized in a lookup table mode, the corresponding relation between the heat threshold and the tripping time is firstly stored in the processor, and the accumulated heat is calculated and compared with the tripping time in the table, so that whether the shutdown condition is met or not is determined.
7. A method of treatment according to claim 1, characterized in that: if the current is 1.5-4 times of I 0 Interval according to preset I 2 And (3) performing turn-off control in the time T, judging whether heat accumulation reaches a turn-off threshold value or not, if the heat accumulation exceeds the turn-off time but reaches the heat turn-off threshold value, rapidly performing trip protection by the solid-state power controller, and if the heat accumulation is smaller than the heat threshold value, entering the next sampling period to perform the next heat accumulation calculation.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202311345010.4A CN117278007A (en) | 2023-10-18 | 2023-10-18 | Solid-state power controller based on software definition and processing method |
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| CN202311345010.4A CN117278007A (en) | 2023-10-18 | 2023-10-18 | Solid-state power controller based on software definition and processing method |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105514949A (en) * | 2016-01-28 | 2016-04-20 | 中国科学院空间应用工程与技术中心 | Solid state power controller with latent flux prevention function and control method |
| CN106597945A (en) * | 2016-12-20 | 2017-04-26 | 中国航空工业集团公司雷华电子技术研究所 | Inverse time limit protection solid-state switch |
| CN116771507A (en) * | 2022-03-08 | 2023-09-19 | 中国航发商用航空发动机有限责任公司 | Safe power supply method and device for engine load |
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2023
- 2023-10-18 CN CN202311345010.4A patent/CN117278007A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105514949A (en) * | 2016-01-28 | 2016-04-20 | 中国科学院空间应用工程与技术中心 | Solid state power controller with latent flux prevention function and control method |
| CN106597945A (en) * | 2016-12-20 | 2017-04-26 | 中国航空工业集团公司雷华电子技术研究所 | Inverse time limit protection solid-state switch |
| CN116771507A (en) * | 2022-03-08 | 2023-09-19 | 中国航发商用航空发动机有限责任公司 | Safe power supply method and device for engine load |
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