CN117277763A - Half-bridge driving circuit and high-side NMOS (N-channel metal oxide semiconductor) tube integrated chip applied by same - Google Patents

Half-bridge driving circuit and high-side NMOS (N-channel metal oxide semiconductor) tube integrated chip applied by same Download PDF

Info

Publication number
CN117277763A
CN117277763A CN202311092984.6A CN202311092984A CN117277763A CN 117277763 A CN117277763 A CN 117277763A CN 202311092984 A CN202311092984 A CN 202311092984A CN 117277763 A CN117277763 A CN 117277763A
Authority
CN
China
Prior art keywords
pull
tube
driving circuit
voltage
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311092984.6A
Other languages
Chinese (zh)
Inventor
郝允强
丁万新
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Chuantu Microelectronics Co ltd
Original Assignee
Shanghai Chuantu Microelectronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Chuantu Microelectronics Co ltd filed Critical Shanghai Chuantu Microelectronics Co ltd
Priority to CN202311092984.6A priority Critical patent/CN117277763A/en
Publication of CN117277763A publication Critical patent/CN117277763A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/36—Means for starting or stopping converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

Abstract

The embodiment of the application provides a half-bridge driving circuit and a high-side NMOS tube integrated chip applied to the same. Connecting the input end of a charge pump with a high-voltage source, connecting the output end of the charge pump with the input end of a pull-up driving circuit and the source electrode of a pull-up tube through a first potential point, connecting the input end of the pull-up driving circuit with the high-voltage source, connecting the output end of the pull-up driving circuit with the grid electrode of the pull-up tube, connecting the drain electrode of the pull-up tube with the grid electrode of a high-side NMOS tube, and connecting the drain electrode of the high-side NMOS tube with the high-voltage source; the output end of the pull-down driving circuit is connected with the grid electrode of the pull-down tube, the source electrode of the high-side NMOS tube is connected with the drain electrode of the pull-down tube, one end of the voltage stabilizing capacitor is connected with the second potential point, and the other end of the voltage stabilizing capacitor is connected with the source electrode of the pull-down tube. The same charge pump is shared by multiple paths of half-bridges, only one large capacitor is needed for driving the high-side NMOS tube to be turned on through the pull-up tube, and meanwhile, small capacitors are needed for turning off the driving voltage of the pull-down tube, so that the device is convenient for miniaturization design and the chip area is saved.

Description

Half-bridge driving circuit and high-side NMOS (N-channel metal oxide semiconductor) tube integrated chip applied by same
Technical Field
The invention relates to the technical field of electronic circuits, in particular to a half-bridge driving circuit and a high-side NMOS tube integrated chip applied by the same.
Background
In applications such as motor driving, especially for low power applications, the integration level of the driving chip needs to be higher, and in many cases, the driving tube needs to be integrated inside the chip. In order to achieve higher driving capability, or smaller on-resistance, the high-side transistor will also use an NMOS device, but this places higher demands on its driving circuit, because when the NMOS is turned on, its gate needs to be higher than the supply voltage, and when it is turned off, its gate needs to be pulled to the source rather than directly to ground in order to achieve the high resistance state of the output. Therefore, in the circuit, a voltage higher than the power supply voltage by V and a voltage higher than the half-bridge output voltage by VOPEN, which is the turn-on voltage of the gate-source of the high-side NMOS transistor, is required, and is generally about 5V.
In the current implementation, a large capacitor is required to be externally connected to a chip to realize a charge pump, and a high-side NMOS is directly driven by a potential of high VOPEN output relative to a half-bridge, but the complexity of the system is increased. Therefore, in order to achieve higher integration, the off-chip capacitor is omitted, and the capacitor needs to be integrated inside the chip, so that the capacitance of the charge pump capacitor is greatly reduced and occupies a large chip area.
In the prior art, bootstrap is used to generate a voltage that is somewhat higher than the half-bridge output to directly drive the gate of the high-side NMOS. However, this causes problems in that the area of the capacitor needs to be large, and in the case of chips with more phase outputs, a plurality of such large capacitors are required, further wasting the chip area.
Disclosure of Invention
In view of the above, embodiments of the present disclosure provide a half-bridge driving circuit and a high-side NMOS integrated chip using the same, which at least partially solve the problems in the prior art.
In a first aspect, an embodiment of the present disclosure provides a half-bridge driving circuit for driving a high-side NMOS transistor, where the half-bridge driving circuit includes a pull-up transistor, a pull-up driving circuit, a pull-down transistor, a pull-down driving circuit, a charge pump, a first diode, a second diode, a voltage stabilizing capacitor, and a voltage conversion circuit;
the input end of the charge pump is connected with a high-voltage source, the output end of the charge pump is respectively connected with the input end of the pull-up driving circuit and the source electrode of the open pull-up tube through a first potential point, the charge pump comprises a switch capacitor, the input end of the pull-up driving circuit is connected with the high-voltage source, the output end of the pull-up driving circuit is connected with the grid electrode of the open pull-up tube, the drain electrode of the open pull-up tube is connected with the grid electrode of the high-side NMOS tube, and the drain electrode of the high-side NMOS tube is connected with the high-voltage source;
the positive electrode of the first diode is connected with a low-voltage source, the negative electrode of the first diode is connected with the input end of the pull-down driving circuit and the negative electrode of the second diode through a second potential point, the output end of the pull-down driving circuit is connected with the grid electrode of the turn-off pull-down tube, the positive electrode of the second diode is respectively connected with the drain electrode of the turn-off pull-down tube and the grid electrode of the high-side NMOS tube, the source electrode of the high-side NMOS tube is connected with the source electrode of the turn-off pull-down tube, one end of the voltage stabilizing capacitor is connected with the second potential point, and the other end of the voltage stabilizing capacitor is connected with the source electrode of the turn-off pull-down tube;
the input end of the voltage conversion circuit is connected with a control signal, and the output end of the voltage conversion circuit is respectively connected with the control end of the pull-up driving circuit and the control end of the pull-down driving circuit.
According to a specific implementation manner of the embodiment of the disclosure, the pull-up driving circuit includes: a first logic circuit and a first driver;
the input end of the first logic circuit is respectively connected with the first potential point, the high-voltage source and the output end of the voltage conversion circuit, the input end of the first driver is respectively connected with the output end of the first logic circuit, the first potential point and the high-voltage source, and the output end of the first driver is connected with the grid electrode of the starting pull-up tube.
According to a specific implementation manner of the embodiment of the disclosure, the pull-down driving circuit includes: a second logic circuit and a second driver;
the input end of the second logic circuit is respectively connected with the second potential point, one end of the voltage stabilizing capacitor and the output end of the voltage conversion circuit, the input end of the second driver is respectively connected with the output end of the second logic circuit, the second potential point and one end of the voltage stabilizing capacitor, and the output end of the second driver is connected with the grid electrode of the turn-off pull-down tube.
According to a specific implementation manner of the embodiment of the disclosure, the voltage conversion circuit includes a level shifter, an input end of the level shifter is connected to the low voltage source, and an output end of the level shifter is connected to an input end of the pull-up driving circuit and an input end of the pull-down driving circuit.
According to a specific implementation of an embodiment of the disclosure, the switch capacitance is greater than the regulated capacitance.
According to a specific implementation manner of the embodiment of the disclosure, the half-bridge driving circuit further comprises a third driver and a low-side NMOS tube;
the input end of the third driver is respectively connected with the low-voltage source, the input end of the voltage conversion circuit and the ground wire, and the output end of the third driver is connected with the source electrode of the low-side NMOS tube.
In a second aspect, an embodiment of the present disclosure provides a high-side NMOS transistor integrated chip, including:
a chip body;
a high-side NMOS transistor integrated on the chip body and a half-bridge driver circuit of any one of the first aspects.
The embodiment of the disclosure provides a half-bridge driving circuit and a high-side NMOS (N-channel metal oxide semiconductor) tube integrated chip applied to the same, which are used for driving high-side NMOS tubes. Connecting the input end of a charge pump with a high-voltage source, respectively connecting the output end of the charge pump with the input end of a pull-up driving circuit and the source electrode of the open pull-up tube through a first potential point, connecting the input end of the pull-up driving circuit with the high-voltage source, connecting the output end of the pull-up driving circuit with the grid electrode of the open pull-up tube, connecting the drain electrode of the open pull-up tube with the grid electrode of the high-side NMOS tube, and connecting the drain electrode of the high-side NMOS tube with the high-voltage source; the positive electrode of the first diode is connected with a low-voltage source, the negative electrode of the first diode is connected with the input end of the pull-down driving circuit and the negative electrode of the second diode through a second potential point, the output end of the pull-down driving circuit is connected with the grid electrode of the turn-off pull-down tube, the positive electrode of the second diode is respectively connected with the drain electrode of the turn-off pull-down tube and the grid electrode of the high-side NMOS tube, the source electrode of the high-side NMOS tube is connected with the source electrode of the turn-off pull-down tube, one end of the voltage stabilizing capacitor is connected with the second potential point, and the other end of the voltage stabilizing capacitor is connected with the source electrode of the turn-off pull-down tube; the input end of the voltage conversion circuit is connected with a control signal, and the output end of the voltage conversion circuit is respectively connected with the control end of the pull-up driving circuit and the control end of the pull-down driving circuit.
When the chip integrates the output of the multipath half-bridge, the multipath half-bridge shares the same charge pump, only one large capacitor is needed for driving the high-side NMOS tube to be opened through the pull-up tube, and meanwhile, the small capacitor is needed for switching off the driving voltage of the pull-down tube, so that the miniaturized design of the device is facilitated, and the chip area is saved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort to a person of ordinary skill in the art.
Fig. 1 is a schematic structural diagram of a half-bridge driving circuit according to an embodiment of the disclosure;
fig. 2 is a schematic voltage waveform diagram of a half-bridge driving circuit according to an embodiment of the disclosure;
fig. 3 is a schematic diagram of a half-bridge driving circuit according to an embodiment of the disclosure.
Detailed Description
Embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.
Other advantages and effects of the present disclosure will become readily apparent to those skilled in the art from the following disclosure, which describes embodiments of the present disclosure by way of specific examples. It will be apparent that the described embodiments are merely some, but not all embodiments of the present disclosure. The disclosure may be embodied or practiced in other different specific embodiments, and details within the subject specification may be modified or changed from various points of view and applications without departing from the spirit of the disclosure. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. All other embodiments, which can be made by one of ordinary skill in the art without inventive effort, based on the embodiments in this disclosure are intended to be within the scope of this disclosure.
It is noted that various aspects of the embodiments are described below within the scope of the following claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present disclosure, one skilled in the art will appreciate that one aspect described herein may be implemented independently of any other aspect, and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented and/or a method practiced using any number of the aspects set forth herein. In addition, such apparatus may be implemented and/or such methods practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.
It should also be noted that the illustrations provided in the following embodiments merely illustrate the basic concepts of the disclosure by way of illustration, and only the components related to the disclosure are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
In addition, in the following description, specific details are provided in order to provide a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects may be practiced without these specific details.
Referring to fig. 1, a schematic structural diagram of a half-bridge driving circuit provided in an embodiment of the present application is used for driving a high-side NMOS transistor. As shown in fig. 1, the half-bridge driving circuit includes a turn-on pull-up transistor, a pull-up driving circuit, a turn-off pull-down transistor, a pull-down driving circuit, a charge pump, first and second diodes, a voltage stabilizing capacitor, and a voltage converting circuit;
the input end of the charge pump is connected with a high-voltage source, the output end of the charge pump is respectively connected with the input end of the pull-up driving circuit and the source electrode of the open pull-up tube through a first potential point, the charge pump comprises a switch capacitor, the input end of the pull-up driving circuit is connected with the high-voltage source, the output end of the pull-up driving circuit is connected with the grid electrode of the open pull-up tube, the drain electrode of the open pull-up tube is connected with the grid electrode of the high-side NMOS tube, and the drain electrode of the high-side NMOS tube is connected with the high-voltage source;
the positive electrode of the first diode is connected with a low-voltage source, the negative electrode of the first diode is connected with the input end of the pull-down driving circuit and the negative electrode of the second diode through a second potential point, the output end of the pull-down driving circuit is connected with the grid electrode of the turn-off pull-down tube, the positive electrode of the second diode is respectively connected with the drain electrode of the turn-off pull-down tube and the grid electrode of the high-side NMOS tube, the source electrode of the high-side NMOS tube is connected with the drain electrode of the turn-off pull-down tube, one end of the voltage stabilizing capacitor is connected with the second potential point, and the other end of the voltage stabilizing capacitor is connected with the source electrode of the turn-off pull-down tube;
the input end of the voltage conversion circuit is connected with a control signal, and the output end of the voltage conversion circuit is respectively connected with the control end of the pull-up driving circuit and the control end of the pull-down driving circuit.
The half-bridge driving circuit is used for driving the high-side NMOS tube to be turned on and off, and is mainly used for driving the pull-up tube to be turned on through the pull-up driving circuit, or for driving the pull-down tube to be turned off through the pull-down driving circuit, so that the half-bridge high-side NMOS tube can be turned on and off to a high-resistance state through a small chip area.
According to a specific implementation manner of the embodiment of the disclosure, the voltage conversion circuit includes a level shifter, an input end of the level shifter is connected to the low voltage source, and an output end of the level shifter is connected to an input end of the pull-up driving circuit and an input end of the pull-down driving circuit.
According to a specific implementation of an embodiment of the disclosure, the switch capacitance is greater than the regulated capacitance.
Specifically, as shown in fig. 1, the driving circuit includes high-side NMOS transistors M connected in sequence HS Is opened up to pull up the tube M P High-side NMOS tube M HS Is turned off of the pull-down pipe M N Charge pump 1, open pull-up tube M P Pull-up driving circuit 2 of (a) and turn off pull-down tube M N Pull-down driving circuit 3, first diode D1 and second diode D 2 Second voltage V boot Voltage stabilizing capacitor C of (2) 2 And a level shifter 4. The system comprises a high-voltage source V CC And a low-voltage source V DDL ，V DDL Can be generated by a low dropout linear regulator (Low DropOut regulator, LDO) inside the chip.
The charge pump 1 and the high voltage power supply voltage V CC Connected to produce a ratio V CC High V DDL Is set at the first potential V of CP . The charge pump 1 comprises a charge pump output voltage stabilizing capacitor C 1 For V CP Is used for stabilizing the voltage of the transformer.
The output V of the charge pump 1 CP To open the pull-up tube M P The driving circuit of the driving circuit 2 of (2) is supplied with power to make the output low level be V CC At a high level of V CC +V DDL With its output connected to M P To control M P Is opened. Pull-up tube M P Is switched to Vcp, pull-up tube M P And (5) switching off.
The first diode D 1 And a second diode D 2 Voltage stabilizing capacitor C 2 A bidirectional bootstrap structure is formed. When the half bridge outputs V OUT Is low, at this time, the regulated capacitance C 2 Through a first diode D 1 Charging is performed toWhen the half bridge outputs V OUT When it is high, the pull-up tube Mp is opened and V OUT Connected to V through Mhs CC So V OUT ＝V CC In addition due to V cp ＝V CC +V DDL So M HS The voltage at the gate of (2) is V CP ＝V OUT +V DDL At this time C 2 Through D 2 Charging is performed. Thus C 2 Second voltage V on BOOT -V OUT Can be kept as V all the time DDL Minus the magnitude of one diode drop. Second voltage V BOOT To turn off the pull-down pipe M N Is powered by a pull-down driving circuit 3 and can control the pull-down tube M to be turned off N Is provided for the opening and closing of (a).
The pull-up tube M is opened P Output voltage V connected to charge pump 1 CP And MHS gate for M HS Is opened. Opening the pull-up tube M P The charging path is V when opening CP Directly to M HS Thus, a switch capacitor C is required 1 Has larger capacity. The turn-off pull-down tube M N Connected to half-bridge output and high-side NMOS transistor M HS Gate electrode for high-side NMOS transistor M HS Is turned off, and the high-side NMOS tube M is turned off HS The gate-source voltage of (2) is set to zero to realize high-resistance turn-off. Shut down the pull-down tube M N When opening, the pull-down pipe M can be turned off N The channel of (C) is connected with the high-side NMOS tube M HS The gate-source voltage of (1) is released to zero and the pull-down tube M is turned off N Is only required to be opened by V BOOT To turn off the pull-down pipe M N Gate of (2) is charged, thus stabilizing the capacitance C 2 Only a small capacitance value is required. Fig. 2 is a schematic diagram of voltage waveforms of the first potential point and the second potential point of the half-bridge driving circuit in one working period.
The level shifter 4 receives the control signal of the low voltage domain and converts it into V CP -V CC V (V) OUT -V BOOT Control signals of voltage domains respectively controlling M P Drive circuits 2 and M N And the driving circuit 3 is used for controlling the on or off of the half-bridge output. The input signal of the level shifter is 0-VDDL, and is given toThe signals of the logic circuits are VCC-VCP, and the signals for the intermediate logic circuits are VOUT-VBOOT. The level shifter may be implemented for a conventional high voltage level Shift circuit (High Voltage Level-Shift circuit).
As shown in FIG. 3, when the chip integrates multiple half-bridge outputs, the multiple half-bridges share the same charge pump and pass through the pull-up tube M P Driving high side N MOS The tube is opened, so that only one large capacitor C is needed 1 . At the same time V BOOT1 And V BOOT2 Still the bidirectional bootstrap structure is generated, and each path of V BOOT The voltage requires a small capacitance C 2 . Capacitor C 1 Far greater than C 2 The reason is as follows:
when the driver Mhs is on, vout will change from 0 to VCC. During Mhs turn-on, the Mhs gate needs to be charged from the Vcp by Mp.
When the drive Mhs is turned off, the gate-source power of Mhs is released to 0 by the MN.
It should be noted here that Mhs is the output of the driver and is of a very large size, whereas MN only needs to drive Mhs off, and does not require that MN and Mhs be of comparable size, typically 1% of the size is sufficient and therefore smaller.
C1 needs to charge Mhs on, while C2 only needs to charge MN on, so C2 is much smaller than C1.
To sum up, reference is made to V using a charge pump CC Voltage V of (2) CP Generating reference to V using a bidirectional bootstrap structure OUT Voltage V of (2) BOOT 。V CP Through the pull-up tube M P For turning on M HS Thus V CP Requiring direct large pipe M HS Gate charge of C 1 A larger capacitance value is required. And M is HS Off use M of (C) N Realization of M N And M is as follows HS The gate and the source of the gate are connected, and a high resistance state of turn-off can be realized. And V is BOOT Only need to be M N Is charged at the gate of the (c). In practical application, M N Is much smaller than M HS . Thus C 2 Only a small capacitance value is required. Thus, for integrationChip with multipath half-bridge output and high side N MOS The opening of the tube can share V CP Only one large capacitor is needed to realize, so that the chip area is greatly saved.
On the basis of the above embodiments, according to a specific implementation manner of the embodiments of the present disclosure, the pull-up driving circuit includes: a first logic circuit and a first driver;
the input end of the first logic circuit is respectively connected with the first potential point, the high-voltage source and the output end of the voltage conversion circuit, the input end of the first driver is respectively connected with the output end of the first logic circuit, the first potential point and the high-voltage source, and the output end of the first driver is connected with the grid electrode of the starting pull-up tube.
According to another specific implementation of an embodiment of the present disclosure, the pull-down driving circuit includes: a second logic circuit and a second driver;
the input end of the second logic circuit is respectively connected with the second potential point, one end of the voltage stabilizing capacitor and the output end of the voltage conversion circuit, the input end of the second driver is respectively connected with the output end of the second logic circuit, the second potential point and one end of the voltage stabilizing capacitor, and the output end of the second driver is connected with the grid electrode of the turn-off pull-down tube.
According to a specific implementation manner of the embodiment of the disclosure, the half-bridge driving circuit further comprises a third driver and a low-side NMOS tube;
the input end of the third driver is respectively connected with the low-voltage source, the input end of the voltage conversion circuit and the ground wire, and the output end of the third driver is connected with the source electrode of the low-side NMOS tube.
In addition, the embodiment of the disclosure provides a high-side NMOS integrated chip, including:
a chip body;
a high-side NMOS transistor integrated on the chip body and a half-bridge driver circuit of any one of the first aspects.
The foregoing is merely specific embodiments of the disclosure, but the protection scope of the disclosure is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the disclosure are intended to be covered by the protection scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims (7)

1. The half-bridge driving circuit is characterized by being used for driving a high-side NMOS (N-channel metal oxide semiconductor) tube and comprises a pull-up tube, a pull-up driving circuit, a pull-down tube, a pull-down driving circuit, a charge pump, a first diode, a second diode, a voltage stabilizing capacitor and a voltage conversion circuit;
the input end of the charge pump is connected with a high-voltage source, the output end of the charge pump is respectively connected with the input end of the pull-up driving circuit and the source electrode of the open pull-up tube through a first potential point, the charge pump comprises a switch capacitor, the input end of the pull-up driving circuit is connected with the high-voltage source, the output end of the pull-up driving circuit is connected with the grid electrode of the open pull-up tube, the drain electrode of the open pull-up tube is connected with the grid electrode of the high-side NMOS tube, and the drain electrode of the high-side NMOS tube is connected with the high-voltage source;
the positive electrode of the first diode is connected with a low-voltage source, the negative electrode of the first diode is connected with the input end of the pull-down driving circuit and the negative electrode of the second diode through a second potential point, the output end of the pull-down driving circuit is connected with the grid electrode of the turn-off pull-down tube, the positive electrode of the second diode is respectively connected with the drain electrode of the turn-off pull-down tube and the grid electrode of the high-side NMOS tube, the source electrode of the high-side NMOS tube is connected with the source electrode of the turn-off pull-down tube, one end of the voltage stabilizing capacitor is connected with the second potential point, and the other end of the voltage stabilizing capacitor is connected with the source electrode of the turn-off pull-down tube;
the input end of the voltage conversion circuit is connected with a control signal, and the output end of the voltage conversion circuit is respectively connected with the control end of the pull-up driving circuit and the control end of the pull-down driving circuit.
2. The half-bridge drive circuit of claim 1, wherein the pull-up drive circuit comprises: a first logic circuit and a first driver;
the input end of the first logic circuit is respectively connected with the first potential point, the high-voltage source and the output end of the voltage conversion circuit, the input end of the first driver is respectively connected with the output end of the first logic circuit, the first potential point and the high-voltage source, and the output end of the first driver is connected with the grid electrode of the starting pull-up tube.
3. The half-bridge drive circuit of claim 2, wherein the pull-down drive circuit comprises: a second logic circuit and a second driver;
the input end of the second logic circuit is respectively connected with the second potential point, one end of the voltage stabilizing capacitor and the output end of the voltage conversion circuit, the input end of the second driver is respectively connected with the output end of the second logic circuit, the second potential point and one end of the voltage stabilizing capacitor, and the output end of the second driver is connected with the grid electrode of the turn-off pull-down tube.
4. A half-bridge driving circuit according to claim 3, wherein the voltage converting circuit comprises a level shifter, an input terminal of the level shifter being connected to the low voltage source, an output terminal of the level shifter being connected to the input terminal of the pull-up driving circuit and the input terminal of the pull-down driving circuit.
5. The half-bridge drive circuit of claim 1, wherein the switched capacitor is greater than the regulated capacitor.
6. The half-bridge drive circuit of any one of claims 1 to 5, further comprising a third driver and a low-side NMOS transistor;
the input end of the third driver is respectively connected with the low-voltage source, the input end of the voltage conversion circuit and the ground wire, and the output end of the third driver is connected with the source electrode of the low-side NMOS tube.
7. The utility model provides a high limit NMOS pipe integrated chip which characterized in that includes:
a chip body;
a high-side NMOS transistor integrated on the chip body and the half-bridge drive circuit of any one of claims 1 to 6.
CN202311092984.6A 2023-08-28 2023-08-28 Half-bridge driving circuit and high-side NMOS (N-channel metal oxide semiconductor) tube integrated chip applied by same Pending CN117277763A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311092984.6A CN117277763A (en) 2023-08-28 2023-08-28 Half-bridge driving circuit and high-side NMOS (N-channel metal oxide semiconductor) tube integrated chip applied by same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311092984.6A CN117277763A (en) 2023-08-28 2023-08-28 Half-bridge driving circuit and high-side NMOS (N-channel metal oxide semiconductor) tube integrated chip applied by same

Publications (1)

Publication Number Publication Date
CN117277763A true CN117277763A (en) 2023-12-22

Family

ID=89209501

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311092984.6A Pending CN117277763A (en) 2023-08-28 2023-08-28 Half-bridge driving circuit and high-side NMOS (N-channel metal oxide semiconductor) tube integrated chip applied by same

Country Status (1)

Country Link
CN (1) CN117277763A (en)

Similar Documents

Publication Publication Date Title
CN100555870C (en) Voltage clamping circuit, switch type power supply device, semiconductor device and voltage level converting
US8836300B2 (en) Step-down switching regulator
JP5354625B2 (en) Semiconductor device
US20080309307A1 (en) High Voltage Power Switches Using Low Voltage Transistors
CN105827101A (en) Voltage conversion integrated circuit, bootstrap circuit, and switch driving method
KR20080024986A (en) Step-up/step-down dc-dc converter
CN116742920B (en) NMOS power switch tube driving circuit and control method thereof
CN107659128B (en) DC/DC switching converter power output transistor integrated drive circuit
CN117277763A (en) Half-bridge driving circuit and high-side NMOS (N-channel metal oxide semiconductor) tube integrated chip applied by same
CN111414033A (en) Low dropout voltage regulator and related method
US6819573B2 (en) DC to DC switching power converter with partial-swing switching and method
US11336191B1 (en) Power supply device with low loss
JPH05199093A (en) P-channel field-effect transistor driver circuit
CN112994679A (en) Drive circuit and control chip
CN111600463A (en) One-way conduction circuit and switching power supply using same
CN101286692A (en) Control circuit of P type power transistor
US11606030B1 (en) Driver for driving a p-type power switch
CN116111697B (en) High-reliability circuit structure
US20230130933A1 (en) Switching circuit, dc/dc converter, and control circuit of dc/dc converter
CN117394689B (en) Power supply unit with self-adaptive wide working voltage range and control method thereof
CN115955085B (en) Driving circuit, driving method thereof, control circuit and power supply chip
CN114915163A (en) Charge pump circuit and control method thereof
CN108199593B (en) Low-voltage-drop rectifier circuit and power supply switching circuit
JP4137364B2 (en) Charge pump circuit
CN115776297A (en) Grid driving integrated circuit with low power consumption and wide power supply voltage range

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information
CB02 Change of applicant information

Address after: Room 401, 4th Floor, Building 18, No. 599 Gaojing Road, Xujing Town, Qingpu District, Shanghai, 201702, and Room 501, 5th Floor

Applicant after: Shanghai chuantu Microelectronics Co.,Ltd.

Address before: No.888, Huanhu West 2nd Road, Lingang New District, China (Shanghai) pilot Free Trade Zone, Pudong New Area, Shanghai, 201306

Applicant before: Shanghai chuantu Microelectronics Co.,Ltd.