CN117271423A - Inter-core communication method, system, equipment and medium, and vehicle - Google Patents
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Abstract
The invention provides an inter-core communication method, a system, equipment, a medium and a vehicle, wherein the method comprises the following steps: acquiring a shared memory determined by a microcontroller and a microprocessor, wherein the shared memory comprises a memory address and a length; responding to a microcontroller starting instruction, and writing communication data received by the microcontroller into a shared memory frame by frame; and then responding to the starting instruction of the microprocessor, determining the communication data to be read from the shared memory as target communication data, and mapping the target communication data to the application program for communication according to the memory address and the length of the target communication data in the shared memory. The whole communication process of the invention is equivalent to an annular pipeline, communication data received by the microcontroller can exist in the shared memory for a period of time, and then the application program is read or stored by the microprocessor, so that one-to-many communication between the microcontroller and two chip cores of the microprocessor can be efficiently realized.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to an inter-core communication method, system, device, medium, and vehicle.
Background
With the evolution of the automobile electronic and electric architecture to higher integration, it is gradually possible to realize higher-level driving assistance functions. The addition of more electronic controllers generates massive data, which are generated not only in experiments, but also in actual driving processes. The collected vehicle data and user data are analyzed, so that the method has great significance in achieving task processing functions such as driver behavior habit analysis, intelligent service, fault tracking, cause analysis and the like.
At present, most of automobile big data collection schemes are that an MCU (Microcontroller Unit, microcontroller, abbreviated as MCU) transmits all or part of collected CAN (Controller Area Network, controller area network, abbreviated as CAN) data to an MPU (Microprocessor Unit, microprocessor, abbreviated as MPU), and the MPU transmits the CAN data to a vehicle-mounted terminal and finally uploads the data to a cloud platform. Because CAN data are required to be simultaneously acquired among different modules of the MPU for uploading, calculating or diagnosing processing and the like in actual work, multiple times of data reading and writing and copying operation CAN be caused, unnecessary resource waste is caused, the performance of a vehicle-mounted computer CAN be influenced more seriously, and driving risks are caused.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide an inter-core communication method, system, device and medium, and a vehicle for solving the technical problems in the prior art.
To achieve the above and other related objects, the present invention provides an inter-core communication method, comprising the steps of:
acquiring a shared memory determined by a microcontroller and a microprocessor, wherein the shared memory comprises a memory address and a length;
responding to a microcontroller starting instruction, and writing communication data received by the microcontroller into the shared memory frame by frame;
and responding to a starting instruction of the microprocessor, determining communication data to be read from the shared memory as target communication data, and mapping the target communication data to an application program for communication according to the memory address and the length of the target communication data in the shared memory.
In an embodiment of the present invention, the process of writing the communication data received by the microcontroller into the shared memory frame by frame includes:
encapsulating communication data received by the microcontroller according to a preset format or protocol to generate one or more single-frame communication data;
Based on the write pointer position of the shared memory at the current time, writing all single-frame communication data generated by encapsulation into the shared memory frame by frame, and after one single-frame communication data is written, moving the write pointer backward by one frame of communication data length of memory address for continuous writing;
comparing the length written into the shared memory at the current moment with the preset length of the shared memory;
when the length of the shared memory written in the current time is equal to the preset length of the shared memory, setting a write pointer of the shared memory to be zero, shifting the write pointer to the initial position of a memory address of the shared memory, and continuously circularly writing single-frame communication data generated by packaging frame by frame;
and when the length written into the shared memory at the current moment is smaller than the preset length of the shared memory, continuously writing the single-frame communication data generated by encapsulation frame by frame.
In one embodiment of the present invention, in response to a microprocessor start instruction, the process of determining, from the shared memory, communication data to be read as target communication data, and mapping the target communication data to an application program for communication according to a memory address and a length of the target communication data in the shared memory includes:
Identifying an application program associated with the microprocessor as an associated application program in response to a microprocessor start instruction;
detecting the associated application programs, and recording an application program initiating a communication data reading request in the associated application programs as a target application program; generating a virtual memory by internal mapping of the target application program through a memory mapping function;
determining communication data which needs to be read by the target application program from the shared memory, and taking the communication data as target communication data; and mapping the target communication data into the virtual memory of the target application program according to the memory address and the length of the target communication data in the shared memory so as to enable the target application program to communicate.
In one embodiment of the present invention, the process of mapping the target communication data to the virtual memory of the target application program according to the memory address and the length of the target communication data in the shared memory includes:
reading frame by frame according to the memory address and the length of the target communication data in the shared memory through a read pointer, and after the read pointer reads the current frame communication data, moving the read pointer backward by one frame communication data length of the memory address to continue reading; wherein the read pointer is generated by the memory mapping function when mapping the virtual memory;
Comparing the total length read by the read pointer at the current moment with the length of the memory address of the virtual memory;
if the total length read by the read pointer at the current moment is equal to the length of the memory address of the virtual memory, setting the read pointer to zero, shifting the read pointer to the starting position of the memory address of the virtual memory, and continuously circularly reading communication data to be mapped into the virtual memory of the target application program;
and if the total length read by the read pointer at the current moment is smaller than the memory address length of the virtual memory, continuing to read the communication data and mapping the communication data into the virtual memory of the target application program.
In an embodiment of the present invention, after writing the communication data received by the microcontroller into the shared memory frame by frame, the method further includes: and comparing each frame of communication data in the shared memory with a preset data threshold, and sending out alarm prompt information when a certain frame or certain frames of communication data exceed the preset data threshold.
In one embodiment of the present invention, the communication data received by the microcontroller includes at least one of: controller area network communication data, local area internet communication data, ethernet communication data.
The invention also provides a vehicle, which comprises: a microcontroller and a microprocessor applied to the inter-core communication method as described in any one of the above.
The invention also provides an inter-core communication system, which comprises:
the shared memory module is used for acquiring a shared memory determined by the microcontroller and the microprocessor, wherein the shared memory comprises a memory address and a length;
the data writing module is used for responding to the starting instruction of the microcontroller and writing the communication data received by the microcontroller into the shared memory frame by frame;
the data reading module is used for responding to a starting instruction of the microprocessor and determining communication data to be read from the shared memory as target communication data;
and the communication module is used for mapping the target communication data to an application program for communication according to the memory address and the length of the target communication data in the shared memory.
The present invention also provides an inter-core communication apparatus comprising:
a processor; and, a step of, in the first embodiment,
a computer readable medium storing instructions that, when executed by the processor, cause the apparatus to perform the inter-core communication method as described in any of the above.
The present invention also provides a computer readable medium having instructions stored thereon, the instructions being loaded by a processor and performing an inter-core communication method as described in any of the above.
As described above, the invention provides an inter-core communication method, system, device and medium, and a vehicle, which have the following beneficial effects: firstly, acquiring a shared memory determined by a microcontroller and a microprocessor, and then responding to a microcontroller starting instruction, and writing communication data received by the microcontroller into the shared memory frame by frame; and then responding to the starting instruction of the microprocessor, determining the communication data to be read from the shared memory as target communication data, and mapping the target communication data to the application program for communication according to the memory address and the length of the target communication data in the shared memory. The shared memory comprises a memory address and a length. Therefore, the whole communication process of the invention is equivalent to a ring pipeline, communication data received by the microcontroller can exist in the shared memory for a period of time, and then the supply program is read or stored by the microprocessor, so that one-to-many communication can be efficiently realized between the microcontroller and the two chip cores of the microprocessor. Namely, the invention only generates the copy operation of the data for 0 times or 1 time for multitasking, thereby improving the communication operation efficiency. In addition, when the communication data of a certain node breaks through a threshold value or is abnormal, an alarm can be sent to a user or a cloud, so that the shared memory can be dynamically monitored.
Drawings
FIG. 1 is a flow chart of an inter-core communication method according to an embodiment of the present invention;
fig. 2 is a flow chart of an inter-core communication method according to another embodiment of the invention
FIG. 3 is a schematic diagram illustrating a schematic diagram of inter-core communication between a microcontroller and a microprocessor according to an embodiment of the present invention;
fig. 4 is a schematic hardware structure of an inter-core communication system according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of an exemplary system architecture to which the teachings of one or more embodiments of the present invention may be applied;
fig. 6 is a schematic diagram of a hardware architecture of an inter-core communication device suitable for implementing one or more embodiments of the present invention.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
Fig. 1 is a schematic flow chart of an inter-core communication method according to an embodiment of the invention. Specifically, in an exemplary embodiment, as shown in fig. 1, the present embodiment provides an inter-core communication method, which includes the steps of:
s110, acquiring a shared memory determined by the micro controller MCU and the micro processor MPU, wherein the shared memory comprises a memory address and a length. As an example, the embodiment may open up a ring with fixed end-to-end addresses at the micro controller MCU end and the micro controller MPU end, as a shared memory area.
S120, responding to a starting instruction of the micro controller MCU, and writing communication data received by the micro controller MCU into the shared memory frame by frame. As an example, in the present embodiment, the communication data received by the microcontroller MCU includes, but is not limited to: the controller area network (Controller Area Network, abbreviated as CAN) communication data, the local area internet (Local Interconnect Network, abbreviated as LIN) communication data, the ethernet communication data, etc., and in addition, the communication data received by the microcontroller MCU may be other communication protocol data suitable for a standard communication mode. As an example, the ethernet communication data in the present embodiment may be SOME/IP (Scalable service-Oriented MiddlewarE over Internet Protocol, abbreviated as SOME/IP) communication data. After the communication data received by the microcontroller MCU is written into the shared memory frame by frame, the embodiment may also periodically search the memory pool when the controller is running, to obtain the required communication data corresponding to a certain node on the vehicle.
S130, responding to a microprocessor MPU starting instruction, determining communication data to be read from a shared memory as target communication data, and mapping the target communication data to an application program for communication according to the memory address and the length of the target communication data in the shared memory.
Therefore, the whole communication process of the embodiment is equivalent to an annular pipeline, communication data received by the micro controller MCU can exist in the shared memory for a period of time, and then the supply program is read or stored by the micro controller MPU, so that one-to-many communication can be efficiently realized between the micro controller MCU and the micro controller MPU. That is, the present embodiment only takes place the copy operation of the data 0 or 1 time for the multitasking, thereby improving the communication operation efficiency.
In an exemplary embodiment, the process of writing the communication data received by the microcontroller MCU into the shared memory frame by frame includes: encapsulating communication data received by the microcontroller MCU according to a preset format or protocol to generate one or more single-frame communication data; based on the write pointer position of the shared memory at the current moment, writing all single-frame communication data generated by encapsulation into the shared memory frame by frame, and after one single-frame communication data is written, moving the write pointer backwards by one frame communication data length of memory address for continuous writing; comparing the length written into the shared memory at the current moment with the preset length of the shared memory; when the length of the shared memory written in the current moment is equal to the preset length of the shared memory, setting a write pointer of the shared memory to be zero, shifting the write pointer to the initial position of a memory address of the shared memory, and continuously circularly writing single-frame communication data generated by encapsulation frame by frame; and when the length written into the shared memory at the current moment is smaller than the preset length of the shared memory, continuously writing the single-frame communication data generated by encapsulation frame by frame. Therefore, the embodiment can write data into the shared memory continuously, and the write pointer can shift the memory address by one frame communication data length after writing one frame communication data, and then write communication data continuously.
In an exemplary embodiment, in response to a microprocessor MPU start instruction, and determine, from a shared memory, communication data to be read as target communication data, and map the target communication data to an application program for communication according to a memory address and a length of the target communication data in the shared memory, a process of performing communication includes: in response to a microprocessor MPU start instruction, identifying an application program associated with the microprocessor MPU as an associated application program; detecting the associated application programs, and recording an application program initiating a communication data reading request in the associated application programs as a target application program; generating a virtual memory by internal mapping of the memory mapping function in the target application program; determining communication data which needs to be read by a target application program from a shared memory, and taking the communication data as target communication data; and mapping the target communication data into the virtual memory of the target application program according to the memory address and the length of the target communication data in the shared memory so as to enable the target application program to communicate. Specifically, the process of mapping the target communication data into the virtual memory of the target application program according to the memory address and the length of the target communication data in the shared memory includes: reading frame by frame according to the memory address and the length of the target communication data in the shared memory through the read pointer, and after the read pointer reads the current frame communication data, moving the read pointer backwards by one frame communication data length of the memory address to continue reading; wherein, the read pointer is generated when the memory mapping function generates virtual memory in a mapping way; comparing the total length read by the read pointer at the current moment with the length of the memory address of the virtual memory; if the total length read by the read pointer at the current moment is equal to the length of the memory address of the virtual memory, setting the read pointer to zero, shifting the read pointer to the initial position of the memory address of the virtual memory, and continuously circularly reading communication data to map to the virtual memory of the target application program; if the total length read by the read pointer at the current moment is smaller than the memory address length of the virtual memory, continuing to read the communication data and mapping the communication data into the virtual memory of the target application program. In this embodiment, the memory mapping function may be mmap (Memory Mapped Files, mmap for short).
Specifically, in this embodiment, the application program adopts the specific technical procedure of mmap mapping virtual memory:
opening communication data: the application program first opens the communication data to be mapped using a microprocessor MPU call (e.g., open ()). When opening communication data, it is necessary to specify a path and an open mode (e.g., read only, read write, etc.) of the communication data.
Acquiring the size of communication data: the size of the communication data is obtained by a microprocessor MPU call (e.g., stat ()) to allocate sufficient memory space for the mapping.
Memory space is allocated: the application program allocates a block of virtual memory space for mapping the communication data into memory using a microprocessor MPU call (e.g., mmap ()). The mmap () function returns a pointer to the mapped region.
Communication data mapping: the application program uses a microprocessor MPU call (e.g., mmap ()) to map the open communication data into the allocated virtual memory space. When the mmap () function is called, parameters such as a communication data descriptor, a size of a mapping area, a mapping manner (such as a shared mapping or a private mapping), an access right of the mapping area, and the like need to be specified.
Accessing communication data: once the communication data mapping is complete, the application may read or write the contents of the communication data by accessing the virtual memory space. Thus, the read-write operation of the communication data can be performed like the memory to be stored.
Synchronizing data: if the application program modifies the mapped communication data, a microprocessor MPU call (e.g., msync ()) can be used to synchronize modifications in memory into the communication data to ensure data consistency.
Demapping: when the application program no longer needs to access the mapped communication data, the microprocessor MPU call (such as a munmap ()) can be used to release the mapping relationship between the communication data and the memory, and the corresponding memory space is released.
Therefore, the task that needs to acquire the communication data on the MPU side of the microprocessor searches and reads the data, and the pointer is set to zero after the memory area is fully written or read, so that the annular pipeline effect is achieved, and the requirement of acquiring the communication data by multiple tasks is met. Meanwhile, by means of the mmap address mapping technology, an application program can conveniently map communication data into the memory, the reading and writing efficiency of the communication data is improved, the communication data can be operated in a mode of directly accessing the memory, and the operation flow of the communication data is simplified.
In an exemplary embodiment, after writing the communication data received by the micro controller MCU into the shared memory frame by frame, the embodiment may further include: and comparing each frame of communication data in the shared memory with a preset data threshold, and sending out alarm prompt information when the communication data of a certain frame or certain frames exceeds the preset data threshold. Therefore, when the communication data of a certain node breaks through a threshold value or is abnormal, an alarm can be sent to a user or a cloud, so that the shared memory can be dynamically monitored.
In another exemplary embodiment of the present invention, this embodiment further provides an inter-core communication method, as shown in fig. 2 and 3, fig. 2 shows a schematic flow chart of the inter-core communication method in this embodiment, and fig. 3 shows a schematic diagram of a principle framework of inter-core communication between a microcontroller and a microprocessor in this embodiment. Specifically, the method comprises the following steps:
1) In a general scene, a similar linux or qnx system is operated on the MPU side of the microprocessor, a virtual address is accessed by a mode of mapping a physical memory address, a real-time operating system is generally adopted by the MCU, the physical memory address can be directly controlled, and firstly, the MCU and the MPU define a memory address and a length as a 'pipeline' for communication of two parties;
2) The microcontroller MCU starts working after being started, the received CAN data is written into the section of memory address frame by frame through interruption, the memory head part comprises a write pointer position, and after one frame is written, the write pointer is shifted to the next memory address. In this embodiment, the interrupt is a working mode of the microcontroller MCU to process tasks; when CAN data is written frame by frame, a general CAN bus is directly connected to the MCU. As an example, the communication data received by the microcontroller MCU in this embodiment may be not limited to CAN data communication, but may also be applied to communication protocols of standard communication modes, such as SOME/IP, LIN communication, and the like.
3) When the memory address written by the MCU reaches the length defined by the shared memory, the pointer is set to 0, and the pointer is offset to the starting position of the shared memory address again, and the cyclic writing is continued;
4) When the MPU of the microprocessor runs, one or more application programs need CAN data, when the application programs need CAN data, the application programs adopt mmap to map out the address, the CAN data and the write pointer position are obtained, and meanwhile, a virtual memory and a read pointer pointing to the virtual memory are generated inside the application programs;
5) After each application program reads CAN data, the read pointer is moved backward by one frame of memory address with the communication data length, and when the read pointer is equal to the defined address length of the virtual memory, the read pointer is set to 0, so that the purpose of cyclic reading is achieved.
Therefore, the present embodiment provides a ring pipeline type inter-core communication method, which is equivalent to a ring pipeline in the whole communication process, and communication data can exist in a shared memory for a period of time and then be read or stored by an application program, so that one-to-many communication can be efficiently realized. In this embodiment, an annular shared memory area with fixed head-to-tail addresses is opened up at the Micro Controller Unit (MCU) end and the Micro Processor Unit (MPU) end, after the automobile is started, the Micro Controller Unit (MCU) end connected with the CAN bus continuously writes data into the shared memory, and after one frame is written, the memory address with the length of one frame of communication data is moved backwards for continuous writing; each task module on the MPU side of the microprocessor searches and reads data when the task of acquiring CAN data is required, and after the memory area is fully written or read, the pointer is set to zero and restarted, so that the annular assembly line effect is achieved, and the requirement of acquiring the CAN data by multiple tasks is met. In this embodiment, the multitasking only takes place for 0 or 1 copy operation of the data, thereby improving the communication operation efficiency. In addition, the embodiment can dynamically monitor the shared memory, namely, when certain node data breaks through a threshold value or is abnormal, an alarm is initiated to a user or a cloud. Meanwhile, the embodiment CAN also periodically search the shared memory pool by operating the controller to acquire the needed CAN data corresponding to a certain node on the vehicle.
In summary, the present invention provides an inter-core communication method, which includes firstly obtaining a shared memory determined by a micro controller MCU and a micro processor MPU, and then writing communication data received by the micro controller MCU into the shared memory frame by frame in response to a micro controller MCU start command; and then responding to the MPU starting instruction of the microprocessor, determining the communication data to be read from the shared memory as target communication data, and mapping the target communication data to the application program for communication according to the memory address and the length of the target communication data in the shared memory. The shared memory comprises a memory address and a length. Therefore, the whole communication process of the method is equivalent to an annular pipeline, communication data received by the micro controller MCU can exist in the shared memory for a period of time, and then the supply application program is read or stored by the micro controller MPU, so that one-to-many communication can be efficiently realized between the micro controller MCU and the micro controller MPU. Namely, the method only generates the copy operation of the data for 0 times or 1 time for multitasking, thereby improving the communication operation efficiency. In addition, when the communication data of a certain node breaks through a threshold value or is abnormal, an alarm can be sent to a user or a cloud, so that the method can dynamically monitor the shared memory.
In another exemplary embodiment of the present invention, as shown in fig. 4, the embodiment further provides an inter-core communication system, including:
a shared memory module 410, configured to obtain a shared memory determined by the microcontroller MCU and the microprocessor MPU, where the shared memory includes a memory address and a length; as an example, the embodiment may open up a ring with fixed end-to-end addresses at the micro controller MCU end and the micro controller MPU end, as a shared memory area.
The data writing module 420 is configured to respond to a start instruction of the microcontroller MCU, and write the communication data received by the microcontroller MCU into the shared memory frame by frame; as an example, in the present embodiment, the communication data received by the microcontroller MCU includes, but is not limited to: the controller area network (Controller Area Network, abbreviated as CAN) communication data, the local area internet (Local Interconnect Network, abbreviated as LIN) communication data, the ethernet communication data, etc., and in addition, the communication data received by the microcontroller MCU may be other communication protocol data suitable for a standard communication mode. As an example, the ethernet communication data in the present embodiment may be SOME/IP (Scalable service-Oriented MiddlewarE over Internet Protocol, abbreviated as SOME/IP) communication data. After the communication data received by the microcontroller MCU is written into the shared memory frame by frame, the embodiment may also periodically search the memory pool when the controller is running, to obtain the required communication data corresponding to a certain node on the vehicle.
The data reading module 430 is configured to respond to the microprocessor MPU start instruction, and determine, from the shared memory, communication data to be read as target communication data;
the communication module 440 is configured to map the target communication data to the application program for communication according to the memory address and the length of the target communication data in the shared memory.
Therefore, the whole communication process of the embodiment is equivalent to an annular pipeline, communication data received by the micro controller MCU can exist in the shared memory for a period of time, and then the supply program is read or stored by the micro controller MPU, so that one-to-many communication can be efficiently realized between the micro controller MCU and the micro controller MPU. That is, the present embodiment only takes place the copy operation of the data 0 or 1 time for the multitasking, thereby improving the communication operation efficiency.
In an exemplary embodiment, the process of writing the communication data received by the microcontroller MCU into the shared memory frame by frame includes: encapsulating communication data received by the microcontroller MCU according to a preset format or protocol to generate one or more single-frame communication data; based on the write pointer position of the shared memory at the current moment, writing all single-frame communication data generated by encapsulation into the shared memory frame by frame, and after one single-frame communication data is written, moving the write pointer backwards by one frame communication data length of memory address for continuous writing; comparing the length written into the shared memory at the current moment with the preset length of the shared memory; when the length of the shared memory written in the current moment is equal to the preset length of the shared memory, setting a write pointer of the shared memory to be zero, shifting the write pointer to the initial position of a memory address of the shared memory, and continuously circularly writing single-frame communication data generated by encapsulation frame by frame; and when the length written into the shared memory at the current moment is smaller than the preset length of the shared memory, continuously writing the single-frame communication data generated by encapsulation frame by frame. Therefore, the embodiment can write data into the shared memory continuously, and the write pointer can shift the memory address by one frame communication data length after writing one frame communication data, and then write communication data continuously.
In an exemplary embodiment, in response to a microprocessor MPU start instruction, and determine, from a shared memory, communication data to be read as target communication data, and map the target communication data to an application program for communication according to a memory address and a length of the target communication data in the shared memory, a process of performing communication includes: in response to a microprocessor MPU start instruction, identifying an application program associated with the microprocessor MPU as an associated application program; detecting the associated application programs, and recording an application program initiating a communication data reading request in the associated application programs as a target application program; generating a virtual memory by internal mapping of the memory mapping function in the target application program; determining communication data which needs to be read by a target application program from a shared memory, and taking the communication data as target communication data; and mapping the target communication data into the virtual memory of the target application program according to the memory address and the length of the target communication data in the shared memory so as to enable the target application program to communicate. Specifically, the process of mapping the target communication data into the virtual memory of the target application program according to the memory address and the length of the target communication data in the shared memory includes: reading frame by frame according to the memory address and the length of the target communication data in the shared memory through the read pointer, and after the read pointer reads the current frame communication data, moving the read pointer backwards by one frame communication data length of the memory address to continue reading; wherein, the read pointer is generated when the memory mapping function generates virtual memory in a mapping way; comparing the total length read by the read pointer at the current moment with the length of the memory address of the virtual memory; if the total length read by the read pointer at the current moment is equal to the length of the memory address of the virtual memory, setting the read pointer to zero, shifting the read pointer to the initial position of the memory address of the virtual memory, and continuously circularly reading communication data to map to the virtual memory of the target application program; if the total length read by the read pointer at the current moment is smaller than the memory address length of the virtual memory, continuing to read the communication data and mapping the communication data into the virtual memory of the target application program. In this embodiment, the memory mapping function may be mmap (Memory Mapped Files, mmap for short).
Specifically, in this embodiment, the application program adopts the specific technical procedure of mmap mapping virtual memory:
opening communication data: the application program first opens the communication data to be mapped using a microprocessor MPU call (e.g., open ()). When opening communication data, it is necessary to specify a path and an open mode (e.g., read only, read write, etc.) of the communication data.
Acquiring the size of communication data: the size of the communication data is obtained by a microprocessor MPU call (e.g., stat ()) to allocate sufficient memory space for the mapping.
Memory space is allocated: the application program allocates a block of virtual memory space for mapping the communication data into memory using a microprocessor MPU call (e.g., mmap ()). The mmap () function returns a pointer to the mapped region.
Communication data mapping: the application program uses a microprocessor MPU call (e.g., mmap ()) to map the open communication data into the allocated virtual memory space. When the mmap () function is called, parameters such as a communication data descriptor, a size of a mapping area, a mapping manner (such as a shared mapping or a private mapping), an access right of the mapping area, and the like need to be specified.
Accessing communication data: once the communication data mapping is complete, the application may read or write the contents of the communication data by accessing the virtual memory space. Thus, the read-write operation of the communication data can be performed like the memory to be stored.
Synchronizing data: if the application program modifies the mapped communication data, a microprocessor MPU call (e.g., msync ()) can be used to synchronize modifications in memory into the communication data to ensure data consistency.
Demapping: when the application program no longer needs to access the mapped communication data, the microprocessor MPU call (such as a munmap ()) can be used to release the mapping relationship between the communication data and the memory, and the corresponding memory space is released.
Therefore, the task that needs to acquire the communication data on the MPU side of the microprocessor searches and reads the data, and the pointer is set to zero after the memory area is fully written or read, so that the annular pipeline effect is achieved, and the requirement of acquiring the communication data by multiple tasks is met. Meanwhile, by means of the mmap address mapping technology, an application program can conveniently map communication data into the memory, the reading and writing efficiency of the communication data is improved, the communication data can be operated in a mode of directly accessing the memory, and the operation flow of the communication data is simplified.
In an exemplary embodiment, after writing the communication data received by the micro controller MCU into the shared memory frame by frame, the embodiment may further include: and comparing each frame of communication data in the shared memory with a preset data threshold, and sending out alarm prompt information when the communication data of a certain frame or certain frames exceeds the preset data threshold. Therefore, when the communication data of a certain node breaks through a threshold value or is abnormal, an alarm can be sent to a user or a cloud, so that the shared memory can be dynamically monitored.
In summary, the present invention provides an inter-core communication system, firstly, a shared memory determined by a micro controller MCU and a micro processor MPU is obtained, and then, in response to a micro controller MCU start instruction, communication data received by the micro controller MCU is written into the shared memory frame by frame; and then responding to the MPU starting instruction of the microprocessor, determining the communication data to be read from the shared memory as target communication data, and mapping the target communication data to the application program for communication according to the memory address and the length of the target communication data in the shared memory. The shared memory comprises a memory address and a length. Therefore, the whole communication process of the system is equivalent to an annular pipeline, communication data received by the micro controller MCU can exist in the shared memory for a period of time, and then the supply application program is read or stored by the micro controller MPU, so that one-to-many communication can be efficiently realized between the micro controller MCU and the micro controller MPU. Namely, the system only generates data copy operation for 0 times or 1 time for multitasking, thereby improving the communication operation efficiency. In addition, when the communication data of a certain node breaks through a threshold value or is abnormal, an alarm can be sent to a user or a cloud, so that the system can dynamically monitor the shared memory.
It should be noted that, the inter-core communication system provided by the above embodiment and the inter-core communication method provided by the above embodiment belong to the same concept, and a specific manner in which each module in the inter-core communication system performs an operation has been described in detail in the method embodiment, which is not described herein again. In practical application, the inter-core communication system provided in the above embodiment may allocate the functions to different functional modules according to needs, that is, the internal structure of the system is divided into different functional modules to complete all or part of the functions described in the inter-core communication method, which is not limited herein.
In another exemplary embodiment of the present invention, the embodiment further provides a vehicle including: the micro controller MCU and the micro controller MPU may be applied to the inter-core communication method described in any one of the above embodiments. It should be noted that, the vehicle provided in this embodiment and the inter-core communication method provided in the foregoing embodiments belong to the same concept, and the specific manner in which the micro controller MCU and the micro processor MPU perform operations has been described in detail in the method embodiment, which is not described herein again. Therefore, the technical functions and effects of the vehicle in this embodiment are referred to the related embodiments of the inter-core communication method, and the description of this embodiment is omitted herein.
It should be noted that, in the above embodiment, when the related data (for example, the vehicle driving data, the vehicle communication data, the user communication data, etc.) is reasonably processed, collected, stored, used, processed, transmitted, provided, disclosed, deleted, etc., the above embodiment is completed with the user's consent. Such as vehicle travel data, vehicle communication data, user communication data, etc., are authorized with the user's knowledge and consent; either the user is actively provided after reading the relevant description, or the user is actively authorized/provided/uploaded, or otherwise obtained through or informed of the user's consent, while using some or all of the functions described in the above embodiments.
Fig. 5 shows a schematic diagram of an exemplary system architecture to which the technical solution of one or more embodiments of the present invention may be applied. As shown in fig. 5, system architecture 100 may include a terminal device 110, a network 120, and a server 130. Terminal device 110 may include various electronic devices such as smart phones, tablet computers, notebook computers, desktop computers, and the like. The server 130 may be an independent physical server, a server cluster or a distributed system formed by a plurality of physical servers, or a cloud server providing cloud computing services. Network 120 may be a communication medium of various connection types capable of providing a communication link between terminal device 110 and server 130, and may be, for example, a wired communication link or a wireless communication link.
The system architecture in embodiments of the present invention may have any number of terminal devices, networks, and servers, as desired for implementation. For example, the server 130 may be a server group composed of a plurality of server devices. In addition, the technical solution provided in the embodiment of the present invention may be applied to the terminal device 110, or may be applied to the server 130, or may be implemented by the terminal device 110 and the server 130 together, which is not limited in particular.
In one embodiment of the present invention, the terminal device 110 or the server 130 of the present invention may first acquire the shared memory determined by the MCU and the MPU, and then write the communication data received by the MCU into the shared memory frame by frame in response to the MCU start command; and responding to an MPU starting instruction, determining communication data to be read from the shared memory as target communication data, and mapping the target communication data to an application program for communication according to the memory address and the length of the target communication data in the shared memory. The shared memory comprises a memory address and a length. The inter-core communication method is performed by using the terminal device 110 or the server 130, the whole communication process is equivalent to a ring pipeline, communication data received by the MCU can exist in the shared memory for a period of time, and then the application program is read or stored by the MPU, so that one-to-many communication between the two chip cores of the MCU and the MPU can be efficiently realized. Namely, the method only generates the copy operation of the data for 0 times or 1 time for multitasking, thereby improving the communication operation efficiency. In addition, when the communication data of a certain node breaks through a threshold value or is abnormal, an alarm can be sent to a user or a cloud, so that the method can dynamically monitor the shared memory. The foregoing presents a simplified summary of an exemplary system architecture employing the teachings of the present invention.
The embodiment of the invention also provides inter-core communication equipment, which can comprise: one or more processors; and one or more machine readable media having instructions stored thereon that, when executed by the one or more processors, cause the device to perform the inter-core communication method described in fig. 1. Fig. 6 shows a schematic structural diagram of an inter-core communication device 1000. Referring to fig. 6, the inter-core communication device 1000 includes: processor 1010, memory 1020, power supply 1030, display unit 1040, and input unit 1060.
The processor 1010 is a control center of the inter-core communication device 1000, connects the respective components using various interfaces and lines, and performs various functions of the inter-core communication device 1000 by running or executing software programs and/or data stored in the memory 1020, thereby performing overall monitoring of the inter-core communication device 1000. In an embodiment of the present invention, processor 1010 performs the inter-core communication method described in FIG. 1 when it invokes a computer program stored in memory 1020. In the alternative, processor 1010 may include one or more processing units; preferably, the processor 1010 may integrate an application processor that primarily handles operating systems, user interfaces, applications, etc., with a modem processor that primarily handles wireless communications. In some embodiments, the processor, memory, may be implemented on a single chip, and in some embodiments, they may be implemented separately on separate chips.
The memory 1020 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, various applications, etc.; the storage data area may store data created according to the use of the inter-core communication device 1000, and the like. In addition, memory 1020 may include high-speed random access memory and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid state memory device, among others.
The inter-core communication device 1000 also includes a power supply 1030 (e.g., a battery) for powering the various components that can be logically connected to the processor 1010 via a power management system so as to perform functions such as managing charge, discharge, and power consumption via the power management system.
The display unit 1040 may be used to display information input by a user or information provided to the user, and various menus of the inter-core communication device 1000, and in the embodiment of the present invention, is mainly used to display a display interface of each application in the inter-core communication device 1000, and objects such as text and pictures displayed in the display interface. The display unit 1040 may include a display panel 1050. The display panel 1050 may be configured in the form of a liquid crystal display (Liquid Crystal Display, LCD), an Organic Light-Emitting Diode (OLED), or the like.
The input unit 1060 may be used to receive information such as numbers or characters input by a user. The input unit 1060 may include a touch panel 1070 and other input devices 1080. Wherein the touch panel 1070, also referred to as a touch screen, may collect touch operations thereon or thereabout by a user (e.g., operations of the user on the touch panel 1070 or thereabout by using any suitable object or accessory such as a finger, a stylus, etc.).
Specifically, the touch panel 1070 may detect a touch operation by a user, detect signals resulting from the touch operation, convert the signals into coordinates of contacts, send the coordinates to the processor 1010, and receive and execute commands sent from the processor 1010. In addition, the touch panel 1070 may be implemented in various types such as resistive, capacitive, infrared, and surface acoustic wave. Other input devices 1080 may include, but are not limited to, one or more of a physical keyboard, function keys (e.g., volume control keys, power on and off keys, etc.), a trackball, mouse, joystick, etc.
Of course, the touch panel 1070 may overlay the display panel 1050, and when a touch operation is detected on or near the touch panel 1070, the touch operation is transmitted to the processor 1010 to determine the type of touch event, and then the processor 1010 provides a corresponding visual output on the display panel 1050 according to the type of touch event. Although in fig. 6, the touch panel 1070 and the display panel 1050 implement the input and output functions of the inter-core communication device 1000 as two separate components, in some embodiments, the touch panel 1070 and the display panel 1050 may be integrated to implement the input and output functions of the inter-core communication device 1000.
The inter-core communication device 1000 may also include one or more sensors, such as pressure sensors, gravitational acceleration sensors, proximity light sensors, and the like. Of course, the inter-core communication device 1000 described above may also include other components such as cameras, as desired in a particular application.
Embodiments of the present invention also provide a computer-readable storage medium having instructions stored therein that, when executed by one or more processors, enable the above-described apparatus to perform the inter-core communication method of the present invention as described in fig. 1.
It will be appreciated by those skilled in the art that fig. 6 is merely an example of an inter-core communication device and is not limiting of the device, and the device may include more or fewer components than shown, or may combine certain components, or different components. For convenience of description, the above parts are described as being functionally divided into modules (or units) respectively. Of course, in implementing the present invention, the functions of each module (or unit) may be implemented in the same piece or pieces of software or hardware.
It will be appreciated by those skilled in the art that the invention can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein. The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention, which are desirably implemented by computer program instructions, each flowchart and/or block diagram illustration, and combinations of flowchart illustrations and/or block diagrams. These computer program instructions may be applied to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks. These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It should be understood that although the terms first, second, third, etc. may be used to describe the preset ranges, etc. in the embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are only used to distinguish one preset range from another. For example, a first preset range may also be referred to as a second preset range, and similarly, a second preset range may also be referred to as a first preset range without departing from the scope of embodiments of the present invention.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (10)
1. An inter-core communication method, comprising the steps of:
acquiring a shared memory determined by a microcontroller and a microprocessor, wherein the shared memory comprises a memory address and a length;
responding to a microcontroller starting instruction, and writing communication data received by the microcontroller into the shared memory frame by frame;
And responding to a starting instruction of the microprocessor, determining communication data to be read from the shared memory as target communication data, and mapping the target communication data to an application program for communication according to the memory address and the length of the target communication data in the shared memory.
2. The method of inter-core communication according to claim 1, wherein writing communication data received by a microcontroller into the shared memory frame by frame comprises:
encapsulating communication data received by the microcontroller according to a preset format or protocol to generate one or more single-frame communication data;
based on the write pointer position of the shared memory at the current time, writing all single-frame communication data generated by encapsulation into the shared memory frame by frame, and after one single-frame communication data is written, moving the write pointer backward by one frame of communication data length of memory address for continuous writing;
comparing the length written into the shared memory at the current moment with the preset length of the shared memory;
when the length of the shared memory written in the current time is equal to the preset length of the shared memory, setting a write pointer of the shared memory to be zero, shifting the write pointer to the initial position of a memory address of the shared memory, and continuously circularly writing single-frame communication data generated by packaging frame by frame;
And when the length written into the shared memory at the current moment is smaller than the preset length of the shared memory, continuously writing the single-frame communication data generated by encapsulation frame by frame.
3. The inter-core communication method according to claim 1 or 2, wherein the process of responding to the microprocessor start instruction and determining the communication data to be read from the shared memory as target communication data, and mapping the target communication data to the application program for communication according to the memory address and the length of the target communication data in the shared memory comprises:
identifying an application program associated with the microprocessor as an associated application program in response to a microprocessor start instruction;
detecting the associated application programs, and recording an application program initiating a communication data reading request in the associated application programs as a target application program; generating a virtual memory by internal mapping of the target application program through a memory mapping function;
determining communication data which needs to be read by the target application program from the shared memory, and taking the communication data as target communication data; and mapping the target communication data into the virtual memory of the target application program according to the memory address and the length of the target communication data in the shared memory so as to enable the target application program to communicate.
4. The method of inter-core communication according to claim 3, wherein the mapping the target communication data into the virtual memory of the target application according to the memory address and the length of the target communication data in the shared memory comprises:
reading frame by frame according to the memory address and the length of the target communication data in the shared memory through a read pointer, and after the read pointer reads the current frame communication data, moving the read pointer backward by one frame communication data length of the memory address to continue reading; wherein the read pointer is generated by the memory mapping function when mapping the virtual memory;
comparing the total length read by the read pointer at the current moment with the length of the memory address of the virtual memory;
if the total length read by the read pointer at the current moment is equal to the length of the memory address of the virtual memory, setting the read pointer to zero, shifting the read pointer to the starting position of the memory address of the virtual memory, and continuously circularly reading communication data to be mapped into the virtual memory of the target application program;
and if the total length read by the read pointer at the current moment is smaller than the memory address length of the virtual memory, continuing to read the communication data and mapping the communication data into the virtual memory of the target application program.
5. The method of inter-core communication according to claim 1, wherein after writing the communication data received by the microcontroller into the shared memory frame by frame, the method further comprises: and comparing each frame of communication data in the shared memory with a preset data threshold, and sending out alarm prompt information when a certain frame or certain frames of communication data exceed the preset data threshold.
6. The method of inter-core communication of claim 1, wherein the communication data received by the microcontroller comprises at least one of: controller area network communication data, local area internet communication data, ethernet communication data.
7. A vehicle, the vehicle comprising: microcontroller and microprocessor for use in an inter-core communication method as claimed in any one of the preceding claims 1 to 6.
8. An inter-core communication system, the system comprising:
the shared memory module is used for acquiring a shared memory determined by the microcontroller and the microprocessor, wherein the shared memory comprises a memory address and a length;
the data writing module is used for responding to the starting instruction of the microcontroller and writing the communication data received by the microcontroller into the shared memory frame by frame;
The data reading module is used for responding to a starting instruction of the microprocessor and determining communication data to be read from the shared memory as target communication data;
and the communication module is used for mapping the target communication data to an application program for communication according to the memory address and the length of the target communication data in the shared memory.
9. An inter-core communication device, comprising:
a processor; and, a step of, in the first embodiment,
a computer readable medium storing instructions that, when executed by the processor, cause the apparatus to perform the inter-core communication method of any of claims 1 to 6.
10. A computer readable medium having instructions stored thereon, the instructions being loaded by a processor and executing the inter-core communication method of any of claims 1 to 6.
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| CN118210635A (en) * | 2024-05-20 | 2024-06-18 | 杭州沃镭智能科技股份有限公司 | Method and system for realizing embedded memory sharing based on CAN bus |
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