CN117270312A - Method for accurately extracting center line of photomask of circuit layout - Google Patents

Method for accurately extracting center line of photomask of circuit layout Download PDF

Info

Publication number
CN117270312A
CN117270312A CN202311284522.4A CN202311284522A CN117270312A CN 117270312 A CN117270312 A CN 117270312A CN 202311284522 A CN202311284522 A CN 202311284522A CN 117270312 A CN117270312 A CN 117270312A
Authority
CN
China
Prior art keywords
line segment
line
photomask
line segments
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311284522.4A
Other languages
Chinese (zh)
Inventor
耿明强
任堃
高大为
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhejiang University ZJU
Original Assignee
Zhejiang University ZJU
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhejiang University ZJU filed Critical Zhejiang University ZJU
Priority to CN202311284522.4A priority Critical patent/CN117270312A/en
Publication of CN117270312A publication Critical patent/CN117270312A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441—Optical proximity correction [OPC]
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

The invention discloses a method for precisely extracting a photomask center line of a circuit layout. The invention mainly comprises the following steps: acquiring circuit layout file information, wherein the circuit layout file information mainly comprises a point sequence describing a graphic boundary; screening and removing redundant points, and simplifying boundary information; connecting adjacent points into line segments, and then screening out line segments meeting the conditions; matching the line segments, matching the corresponding line segments, and finding and defining a starting edge and a terminating edge; and generating a center point according to the matched line segments, and outputting a photomask center line. Aiming at the patterns with low shape complexity, the invention can extract and obtain the extremely accurate photomask center line instead of the approximate center line, and can realize the original pattern restoration of the high-fidelity photomask; for the graph with high shape complexity, on the basis of ensuring the original graph as much as possible, the extraction accuracy is high, and the calculated number of points of the center line is small.

Description

Method for accurately extracting center line of photomask of circuit layout
Technical Field
The invention relates to the technical field of integrated circuit layouts, in particular to a method for accurately extracting a photomask center line of a circuit layout.
Background
As integrated circuit technology advances, manufacturers need to achieve smaller structures and higher densities on a chip. The reduction of the size can make diffraction effect in the photoetching process more obvious, and the shape of the graph is distorted, so that the limitation of the photoetching technology caused by the continuous reduction of the size is overcome, and the resolution enhancement technology is introduced into the OPC (Optical Proximity Correction) layout. OPC is a Computer Aided Design (CAD) technique for photolithography processes that can improve image distortion and dimensional deviation during photolithography by introducing a correction pattern into the chip design.
The purpose of the center line restoration is to restore the image mode in the photolithography process to the exact shape of the design pattern, and to connect the boundary points of the original pattern with the boundary points after OPC adjustment, so as to maintain the continuity and smoothness of the pattern. By restoring the center line, the photoresist can be better shrunk during exposure, thereby reducing shape distortion. In addition, the reduction center line can also help control the light intensity distribution of the photoresist in different areas, and the photoetching precision and consistency are improved. In OPC (Optical Proximity Correction ) techniques, restoring the centerline is a critical step.
Disclosure of Invention
In order to solve the problems mentioned in the background art, the invention provides a method for precisely extracting the photomask center line of a circuit layout, which can obtain the photomask center line from the OPC layout pattern of an integrated circuit.
In a first aspect, the present invention provides a method for precisely extracting a photomask centerline of a circuit layout, including:
step 1, obtaining circuit layout file information, which comprises a boundary point sequence describing a graphic boundary;
step 2, screening and eliminating some redundant boundary points through conditions, and simplifying boundary information;
step 3, connecting adjacent boundary points into line segments, and then screening out line segments meeting the conditions;
step 4, carrying out line segment matching on line segments meeting the conditions, and finding out a starting edge and a terminating edge for the matched line segment pairs;
and 5, generating a center point according to the matched line segments, and acquiring a photomask center line of the circuit layout according to the center point.
In a second aspect, the invention provides a mask, which is obtained by extracting a circuit layout photomask center line by using the method and then performing OPC correction on the circuit layout photomask center line.
In a third aspect, the present invention provides a device for correcting a photomask pattern, including:
the data acquisition module is in charge of acquiring a layout to be OPC corrected;
the photomask center line extraction module is used for extracting the photomask center line of the circuit layout by using the method for the layout to be OPC corrected;
and the OPC correction module is used for performing OPC correction on the extracted full-layout photomask center line in all directions in which the mask manufacturability rules are not limited.
In a fourth aspect, the invention provides a computer device comprising a memory, a corrector and a computer program stored in said memory and operable on said corrector, said corrector implementing the steps of said correction means when said computer program is executed by said corrector.
In a fifth aspect, the present invention provides a computer readable storage medium storing a computer program which, when executed by a corrector, implements the steps of the correction device.
Compared with the prior art, the invention has the beneficial effects that:
compared with the existing technologies such as triangulation, the invention can more accurately match line segments and find out the center line of the photomask. The method can extract extremely accurate photomask center lines instead of approximate center lines aiming at the patterns with low shape complexity, and can realize high-fidelity original photomask pattern restoration; for the graph with high shape complexity, on the basis of ensuring the original graph as much as possible, the extraction accuracy is high, and the calculated number of points of the center line is small.
The vector method provided by the invention can adapt to the judgment of the initial edge or the termination edge of various complexity conditions, the accurate judgment of the initial edge can be effectively connected with each central line, and the photomask graph is restored to the greatest extent, so that the application range and the stability of the algorithm are further improved.
In the face of ultra-large-scale layout patterns, how to shorten the calculation time is the primary consideration, and the algorithm provided by the invention can realize accurate and rapid response aiming at the photomask patterns, and has the advantages of less memory occupation, simple and stable algorithm structure and high accuracy.
Drawings
FIG. 1 is a schematic flow chart of a method for obtaining a path centerline of a circuit layout according to an embodiment of the present invention;
FIG. 2 is a schematic view of the effect of eliminating boundary redundant points, screening and compressing point sets, provided by the embodiment of the invention;
FIG. 3 is a schematic diagram of a simple graphic shape and its center line of a circuit layout provided by an embodiment of the present invention;
FIG. 4 is a schematic diagram of a line segment pairing rule and a line segment pairing completion according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of searching for a start edge and a stop edge by vector method according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of how to solve the effect of obtaining the center line according to the embodiment of the present invention;
Detailed Description
The invention will be described in further detail with reference to the drawings and the detailed description. The described embodiments of the invention are only some, but not all, of the embodiments of the invention. Other embodiments similar to those described herein are within the scope of the present invention.
Referring to the flowchart of fig. 1, the present embodiment provides a method for obtaining a photomask centerline of a circuit layout, and the main extraction method includes steps 1 to 5, in which:
step 1, acquiring circuit layout file information, wherein the circuit layout file information mainly comprises a boundary point sequence for describing a graphic boundary;
specifically, the circuit layout file is a point sequence describing boundary information of each graph after OPC correction, and information of all points is coordinate data of discrete points. The information of these points may or may not include information of the start edge and the end edge, and it is necessary to determine and present the information later, because the solved center lines are needed to be connected in sequence.
Step 2, screening and eliminating some redundant boundary points through conditions, and simplifying boundary information;
specifically, all the given point coordinates describing the boundary information of the graphics are complex and unordered, the shapes of the layout patterns are different, the layout patterns have simple straight line segments or broken line segments, and the complex patterns with arc corners are also present, so that redundant discrete points are removed in the step 2.
Step 2 in this embodiment further includes:
step 2.1, firstly regarding the minimum grid length of EDA (Electronic Design Automation) tool as 1, dividing the abscissa and ordinate of all boundary points to be named as X [ i ], Y [ i ], so that the coordinate of each boundary point can be represented by (X [ i ], Y [ i ]); and taking the distance between two adjacent points as a condition of screening points, and eliminating all points with the distance smaller than a certain value in the X-axis direction or the Y-axis direction.
Further, step 2.1 comprises:
step 2.21 summarizes the features of the given layout pattern, for example, including some examples of the corners of the pattern being arc-shaped, as shown in fig. 2, describing such a pattern boundary requires many points, so that the original set of points is filtered under the condition of guaranteeing the integrity of the pattern, some suitable adjustable thresholds are defined, the distances between two adjacent points in the X-axis and the Y-axis are determined, and if the distance is smaller than the set threshold (here we define the threshold to be 1), one of the two points is eliminated.
And through multiple condition screening and removing, finally, a more representative discrete point coordinate describing the arc corner of the graph is provided, so that the information of the central line can be extracted in a simplified way.
Step 3, connecting adjacent boundary points into line segments, and then screening out line segments meeting the conditions;
after the point set filtering and compressing in the step 2, the coordinates of boundary information describing the graph are simplified, but the coordinates are still discrete coordinate points, so that the coordinates of the points need to be connected together to form line segments.
Step 3 in this embodiment further includes:
step 3.1, according to the given sequence of points, sequentially forming a line segment from two adjacent boundary points, which is called L 0 . The information describing the line segment comprises two end points, equation parameters of the line segment, the length of the line segment and the center point of the line segment, and the line segment equation is described by using a primary function; in addition, a line segment perpendicular bisector equation needs to be given, and the line segment perpendicular bisector equation is also described by a primary function; a line segment is described by a line segment equation and a perpendicular bisector equation.
Further, step 3.1 comprises:
in step 3.11, two endpoints describing the line segment are (p1_x [ i ], p1_y [ i ]), (p2_x [ i ], p2_y [ i ]), and a linear first order equation describing the line segment can be solved by the two endpoints: y=ax+b; meanwhile, the perpendicular bisector equation describing the line segment can be solved by combining the two endpoints of the line segment: y=kx+t. (x, y) represents the point coordinates, a, k are each the slope of the respective equation, and b, t are each the x-axis intercept of the respective equation.
The line segment equation is considered to be horizontal and vertical, so that the current line segment is known to be one of the X axis, the Y axis and the oblique line according to a in the equation (1), and if the current line segment is one of the X axis and the Y axis, a secondary verification is performed:
judging the slopes a and k of the equations (1) - (2); if a is greater than or less than the threshold a1 and k is greater than or less than the threshold k1, then the current line segment is considered to be perpendicular to the X axis; if a is equal to the threshold a2 and k is equal to the threshold k2, then the current line segment is considered to be perpendicular to the Y-axis.
By calculationSolving the slope a of the line segment and floating point in the computerIn the storage calculation, the numerical value can be more than one bit after the decimal point, the actual line segment does not meet the requirement of being completely horizontal or vertical, the calculated slopes are all within a certain range, and no infinite or infinitesimal slope a exists, so that the calculated a is judged, if a is>1e8, or a<-1e8, let a=1e8 or a= -1e8, b=p1_x [ i ]]Then the line segment is judged to be vertical; let k=0,/in the perpendicular bisector equation describing the line segment at this time>
Similarly, in another case, if a=0 is calculated, let a=0, b=p1_yj [ i]Then the line segment is judged to be horizontal; let k=1e8 or k= -1e8 in the perpendicular bisector equation describing the line segment at this time,
except the two cases, the rest cases are conventional solving equation processes, and the slope relation of the line segment equation and the perpendicular bisector equation is as follows:
step 4, carrying out line segment matching on line segments meeting the conditions, and finding out a starting edge and a terminating edge for the matched line segment pairs; defining a starting edge and a terminating edge in the rest unpaired line segments;
in step 3 above, all line segments have been solved and marked, each line segment l i All the line segments are matched, and all the corresponding line segments are matched for solving the center line of the layout graph. When matching, a line segment set l is obtained from the solution by utilizing a two-layer for loop i Generates two line segments l k And l j (where k=1, 2,3,4, …, i-2), it is known that two adjacent line segments must not be paired, and thus from l k The second line segment thereafter starts to determine whether to pair, where j=k+2, and each line segment pairs only with the subsequent line segment, soThe sequence of line segment pairing is ensured, and repeated judgment is avoided.
The circuit patterns of the layout are basically composed of elongated simple patterns, as shown in fig. 3, which are similar in shape to elongated roads or rivers with intersections, so that the patterns are connected according to an ordered set of points, so that each circuit layout must have a start end and a finish end of the connection pattern, which are referred to herein as a start edge and a finish edge. These starting and ending edges do not have any line segments paired with them, only serve as the starting and ending points for the graph centerline connection, so the starting and ending edges of the graph must be concentrated in the remaining line segments above except for the line segment pairing.
Step 4 in this embodiment further includes:
step 4.1, initializing k=1;
step 4.2, traversing all the line segments, and searching for the line segment l k Line segment l intersecting the perpendicular bisectors j J.noteq.k, segment l j Marked as line segment l k Is set of intersecting line segments of (a)
Traversing intersecting line segment setsFind the center point and l k Line segment l with minimum center point distance j Is marked as->At this time l k And (3) withAnd (5) finishing pairing for the paired line segments.
Step 4.3, judging whether k is i-2, wherein i represents the total number of line segments, and if yes, completing pairing of all the line segments; if not, let k=k+1, return to step 4.2. As shown in FIG. 4, the principle of line segment matching and the situation of good line segment matching are shown in detail in the figure.
Step 4.4, judgingWhether the broken boundary point sequence information already gives a starting edge and a terminating edge; if already given, the starting edge and the ending edge are taken as the starting point and the ending point of the graph central line connection, if not, the line segment set L 0 And (3) removing the line segments which are already paired, and judging the starting edge and the ending edge in the rest line segments by using the principle of a vector method.
Further, the principle of the vector method includes:
the unpaired line segment is called a line segment b, two adjacent line segments are called a line segment a and a line segment c, and the line segments a and c can be unpaired line segments or paired line segments; vectorizing the line segments a, b and c, calculating the included angle between the line segment a and the line segment c by using a vector method, and calculatingIf->Within the threshold range, then consider two vectorsIn contrast, line segment b is considered the starting edge at this time. The formula for calculating the vector angle is as follows:
as shown in fig. 5, the vector judgment of the start edge or the end edge is shown in detail.
And 5, generating a center point (corresponding point addition is divided by 2) according to the matched line segments, and acquiring a photomask center line of the circuit layout according to the center point.
Solving in the step 4 to obtain all the paired line segments, and then solving the center point at the end points of the line segment pairsAs shown in fig. 6, center point and startThe center line can be obtained by connecting the starting edge and the ending edge.
The foregoing description of the preferred embodiment(s) of the invention is merely illustrative of the presently preferred embodiment(s) of the invention and is not intended to limit the embodiment(s) of the invention, as any modification, equivalent replacement, improvement or the like which comes within the spirit and principles of the embodiment(s) of the invention should be included within the scope of the invention.

Claims (9)

1. A method for precisely extracting a photomask centerline of a circuit layout, comprising:
step 1, obtaining circuit layout file information, which comprises a boundary point sequence describing a graphic boundary;
step 2, screening and eliminating some redundant boundary points through conditions, and simplifying boundary information;
step 3, connecting adjacent boundary points into line segments, and then screening out line segments meeting the conditions;
step 4, carrying out line segment matching on line segments meeting the conditions, and finding out a starting edge and a terminating edge for the matched line segment pairs;
and 5, generating a center point according to the matched line segments, and acquiring a photomask center line of the circuit layout according to the center point.
2. The method according to claim 1, wherein the step 2 is specifically:
setting the minimum grid length of the EDA tool to be 1, dividing the abscissa and the ordinate of all boundary points and naming the abscissa and the ordinate as X [ i ], Y [ i ], so that the coordinate of each boundary point can be expressed by (X [ i ], Y [ i ]); and eliminating all boundary points with the distance smaller than a threshold value in the X-axis direction or the Y-axis direction by taking the distance between two adjacent boundary points as a condition of screening points.
3. The method according to claim 2, wherein the step 3 specifically comprises:
3-1 connecting adjacent boundary points into a line segment, wherein the information describing the line segment comprises two end points, equation parameters of the line segment, the length of the line segment and the center point of the line segment;
the equation describing the line segment is defined as:
y=ax+b type (1)
The equation for the perpendicular bisector is:
y=kx+t (2)
3-2 knowing that the current line segment is one of an X-axis perpendicular, a Y-axis perpendicular and a diagonal line according to a in the equation (1), if the current line segment is one of the X-axis perpendicular and the Y-axis perpendicular, performing a secondary verification:
judging the slopes a and k of the equations (1) - (2); if a is greater than or less than the threshold a1 and k is greater than or less than the threshold k1, then the current line segment is considered to be perpendicular to the X axis; if a is equal to the threshold a2 and k is equal to the threshold k2, then the current line segment is considered to be perpendicular to the Y-axis.
4. A method according to claim 3, wherein said step 4 comprises:
step 4.1, initializing k=1;
step 4.2, traversing all the line segments, and searching for the line segment l k Line segment l intersecting the perpendicular bisectors j J.noteq.k, segment l j Marked as line segment l k Is set of intersecting line segments of (a)
Traversing intersecting line segment setsFind the center point and l k Line segment l with minimum center point distance j Is marked as->At this time l k And->The line segments are paired, and pairing is completed;
step 4.3, judging whether k is i-2, wherein i represents the total number of line segments, and if yes, completing pairing of all the line segments; if not, let k=k+1, return to step 4.2;
step 4.4, judging whether the boundary point sequence information already gives a starting edge and a terminating edge; if already given, the starting edge and the ending edge are taken as the starting point and the ending point of the graph central line connection, if not, the line segment set L 0 And (3) removing the line segments which are already paired, and judging the starting edge and the ending edge in the rest line segments by using the principle of a vector method.
5. The method of claim 4, wherein the determining the start edge and the end edge based on the principle of vector method comprises:
vectorizing each unpaired line segment b and two line segments a and c adjacent to the line segment b, calculating the included angle between the line segment a and the line segment c by using a vector method, and calculatingIf->Within the threshold range, two vectors are considered +.>Conversely, segment b is considered to be a starting or ending edge, and if not within the threshold range, segment b is considered not to be a starting or ending edge.
6. A photomask, characterized in that the method according to any of claims 1-5 is used for extracting the center line of a photomask of a circuit layout, and then OPC correction is performed thereon.
7. A photomask pattern correction apparatus, comprising:
the data acquisition module is in charge of acquiring a layout to be OPC corrected;
a photomask centerline extraction module for extracting a photomask centerline of a circuit layout of a layout to be OPC corrected using the method of any one of claims 1 to 5;
and the OPC correction module is used for performing OPC correction on the extracted full-layout photomask center line in all directions in which the mask manufacturability rules are not limited.
8. A computer device comprising a memory, a corrector and a computer program stored in the memory and operable on the corrector, characterized in that the corrector implements the steps of the correction means as claimed in claim 7 when executing the computer program.
9. A computer readable storage medium storing a computer program, which when executed by a corrector implements the steps of the correction device according to claim 7.
CN202311284522.4A 2023-09-28 2023-09-28 Method for accurately extracting center line of photomask of circuit layout Pending CN117270312A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311284522.4A CN117270312A (en) 2023-09-28 2023-09-28 Method for accurately extracting center line of photomask of circuit layout

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311284522.4A CN117270312A (en) 2023-09-28 2023-09-28 Method for accurately extracting center line of photomask of circuit layout

Publications (1)

Publication Number Publication Date
CN117270312A true CN117270312A (en) 2023-12-22

Family

ID=89202357

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311284522.4A Pending CN117270312A (en) 2023-09-28 2023-09-28 Method for accurately extracting center line of photomask of circuit layout

Country Status (1)

Country Link
CN (1) CN117270312A (en)

Similar Documents

Publication Publication Date Title
JP4510118B2 (en) Optical proximity effect correction method and apparatus, optical proximity effect verification method and apparatus, exposure mask manufacturing method, optical proximity effect correction program, and optical proximity effect verification program
JP2000020564A (en) Device for correcting layout pattern data, method for correcting layout pattern data, manufacture of semiconductor device using the method, and recording medium having recorded manufacturing program of semiconductor device thereon
CN103544711A (en) Automatic registering method of remote-sensing image
CN108663897B (en) Optical proximity correction method
CN112733486B (en) Intelligent wiring method and system for chip design
CN111767688B (en) Integrated circuit layout polygon unstructured grid self-adaptive subdivision method and system
WO2023134309A1 (en) Mask layout correction method
JP2000098584A (en) Correcting method of mask pattern and recording medium recording mask pattern correction program
CN111428811B (en) Method for recognizing and processing self-intersection pattern of single-ring polygon
CN114241018A (en) Tooth point cloud registration method and system and readable storage medium
US9978134B2 (en) Sampling method and apparatus applied to OPC of lithography layout
CN109143773B (en) Pretreatment method before optical proximity correction
JP3884468B2 (en) Fast image search method
JP2000187314A (en) Mask plotting data generating method
CN117270312A (en) Method for accurately extracting center line of photomask of circuit layout
CN112052641B (en) Method and system for generating large-scale integrated circuit layout unstructured grid eccentric midpoint
US6245466B1 (en) Mask pattern design method and a photomask
CN110555385A (en) welding seam characteristic point solving method based on variable step length curvature filtering
JP2003344985A (en) Layout pattern data correction system
JP2005316135A (en) Design correction method, design pattern generating method, and process proximity correction method
CN115147471A (en) Laser point cloud automatic registration method based on curvature density characteristics
JP2000100692A (en) Method for correcting design pattern
JP4068290B2 (en) Mask pattern correction method and correction apparatus
JP2000048052A (en) Method and device for verifying layout
JPH0794376A (en) Correction of data for exposure pattern

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination