CN117265506A

CN117265506A - Method of area selective deposition

Info

Publication number: CN117265506A
Application number: CN202311164463.7A
Authority: CN
Inventors: 于严淏; 王皓川; 李春
Original assignee: Southern University of Science and Technology
Current assignee: Southern University of Science and Technology
Priority date: 2023-09-07
Filing date: 2023-09-07
Publication date: 2023-12-22

Abstract

The application belongs to the technical field of semiconductors, and provides a method for region selective deposition, which comprises the following steps: acquiring the semiconductor substrate; constructing a liquid sealing layer at one side end of the mask plate, and placing one end with the liquid sealing layer on the semiconductor substrate; and depositing a specified material to the liquid seal mask plate. According to the method, the liquid sealing layer is filled in the gap between the substrate and the mask plate, the problem that the atomic layer deposition grows in an unwanted area is prevented, all gaps between the mask plate and the substrate are effectively filled until the molecular level, and therefore the effect of sealing the gap between the substrate and the mask plate is achieved, and the technical problem that the atomic layer deposition grows in the unwanted area is solved.

Description

Method of area selective deposition

Technical Field

The present application is in the field of semiconductor technology, and more particularly, to a method of region selective deposition.

Background

The shrinking of integrated circuits in semiconductor technology is now almost entirely dependent on top-down processing, which is characterized by a complex combination of many material deposition, extreme ultraviolet light and etching steps.

There are many methods for preparing nanomaterials, such as: atomic layer deposition, chemical vapor deposition, physical vapor deposition, but in doing so, the long-term weakness of boundary blurring can be caused due to the gap between the mask plate and the substrate, so that the deposited specified material can grow in an unwanted area. Current approaches to solving the gap problem have focused mainly on applying force to the mask surface by mechanical or magnetic means to reduce the gap space. These methods have improved to some extent, but have not been able to reduce the gap to the molecular level.

Therefore, development of a masking method capable of effectively improving the barrier performance of a mask plate and being convenient and suitable for most scenes has very important practical significance.

Disclosure of Invention

The embodiment of the application provides a method for region selective deposition to solve the technical problem that atomic layer deposition grows in an unwanted region.

The embodiment of the application provides a method for area selective deposition, which comprises the following steps: hydrophilic hydroxylation treatment of the semiconductor substrate; constructing a liquid sealing layer at one side end of the mask plate, and placing one end with the liquid sealing layer on the semiconductor substrate to form a liquid sealing mask plate; and depositing a specified material to the liquid seal mask plate.

In one possible implementation, the liquid seal layer includes long linear alkane oil obtained by crude oil fractionation and/or dearomatization, and the number of carbon atoms of the long linear alkane oil is greater than or equal to six.

In one possible implementation, the long linear alkane oil is a perfluoropolyether.

In one possible implementation, the thickness of the liquid sealing layer is not less than a maximum gap value between the mask plate and the semiconductor substrate.

In one possible implementation, the hydrophilic hydroxylation treatment comprises: a semiconductor substrate cleaned by plasma processing gas; the plasma treatment gas adopts argon-oxygen mixed gas, the excitation frequency is 13-15MHz, and the treatment time is 3-5min.

In one possible implementation, the step of depositing the specified material onto the liquid seal mask includes: placing the liquid seal mask plate and the semiconductor substrate in a cavity of an atomic layer deposition device; sequentially delivering a first precursor gas and a second precursor gas into the chamber, wherein the first precursor gas comprises water and a hydrophilic reactant, and the second precursor gas comprises water and a hydrophilic reactant; purging inert gas into the chamber; and returning the steps of sequentially conveying the first precursor gas and the second precursor gas into the cavity until a specified material film with preset thickness is obtained, wherein the film at least comprises metal oxide, metal nitride and an organic film.

In one possible implementation, the deposition includes atomic layer deposition, magnetron sputter deposition, physical vapor deposition, or chemical vapor deposition.

In one possible implementation manner, after the specified material is deposited on the liquid seal mask, ultrasonic cleaning and soaking the deposited liquid seal mask and the semiconductor substrate in a perfluorohexane solution are further included, so that the substrate with the atomic layer deposition film patterning is obtained.

In one possible implementation, the liquid seal layer is constructed by knife coating or spin coating.

In one possible implementation, the hydrophilic hydroxylation treatment of the semiconductor substrate further includes cleaning the semiconductor substrate and the mask plate in different solutions, respectively.

Compared with the prior art, the embodiment of the application has the beneficial effects that: the liquid sealing layer is filled in the gap between the substrate and the mask plate, so that the problem that an atomic layer is deposited in an unwanted area to grow is prevented, all gaps between the mask plate and the substrate are effectively filled until the molecular level is reached, and the effect of sealing the gap between the substrate and the mask plate is achieved.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following description will briefly introduce the drawings that are needed in the embodiments or the description of the prior art, it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic illustration of a gap between a substrate and a mask during deposition in the prior art;

FIG. 2 is a flow chart of a method of zone selective deposition provided herein;

FIG. 3 is a schematic structural diagram of a substrate and a mask in the method for region selective deposition provided in the present application;

FIG. 4 is a graph of XPS spectra of a substrate and corresponding regions on the substrate after atomic layer deposition by methods of region selective deposition provided in the prior art and in comparative example 1 and example 1, respectively;

FIG. 5 is an EDS spectrum of example 2 after deposition of a hafnium oxide film;

FIG. 6 is an EDS spectrum of example 3 after deposition of a titanium oxide film;

fig. 7 is a schematic diagram of a mask plate in comparative example 2 and example 4, a schematic diagram of a substrate electron microscope after thermal evaporation by the prior art, and a schematic diagram of a substrate electron microscope after thermal evaporation by the method of the present application;

fig. 8 is a mirror image of a mask plate in comparative example 3 and a mirror image of a substrate after magnetron sputtering by using the method of the present application in example 5, respectively.

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system configurations, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It should also be understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.

As used in this specification and the appended claims, the term "if" may be interpreted as "when..once" or "in response to a determination" or "in response to detection" depending on the context.

In addition, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and are not to be construed as indicating or implying relative importance.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

The shrinking of integrated circuits in semiconductor technology is now almost entirely dependent on top-down processing, which is characterized by a complex combination of many material deposition, extreme ultraviolet light and etching steps. The device dimensions approaching below 5 nanometers make perfect alignment of reliably processed nanopatterns very challenging, as it requires near atomic scale precision. The use of atoms as a component to produce materials in a bottom-up manner has long been a dream in the nanotechnology field. This is in sharp contrast to current reality: nanoelectronics fabrication in the semiconductor industry is almost entirely dependent on top-down processing, mainly due to stringent requirements for reliability. However, the industry is currently facing significant challenges, requiring bottom-up solutions in some of the most demanding processing steps to achieve the various nanopatterns required.

Nanomaterials, thin films and patterns are important in electronics, energy conversion and storage, catalysis, chemical separations, environmental protection and health, and many other technologies, and scientific and technological advances in these fields require new capabilities to control chemical reactions, nanowires, spaces and other complex features are often patterned on surfaces using photolithographic techniques, transfer of physical mask patterns onto photoresists using light, and finally, chemical synthesis needs to be controlled in the initial stages of substance formation and manipulation reactions.

There are many methods for preparing nanomaterials, such as: atomic layer deposition, chemical vapor deposition, physical vapor deposition, but in doing so, the long-term weakness of boundary blurring can be caused due to the gap between the mask plate and the substrate, so that the deposited specified material can grow in an unwanted area. For example: referring to fig. 1, if atomic layer deposition is used, for non-heterogeneous substrates (e.g., silicon wafers), a shadow mask is required for bottom-up atomic layer deposition patterning, and atomic layer deposition precursor molecules can easily penetrate into the gaps and deposit under the mask's shadow region.

Current approaches to solving the gap problem have focused mainly on applying force to the mask surface by mechanical or magnetic means to reduce the gap space. These methods improve this to some extent, but do not reduce the gap to the molecular level, which means that deposition still exists in the mask coverage area.

Accordingly, the present application provides a method for region selective deposition to solve the technical problem of atomic layer deposition growing in unwanted regions.

In one embodiment of the present application, a method of region selective deposition is provided, referring to fig. 2, comprising: acquiring a semiconductor substrate; constructing a liquid sealing layer at one side end of the mask plate, and placing one end with the liquid sealing layer on the semiconductor substrate; and depositing a specified material on the liquid seal mask plate.

The semiconductor substrate is a material of semiconductor used as a substrate for atomic layer deposition, the semiconductor is a material with conductivity between a conductor and an insulator at normal temperature, and the substrate is a base of radio frequency/microwave electronic equipment or an integrated circuit. For example, the semiconductor substrate may be a monocrystalline silicon wafer, but the semiconductor substrate is not limited to only one monocrystalline silicon wafer, and other embodiments are not illustrated.

The semiconductor substrate may be untreated, may be subjected to hydrophilic hydroxylation, may be cleaned by RCA standard, may be cleaned by wet method, and may be cleaned by dry method, and is not particularly limited herein. In this embodiment, the semiconductor substrate is exemplified by hydrophilic hydroxylation treatment. Hydrophilic hydroxylation refers to plasma treatment of a semiconductor substrate by applying sufficient energy to the gas to ionize it into a plasma, the "active" components of which include ions, electrons, atoms, active genes, etc., and plasma treatment is to treat the sample surface by utilizing the properties of these active components to increase its surface hydrophilicity. In the embodiment, the gas introduced in the plasma treatment adopts argon-oxygen mixed gas, the excitation frequency of the plasma cleaning equipment is 13-15MHz, and the treatment time is 3-5min.

It should be noted that the surface of the semiconductor substrate subjected to the hydrophilic hydroxylation treatment at least includes one end connected to the mask plate, so as to ensure that the surface of the semiconductor substrate contacted with the mask plate has hydrophilicity.

Constructing the liquid sealing layer refers to filling a liquid sealant into a gap between the mask plate and the substrate at one side end of the mask plate, so as to fill the gap between the mask plate and the substrate and prevent the growth in an unnecessary area during atomic layer deposition. The liquid sealing layer can be constructed on one side of the mask plate or on two sides of the mask plate. If constructed on only one side of the mask, the side end is the end that contacts the substrate. Referring to fig. 3, the dynamic nature of the liquid seal layer allows the liquid sealant to be easily aligned with the pattern geometry regardless of the planarity of the mask. That is, the liquid sealant can fill the gap between the mask plate and the substrate under the fluidity. When the gaps are in irregular patterns, the liquid sealant can be filled and self-adapt to the patterns of the gaps, and a liquid sealing layer is formed so as to realize sealing; when the macroscopic concave-convex height of the mask plate deviates from an ideal plane, the liquid sealant can be flush with the surface of the deposited film pattern according to the self-generated fluidity and gravity. Meanwhile, the mask plate limits liquid in a gap between the substrate and the mask plate through capillary force, so that free flow of the liquid sealing layer is prevented, and the barrier of the liquid sealing layer shows defect-free and anti-adsorption characteristics before atomic layer deposition of molecules, so that sealing is realized.

One side end of the mask plate refers to one side end face of the mask plate. For example: the first end face and the second end face are sequentially arranged along the height direction of the mask plate, one side end of the mask plate can be the first end face or the second end face, and the mask plate is not particularly limited.

Deposition refers to a process of generating a solid deposition film on a solid surface by utilizing a gaseous substance under the premise of a certain temperature and vacuum. Deposition generally includes magnetron sputtering deposition, atomic layer deposition, chemical vapor deposition and physical vapor deposition, and the atomic layer deposition process is roughly: the reaction gas diffuses to the surface of the workpiece and is adsorbed; various substances adsorbed on the surface of the workpiece undergo surface chemical reaction; the generated substance spots are aggregated into crystals and are enlarged; the gas product generated in the surface chemical reaction breaks away from the surface of the workpiece and returns to the gas phase; the inter-diffusion of elements occurs at the interface of the deposition layer and the matrix to form a plating layer. Chemical vapor deposition technology is a process that uses gaseous materials to produce chemical reactions, transport reactions, etc. on solids and produce solid deposits, and generally comprises: forming a volatile material; transferring the substance to a deposition area; chemical reactions occur on the solids and produce solid materials. Physical vapor deposition techniques refer to the physical process of vaporizing a material source (solid or liquid) surface into gaseous atoms or molecules, or partially ionizing into ions, under vacuum conditions, and passing through a low pressure gas (or plasma) process. The basic principles may include: gasifying the plating material; migration of plating material atoms, molecules or ions; plating atoms, molecules or ions are deposited on the substrate. For clarity of description of the use of the method in this example, atomic layer deposition is taken as an example, and description will be given.

In particular, atomic Layer Deposition (ALD) is a commonly used method for nanomaterial fabrication, and is capable of growing thin films with atomic scale thickness control and angstrom scale surface flatness in highly confined spaces, which makes it indispensable in microelectronics, photovoltaics, battery and catalyst design. Precise deposition control and high film quality stems from the unique sequential self-limiting reaction mechanism of ALD, i.e., the sequential introduction and layer-by-layer bonding of two vapor phase precursors to the substrate surface, which is extremely challenging as the side effects of such a subtle reaction mechanism, i.e., the prevention of ALD growth in unwanted areas. The main method of ALD thin film patterning is to remove the excess material by photolithography and etching (top-down process), and under the development of microelectronics to miniaturize and three-dimensional device architecture, overlay alignment becomes more and more difficult. The complexity of the process is greatly reduced if ALD thin film patterning can be formed by area selective deposition with the help of a simple shadow mask (bottom-up process). For substrates having multiple regions of different surface chemistry, ALD may achieve region selectivity by utilizing a region-dependent feature of precursor adsorption/desorption characteristics, by which a nucleation delay may be created between unwanted regions and target regions. Thus, to amplify the surface differences, additional chemical treatments (e.g., self-assembled monolayers) are typically introduced to tailor the affinity of the local molecules.

The specified materials include metal oxides, metal nitrides including aluminum oxide, titanium oxide, zinc oxide, zirconium oxide, and hafnium oxide, organic films including but not limited to novel aluminum-based organic-inorganic composite films, polyureas, polyamides, polyimides, or other types of films. Other types of films may be strontium carbonate, strontium titanate, barium titanate, and the like.

In this embodiment, the method for area selective deposition provided by the present application has the following beneficial effects compared with the prior art: the liquid sealing layer is filled in the gap between the substrate and the mask plate, so that the problem that an atomic layer is deposited in an unwanted area to grow is prevented, all gaps between the mask plate and the substrate are effectively filled until the molecular level is reached, and the effect of sealing the gap between the substrate and the mask plate is achieved.

In one possible implementation manner provided herein, the hydrophilic hydroxylation treatment of the semiconductor substrate further includes, before the semiconductor substrate is treated, respectively cleaning the semiconductor substrate and the mask plate in different solutions.

The process for cleaning the semiconductor substrate adopts an RCA method, and specifically comprises the following steps:

the semiconductor substrate is boiled and washed for 10-20min at 200-250 ℃ by using a mixed solution of sulfuric acid and hydrogen peroxide (H2 SO4: H2 O2=3:1) and marked as a first solution, and is rinsed for 10-20min by deionized water. Then preparing a solution 2 (ammonia water: H2O2: H2 O=1:1:5-1:1:7), pouring the semiconductor substrate into the second solution, heating to 75-85 ℃ for 10-20min (the time is not too long because ammonia water has a corrosion effect on silicon and utilizes complexation to remove heavy metal impurities), taking out the substrate, putting into a hydrofluoric acid solution (1:20), taking out after 10-15min, putting into hot water, and flushing with deionized water for 10-20min. A third solution (HCI: H2O2: h2o=1:1:5) was prepared, and the semiconductor substrate was poured into the third solution for 10-15min. Taking out, placing into hot water, and washing with deionized water for 10-20min. Finally, soaking the substrate for 5-10s by using 10% hydrofluoric acid, removing the oxide layer on the silicon surface, and flushing the substrate for 10-15min by using deionized water.

When the mask plate is cleaned, the mask plate needs to be cleaned at two side ends. And when the mask plate is cleaned, the physical mask plate is ultrasonically cleaned for 2-3 times by using ethanol, acetone and the like, and each time is 10-15 minutes. One side end of the semiconductor substrate after cleaning is contacted with the mask plate.

In one possible implementation manner provided by the application, the liquid sealing layer is constructed by adopting a knife coating method or a spin coating method.

In order to develop and explain the process steps of the blade coating method or the spin coating method, in the present embodiment, the liquid sealant used for the liquid sealing layer is exemplified by perfluoropolyether, but the liquid sealant is not limited thereto.

The process steps for the knife coating method are as follows: firstly, a proper amount of liquid sealant such as perfluoropolyether is dripped on one side edge of a mask plate by using an injector, then a corresponding height is set on an applicator, namely the thickness of a required liquid sealing layer, and then the liquid drop is scraped and coated for multiple times by using the applicator until a uniform liquid layer exists on the mask plate.

The process steps for spin coating are as follows: and (3) placing the mask plate on a table type spin coater, using an injector to drop a proper amount of liquid sealant such as perfluoropolyether and the like at the center of the mask plate, setting the rotation time to be 10-60 seconds, and adjusting the rotation speed to obtain liquid sealing layers with different thicknesses, thereby completing the construction of the liquid sealing layers on the mask plate.

In one possible implementation manner provided herein, the liquid sealing layer includes long-chain alkane oil obtained by crude oil fractionation and/or dearomatization, and the number of carbon atoms of the long-chain alkane oil is greater than or equal to six.

The liquid sealant used for the liquid sealing layer comprises a long straight-chain alkane oil drawing mixture (with carbon number more than or equal to 6) obtained by crude oil fractionation and/or dearomatization.

The long straight chain alkane oil is liquid for liquid sealant, and can be kerosene, white oil, mineral oil, light paraffin oil, heavy paraffin oil, perfluoropolyether, n-dodecane, n-hexadecane, n-eicosane, etc. The choice of liquid sealant depends on its adhesion to the mask and its stability and conformality at the corresponding prescribed material deposition temperature.

The chain alkane is one of saturated hydrocarbons, and when the number of carbon atoms is 4 or less, the alkane is in a gaseous state at normal temperature, and the carbon atoms are liquid at 5 to 16, and solid at 17 or more, so that the number of carbon atoms of the long straight-chain alkane oil is six or more and sixteen or less in order to ensure that the long straight-chain alkane oil employed in the present embodiment is liquid.

Preferably, in one possible implementation provided herein, the long linear alkane oil is a perfluoropolyether.

Perfluoropolyethers (PFPE) are synthetic polymers that are liquid at ordinary temperature. The PFPE has the advantages of good heat resistance, chemical stability, oxidation stability and complete incombustibility because the fluorine element has a strong electron-withdrawing effect so that the polymer does not show ether. The viscosity index of PFPE is 150-400 (the larger the molecular weight of the oil, the larger its viscosity index), and has great superiority compared with mineral oil. This material lacks hygroscopicity and is insoluble in organic solvents, and is only miscible in perfluoro oil or fluorone 113 (trifluoroethane in a three atmosphere), which makes it hardly detrimental to plastics and rubber. Therefore, the blocking effect of the liquid sealing layer by using the perfluoropolyether is better.

In one possible implementation manner provided by the application, the thickness of the liquid sealing layer is not smaller than the maximum gap value between the mask plate and the semiconductor substrate.

In this embodiment, the thickness of the liquid sealing layer needs to be appropriate, too much or too much to affect the final deposition. If too much liquid sealant is selected, the liquid sealant can adhere to the ideal growth area of the film outside the coverage area of the mask plate; if too little liquid sealant is selected, the gap between the mask plate and the substrate may not be completely filled, so that the blocking effect is poor. Therefore, the thickness of the liquid sealing layer is not smaller than the maximum gap value between the mask plate and the semiconductor substrate, and the liquid sealant cannot overflow from the gap, so that the liquid sealant is selected to be vectorized, and the stability of region selection is guaranteed.

In one possible implementation manner provided in the present application, the step of depositing the specified material onto the liquid seal mask plate includes: placing the liquid seal mask plate and the semiconductor substrate in a cavity of an atomic layer deposition device; sequentially delivering a first precursor gas and a second precursor gas into the chamber, wherein the first precursor gas comprises water and a hydrophilic reactant, and the second precursor gas comprises water and a hydrophilic reactant; purging inert gas into the chamber; returning to the step of sequentially conveying the first precursor gas and the second precursor gas into the cavity until a specified material film with a preset thickness is obtained, wherein the film at least comprises metal oxide, metal nitride and an organic film.

It should be noted that "purging inert gas into the chamber" in the above steps may be replaced by: the purge inert gas may be continuously flowed throughout the atomic layer deposition process.

For substrates having multiple regions of different surface chemistry, ALD can achieve region selectivity by utilizing a region-dependent feature of precursor adsorption/desorption characteristics, by which nucleation delays can be created between unwanted regions and target regions. Thus, to amplify the surface differences, additional chemical treatments (e.g., self-assembled monolayers) are typically introduced to tailor the affinity of the local molecules.

The first precursor gas and the second precursor gas refer to gases that are input through a plurality of pulses to delay the reaction time, and include water and hydrophilic reactants, which may be trimethylaluminum, triethylaluminum, titanium tetrachloride, hafnium tetra (dimethylamino) and the like, and the first precursor gas and the second precursor gas are capable of being deposited to generate a specified material. For clarity and clarity, the description is now illustrative, but the particular arrangements and materials are not limited to the details or manner set forth in the examples. For example, the first precursor gas and the second precursor gas are trimethylaluminum and water, the first precursor gas and the second precursor gas are alternately pulsed into the reaction chamber, and the aluminum oxide film (specified material) with the thickness of about 11nm is prepared after 100 circles of circulation.

Purging inert gases into the chamber includes, but is not limited to, nitrogen, argon, and helium by purging inert gases into the chamber to purge any residual reactant gases or byproducts.

In this embodiment, the first precursor gas and the second precursor gas are sequentially delivered and the inert gas is purged to form a process cycle, and a film with a predetermined target thickness is obtained after multiple cycles.

In one possible implementation manner provided by the application, after the specified material is deposited on the liquid seal mask, ultrasonic cleaning and soaking the deposited liquid seal mask and the semiconductor substrate in a perfluorohexane solution are further included, so that the substrate with atomic layer deposition film patterning is obtained.

Among them, the cleaning solvents selected in this embodiment include toluene, acetone, tetrahydrofuran, cyclohexane, and the like, and an organic solvent having good compatibility with the liquid barrier layer is preferable.

For clarity and clarity, the description is now illustrative, but the particular arrangements and materials are not limited to the details or manner set forth in the examples. For example, after the deposition of the alumina film is completed, immersing the substrate in a perfluorohexane solution for 15 minutes and thoroughly removing residual oil stains on the surface to obtain the substrate with ALD film patterning.

The invention is further illustrated by the following non-limiting examples.

Example 1

Monocrystalline silicon is used as a substrate for atomic layer deposition, monocrystalline silicon (the surface of the silicon is provided with a natural oxide layer with the thickness of about 2 nm) is placed in a chamber of a plasma cleaning machine for hydroxylation treatment, and a plasma gas source is oxygen, so that the cleaning time is 3min. And respectively ultrasonically cleaning the physical mask plate with acetone and isopropanol three times. And then the physical mask plate is placed in an oven for 5min for drying. And after the mask plate is taken out, uniformly covering the surface of the mask plate with the perfluoropolyether solution by adopting a knife coating mode of a coater. And attaching a mask plate with an oil film to the monocrystalline silicon wafer, placing the monocrystalline silicon wafer in an ALD device for depositing an aluminum oxide film, wherein trimethylaluminum and water are used as precursors, the pulse time is 100ms, the purging time is 60s, nitrogen is used as purging gas, the gas flow is 150sccm, the pressure of a reaction chamber is about 150mTorr, and the temperature of the chamber is 120 ℃. The precursor is alternately pulsed into the reaction chamber, and the alumina film with the thickness of about 11nm is prepared after 100 circles of circulation. And taking out the sample after the ALD process is finished, and flushing the sample by adopting an organic solvent to separate the physical mask plate from the silicon wafer substrate. Immersing the silicon wafer on which the aluminum oxide film is deposited into a perfluorohexane solution for ultrasonic treatment for 15 minutes to clean residual greasy dirt on the surface, thus obtaining the silicon substrate with clear aluminum oxide film patterning.

Comparative example 1

Monocrystalline silicon wafer is used as a substrate for atomic layer deposition, monocrystalline silicon wafer (the surface of the silicon wafer is provided with a natural oxide layer with the thickness of about 2 nm) is placed in a chamber of a plasma cleaning machine for hydroxylation treatment, a plasma gas source is oxygen, and the cleaning time is 3min. And respectively ultrasonically cleaning the physical mask plate with acetone and isopropanol three times. And then the physical mask plate is placed in an oven for 5min for drying. After the mask plate is taken out, the mask plate is directly placed on a monocrystalline silicon wafer, the monocrystalline silicon wafer is placed in an ALD device for depositing an aluminum oxide film, trimethylaluminum and water are used as precursors, the pulse time is 100ms, the purging time is 60s, nitrogen is used as purging gas, the gas flow is 150sccm, the pressure of a reaction chamber is about 150mTorr, and the temperature of the chamber is 120 ℃. The precursor is alternately pulsed into the reaction chamber, and the alumina film with the thickness of about 11nm is prepared after 100 circles of circulation. And taking out the sample after the ALD process is finished, and obtaining the silicon substrate of the alumina film pattern.

Referring to fig. 4, fig. 4 is a graph of XPS spectra of a substrate and a corresponding region on the substrate after atomic layer deposition by using the methods of region selective deposition provided in the prior art and the present application, respectively, wherein a is the XPS spectrum of comparative example 1, and b is the XPS spectrum of example 1.

After the surface coated by the liquid sealing layer is characterized by photoelectron spectroscopy (XPS), no aluminum element exists on the surface coated by the liquid sealing layer, no aluminum element exists on the surface of the covering layer, and the blocking rate of the liquid sealing method after the growth of the embodiment 1 can reach more than 99 percent, which indicates that the addition of the liquid sealing layer can effectively block atomic layer deposition in non-ideal areas.

Example 2

Monocrystalline silicon is used as a substrate for atomic layer deposition, monocrystalline silicon (the surface of the silicon is provided with a natural oxide layer with the thickness of about 2 nm) is placed in a chamber of a plasma cleaning machine for hydroxylation treatment, and a plasma gas source is oxygen, so that the cleaning time is 3min. And respectively ultrasonically cleaning the physical mask plate with acetone and isopropanol three times. And then the physical mask plate is placed in an oven for 5min for drying. And after the mask plate is taken out, uniformly covering the surface of the mask plate with the vacuum pump oil solution in a spin coating mode. And attaching a mask plate with an oil film to the monocrystalline silicon wafer, placing the monocrystalline silicon wafer in an ALD device for depositing a hafnium oxide film, wherein the pulse time of the precursor is 100ms, the purge time is 90s, the nitrogen is purge gas, the gas flow is 150sccm, the pressure of a reaction chamber is about 150mTorr, and the temperature of the chamber is 150 ℃. The precursor is alternately pulsed into the reaction chamber, and the hafnium oxide film with the thickness of about 15nm is prepared after 100 circles of circulation. And taking out the sample after the ALD process is finished, and flushing the sample by adopting an organic solvent to separate the physical mask plate from the silicon wafer substrate. Immersing the silicon wafer on which the aluminum oxide film is deposited into toluene solution, and ultrasonically cleaning residual greasy dirt on the surface for 15 minutes to obtain the silicon substrate with clear hafnium oxide film patterning.

Referring to fig. 5, fig. 5 is an EDS spectrum obtained after depositing a hafnium oxide film by the method of the present application, and by the method of the present embodiment, a hafnium oxide ALD film pattern with small size and high accuracy can be effectively realized.

Example 3

Monocrystalline silicon is used as a substrate for atomic layer deposition, monocrystalline silicon (the surface of the silicon is provided with a natural oxide layer with the thickness of about 2 nm) is placed in a chamber of a plasma cleaning machine for hydroxylation treatment, and a plasma gas source is oxygen, so that the cleaning time is 3min. And respectively ultrasonically cleaning the physical mask plate with acetone and isopropanol three times. And then the physical mask plate is placed in an oven for 5min for drying. And after the mask plate is taken out, uniformly covering the surface of the mask plate with the silicone oil solution by adopting a vacuum pump oil solution in a blade coating mode. A mask plate with an oil film is attached to a monocrystalline silicon wafer, the monocrystalline silicon wafer is placed in an ALD device for depositing a titanium oxide film, tetra (dimethylamino) titanium and water are used as precursors, the pulse time is 100ms, the purging time is 80s, nitrogen is used as purging gas, the gas flow is 1000sccm, the pressure of a reaction chamber is about 150mTorr, and the temperature of the chamber is 120 ℃. The precursor is alternately pulsed into the reaction chamber, and the titanium oxide film with the thickness of about 13nm is prepared after 100 circles of circulation. And taking out the sample after the ALD process is finished, and flushing the sample by adopting an organic solvent to separate the physical mask plate from the silicon wafer substrate. Immersing the silicon wafer on which the titanium oxide film is deposited into toluene solution, and carrying out ultrasonic treatment for 15 minutes to clean residual greasy dirt on the surface, thus obtaining the silicon substrate with clear titanium oxide film patterning.

Referring to fig. 6, fig. 6 is an EDS spectrum obtained after depositing a titanium oxide film by the method of the present application, and by the method of the present embodiment, a small-sized and highly accurate ALD film pattern of titanium oxide can be effectively realized.

Example 4

Monocrystalline silicon is used as a substrate for thermal evaporation, and standard RCA cleaning is performed on monocrystalline silicon (the surface of the silicon has a natural oxide layer of about 2 nm). And respectively ultrasonically cleaning the physical mask plate with acetone and isopropanol three times. And then the physical mask plate is placed in an oven for 5min for drying. And after the mask plate is taken out, uniformly covering the surface of the mask plate with the perfluoropolyether solution by adopting a knife coating mode of a coater. And attaching a mask plate with an oil film to the monocrystalline silicon piece, and placing the monocrystalline silicon piece in thermal evaporation equipment to deposit metallic copper, wherein the pressure of a reaction chamber is about 10 < -6 > mTorr. After deposition for 10min, a metallic copper film of about 30nm thickness was obtained. And taking out the sample after the thermal evaporation process is finished, and flushing the sample by adopting an organic solvent to separate the physical mask plate from the silicon wafer substrate. Immersing the silicon wafer on which the aluminum oxide film is deposited into a perfluorohexane solution, and cleaning residual greasy dirt on the surface by ultrasonic for 15 minutes to obtain the silicon substrate with clear metal copper film patterning.

Comparative example 2

Monocrystalline silicon is used as a substrate for thermal evaporation, and standard RCA cleaning is performed on monocrystalline silicon (the surface of the silicon has a natural oxide layer of about 2 nm). And respectively ultrasonically cleaning the physical mask plate with acetone and isopropanol three times. And then the physical mask plate is placed in an oven for 5min for drying. And after the mask plate is taken out, attaching the mask plate to a monocrystalline silicon wafer, and placing the monocrystalline silicon wafer in thermal evaporation equipment to deposit metallic copper, wherein the pressure of a reaction chamber is about 10 < -6 > mTorr. After deposition for 10min, a metallic copper film of about 30nm thickness was obtained. And taking out the sample after the thermal evaporation process is finished, and obtaining the silicon substrate with the metal copper film pattern.

Referring to fig. 7, fig. 7 includes a diagram, b diagram and c diagram, wherein the diagram a is a mask plate optical mirror diagram, the diagram b is a substrate electron mirror diagram after thermal evaporation by adopting the prior art, the diagram c is a substrate electron mirror diagram after thermal evaporation by adopting the method of the application, and the outline of the substrate electron mirror diagram obtained by adopting the method of the application is clearer by comparing the diagram a, the diagram b and the diagram c.

Example 5

Monocrystalline silicon is used as a substrate of magnetron sputtering, and standardized RCA cleaning is carried out on monocrystalline silicon (the surface of the silicon wafer is provided with a natural oxide layer of about 2 nm). And respectively ultrasonically cleaning the physical mask plate with acetone and isopropanol three times. And then the physical mask plate is placed in an oven for 5min for drying. And after the mask plate is taken out, uniformly covering the surface of the mask plate with the perfluoropolyether solution by adopting a knife coating mode of a coater. And attaching a mask plate with an oil film to the monocrystalline silicon wafer, and placing the monocrystalline silicon wafer in a magnetron sputtering device for depositing an ITO film, wherein the power of a radio frequency power supply is 100W, the flow rate of argon is 50sccm, and the deposition rate of the ITO film is about 5.2nm/min. After 8min deposition, an ITO film of about 42nm thickness was obtained. And taking out the sample after the magnetron sputtering process is finished, and flushing the sample by adopting an organic solvent to separate the physical mask plate from the silicon wafer substrate. Immersing the silicon wafer on which the ITO film is deposited into a perfluorohexane solution, and cleaning residual greasy dirt on the surface by ultrasonic for 15 minutes to obtain the silicon substrate with clear ITO film patterning.

Comparative example 3

Monocrystalline silicon is used as a substrate of magnetron sputtering, and standardized RCA cleaning is carried out on monocrystalline silicon (the surface of the silicon wafer is provided with a natural oxide layer of about 2 nm). And respectively ultrasonically cleaning the physical mask plate with acetone and isopropanol three times. And then the physical mask plate is placed in an oven for 5min for drying. And after the mask plate is taken out, attaching the mask plate to a monocrystalline silicon wafer, and placing the monocrystalline silicon wafer in a magnetron sputtering device for depositing an ITO film, wherein the power of a radio frequency power supply is 100W, the flow rate of argon is 50sccm, and the deposition rate of the ITO film is about 5.2nm/min. After 8min deposition, an ITO film of about 42nm thickness was obtained. And taking out the sample after the magnetron sputtering process is finished, and obtaining the silicon substrate with the ITO film pattern.

Referring to fig. 8, fig. 8 includes a diagram, b diagram and c diagram, wherein the diagram a is a mask plate mirror diagram, the diagram b is a substrate electron mirror diagram after magnetron sputtering by adopting the prior art, the diagram c is a substrate electron mirror diagram after magnetron sputtering by adopting the method of the application, and the outline of the substrate electron mirror diagram obtained by adopting the method of the application is clearer through the comparison of the diagram a, the diagram b and the diagram c.

The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims

1. A method of area selective deposition comprising:

acquiring a semiconductor substrate;

constructing a liquid sealing layer at one side end of a mask plate, and placing one end with the liquid sealing layer on the semiconductor substrate to form a liquid sealing mask plate;

and depositing a specified material to the liquid seal mask plate.

2. The method of zone selective deposition of claim 1, wherein the liquid seal layer comprises a long linear paraffinic oil obtained by crude oil fractionation and/or dearomatization, and the number of carbon atoms of the long linear paraffinic oil is greater than or equal to six.

3. The method of zone selective deposition of claim 2, wherein the long linear alkane oil is a perfluoropolyether.

4. The method of area selective deposition of claim 1, wherein a thickness of the liquid seal layer is not less than a maximum gap value between the mask plate and the semiconductor substrate.

5. The method of area selective deposition according to any one of claims 1 to 4, wherein the obtaining a semiconductor substrate employs a hydrophilic hydroxylation treatment, the step of hydrophilic hydroxylation treatment comprising:

a semiconductor substrate cleaned by plasma processing gas;

the plasma treatment gas adopts argon-oxygen mixed gas, the excitation frequency is 13-15MHz, and the treatment time is 3-5min.

6. The method of area selective deposition of claim 5, wherein the step of depositing a specified material onto the liquid seal mask plate comprises:

placing the liquid seal mask plate and the semiconductor substrate in a cavity of an atomic layer deposition device;

sequentially delivering a first precursor gas and a second precursor gas into the chamber, wherein the first precursor gas comprises water and a hydrophilic reactant, and the second precursor gas comprises water and a hydrophilic reactant;

purging inert gas into the chamber;

and returning the steps of sequentially conveying the first precursor gas and the second precursor gas into the cavity until a specified material film with preset thickness is obtained, wherein the film at least comprises metal oxide, metal nitride and an organic film.

7. The method of claim 6, wherein the depositing is atomic layer deposition, magnetron sputtering deposition, physical vapor deposition, or chemical vapor deposition.

8. The method of claim 6 or 7, wherein after the step of depositing a specified material onto the wet seal mask, further comprising,

and ultrasonically cleaning and soaking the deposited liquid seal mask plate and the semiconductor substrate in a perfluorohexane solution to obtain the substrate with the atomic layer deposition film patterning.

9. The method of claim 8, wherein the constructing a liquid seal layer is by knife coating or spin coating.

10. The method of any one of claims 1 to 4, 6, 7 or 9, wherein prior to the step of hydrophilizing the semiconductor substrate, further comprising separately cleaning the semiconductor substrate and the mask in different solutions.