CN117225676A - Integrated structure of ultrasonic transducer array and CMOS circuit and manufacturing method - Google Patents
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Abstract
The invention provides an integrated structure of an ultrasonic transducer array and a CMOS circuit and a manufacturing method thereof, wherein the integrated structure comprises a first substrate and a second substrate, wherein the first substrate comprises the ultrasonic transducer array and a first pressure welding ball array, the second substrate comprises the CMOS circuit, and the first substrate is vertically stacked with the second substrate in a three-dimensional way through the design of a metal wiring and an interface of a Re-wiring layer RDL (Re-Distribution Layer), so that the ultrasonic transducer array is electrically connected with the CMOS circuit, the length of a metal wiring between an ultrasonic transducer unit and a system board circuit can be greatly shortened, noise is reduced, and the signal to noise ratio of a system is improved.
Description
Technical Field
The invention relates to the technical field of high-resolution ultrasonic transducers, in particular to a structure and a manufacturing method for realizing three-dimensional integration by an ultrasonic transducer array and a CMOS auxiliary circuit through a vertical stacking method.
Background
The ultrasonic scanner emits ultrasonic wave to human body through its ultrasonic probe, and uses various information generated by acoustic reflection, refraction and diffraction in the process of human organ tissue propagation to receive, amplify and process information, form image or blood flow Doppler, and finally display on display. A medical color ultrasonic diagnostic apparatus mainly comprises: probes, hosts, control panels, displays and other accessories.
The human society has entered the large medical age and medical ultrasound applications have been rapidly developed. Ultrasound scanning has been worldwide from medical imaging, such as fetal B-ultrasound, to liver, renal scanning. Compared with other imaging technologies, the ultrasonic imaging technology has the advantages of no wound, no pain, good real-time performance, safety, low price and the like on patients, has very high use rate in preventing, diagnosing and treating disease patients, is widely applied to various clinical examinations of gastroenterology, gynecology, obstetrics, urology, pectoral science, small organs, pediatrics, cardiology, emergency and the like, is gradually combined with other clinical departments, and develops examination applications of the gastroenterology (ultrasonic endoscope), cardiac surgery (intravascular ultrasound) and the like, and the ultrasonic is an indispensable examination method at present.
Ultrasound technology and products are rapidly entering people's daily lives. Fingerprint identification in the smart phone is not only quick and convenient, but also greatly improves the safety of users. After the ultrasonic ranging sensor is arranged in the automobile, the safe distance for driving, reversing and stopping can be kept. Broadly, MEMS ultrasonic sensors have also entered the application field of unmanned aerial vehicles, robots, and the like. In such applications, the miniature ultrasonic sensor can accurately track the target, form an array space radar, monitor human movement in real time, position and motion changes, and be seamlessly connected with the VR/AR.
Ultrasonic sensors are also widely used in industrial control. For example, detecting a change in shape of an aircraft wing surface detects the presence of ice, thereby affecting flight safety. The ultrasonic sensor is arranged on the aircraft engine, can detect whether the engine has cracks in real time, can find problems in time, and can be maintained and replaced.
The traditional ultrasonic probe is manufactured by multiple steps of piezoelectric ceramic crystal mechanical cutting, gap filling, fixing, metal wiring and the like. The conventional mechanical cutting adopts a diamond grinding wheel, and the piezoelectric ceramic crystal is brittle, so that the mechanical cutting is easy to break and damage, the processing yield is low, the cost is difficult to control, and the large-scale production is difficult to realize. More importantly, high resolution medical imaging requires continuous shrinkage of crystal unit size, especially cutting gap (gap), and the precision of mechanical cutting process is difficult to meet.
After the mechanical cutting of the piezoelectric ceramic crystal is completed, an electrical ohmic electrode connection line needs to be formed for each unit. The process itself is also currently largely dependent on manual or semi-automated operations. The size of the ohmic electrode is determined by the size of the crystal unit. For linear arrays, the cell Pitch is typically 0.1-0.3 mm, and hand-made is still possible. When small cell arrays, especially area arrays, are cut, the cell size is as small as 0.05 mm, and each adjacent connection line must be well insulated from each other, manual connection becomes very difficult, and the work yield and yield are low.
Semiconductor chip processing technology has been rapidly developed in the last 10 years, and the minimum size of chip processing has reached 3 nanometers and approaches 1 nanometer. The precision of semiconductor micromachining has also reached submicron level, far less than the precision of manual fabrication of piezoelectric ceramic crystals at millimeter/submicron level. With the development of chip processing technology, chip packaging technology has also advanced, such as COW: stacked three-dimensional packages such as Chip-On-Wafer have been greatly developed. If the chip processing technology and the micromachining technology can be introduced, the traditional mechanical cutting and lead processing of the ultrasonic piezoelectric ceramic crystal are replaced, and obvious breakthroughs can be made in the aspects of processing precision, production efficiency improvement, yield improvement, cost reduction and the like.
Disclosure of Invention
In order to solve the technical bottleneck problems of poor processing precision and unremoved connection density at present, the invention provides a device framework and a process manufacturing flow which can be applied to ultrasonic probe processing by butting chip processing technology, micromachining technology, advanced semiconductor packaging technology and ultrasonic piezoelectric ceramic crystal processing requirements.
The invention specifically comprises the following technical scheme:
the invention provides an integrated structure of an ultrasonic transducer array and a CMOS circuit, which is characterized by comprising the following components:
the ultrasonic transducer comprises a first substrate, a second substrate and a third substrate, wherein the first substrate comprises an ultrasonic transducer array and a first pressure welding ball array;
a second substrate comprising CMOS circuitry;
the second substrate is packaged with a re-wiring layer RDL, and the re-wiring layer RDL comprises at least one layer of metal wiring and a second pressure welding ball array which is arranged in a mirror image corresponding to the first pressure welding ball array;
the first substrate is vertically stacked with the second substrate through the first pressure welding ball array and the second pressure welding ball array, so that the ultrasonic transducer array is electrically connected with the CMOS circuit through the at least one layer of metal wiring.
Further, the stacking space of the first solder ball array and the second solder ball array is filled to form a vibration absorption layer.
The invention also provides an integrated chip of the ultrasonic transducer array and the CMOS circuit, which is characterized by comprising the integrated structure of the ultrasonic transducer array and the CMOS circuit.
The invention also provides an ultrasonic probe which is characterized by comprising the integrated chip of the ultrasonic transducer array and the CMOS circuit.
The invention further provides a method for manufacturing an integrated structure of an ultrasonic transducer array and a CMOS circuit, which is characterized by comprising the following steps:
taking a first substrate, manufacturing an ultrasonic transducer array, and arranging a first pressure welding ball array electrically connected with the ultrasonic transducer array;
taking a second substrate, manufacturing a CMOS circuit, and packaging a redistribution layer RDL, wherein the redistribution layer RDL comprises at least one layer of metal wiring and a second pressure welding ball array which is arranged in a mirror image corresponding to the first pressure welding ball array;
and vertically stacking the first substrate with the second substrate through the first pressure welding ball array and the second pressure welding ball array, so that the ultrasonic transducer array is electrically connected with the CMOS circuit through the at least one layer of metal wiring.
According to the integrated structure of the ultrasonic transducer array and the CMOS circuit, the metal wiring and the interface of the first substrate through the RDL (Re-Distribution Layer) are designed to be vertically stacked with the second substrate in a three-dimensional mode, so that the ultrasonic transducer array of the first substrate is electrically connected with the CMOS circuit of the second substrate, the length of a metal connecting wire between an ultrasonic transducer unit and a system board circuit can be greatly shortened, noise is reduced, and the signal to noise ratio of a system is improved. Meanwhile, the invention can realize the manufacture of the two-dimensional array of the ultrasonic transducer by utilizing the RDL of the multilayer wiring and the high-density wiring capability of the CMOS data transmission circuit.
Drawings
Fig. 1 is a schematic diagram of an integrated structure of an ultrasonic transducer array and a CMOS circuit of embodiment 1;
FIG. 2 is a schematic view of a first substrate of example 2;
FIG. 3 is a schematic view of a second substrate of example 2;
FIG. 4 is a schematic diagram of a process flow for rebuilding a wafer;
FIG. 5 is a schematic diagram of MEMS chip and CMOS chip connection;
FIG. 6 is a schematic diagram of an RDL process flow;
FIG. 7 is a schematic diagram of a vertical stack of (RDL+CMOS) substrates;
FIG. 8 is a schematic diagram of a vertical stack of a first substrate and a second substrate.
Detailed Description
Embodiment 1, this embodiment provides an integrated structure of an ultrasonic transducer array and a CMOS circuit, as shown in fig. 1, including:
a first substrate and a second substrate, wherein the first substrate comprises an ultrasonic transducer array and a first ball array 110, and the second substrate comprises a CMOS circuit 200 (e.g. CMOS Die1, CMOS Die2 in the figure). The second substrate is encapsulated with a redistribution layer RDL 220, the redistribution layer RDL 220 comprising at least one layer of metal traces 230 and a second array of solder balls 210 disposed in mirror image of the first array of solder balls 110. The first substrate is vertically stacked with the second substrate by the first and second arrays of solder balls 110, 210 such that the ultrasonic transducer array is electrically connected to the CMOS circuit 200 by the metal wiring 230 of the redistribution layer RDL 220.
Specifically, the first substrate and the second substrate form a three-dimensional vertical stack structure by vertically stacking the first solder ball array 110 and the second solder ball array 210 in a corresponding upper and lower mirror image.
Specifically, the above-described ultrasonic transducer array includes a line array or a plane array.
In this embodiment, the ultrasonic transducer array is formed by arranging and combining piezoelectric ceramic crystal units 100 obtained by MEMS deep groove etching on a piezoelectric ceramic crystal substrate (such as lead zirconate titanate, PZT). The piezoelectric ceramic crystal units 100 are filled with plastic filler 120 for electrical/acoustic isolation between the piezoelectric ceramic crystal units. A common ground line 130 is disposed on the back of the ultrasound transducer array. The first array of solder balls 110 is disposed on the front face as signal line contacts for the array of ultrasonic transducers.
The embodiment adopts MEMS deep groove etching technology, and effectively improves the cutting precision and yield of the piezoelectric ceramic crystal. In other embodiments, other advanced chip processing and packaging techniques may be used to fabricate the piezoelectric crystal ultrasound transducer array, such as semiconductor mask etching, short pulse laser dicing techniques, and the like.
In this embodiment, the second substrate is a silicon wafer pre-fabricated CMOS circuit 200. In other embodiments, glass substrates may be used instead of single crystal CMOS silicon wafers, or PCB substrates reconstructed from CMOS package circuit combinations may be used instead of silicon wafers, based on manufacturing cost considerations.
In this embodiment, the CMOS circuit 200 includes CMOS circuits that assist in the proper operation of the ultrasound transducer, such as a low noise amplifier LNA (Low Noise Amplifier), time gain compensation TGC (Time Gain Compensation), beam forming circuit BF (Beam Former), digital-to-analog converter ADC (Analog to Digital Converter), and the like.
In this embodiment, the metal wiring 230 has two layers. In other embodiments, the metal wiring 230 may be one or more layers, arranged according to specific circuit connection needs.
In this embodiment, when the redistribution layer RDL 220 is encapsulated by the second substrate, the epoxy material 240 is encapsulated between the RDL substrate and the CMOS wafer. The bond ball array connection between the RDL substrate and the CMOS wafer is illustrated at 250 in fig. 1.
In this embodiment, the stacked space of the first solder ball array 110 and the second solder ball array 210 is filled with a gel to form the vibration absorbing layer 140, which is used for absorbing the vibration wave generated by the ultrasonic transducer array in the working state, so as to reduce the reflection and the cross-warping of the adjacent ultrasonic transducer unit, i.e. the piezoelectric ceramic crystal unit.
In this embodiment, the first substrate has an impedance matching layer 150. The impedance matching layer 150 is coated with a gel material, and can match the impedance between the ultrasonic probe material and the skin of the human body, reduce interface reflection, and enhance sensitivity. The impedance matching layer 150 may be applied at the time of fabrication of the integrated structure, may be left applied at the time of assembly of the ultrasound probe, or may be applied at the time of assembly with the acoustic lens.
In embodiment 2, the integrated structure of an ultrasonic transducer array and a CMOS circuit is provided, and the basic composition structure is similar to that of embodiment 1, and includes a first substrate and a second substrate, as shown in fig. 2 and 3, the first substrate includes an ultrasonic transducer array and a first solder ball array 110, and the second substrate includes a CMOS circuit 200. The second substrate is packaged with a redistribution layer RDL 220, the redistribution layer RDL 220 comprising a plurality of layers of metal wires 230 and a second array of solder balls 210 disposed in mirror image of the first array of solder balls 110. The first substrate is vertically stacked with the second substrate by the first and second arrays of solder balls 110, 210 such that the ultrasonic transducer array is electrically connected to the CMOS circuit 200 by the metal wiring 230 of the redistribution layer RDL 220.
Specifically, the first substrate and the second substrate form a three-dimensional vertical stack structure by vertically stacking the first solder ball array 110 and the second solder ball array 210 in a corresponding upper and lower mirror image.
Specifically, the above-described ultrasonic transducer array includes a line array or a plane array.
In this embodiment, the ultrasonic transducer array is an array composed of CMUT chip units (CMUT-1 to CMUT-3 in the figure) fabricated with a silicon wafer or a glass substrate as a substrate. The back of each CMUT chip unit is respectively provided with a first solder ball array 110 formed by solder balls as signal line contact terminals of the ultrasonic transducer array. In other embodiments, the ultrasound transducer array may also be an array of PMUT chip cells.
In this embodiment, the second Substrate is a PCB Substrate (PCB Substrate, abbreviated as Subs in the figure) reconstructed from a plurality of identical or different CMOS package circuit combinations.
In this embodiment, the CMOS circuitry includes CMOS circuitry that assists the ultrasound transducer in proper operation, such as low noise amplifier LNA (Low Noise Amplifier), beam forming circuitry BF (Beam Former), digital to analog converter, and the like.
In this embodiment, when the redistribution layer RDL is encapsulated by the second substrate, an epoxy material is encapsulated between the RDL substrate and the PCB substrate.
The PMUT or CMUT Chip unit is an ultrasonic transducer Chip manufactured by MEMS mechanical processing technology, can be in the form of a Wafer, is easier than a crystal array stack for COW (Chip-On-Wafer) or COS (Chip-On-Substrate) stacking, and simplifies the process flow. Firstly, the ohmic contact electrode, including the processing of the signal line and the ground line, is a part of the processing of the PMUT or CMUT chip, and is simple and easy to implement. Secondly, no plastic is required to be filled between PMUT or CMUT units; furthermore, the back side of the ultrasonic transducer array composed of the PMUT or CMUT chip units generally does not need a vibration absorbing layer. The ultrasonic transducer array formed by the PMUT or CMUT chip units can realize broadband and multi-frequency through different combinations of the sizes of the cavity body, and has great flexibility. The PMUT or CMUT chip units that make up the ultrasound transducer array may be the same PMUT or CMUT chip unit, or may be different PMUT or CMUT chip units, e.g., having different resonant frequencies, or even different architectural designs to achieve transmit power and receive sensitivity optimization.
In general, the chip size of the CMOS circuit design has its own layout and cost requirements, and in addition to the CMOS photomask patterning, the flow cost is high, and it is impossible to customize the CMOS wafer for different MEMS chip sizes to achieve vertical stacking of the MEMS chips and CMOS chips.
In the embodiments 1 and 2, the redistribution layer RDL (Re-Distribution Layer) is introduced as an interposer, and the positions of electrode interfaces of the MEMS chip of the first substrate and the CMOS chip of the second substrate are adjusted, so that the distribution of the bonding pads of the CMOS IC design, including the positions and the pitches, are correspondingly matched to the positions of the bonding balls of the ultrasonic transducer array, and electrical contact matching is realized.
The design of the redistribution layer RDL is critical to achieving matching between the first substrate and the second substrate, and it is required to meet the following requirements:
1. the second solder ball array 210 is arranged on the upper surface of the redistribution layer RDL, and the number, size, spacing and arrangement mode of the solder balls are 100% consistent with those of the first solder ball array 110 arranged on the front surface of the ultrasonic transducer array of the first substrate;
2. the number, the size, the spacing and the arrangement mode of the pressure welding ball array arranged on the lower surface of the redistribution layer RDL are 100% matched with the CMOS circuit of the second substrate;
3. the redistribution layer RDL is just like an interface converter, and meets all requirements of electrical connection, and can completely match form factors (geometric dimensions) of the upper and lower chips. To meet this requirement, the redistribution layer RDL may require multiple layers of metal wiring, especially in cases where the number of solder ball arrays is large.
The metal wiring and interface design based on the RDL of the redistribution layer realizes the electrical connection redistribution of the CMOS circuit, and the complete matching of the ultrasonic transducer array and the input/output interface of the CMOS circuit can be realized through the multilayer metal wiring of the RDL; the communication between the ultrasonic transducer and the CMOS control board can be realized without the need of a pressure welding block, a PCB control board and a coaxial cable around the ultrasonic transducer array, the lead length between the piezoelectric ultrasonic transducer array and the CMOS signal amplifier is greatly reduced, the parasitic effect is reduced, the signal-to-noise ratio of the system is obviously improved, the metal wire connection requirement of a dense two-dimensional array can be met, and the two-dimensional array of the high-density ultrasonic transducer is realized. In the above embodiments 1 and 2, by arranging the redistribution layer RDL in correspondence with the mirror image of the ultrasound transducer array solder ball array, vertical stacking of different materials, different Chip sizes, i.e., COW (Chip-On-Wafer) or COS (Chip-On-Substrate) is achieved between the ultrasound transducer array and the CMOS circuit.
With the RDL interposer, the CMOS chip size is no longer required to be as large as the MEMS chip area. On one hand, the size of the MEMS array can be far larger than the area of the CMOS chip layout, and the MEMS array can be supported to be used as an ultra-large crystal probe. On the other hand, for intravascular or endoscopic probe designs, with SOC architecture, the "rebuilt" CMOS chip size may omit the Bond Pad footprint, which is much smaller than the standard CMOS layout size, which is very important for ultra-miniaturized ultrasound probe designs.
Embodiment 3 provides an integrated chip of an ultrasonic transducer array and a CMOS circuit, where the integrated chip includes the integrated structure of the ultrasonic transducer array and the CMOS circuit.
Embodiment 4 this embodiment provides an ultrasound probe comprising an integrated chip of the above-described ultrasound transducer array and CMOS circuitry.
Embodiment 5, the present embodiment provides a method for manufacturing an integrated structure of an ultrasonic transducer array and a CMOS circuit according to embodiment 1, including the following steps:
in step S01, a first substrate is taken, an ultrasonic transducer array and signal connection lines thereof are fabricated, and a first solder ball array 110 electrically connected with the ultrasonic transducer array is arranged.
In this embodiment, the first substrate is a piezoelectric ceramic crystal substrate, and the ultrasonic transducer array is an array formed by arranging and combining piezoelectric ceramic crystal units obtained by etching piezoelectric ceramic crystals through MEMS deep grooves. The piezoelectric ceramic crystal units are filled with plastic filler 120 for electrical/acoustic isolation between the piezoelectric ceramic crystal units. A common ground line 130 is disposed on the back of the ultrasound transducer array. The first array of solder balls 110 is disposed on the front face as signal line contacts for the array of ultrasonic transducers.
The piezoelectric ceramic crystal is etched in MEMS deep grooves, arranged and combined to form an ultrasonic transducer array, which comprises the following steps:
selecting a proper piezoelectric ceramic crystal material, bonding the piezoelectric ceramic crystal to a mechanical support substrate, and preparing for cutting;
for example, the thickness meets the requirement of resonance frequency, and meanwhile, in the process range of cutting processing, the parameters of piezoelectric ceramic crystals such as piezoelectric conversion coefficient, young modulus and the like meet the requirements of product design and the like.
(2) Cutting the piezoelectric ceramic crystal.
The traditional ultrasonic probe is realized by a method of mechanically cutting, arranging and metal wiring the piezoelectric ceramic crystal. The piezoceramic crystal is fixed on a supporting substrate, and is mechanically cut in the X direction and then in the Y direction, and a diamond grinding wheel blade is usually used for cutting. Because the piezoelectric ceramic crystal is brittle, the mechanical cutting is easy to break and damage, the processing yield is low, the cost is difficult to control, and the mass production is difficult to realize. More importantly, the diamonded grinding wheel blade itself needs a certain thickness to ensure the strength of the blade itself and reduce the shake in the cutting process, which determines that the cutting gap is difficult to continuously reduce. High resolution medical imaging requires crystal unit sizes, particularly cutting gaps, which are increasingly smaller and the precision of mechanical cutting processes is difficult to meet.
The embodiment utilizes the advanced photoetching technology in the processing of the semiconductor chip and combines the MEMS deep groove etching technology to divide the piezoelectric crystal; when cutting the unit, the grounding grooves are required to be manufactured simultaneously. Compared with the traditional mechanical cutting, the method introduces advanced technology in chip processing, such as MEMS deep groove etching, realizes micro mechanical fine cutting of small-cell and small-gap piezoelectric crystals, and is called MEMS deep groove etching. And the MEMS deep groove etching technology is adopted, the side surface of the deep groove can be vertical at 90 degrees in the range of 2-50 microns of groove width (the Gap clearance corresponding to crystal cutting is 2-50 microns), and the depth control of the groove is also good. Therefore, the processing precision of MEMS deep groove etching is far higher than the cutting precision of the traditional machine, and the mechanical damage can be reduced, and the large-scale automatic production can be realized, regardless of the size of the crystal unit or the gap between the units.
Besides MEMS deep groove etching, other advanced chip processing and packaging technologies, such as semiconductor mask etching, short pulse laser cutting technology and the like, can also achieve similar processing precision and yield. It should be noted that the piezoelectric crystal may have a very thin metal contact layer on the crystal surface prior to dicing. In the "MEMS deep trench etching", the metal layer is etched before the crystal is etched.
(3) After cutting is completed, the plastic grease fills the gaps.
Chip-level dicing techniques, such as MEMS deep trench etching or laser dicing, typically yield very high if not operating erroneously. After cutting, after cleaning and drying, gap-fill (gap filling) process can be performed, namely plastic resin material is coated, and gaps among the piezoelectric ceramic crystal units after cutting are filled.
The plastic resin coating material can meet the basic requirements of electric insulation and vibration cross-deflection absorption, and has good surface adhesion and surface fluidity, and key-hole is not generated between gaps. To achieve this, it is sometimes necessary to first apply the surface adhesion enhancing agent. After the gap-fill process, baking is performed to harden the gap-fill resin and mold.
Array recombination (Re-Construction) is carried out, which comprises the steps of forming an array with a large area by combining, eliminating defective replacement units, improving the array yield, realizing special combination of multiple frequencies and broadband, and the like.
The crystal array can be subjected to array recombination (Re-Construction) before entering the processed metal electrode, so that different array requirements are realized. For example, the multi-frequency operation can be realized by splicing to form an array with a larger area or by recombining the cell arrays with different resonance frequencies (but with the same Pitch) into a new array; or by combining different frequency crystal arrays, increasing the frequency bandwidth of the ultrasound probe, etc. When the MEMS chip processing accuracy, the chip mechanical alignment accuracy is greater than the crystal cell size and Gap size, the recombination (Re-Construction) process is relatively easy.
The recombination can be performed after Gap-fill and before forming the metal electrode, or can be performed during the formation of the metal electrode. In general, all cells in the same array have their ground lines common, and signal lines are typically not connected to adjacent cells. When forming metal connections with a photomask, the redistribution of the array is part of the layout design.
And manufacturing a common ground wire and coating a protective layer.
And reversing the crystal substrate, pasting the adhesive, removing the back support layer, and manufacturing the unit signal wire and the first solder ball array.
After the piezoelectric ceramic crystal MEMS deep groove etching and recombination are completed, ohmic electrode connecting lines are required to be formed. The existing metal connection process mainly relies on manual or semi-automatic operation. When the common ground line is fabricated, a layer of metal is typically deposited or attached to the back side of the array to connect all cells, and then a ground trench (or a plurality of ground holes) is formed to connect the back side metal to the front side of the crystal array (i.e., wrap around contact process) for subsequent metal connection.
For signal line contact electrodes, each cell must have its own contacts and be insulated from each other, and the relative dimensional requirements are stringent. The size of the contact electrode is determined by the size of the crystal unit. For linear arrays, the cell Pitch is typically 0.1-0.3 mm, and the ohmic electrodes can be interlaced, and acceptable yields can be achieved by hand-making the ohmic electrodes. However, when small cell arrays, especially planar arrays, are cut, the cell size is as small as 0.05 mm, and each adjacent cell must be in electrical isolation contact with each other, manual fabrication becomes very difficult, and both work yield and yield are difficult to ensure.
After the semiconductor chip and the packaging processing technology are adopted, the size of the electrical contact can be greatly reduced, and the solder ball array technology is adopted, so that the size of 50 microns can be achieved, and the electrical contact is improved by more than 50% compared with the prior technology. The size can be reduced to 10-30 microns using the more advanced micro-copper Pillar technique Cu-pilar.
In step S02, a second substrate is taken to manufacture the CMOS circuit 200, the redistribution layer RDL 220 is encapsulated, the redistribution layer RDL includes two metal wirings 230, and the second solder ball array 210 corresponding to the mirror image of the first solder ball array 110 is disposed on the upper surface of the redistribution layer RDL.
In this embodiment, the second substrate is a silicon wafer on which the CMOS circuit 200 is fabricated. In other embodiments, glass substrates may be used instead of single crystal CMOS silicon wafers, or PCB substrates reconstructed from CMOS package circuit combinations may be used instead of silicon wafers, based on manufacturing cost considerations.
When the ultrasonic transducer array made of piezoelectric ceramic crystals needs to be stacked and integrated with the CMOS, the CMOS part also needs to be redesigned and recombined (Re-Construction) to ensure that each good crystal array is combined with a good CMOS chip, and high yield is ensured.
CMOS reconstruction (Re-structured) wafer:
for optimization of wafer cost, the CMOS wafer of the second substrate may be a "reconstituted wafer" (Re-Constructed Wafer) instead of the original wafer (single crystal silicon CMOS wafer originally from Foundry). The flow of rebuilding the wafer is shown in fig. 4:
(a) Testing the yield of the original wafer, clicking out bad chips by using magnetic ink, then dicing and cutting, and easily removing the marked bad chips by magnetic attraction;
(b) And selecting chips passing the yield test, and placing the chips on the reconstructed wafer substrate according to the position (origin and interval) of the optimal design. The substrate can be a new silicon wafer, or a glass substrate in the shape of a silicon wafer, or a cast substrate;
(c) Wiring connections are formed on the "re-build" wafer.
The die spacing of the "reconstituted wafer" may be much greater than the "original wafer"; since the "reconstituted wafer" is composed of the chip reconstituted with good test, the yield is 100%. The cost of the process flow of the wafer reconstruction is optimized.
The connection between the MEMS piezoelectric chip and the CMOS chip, which are assembled by MEMS deep trench etching, rearrangement, is shown in fig. 5. The left figure shows a "one-to-one" connection (Die to Die connection) of a MEMS Chip to a CMOS Chip (or a recombinant CMOS contact array), and the right figure shows an electrical connection of a plurality of MEMS chips to a CMOS Wafer (or a CMOS reconstituted Wafer or Substrate), and a method for stacking such semiconductor chips (chips) and CMOS wafers and implementing the electrical connection is called a COW (Chip-On-Wafer) technology.
In step S03, the first substrate is vertically stacked with the second substrate through the first solder ball array 110 and the second solder ball array 210, so that the ultrasonic transducer array is electrically connected with the CMOS circuit 200 through the 230 metal wiring.
In step S04, the stacking space of the first solder ball array 110 and the second solder ball array 210 is filled to form the vibration absorbing layer 140.
Step S05, coating an impedance matching layer 150 on the back surface of the first substrate.
Embodiment 6 provides a method for manufacturing an integrated structure of an ultrasonic transducer array and a CMOS circuit according to embodiment 2, including the steps of:
in step S01, a first substrate is taken, an ultrasonic transducer array and signal connection lines thereof are fabricated, and a first solder ball array 110 electrically connected with the ultrasonic transducer array is arranged.
In this embodiment, the first substrate is a silicon wafer or a glass substrate, and the ultrasonic transducer array is an array formed by CMUT chip units manufactured by using the silicon wafer or the glass substrate as a substrate. The back surfaces of the CMUT chip units are respectively provided with solder balls to form a first solder ball array 110 serving as a signal line contact end of the ultrasonic transducer array. In other embodiments, the ultrasound transducer array may also be an array of PMUT chip cells.
In step S02, a second substrate is taken to manufacture the CMOS circuit 200, and a redistribution layer RDL 220 is encapsulated, wherein the redistribution layer RDL includes a plurality of metal wirings 230, and a second solder ball array 210 corresponding to the mirror image of the first solder ball array 110 is disposed on the upper surface of the redistribution layer RDL.
In this embodiment, the second substrate is a PCB substrate reconstructed from a plurality of identical or different CMOS package circuit combinations.
In step S03, the first substrate is vertically stacked with the second substrate through the first solder ball array 110 and the second solder ball array 210, so that the ultrasonic transducer array is electrically connected with the CMOS circuit 200 through the 230 metal wiring.
In embodiments 3 and 4 described above, the redistribution layer RDL is introduced as an interposer layer to enable adjustment of the electrode interface positions of the MEMS chip of the first substrate and the CMOS chip of the second substrate. The CMOS chip is redesigned with wiring through the RDL interposer, the size and the distance of the reconstructed CMOS contact solder ball array are identical to those of the MEMS chip, and one-to-one electrical connection is realized with the MEMS piezoelectric chip contact array solder balls.
An example of RDL design and process flow is shown in fig. 6, where (a) is from a founder wafer; (b) The CMOS chip passes the yield test, and the chip area is the area when the CMOS layout is designed; (c) Is an illustration of RDL design according to the BGA connection requirement of the CMOS chip and the MEMS chip. The RDL process includes photolithographic etching of metal lines, solder ball process, BGA ball array (Solder bump array) process is part of a standard CMOS packaging process and is not described here in detail; (d) The BGA ball array of the CMOS is formed, and the Bond Pads design arranged according to the periphery in the original CMOS chip is converted into the BGA design at the central position, and the BGA ball array completely corresponds to the connection requirement of the MEMS chip.
In fig. 6, each symbol represents:
a: CMOS circuit bonding pads; b: a COW solder ball array and metal wiring; c, COW metal wiring; COW metal wiring medium isolation; e, CMOS circuit pads; f, a CMOS passivation layer; g, RDL passivation layer; h, COW metal wiring RDL; i, metal pads under the solder ball layer.
After introduction of RDL as an interposer, CMOS chip size is no longer required to be as large as MEMS chip area. On one hand, the size of the MEMS array can be far larger than the area of the CMOS chip layout, and the MEMS array can be supported to be used as an ultra-large crystal probe. On the other hand, for the intravascular or endoscopic probe design, with the SOC architecture, the rebuilt CMOS chip size may omit the Bond Pad footprint, which is much smaller than the standard CMOS layout size, which is very important for the ultra-miniaturized ultrasound probe design.
After the RDL substrate is manufactured, stacking the RDL substrate on the second substrate of the prefabricated CMOS circuit to form a (rdl+cmos) substrate, wherein the bonding ball array on the lower surface of the RDL substrate is connected with the bonding ball array on the upper surface of the second substrate, and is electrically connected with the CMOS circuit, as shown in fig. 7.
After the (RDL+CMOS) substrate is formed, the epoxy material is filled between the RDL substrate and the CMOS wafer or the PCB substrate in a packaging manner, and the RDL packaging of the second substrate is completed. After the RDL package of the second substrate is completed, the first substrate and the second substrate may be subjected to a COW procedure of vertically stacking, as shown in fig. 8, so that the first substrate and the second substrate form a three-dimensional vertical stack structure.
In the above embodiments, the first wafer prefabricated ultrasonic transducer array and the signal lines thereof, the second wafer prefabricated CMOS circuit, the CMOS package redistribution layer RDL, and the additional connections required between the wafer and the external system may be implemented by using the existing process technologies, which will not be described in detail.
Claims (12)
1. An integrated structure of an ultrasonic transducer array and CMOS circuitry, comprising:
the ultrasonic transducer comprises a first substrate, a second substrate and a third substrate, wherein the first substrate comprises an ultrasonic transducer array and a first pressure welding ball array;
a second substrate comprising CMOS circuitry;
the second substrate is packaged with a re-wiring layer RDL, and the re-wiring layer RDL comprises at least one layer of metal wiring and a second pressure welding ball array which is arranged in a mirror image corresponding to the first pressure welding ball array;
the first substrate is vertically stacked with the second substrate through the first pressure welding ball array and the second pressure welding ball array, so that the ultrasonic transducer array is electrically connected with the CMOS circuit through the at least one layer of metal wiring.
2. The integrated structure of an ultrasonic transducer array and a CMOS circuit of claim 1, wherein a stack space of the first array of solder balls and the second array of solder balls is filled to form a vibration absorbing layer.
3. The integrated ultrasound transducer array and CMOS circuit structure of claim 1 wherein the first substrate comprises an impedance matching layer.
4. The integrated structure of an ultrasonic transducer array and a CMOS circuit according to claim 1, wherein the ultrasonic transducer array is an array formed by arranging and combining piezoelectric ceramic crystals after MEMS deep trench etching, semiconductor mask etching or short pulse laser cutting.
5. The integrated structure of an ultrasonic transducer array and a CMOS circuit according to claim 1, wherein the ultrasonic transducer array is an array of PMUT/CMUT chip cells.
6. An integrated chip of an ultrasound transducer array and CMOS circuitry, comprising the integrated structure of an ultrasound transducer array and CMOS circuitry of any one of claims 1-5.
7. An ultrasound probe comprising the integrated chip of the ultrasound transducer array of claim 6 with CMOS circuitry.
8. A method of manufacturing an integrated structure of an ultrasonic transducer array and CMOS circuitry, comprising:
taking a first substrate, manufacturing an ultrasonic transducer array, and arranging a first pressure welding ball array electrically connected with the ultrasonic transducer array;
taking a second substrate, manufacturing a CMOS circuit, and packaging a redistribution layer RDL, wherein the redistribution layer RDL comprises at least one layer of metal wiring and a second pressure welding ball array which is arranged in a mirror image corresponding to the first pressure welding ball array;
and vertically stacking the first substrate with the second substrate through the first pressure welding ball array and the second pressure welding ball array, so that the ultrasonic transducer array is electrically connected with the CMOS circuit through the at least one layer of metal wiring.
9. The method of claim 8, wherein the first substrate is a silicon wafer or a glass substrate, and the ultrasonic transducer array is an array of PMUT/CMUT chip cells.
10. The method for manufacturing an integrated structure of an ultrasonic transducer array and a CMOS circuit according to claim 8, wherein the first substrate is a piezoelectric ceramic crystal substrate, and the ultrasonic transducer array is an array formed by arranging and combining piezoelectric ceramic crystals after MEMS deep trench etching, semiconductor mask etching or short pulse laser cutting.
11. The method of manufacturing an integrated structure of an ultrasonic transducer array and CMOS circuitry of claim 8, further comprising, after the step of vertically stacking the first substrate with the first array of solder balls, the second array of solder balls, and the second substrate: and filling the stacking space of the first pressure welding ball array and the second pressure welding ball array to form a vibration absorption layer.
12. The method of manufacturing an integrated structure of an ultrasonic transducer array and CMOS circuitry of claim 8, further comprising, after the step of vertically stacking the first substrate with the first array of solder balls, the second array of solder balls, and the second substrate: and coating an impedance matching layer on the back surface of the first substrate.
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Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006074587A (en) * | 2004-09-03 | 2006-03-16 | Matsushita Electric Ind Co Ltd | Surface acoustic wave device and electronic component module using the same |
| CN101199434A (en) * | 2006-12-11 | 2008-06-18 | 通用电气公司 | Modular sensor assembly and methods of fabricating the same |
| US20080272858A1 (en) * | 2005-03-03 | 2008-11-06 | Tetsuya Furihata | Surface Acoustic Wave Device |
| JP2013055244A (en) * | 2011-09-05 | 2013-03-21 | Murata Mfg Co Ltd | Electronic component and manufacturing method therefor |
| US20170073830A1 (en) * | 2015-09-10 | 2017-03-16 | Kabushiki Kaisha Toshiba | Electroplating apparatus, electroplating method, and method of manufacturing semiconductor device |
| CN106536067A (en) * | 2014-07-14 | 2017-03-22 | 蝴蝶网络有限公司 | Film forming method and film forming apparatus |
| CN107511317A (en) * | 2017-07-31 | 2017-12-26 | 瑞声科技(新加坡)有限公司 | Piezoelectric ultrasonic transducer and preparation method thereof |
| CN108511600A (en) * | 2018-02-28 | 2018-09-07 | 云南中烟工业有限责任公司 | A kind of sound causes the preparation method of atomization chip |
| CN109261477A (en) * | 2018-10-23 | 2019-01-25 | 浙江大学 | A kind of micro electronmechanical piezoelectric supersonic wave transducer with etched hole and sectional type top electrode |
| CN209156327U (en) * | 2018-10-23 | 2019-07-26 | 浙江大学 | Micro electronmechanical piezoelectric supersonic wave transducer with etched hole and sectional type top electrode |
| US20200058843A1 (en) * | 2018-08-17 | 2020-02-20 | Seiko Epson Corporation | Vibrator device, method of manufacturing vibrator device, electronic apparatus, and vehicle |
| CN111250376A (en) * | 2020-01-15 | 2020-06-09 | 江苏英特神斯科技有限公司 | Multi-frequency self-focusing micro-mechanical ultrasonic transducer |
| CN112870562A (en) * | 2021-01-06 | 2021-06-01 | 上海交通大学 | Implanted piezoelectric MEMS ultrasonic transducer and preparation method thereof |
| CN116647224A (en) * | 2022-02-24 | 2023-08-25 | Qorvo美国公司 | Integrated piezoresistive and piezoelectric micromechanical ultrasonic transducer device and associated processing method |
-
2023
- 2023-11-14 CN CN202311508088.3A patent/CN117225676A/en active Pending
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006074587A (en) * | 2004-09-03 | 2006-03-16 | Matsushita Electric Ind Co Ltd | Surface acoustic wave device and electronic component module using the same |
| US20080272858A1 (en) * | 2005-03-03 | 2008-11-06 | Tetsuya Furihata | Surface Acoustic Wave Device |
| CN101199434A (en) * | 2006-12-11 | 2008-06-18 | 通用电气公司 | Modular sensor assembly and methods of fabricating the same |
| JP2013055244A (en) * | 2011-09-05 | 2013-03-21 | Murata Mfg Co Ltd | Electronic component and manufacturing method therefor |
| CN106536067A (en) * | 2014-07-14 | 2017-03-22 | 蝴蝶网络有限公司 | Film forming method and film forming apparatus |
| US20170073830A1 (en) * | 2015-09-10 | 2017-03-16 | Kabushiki Kaisha Toshiba | Electroplating apparatus, electroplating method, and method of manufacturing semiconductor device |
| CN107511317A (en) * | 2017-07-31 | 2017-12-26 | 瑞声科技(新加坡)有限公司 | Piezoelectric ultrasonic transducer and preparation method thereof |
| CN108511600A (en) * | 2018-02-28 | 2018-09-07 | 云南中烟工业有限责任公司 | A kind of sound causes the preparation method of atomization chip |
| US20200058843A1 (en) * | 2018-08-17 | 2020-02-20 | Seiko Epson Corporation | Vibrator device, method of manufacturing vibrator device, electronic apparatus, and vehicle |
| CN109261477A (en) * | 2018-10-23 | 2019-01-25 | 浙江大学 | A kind of micro electronmechanical piezoelectric supersonic wave transducer with etched hole and sectional type top electrode |
| CN209156327U (en) * | 2018-10-23 | 2019-07-26 | 浙江大学 | Micro electronmechanical piezoelectric supersonic wave transducer with etched hole and sectional type top electrode |
| CN111250376A (en) * | 2020-01-15 | 2020-06-09 | 江苏英特神斯科技有限公司 | Multi-frequency self-focusing micro-mechanical ultrasonic transducer |
| CN112870562A (en) * | 2021-01-06 | 2021-06-01 | 上海交通大学 | Implanted piezoelectric MEMS ultrasonic transducer and preparation method thereof |
| CN116647224A (en) * | 2022-02-24 | 2023-08-25 | Qorvo美国公司 | Integrated piezoresistive and piezoelectric micromechanical ultrasonic transducer device and associated processing method |
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