CN117201248A - Carrier synchronization method for conventional digital signal demodulation - Google Patents

Abstract

The invention discloses a carrier synchronization method for conventional digital signal demodulation, which comprises the following steps: roughly estimating carrier frequency offset; carrier frequency offset correction: correcting the data according to the estimated carrier frequency offset to achieve coarse synchronization; normalization of received data: normalizing the data after coarse synchronization according to a standard constellation diagram; carrier fine synchronization: the normalized signal is subjected to digital phase-locked loop to complete fine synchronization of the signal; the invention improves the adaptability and stability of the product in engineering.

Description

Carrier synchronization method for conventional digital signal demodulation

Technical Field

The invention relates to the technical field of demodulation and decoding of communication systems, in particular to a carrier synchronization method for conventional digital signal demodulation.

Background

When synchronous demodulation or coherent detection is used, the receiver needs a coherent carrier that is co-frequency and co-phase with the carrier modulated by the transmitting end, and the acquisition of this carrier is called carrier extraction or carrier synchronization. The carrier synchronization technology is one of the most critical technologies in the software receiver, and if the carrier synchronization performance is not good, the subsequent processing of the signal cannot be performed normally, so that the performance of the system is directly affected by the quality of the carrier synchronization performance.

Phase-locked loops are fundamental components in communications to achieve various synchronizations, but it can be seen from studies of the dynamic parameters of phase-locked loops: the tracking range of the carrier frequency offset by the ring is limited. If the loop equivalent noise bandwidth is increased to obtain the capturing capability of larger frequency offset, the signal to noise ratio is affected, and the capturing process is slower and less reliable. If the initial frequency difference is too large, the phase relation acquired by the loop is in a disordered state, and it is difficult to realize phase locking by simply capturing the phase relation by itself.

Disclosure of Invention

In order to solve the problems in the prior art, the invention aims to provide a carrier synchronization method aiming at conventional digital signal demodulation, and the invention improves the adaptability and stability of products in engineering.

In order to achieve the above purpose, the invention adopts the following technical scheme: a carrier synchronization method for conventional digital signal demodulation, comprising the steps of:

step 1, roughly estimating carrier frequency offset;

step 2, carrier frequency offset correction: correcting the data according to the carrier frequency offset estimated in the step 1 to achieve coarse synchronization;

step 3, received data normalization: normalizing the data after coarse synchronization according to a standard constellation diagram;

step 4, carrier fine synchronization: and carrying out digital phase-locked loop on the normalized signal to finish fine synchronization of the signal.

As a further improvement of the present invention, the step 1 specifically includes the steps of:

(1) Performing FFT (fast Fourier transform) on the acquired data to obtain a sequence X (k);

(2) Estimating the signal carrier f according to the following formula _c ：

Wherein k is an index number, N is FFT point number, f _s For outputting the sampling rate;

(3) Estimating carrier frequency offset deltaf:

Δf＝f _c -f _s /2。

as a further improvement of the present invention, in step 2, the correction of the data is specifically as follows:

s(n)＝(I+Q*1i)*e ^{1i*2*π*Δf*n*Ts}

where I, Q is the in-phase component and the quadrature component received by the receiver, s (n) represents the complex signal synthesized by I, Q, n is the signal index, and Ts is the sampling period.

As a further improvement of the present invention, the step 3 specifically includes the steps of:

(1) calculating the maximum amplitude of the received data, and setting the amplitude of the received constellation point as r _i The maximum amplitude is max (|r) _i I), normalized received data ri_norm:

r _i _norm＝r _i /max(|r _i |)

(2) confirming constellation points to form a plurality of rings by contrasting a standard constellation diagram;

(3) if the standard constellation has one ring, the data normalization is directly finished through the step (1), and if the standard constellation exceeds one ring, the radius of the outermost ring is set as R1, and the radius of the secondary outer ring is set as R2;

(4) find r _i Satisfying |r in_norm _i _norm|>Points (R1+R2)/2, the set of points is Ω;

(5) taking an average value of the modes of points in omega, wherein the average value is alpha;

(6) normalization correction to constellation: r is (r) _i ＝r _i /(max(|r _i |)*α)。

As a further improvement of the present invention, the implementation method of the digital phase-locked loop specifically includes:

first, the input signal r (n) is assumed to have undergone automatic gain control, timing recovery and data normalization, r (n) is multiplied by the output of the digital voltage controlled oscillator, and the resulting coherent demodulation signal q (n) is output as level-by-level decisionThe output of the phase detector is:

wherein im is the imaginary part;

without taking noise into account:

wherein r is the modulus of q (n),is->Modulus of f ₁ For coherent demodulated signal frequency, f ₂ For the decided output signal frequency, θ is the initial phase of the coherently demodulated signal, +.>The initial phase of the output signal after judgment is adopted; assume thatThe value of (2) approaches zero, so the sine value is directly equivalent to its phase angle; the resulting phase difference signal is fed into a filter and then into a digital voltage controlled oscillator comprising an integrator and a sine table, thereby forming a digital phase locked loop.

As a further improvement of the present invention, the conventional digital signal is a PSK, QAM, APSK modulated signal.

The beneficial effects of the invention are as follows:

in order to enable the phase-locked loop to have a better tracking function, the invention adopts a mode of coarse correction and fine correction, and comprises the following two steps: correcting the large frequency offset and then correcting the small frequency offset; the method solves the practical problems of larger frequency offset of the received signal and limited tracking range of the phase-locked loop in the monitoring field, and improves the adaptability and stability of the product in engineering.

Drawings

FIG. 1 is a general flow diagram of an embodiment of the present invention;

fig. 2 is a block diagram of a phase locked loop implementation based on a DD phase detector in an embodiment of the invention.

Detailed Description

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

Examples

As shown in fig. 1, a carrier synchronization method for conventional digital signal demodulation completes carrier synchronization based on a timing synchronization result, and the carrier synchronization adopts a mode of coarse correction and fine correction, which specifically comprises the following steps:

step one: roughly estimating carrier frequency offset. For a PSK, QAM, APSK modulated signal, the spectrum has symmetry, and no independent carrier component exists in the signal, so carrier estimation is performed in the following manner:

(1) FFT conversion is carried out on the acquired data to obtain a sequence X (k);

(2) Estimating the signal carrier f according to the following formula _c ：

Wherein k is an index number, N is FFT point number, f _s For outputting the sampling rate;

(3) Estimating carrier frequency offset:

Δf＝f _c -f _s /2。

step two: and correcting carrier frequency offset. Correcting the data according to the carrier frequency offset estimated in the step one:

s(n)＝(I+Q/1i)*e ^{1i*2*π*Δf*n*Ts}

where I, Q is the in-phase component and the quadrature component received by the receiver, s (n) represents the complex signal synthesized by I, Q, n is the signal index, and Ts is the sampling period.

Step three: and (5) normalizing the received data. Because the phase-locked loop adopts a DD (Decision Directed) phase discriminator, the phase discriminator compares the received signal with a standard constellation diagram to obtain a phase discrimination error, and therefore, the data after coarse synchronization needs to be normalized according to the standard constellation diagram:

(1) Calculating the maximum amplitude of the received data, and setting the amplitude of the received constellation point as r _i The maximum amplitude is max (|r) _i I), normalized received data ri_norm:

r _i -norm＝r _i /max(|r _i |)

(2) Against the standard constellation, confirming that constellation points form several loops, such as one loop for a psk signal, 2 loops for a 16APSK signal, and 3 loops for a 16QAM signal;

(3) If the standard constellation has one ring, the data normalization is directly finished through the first step, and if the standard constellation exceeds one ring, the radius of the outermost ring is set as R1, and the radius of the secondary outer ring is set as R2;

(4) Find r _i Meeting |r in norm _i -norm|>Points (R1+R2)/2, the set of points is Ω;

(5) Taking an average value of the modes of points in omega, wherein the average value is alpha;

(6) Normalization correction to constellation: r is (r) _i ＝r _i /(max(|r _i |)*α)；

Step four: carrier fine synchronization. The DD algorithm-based phase-locked loop implementation block diagram is shown in FIG. 2. First, the input signal r (n) is assumed to have undergone automatic gain control, timing recovery and data normalization, r (n) is multiplied by the output of the VCO, and the resulting coherent demodulation signal q (n) is output as level-by-level decisionThe phase detector output is:

wherein im is the imaginary part;

in the case where the noise is not considered,

wherein r is the modulus of q (n),is->Modulus of f ₁ For coherent demodulated signal frequency, f ₂ For the decided output signal frequency, θ is the initial phase of the coherently demodulated signal, +.>The initial phase of the output signal after judgment is adopted; assume thatThe sine value can be directly equivalent to its phase angle because the value of (a) is small. The resulting phase difference signal is fed into a filter and then into a digital Voltage Controlled Oscillator (VCO) comprising an integrator and a sine table, thus forming a digital phase locked loop. After the signal passes through the digital phase-locked loop, fine synchronization of the signal is completed.

The foregoing examples merely illustrate specific embodiments of the invention, which are described in greater detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention.

Claims (6)

1. A carrier synchronization method for conventional digital signal demodulation, comprising the steps of:

step 1, roughly estimating carrier frequency offset;

step 2, carrier frequency offset correction: correcting the data according to the carrier frequency offset estimated in the step 1 to achieve coarse synchronization;

step 3, received data normalization: normalizing the data after coarse synchronization according to a standard constellation diagram;

step 4, carrier fine synchronization: and carrying out digital phase-locked loop on the normalized signal to finish fine synchronization of the signal.

2. The carrier synchronization method for conventional digital signal demodulation according to claim 1, wherein the step 1 specifically comprises the steps of:

(1) Performing FFT (fast Fourier transform) on the acquired data to obtain a sequence X (k);

(2) Estimating the signal carrier f according to the following formula _c ：

Wherein k is an index number, N is FFT point number, f _s For outputting the sampling rate;

(3) Estimating carrier frequency offset deltaf:

Δf＝f _c -f _s /2。

3. the carrier synchronization method for conventional digital signal demodulation according to claim 2, wherein in step 2, the correction of the data is specifically as follows:

s(n)＝(I+Q*1i)*e ^{1i*2*π*Δf*n*Ts}

where I, Q is the in-phase component and the quadrature component received by the receiver, s (n) represents the complex signal synthesized by I, Q, n is the signal index, and Ts is the sampling period.

4. A carrier synchronization method for conventional digital signal demodulation according to claim 3, wherein said step 3 specifically comprises the steps of:

(1) calculating the maximum amplitude of the received data, and setting the amplitude of the received constellation point as r _i The maximum amplitude is max (|r) _i I), normalized received data ri_norm:

r _i _norm＝r _i /max(|r _i |)

(2) confirming constellation points to form a plurality of rings by contrasting a standard constellation diagram;

(3) if the standard constellation has one ring, the data normalization is directly finished through the step (1), and if the standard constellation exceeds one ring, the radius of the outermost ring is set as R1, and the radius of the secondary outer ring is set as R2;

(4) find r _i Satisfying |r in_norm _i _norm|>Points (R1+R2)/2, the set of points is Ω;

(5) taking an average value of the modes of points in omega, wherein the average value is alpha;

(6) normalization correction to constellation: r is (r) _i ＝r _i /(max(|r _i |)*α)。

5. The carrier synchronization method for conventional digital signal demodulation according to claim 4, wherein in step 4, the implementation method of the digital phase-locked loop is specifically as follows:

first, the input signal r (n) is assumed to have undergone automatic gain control, timing recovery and data normalization, r (n) is multiplied by the output of the digital voltage controlled oscillator, and the resulting coherent demodulation signal q (n) is output as level-by-level decisionThe output of the phase detector is:

wherein im is the imaginary part;

without taking noise into account:

wherein r is the modulus of q (n),is->Modulus of f ₁ For coherent demodulated signal frequency, f ₂ For the decided output signal frequency, θ is the initial phase of the coherently demodulated signal, +.>The initial phase of the output signal after judgment is adopted; assume thatThe value of (2) approaches zero, so the sine value is directly equivalent to its phase angle; the resulting phase difference signal is fed into a filter and then into a digital voltage controlled oscillator comprising an integrator and a sine table, thereby forming a digital phase locked loop.

6. The carrier synchronization method for demodulation of a conventional digital signal according to any one of claims 1-5, wherein the conventional digital signal is a PSK, QAM, APSK modulated signal.