CN117200790A - Spurious suppression method, device and system for interleaved sampling system - Google Patents

Spurious suppression method, device and system for interleaved sampling system Download PDF

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CN117200790A
CN117200790A CN202311227557.4A CN202311227557A CN117200790A CN 117200790 A CN117200790 A CN 117200790A CN 202311227557 A CN202311227557 A CN 202311227557A CN 117200790 A CN117200790 A CN 117200790A
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sequence
sampling
compensation
interleaved
input
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CN117200790B (en
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孙有为
李继锋
李晃
江磊
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Yangzhou Yuan Electronic Technology Co Ltd
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Yangzhou Yuan Electronic Technology Co Ltd
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Abstract

The invention relates to the technical field of analog-to-digital conversion, and discloses a spurious suppression method, a spurious suppression device and a spurious suppression system of an interleaving sampling system, which comprise the following steps: after the sampling system is electrified, in a state of no input signal, obtaining a non-input conversion sequence, and calculating a compensation reference value from any moment; in the state of the input signal, an input conversion sequence is obtained, and the input conversion sequence is compensated by using a compensation reference value to obtain a compensation sequence; and recovering the compensation sequence into a single-path form to obtain the spurious suppression sequence. The invention has stronger inhibition effect on the spurious in the digital signal obtained by interleaving sampling, has obvious dynamic promotion on the system, does not influence the sampling of the real signal, is easy to implement, and does not involve hardware change.

Description

Spurious suppression method, device and system for interleaved sampling system
Technical Field
The invention relates to the technical field of interleaved sampling, in particular to a spurious suppression method, device and system of an interleaved sampling system.
Background
The interleaved sampling is performed by simultaneously sampling a plurality of ADCs (interleaved analog-to-digital converters/sampling units) according to a certain time relationship and sequentially reorganizing the sampling results to achieve a higher sampling rate. This powerful technique is not without problems, and when the data streams from multiple ADC channels are digitally combined together to reconstruct the original input signal, a critical problem emerges, as different channels have different characteristics, introducing different distortions to the same input signal, so that the recombined signal contains a large number of extra spurs, commonly known as interleaving spurs. The most significant of these is the spurious emissions that occur due to the different dc offsets between the different channels, which are within the bandwidth of the received signal, which severely constrains the dynamics of the digital receiver sampled in this way.
Disclosure of Invention
The technical purpose is that: aiming at the technical problems, the invention provides a spurious suppression method, a spurious suppression device and a spurious suppression system for an interleaving sampling system, which can greatly reduce the power of the interleaved spurious and remarkably improve the dynamic state of a digital receiver using the mode for sampling.
The technical scheme is as follows: in order to achieve the technical purpose, the invention adopts the following technical scheme:
a spur suppression method for an interleaved sampling system, comprising the steps of:
s1, after the sampling system is electrified, obtaining a digital sequence x in an interleaving sampling mode under the state of no input signal 0 (n), then let n=2md+p, the obtained digital sequence x 0 (n) expressed as a conversion sequence in a polyphase form, resulting in an input-free conversion sequence x 0 ' (m, p), and calculating a compensation reference value Avg from any time p
S2, under the state of an input signal, a digital sequence x (n) is obtained in an interleaving sampling mode, then n=2MD+p is made, the obtained digital sequence x (n) is expressed as a conversion sequence in a multiphase form, and an input conversion sequence x' (m, p) is obtained;
s3, using the compensation reference value Avg p Compensating the input conversion sequence x '(m, p) to obtain a compensation sequence xc' (m, p);
and S4, letting n=2MD+p, and recovering the compensation sequence xc '(m, p) into a single-path form to obtain a spurious suppression sequence xc' (n).
Preferably, in both the step S1 and the step S2, the compensation reference value Avg is calculated according to the formula (1) p
In the formula (1), avg p Representing a compensation reference value, namely an average value, M represents a sequence variable after multiple phases, p represents the number of phases, M represents the total accumulated number, and D represents the number of interleaved ADCs;
preferably, in the step S4, compensation is performed according to formula (2):
xc′(m,p)=x′(m,p)-Avg p (2)。
preferably, in S3, M is greater than or equal to 8192 according to the practically allowable time.
Preferably, in the step S1, the sampling rate of the interleaved samples is fs' =2 N ×fs,2 N Representing the number of sampling units in the sampling system, fs representing the sampling rate of each sampling unit.
A spur suppression apparatus for an interleaved sampling system, comprising:
the sampling module is used for obtaining a digital sequence x in an interleaving sampling mode in a state of no input signal after the sampling system is electrified 0 (n) and, in the state of the input signal, obtaining a digital sequence x (n) in an interleaved sampling manner;
a first conversion module for making n=2md+p, and converting the digital sequence x obtained by the sampling module 0 (n) or x (n) is expressed as a corresponding input-less conversion sequence x 0 'or has an input x' (m, p);
the compensation reference value calculation module is used for receiving the input-free conversion sequence x obtained by the first conversion module 0 ' (m, p), and calculating a compensation reference value Avg from any time p
The compensation processing module is used for receiving the input conversion sequence x' obtained by the first conversion modulem, p), using the compensation reference value Avg p Compensating the input conversion sequence x '(m, p) to obtain a compensation sequence xc' (m, p);
and the second conversion module is used for enabling n=2MD+p, and recovering the compensation sequence xc '(m, p) into a one-way form to obtain a spurious suppression sequence xc' (n).
An interleaved sampling system, characterized by: the spurious suppression device comprises the spurious suppression device of the interleaving sampling system.
The beneficial effects are that: due to the adoption of the technical scheme, the invention has the following beneficial effects:
the invention has stronger inhibition effect on the spurious in the digital signal obtained by interleaving sampling, has obvious dynamic promotion on the system, does not influence the sampling of the real signal, is easy to implement, and does not involve hardware change.
Drawings
FIG. 1 is a flow chart of a method for suppressing interleaved sample spurs in accordance with the present invention;
FIG. 2 is a power spectral density of an empty before compensation in an embodiment;
fig. 3 is a power spectral density of the compensated idle load in the embodiment.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Example 1
The invention provides a method for restraining interleaving sampling strays, which is shown in figure 1 and comprises the following steps:
s1, a sampling system is formed by 2 N (D) The ADC with the sampling rate fs is formed, the digital sequence x (n) is obtained by interleaving sampling, and the sampling rate after interleaving is fs' =2 N ×fs;
S2, representing the obtained digital sequence x (n) in the following form, wherein n=2MD+p, and x (n) can be represented by x' (m, p;
s3, after the sampling system is electrified each time, obtaining x' (m, p) under the state of no input signal, and starting to calculate a compensation reference value from any moment
Avg p Is a mean value, M represents the sequence variable after multiple phases, p represents the number of phases, M represents the total number of accumulated, D represents the number of interleaved ADCs, M can be selected according to the practically allowable time, and typically M is larger than or equal to 8192.
S4, for the subsequent sampling data, each path of signal x ' (m, p) is compensated, and a specific compensation method is xc ' (m, p) =x ' (m, p) -Avg p Obtaining compensated data xc' (m, p);
s5, let n=2MD+p, restore xc '(m, p) to single-path form xc' (n), the stray power of the sequence is obviously reduced, and the sampling of external real signals is not affected.
Because each ADC adopted by the interleaving sampling has different direct current offsets, the method acquires long-time data through the system every time of power-on, calculates the direct current offset amplitude of each ADC, namely the compensation reference value, and uses a direct current quantity with opposite phase to cancel the inherent direct current offset when the system works, thereby reducing strays.
Examples
S1, a sampling system consists of 2 ADCs with sampling rate of 1200Msps, and a digital sequence x (n) is obtained by interleaving sampling, wherein the interleaved sampling rate is fs' =2×1200 Msps=2400 Msps;
s2, representing the obtained digital sequence x (n) as the following form, wherein n=4m+p, and x (n) can be represented by x' (m, p);
s3, after the sampling system is electrified each time, obtaining x' (m, p) under the state of no input signal, and starting calculation from any momentLet m=8192.
S4, for the subsequent sampling data, each path of signal x ' (m, p) is compensated, and a specific compensation method is xc ' (m, p) =x ' (m, p) -Avg p Obtaining compensated data xc' (m, p);
s5, let n=2md+p, restore xc '(m, p) to one-way form xc' (n).
Comparing fig. 2 and fig. 3, it can be seen that the sequence stray power is significantly reduced, the maximum stray point power before compensation is-60.251 dBFS, the maximum stray point power after compensation is-76.691 dBFS, and the effect is significant.
Example two
The embodiment provides a spurious suppression device of an interleaved sampling system, which comprises:
the sampling module is used for obtaining a digital sequence x (n) in an interleaving sampling mode;
a first conversion module for letting n=2md+p, representing the obtained digital sequence x (n) as a conversion sequence;
the compensation reference value calculation module is used for receiving the input-free conversion sequence x obtained by the first conversion module in a state of no input signal after the sampling system is electrified 0 ' (m, p), and calculating a compensation reference value Avg from any time p
The compensation processing module is used for receiving the input conversion sequence x' (m, p) obtained by the first conversion module in the state of the input signal after the sampling system is electrified every time, and using the compensation reference value Avg p Compensating the input conversion sequence x '(m, p) to obtain a compensation sequence xc' (m, p);
and the second conversion module is used for enabling n=2MD+p, and recovering the compensation sequence xc '(m, p) into a one-way form to obtain a spurious suppression sequence xc' (n).
In still another embodiment of the present invention, an interleaved sampling system is provided, including the spur suppression device of the interleaved sampling system in the first embodiment.
The foregoing has shown and described the basic principles, principal features and advantages of the invention. It will be appreciated by persons skilled in the art that the above embodiments are not intended to limit the invention in any way, and that all technical solutions obtained by means of equivalent substitutions or equivalent transformations fall within the scope of the invention.

Claims (7)

1. A spur suppression method for an interleaved sampling system, comprising the steps of:
s1, after the sampling system is electrified, obtaining a digital sequence x in an interleaving sampling mode under the state of no input signal 0 (n), then let n=2md+p, the obtained digital sequence x 0 (n) expressed as a conversion sequence in a polyphase form, resulting in an input-free conversion sequence x 0 ' (m, p), and calculating a compensation reference value Avg from any time p
S2, under the state of an input signal, a digital sequence x (n) is obtained in an interleaving sampling mode, then n=2MD+p is made, the obtained digital sequence x (n) is expressed as a conversion sequence in a multiphase form, and an input conversion sequence x' (m, p) is obtained;
s3, using the compensation reference value Avg p Compensating the input conversion sequence x '(m, p) to obtain a compensation sequence xc' (m, p);
and S4, letting n=2MD+p, and recovering the compensation sequence xc '(m, p) into a single-path form to obtain a spurious suppression sequence xc' (n).
2. The spurious suppression method of an interleaved sampling system according to claim 1 wherein in both step S1 and step S2, a compensation reference value Avg is calculated according to equation (1) p
In the formula (1), avg p The compensation reference value is represented as an average value, M represents a sequence variable after multiple phases, p represents the number of phases, M represents the total accumulated number, and D represents the number of interleaved ADCs.
3. The spurious suppression method of an interleaved sampling system according to claim 1 wherein in step S3, compensation is performed according to equation (2):
xc′(m,p)=x′(m,p)-Avg p (2)。
4. the spurious suppression method of an interleaved sampling system according to claim 1 wherein: in the step S3, M is selected according to the practically allowable time, and M is more than or equal to 8192.
5. The spurious suppression method of an interleaved sampling system according to claim 1 wherein: in the step S1, the sampling rate of the interleaved samples is fs' =2 N ×fs,2 N Representing the number of sampling units in the sampling system, fs representing the sampling rate of each sampling unit.
6. A spur suppression apparatus for an interleaved sampling system, comprising:
the sampling module is used for obtaining a digital sequence x in an interleaving sampling mode in a state of no input signal after the sampling system is electrified 0 (n) and, in the state of the input signal, obtaining a digital sequence x (n) in an interleaved sampling manner;
a first conversion module for making n=2md+p, and converting the digital sequence x obtained by the sampling module 0 (n) or x (n) is expressed as a corresponding input-less conversion sequence x 0 'or has an input x' (m, p);
the compensation reference value calculation module is used for receiving the input-free conversion sequence x obtained by the first conversion module 0 ' (m, p), and calculating a compensation reference value Avg from any time p
A compensation processing module for receiving the input conversion sequence x' (m, p) obtained by the first conversion module and using the compensation reference value Avg p Compensating the input conversion sequence x '(m, p) to obtain a compensation sequence xc' (m, p);
and the second conversion module is used for enabling n=2MD+p, and recovering the compensation sequence xc '(m, p) into a one-way form to obtain a spurious suppression sequence xc' (n).
7. An interleaved sampling system, characterized by: spur suppression means comprising the interleaved sampling system of claim 6.
CN202311227557.4A 2023-09-22 Spurious suppression method, device and system for interleaved sampling system Active CN117200790B (en)

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