CN117195790A - Multi-stage table item verification method, system, computer equipment and medium - Google Patents
Multi-stage table item verification method, system, computer equipment and medium Download PDFInfo
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Abstract
The application provides a multi-stage table item verification method, a system, a computer device and a medium, which are characterized in that after access information and table item content information generated during simulation of an object to be verified are obtained, all the obtained access information is generated into an excitation resource pool, excitation information is randomly extracted from the excitation resource pool and combined with the table item content information for secondary simulation, and then the simulation generated multi-stage table item to be matched is compared with the object to be verified, so that the randomness of the generation of the multi-stage table item to be matched is improved in the way of randomly extracting the excitation information to generate the multi-stage table item to be matched, the problem that the reliability of a verification result is lowered due to single verification mode during verification of the multi-stage table item to be matched is avoided, and the reliability of an output result during simulation verification of the object to be verified is improved.
Description
Technical Field
The present application relates to the field of table entry verification, and in particular, to a method, a system, a computer device, and a medium for multi-level table entry verification.
Background
In recent years, along with rapid development of technologies and technologies, functions and performances of network switching equipment are enhanced, a large number of associated table item structures are needed in a chip in order to realize functions of various switching protocols, and currently, whether the functions of the chip are correctly realized or not is observed by monitoring input and output of a single module based on UVM methodology.
Disclosure of Invention
Based on this, it is necessary to provide a multi-level table item verification method, system, computer device and medium capable of performing high-accuracy verification on multi-level table items, thereby ensuring accurate chip output.
The application provides a multi-level table item verification method, which comprises the following steps:
simulating an object to be verified, so as to generate a plurality of access information and a plurality of table item content information, wherein the object to be verified is one table item to be verified pre-stored in a chip to be verified;
storing the access information into a set resource pool so as to generate an excitation resource pool, wherein the excitation resource pool is used for randomly extracting the access information from the excitation resource pool and recording the extracted access information as excitation information;
inputting the excitation information and the table item content information into the chip to be verified for simulation, so as to output a multi-stage table item to be matched;
judging whether the multi-stage table item to be matched is matched with the object to be verified;
if yes, judging that the output verification of the chip to be verified is successful.
Further, the multi-stage table item to be matched comprises a plurality of first-stage identification table items and secondary identification table items, and the excitation information comprises a first-stage table lookup KEY value matched with the first-stage identification table items and a secondary table lookup KEY value matched with the secondary identification table items;
the step of inputting the excitation information and the table item content information into the chip to be verified for simulation so as to output a multi-stage table item to be matched, specifically comprising the following steps:
judging whether coupling relations exist among the primary identification table entries and the secondary identification table entries;
if yes, extracting corresponding content from the table item content information according to the first-level table lookup KEY value, so as to generate the first-level identification table item;
according to a set rule, carrying out table lookup acquisition on the first-stage identification table item so as to acquire a set table lookup KEY value;
after the set table lookup KEY value is stored in the channel information, extracting corresponding contents from the table contents according to the set table lookup KEY value and the secondary table lookup KEY value, thereby generating the secondary identification table;
and coupling the primary identification table item and the secondary identification table item according to a set relation so as to generate the multi-stage table item to be matched.
Further, after the step of obtaining the table lookup KEY value by looking up the first-stage identification table item according to the setting rule, the method further includes:
judging whether a table look-up flow coupled entry exists in the excitation information or not, wherein the table look-up flow coupled entry is used for inquiring the first-level identification table entry;
if yes, after the set table lookup KEY value and the table lookup flow coupling entry are stored in the path information, corresponding contents are extracted from the table entry contents according to the set table lookup KEY value and the secondary table lookup KEY value, so that the secondary identification table entry is generated.
Further, after the step of obtaining the table lookup KEY value by looking up the first-stage identification table item according to the setting rule, the method further includes:
judging whether the excitation information has a table look-up result coupled entry or not, wherein the table look-up result coupled entry is used for controlling the output result of the first-stage identification table entry;
if yes, storing the first-level table lookup KEY value and the table lookup result coupling entry into the path information;
extracting corresponding contents from the table item contents according to the first-level table lookup KEY value, thereby generating the first-level identification table item;
extracting the table item content contained in the first-stage identification table item, and recording the table item content as table item information to be output;
and combining and outputting the table item information to be output and the table look-up result coupled entry.
Further, the step of storing the path information in a set resource pool, thereby generating an excitation resource pool, wherein the excitation resource pool is used for randomly extracting the path information from the set resource pool and recording the extracted path information as excitation information, and the step of further comprises the steps of:
inputting the excitation information and the table item content information into the chip to be verified for simulation, so as to output a single-stage table item to be matched;
judging whether the single-stage table item to be matched is matched with the object to be verified;
if yes, judging that the output verification of the chip to be verified is successful.
Further, the single-stage table items to be matched comprise a plurality of single-stage identification table items, and the excitation information comprises a single-stage table lookup KEY value matched with the single-stage identification table items;
the step of inputting the excitation information and the table item content information into the chip to be verified for simulation so as to output a single-stage table item to be matched, specifically comprising the following steps:
and extracting corresponding contents from the single-stage identification table entry according to the single-stage table lookup KEY value, thereby generating the single-stage table entry to be matched.
Further, the step of randomly extracting the channel information from the excitation resource pool and recording the extracted channel information as excitation information specifically includes:
randomly extracting the access information from the excitation resource pool according to a set rule, and marking the extracted access information as information to be verified;
judging whether the information to be verified exists in the object to be verified or not;
if yes, the information to be verified is recorded as the excitation information.
The application also provides a multi-level table item verification system, which comprises:
the simulation unit is used for simulating the object to be verified so as to generate a plurality of access information and a plurality of table item content information, wherein the object to be verified is one table item to be verified which is pre-stored in the chip to be verified;
a storage unit for storing the access information into a set resource pool, thereby generating an excitation resource pool for randomly extracting the access information therefrom and recording the extracted access information as excitation information;
the table item generating unit is used for inputting the excitation information and the table item content information into the chip to be verified for simulation so as to output a multi-stage table item to be matched;
the judging unit is used for judging whether the multi-level table item to be matched is matched with the object to be verified or not;
and the output unit is used for judging whether the output verification of the chip to be verified is successful or not if yes.
A computer device comprising a memory and a processor, the memory storing a computer program which, when executed by the processor, causes the processor to perform the steps of:
simulating an object to be verified, so as to generate a plurality of access information and a plurality of table item content information, wherein the object to be verified is one table item to be verified pre-stored in a chip to be verified;
storing the access information into a set resource pool so as to generate an excitation resource pool, wherein the excitation resource pool is used for randomly extracting the access information from the excitation resource pool and recording the extracted access information as excitation information;
inputting the excitation information and the table item content information into the chip to be verified for simulation, so as to output a multi-stage table item to be matched;
judging whether the multi-stage table item to be matched is matched with the object to be verified;
if yes, judging that the output verification of the chip to be verified is successful.
A computer readable medium storing a computer program which, when executed by a processor, causes the processor to perform the steps of:
simulating an object to be verified, so as to generate a plurality of access information and a plurality of table item content information, wherein the object to be verified is one table item to be verified pre-stored in a chip to be verified;
storing the access information into a set resource pool so as to generate an excitation resource pool, wherein the excitation resource pool is used for randomly extracting the access information from the excitation resource pool and recording the extracted access information as excitation information;
inputting the excitation information and the table item content information into the chip to be verified for simulation, so as to output a multi-stage table item to be matched;
judging whether the multi-stage table item to be matched is matched with the object to be verified;
if yes, judging that the output verification of the chip to be verified is successful.
According to the method and the structure, the random generation of the multi-stage table item to be matched is improved in the way of randomly extracting the excitation information to generate the multi-stage table item to be matched, so that the problem that the reliability of the verification result is reduced due to the single verification way when the multi-stage table item to be matched is verified is solved, and the reliability of the output result when the simulation verification is performed on the object to be verified is improved.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments of the application, and that other drawings can be obtained according to these drawings without inventive effort to a person skilled in the art.
Wherein:
FIG. 1 is a flow chart of a method of multi-level entry verification method in one embodiment;
FIG. 2 is a system architecture diagram of a multi-level entry verification system in one embodiment;
FIG. 3 is a block diagram of a computer device in one embodiment;
the reference numerals in the figures are: the system comprises a 1-simulation unit, a 2-storage unit, a 3-table item generation unit, a 4-judgment unit and a 5-output unit.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Referring to fig. 1, the present application provides a multi-level entry verification method, including:
s1, simulating an object to be verified, so as to generate a plurality of access information and a plurality of table item content information, wherein the object to be verified is one table item to be verified pre-stored in a chip to be verified;
as described in step S1, the background system simulates the object to be verified stored in the chip and obtains the final simulation result of the chip, it can be understood that the simulation result is the path information and the table entry content information, and the object to be verified is one table entry to be verified pre-stored in the chip to be verified.
In addition, the background system is generally a background server, and in addition, the background system may be an independent server, or may be a cloud server that provides cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, a content distribution network (ContentDeliveryNetwork, CDN), basic cloud computing services such as big data and an artificial intelligence platform, and the application is not limited thereto.
S2, storing the access information into a set resource pool so as to generate an excitation resource pool, wherein the excitation resource pool is used for randomly extracting the access information from the excitation resource pool and recording the extracted access information as excitation information;
as described in the above step S2, the background system stores the path information in a set resource pool, so as to generate an incentive resource pool, and it can be understood that the incentive resource pool is configured to randomly extract the path information from the object to be verified when the object to be verified needs to be verified by simulation, and record the extracted path information as incentive information.
S3, inputting the excitation information and the table item content information into the chip to be verified for simulation, so as to output a multi-stage table item to be matched;
as described in step S3, the background system inputs the excitation information and the table content information to the chip to be verified for secondary simulation, so as to output the multi-stage table item to be matched.
S4, judging whether the multi-level table item to be matched is matched with the object to be verified;
as described in the above step S4, the background system determines whether the to-be-matched multi-level entry matches the to-be-verified object, and it can be understood that, because the to-be-verified object and the to-be-matched multi-level entry depend on the to-be-verified chip to perform simulation verification according to the same sample, the to-be-matched multi-level entry and the to-be-verified object Li Ling have partially similar contents, and at this time, the background system may determine that the to-be-matched multi-level entry matches the to-be-verified object.
And S5, if yes, judging that the output verification of the chip to be verified is successful.
And as described in the above step S5, when the background system determines that the to-be-matched multi-level table item matches the to-be-verified object, the background system may determine that the output verification of the to-be-verified chip is successful.
According to the method, after the access information and the table item content information generated during simulation of the object to be verified are obtained, an excitation resource pool is generated by all the obtained access information, the excitation information is randomly extracted from the excitation resource pool and combined with the table item content information for secondary simulation, and then the simulation generated multi-stage table item to be matched is compared with the object to be verified, so that the randomness of the generation of the multi-stage table item to be matched is improved in the way of randomly extracting the excitation information to generate the multi-stage table item to be matched, the problem that the reliability of a verification result is reduced due to the fact that the verification mode is single when the multi-stage table item to be matched is verified is solved, and the reliability of the output result when the simulation verification is carried out on the object to be verified is improved.
In an embodiment, the to-be-matched multi-stage table entry includes a plurality of first-stage identification table entries and secondary identification table entries, and the excitation information includes a first-stage table lookup KEY value matched with the first-stage identification table entries and a secondary table lookup KEY value matched with the secondary identification table entries;
the step of inputting the excitation information and the table item content information into the chip to be verified for simulation so as to output a multi-stage table item to be matched, specifically comprising the following steps:
s31, judging whether coupling relations exist between the first-stage identification table entries and the secondary identification table entries, if so, extracting corresponding contents from the table entry content information according to the first-stage table lookup KEY value, generating the first-stage identification table entries, carrying out table lookup on the first-stage identification table entries according to a set rule, obtaining a set table lookup KEY value, storing the set table lookup KEY value into the path information, extracting corresponding contents from the table entry contents according to the set table lookup KEY value and the secondary table lookup KEY value, generating the secondary identification table entries, and coupling the first-stage identification table entries and the secondary identification table entries according to the set relations, thereby generating the multi-stage table entries to be matched.
According to the above embodiment, the to-be-matched multi-stage table entry includes a plurality of first-stage identification table entries and secondary identification table entries, the excitation information includes a first-stage table KEY value matched with the first-stage identification table entry and a secondary table KEY value matched with the secondary identification table entry, the backend system determines whether a coupling relationship exists between each first-stage identification table entry and the secondary identification table entry, if yes, extracts corresponding contents from the table entry content information according to the first-stage table KEY value, thereby generating the first-stage identification table entry, and then the backend system performs table lookup acquisition on the first-stage identification table entry according to a setting rule, thereby obtaining a set table KEY value.
In an embodiment, after the step of obtaining the table lookup KEY value by performing table lookup on the first-stage identification table entry according to the setting rule, the method further includes:
s32, judging whether a table lookup flow coupling term exists in the excitation information, wherein the table lookup flow coupling term is used for inquiring the first-stage identification table item, and if yes, after the set table lookup KEY value and the table lookup flow coupling term are stored in the channel information, extracting corresponding contents from the table item contents according to the set table lookup KEY value and the secondary table lookup KEY value, so that the secondary identification table item is generated.
As described in the foregoing embodiment, the background system determines whether a table lookup process coupling term exists in the excitation information, and it may be understood that the table process coupling is used to query the first-stage identification table entry, when the background system determines that the table lookup process coupling term exists in the excitation information, the background system stores the set table lookup KEY value and the table lookup process coupling term into the path information, and extracts corresponding content from the table entry content according to the set table lookup KEY value and the secondary table lookup KEY value, so as to generate the secondary identification table entry.
In an embodiment, after the step of obtaining the table lookup KEY value by performing table lookup on the first-stage identification table entry according to the setting rule, the method further includes:
s33, judging whether the excitation information has a table lookup result coupled entry or not, wherein the table lookup result coupled entry is used for controlling the output result of the first-stage identification table entry, if so, storing the first-stage table lookup KEY value and the table lookup result coupled entry into the path information, extracting corresponding contents from the table entry content according to the first-stage table lookup KEY value, thereby generating the first-stage identification table entry, extracting the table entry content contained in the first-stage identification table entry, recording the first-stage identification table entry as table entry information to be output, and merging and outputting the table entry information to be output and the table lookup result coupled entry.
According to the above embodiment, the background system judges whether the excitation information has a table-lookup result-coupled term, and it can be understood that the table-lookup result-coupled term is used for controlling the output result of the first-stage identification table, when the background system judges that the excitation information has the table-lookup result-coupled term, the background system stores the first-stage table-lookup KEY value and the table-lookup result-coupled term into the path information, extracts corresponding content from the table-entry content according to the first-stage table-lookup KEY value, thereby generating the first-stage identification table, extracting the table-entry content contained in the first-stage identification table, recording the first-stage identification table-entry as the table-entry information to be output, and combining and outputting the table-entry information to be output and the table-lookup result-coupled term.
In one embodiment, the step of storing the path information in a set resource pool to generate an excitation resource pool, where the excitation resource pool is used to randomly extract the path information from the set resource pool and record the extracted path information as excitation information, further includes:
s21, inputting the excitation information and the table item content information into the chip to be verified for simulation, so as to output a single-stage table item to be matched, judging whether the single-stage table item to be matched is matched with the object to be verified, and if so, judging that the output verification of the chip to be verified is successful.
As described in the above embodiment, when the background system inputs the excitation information and the table entry content information to the chip to be verified for simulation, there is a case that the output table entry is a single-stage table entry to be matched, and then the background system determines whether the single-stage table entry to be matched is consistent with the object to be verified, and it is understood that, because the object to be verified and the single-stage table entry to be matched are both verified by relying on the chip to be verified according to the same sample for simulation, the single-stage table entry to be matched and the object to be verified Li Ling have partially similar contents, and at this time, the background system may determine that the single-stage table entry to be matched is consistent with the object to be verified, and at the same time, the background system may also determine that the output verification of the chip to be verified is successful.
In one embodiment, the single-stage table entry to be matched includes a plurality of single-stage identification table entries, and the excitation information includes a single-stage table lookup KEY value matched with the single-stage identification table entries;
the step of inputting the excitation information and the table item content information into the chip to be verified for simulation so as to output a single-stage table item to be matched, specifically comprising the following steps:
s22, extracting corresponding contents from the single-stage identification table entry according to the single-stage table lookup KEY value, so as to generate the single-stage table entry to be matched.
According to the above embodiment, the single-stage table entry to be matched includes a plurality of single-stage identification table entries, and the excitation information includes a single-stage table look-up KEY value matched with the single-stage identification table entry, so when the background system needs to input the excitation information and the table entry content information into the chip to be verified for simulation, and thus output a corresponding single-stage table entry to be matched, the background system actually extracts corresponding content from the single-stage identification table entry according to the single-stage table look-up KEY value, thereby generating the single-stage table entry to be matched.
In one embodiment, the step of randomly extracting the path information from the excitation resource pool and recording the extracted path information as excitation information specifically includes:
s23, randomly extracting the channel information from the excitation resource pool according to a set rule, marking the extracted channel information as information to be verified, judging whether the information to be verified exists in the object to be verified, and marking the information to be verified as the excitation information if the information to be verified exists in the object to be verified.
As described in the above embodiment, when the background system needs to extract the path information from the excitation resource pool, the background system actually randomly extracts the path information from the excitation resource pool according to a set rule, marks the extracted path information as information to be verified, and then the background system judges whether the information to be verified exists in the object to be verified, if so, marks the information to be verified as the excitation information.
Referring to fig. 2, the present application further provides a multi-level entry verification system, including:
the simulation unit 1 is used for simulating an object to be verified, so as to generate a plurality of access information and a plurality of table item content information, wherein the object to be verified is one table item to be verified which is pre-stored in a chip to be verified;
a storage unit 2 for storing the path information into a set resource pool, thereby generating an excitation resource pool for randomly extracting the path information therefrom and recording the extracted path information as excitation information;
the table item generating unit 3 is used for inputting the excitation information and the table item content information into the chip to be verified for simulation so as to output a multi-stage table item to be matched;
the judging unit 4 is used for judging whether the multi-level table item to be matched is matched with the object to be verified;
and the output unit 5 is used for judging whether the output verification of the chip to be verified is successful if yes.
The above units are for implementing the above multi-level entry verification system, and will not be described in detail herein.
FIG. 3 illustrates an internal block diagram of a computer device in one embodiment. The computer device may be, in particular, a server including, but not limited to, a high performance computer and a high performance computer cluster. As shown in fig. 3, the computer device includes a processor, a memory, and a network interface connected by a system bus. The memory includes a nonvolatile storage medium and an internal memory. The non-volatile storage medium of the computer device stores an operating system, and may also store a computer program that, when executed by a processor, causes the processor to implement the multi-level entry verification method. The internal memory may also store a computer program that, when executed by the processor, causes the processor to perform the multi-level entry verification method.
In one embodiment, the multi-level entry verification method provided by the present application may be implemented in the form of a computer program that is executable on a computer device as shown in fig. 3. The memory of the computer device may store therein various program templates that make up the multi-level entry verification system. Such as: a simulation unit 1, a storage unit 2, a table entry generation unit 3, a judgment unit 4 and an output unit 5.
A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, the processor implementing the steps of when executing the computer program:
simulating an object to be verified so as to generate a plurality of access information and a plurality of table item content information, wherein the object to be verified is one table item to be verified pre-stored in a chip to be verified, the access information is stored in a set resource pool so as to generate an excitation resource pool, the excitation resource pool is used for randomly extracting the access information from the excitation resource pool, the extracted access information is recorded as excitation information, the excitation information and the table item content information are input into the chip to be verified for simulation, a multi-stage table item to be matched is output, whether the multi-stage table item to be matched is consistent with the object to be verified is judged, and if yes, the output verification of the chip to be verified is judged to be successful.
The method has the advantages that after the access information and the table item content information generated during simulation of the object to be verified are obtained, all the obtained access information is generated into one excitation resource pool, the excitation information is randomly extracted from the excitation resource pool and combined with the table item content information for secondary simulation, the simulation generated multi-stage table item to be matched is compared with the object to be verified, the random generation of the multi-stage table item to be matched is improved through the random extraction of the excitation information, the problem that the reliability of a verification result is reduced due to the fact that the verification mode is single during verification of the multi-stage table item to be matched is solved, and the reliability of an output result during simulation verification of the object to be verified is improved.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.
Claims (10)
1. A multi-level entry verification method, comprising:
simulating an object to be verified, so as to generate a plurality of access information and a plurality of table item content information, wherein the object to be verified is one table item to be verified pre-stored in a chip to be verified;
storing the access information into a set resource pool so as to generate an excitation resource pool, wherein the excitation resource pool is used for randomly extracting the access information from the excitation resource pool and recording the extracted access information as excitation information;
inputting the excitation information and the table item content information into the chip to be verified for simulation, so as to output a multi-stage table item to be matched;
judging whether the multi-stage table item to be matched is matched with the object to be verified;
if yes, judging that the output verification of the chip to be verified is successful.
2. The multi-stage entry verification method according to claim 1, wherein the multi-stage entry to be matched comprises a plurality of primary identification entries and secondary identification entries, and the excitation information comprises a primary table lookup KEY value matched with the primary identification entries and a secondary table lookup KEY value matched with the secondary identification entries;
the step of inputting the excitation information and the table item content information into the chip to be verified for simulation so as to output a multi-stage table item to be matched, specifically comprising the following steps:
judging whether coupling relations exist among the primary identification table entries and the secondary identification table entries;
if yes, extracting corresponding content from the table item content information according to the first-level table lookup KEY value, so as to generate the first-level identification table item;
according to a set rule, carrying out table lookup acquisition on the first-stage identification table item so as to acquire a set table lookup KEY value;
after the set table lookup KEY value is stored in the channel information, extracting corresponding contents from the table contents according to the set table lookup KEY value and the secondary table lookup KEY value, thereby generating the secondary identification table;
and coupling the primary identification table item and the secondary identification table item according to a set relation so as to generate the multi-stage table item to be matched.
3. The method for multi-level entry verification according to claim 2, wherein after the step of obtaining the set table look-up KEY value by performing table look-up acquisition on the first-level identification entry according to a set rule, further comprises:
judging whether a table look-up flow coupled entry exists in the excitation information or not, wherein the table look-up flow coupled entry is used for inquiring the first-level identification table entry;
if yes, after the set table lookup KEY value and the table lookup flow coupling entry are stored in the path information, corresponding contents are extracted from the table entry contents according to the set table lookup KEY value and the secondary table lookup KEY value, so that the secondary identification table entry is generated.
4. The method for multi-level entry verification according to claim 2, wherein after the step of obtaining the set table look-up KEY value by performing table look-up acquisition on the first-level identification entry according to a set rule, further comprises:
judging whether the excitation information has a table look-up result coupled entry or not, wherein the table look-up result coupled entry is used for controlling the output result of the first-stage identification table entry;
if yes, storing the first-level table lookup KEY value and the table lookup result coupling entry into the path information;
extracting corresponding contents from the table item contents according to the first-level table lookup KEY value, thereby generating the first-level identification table item;
extracting the table item content contained in the first-stage identification table item, and recording the table item content as table item information to be output;
and combining and outputting the table item information to be output and the table look-up result coupled entry.
5. The multi-level entry verification method of claim 1, wherein the step of storing the path information in a set resource pool to thereby generate an incentive resource pool for randomly extracting the path information therefrom and recording the extracted path information as incentive information further comprises:
inputting the excitation information and the table item content information into the chip to be verified for simulation, so as to output a single-stage table item to be matched;
judging whether the single-stage table item to be matched is matched with the object to be verified;
if yes, judging that the output verification of the chip to be verified is successful.
6. The method for verifying multiple levels of entries according to claim 5, wherein the single level of entries to be matched comprises a plurality of single level identification entries, and the excitation information comprises a single level table lookup KEY value matched with the single level identification entries;
the step of inputting the excitation information and the table item content information into the chip to be verified for simulation so as to output a single-stage table item to be matched, specifically comprising the following steps:
and extracting corresponding contents from the single-stage identification table entry according to the single-stage table lookup KEY value, thereby generating the single-stage table entry to be matched.
7. The multi-level entry verification method of claim 1, wherein the step of randomly extracting the path information from the excitation resource pool and recording the extracted path information as excitation information, specifically comprises:
randomly extracting the access information from the excitation resource pool according to a set rule, and marking the extracted access information as information to be verified;
judging whether the information to be verified exists in the object to be verified or not;
if yes, the information to be verified is recorded as the excitation information.
8. A multi-level entry verification system, comprising:
the simulation unit is used for simulating the object to be verified so as to generate a plurality of access information and a plurality of table item content information, wherein the object to be verified is one table item to be verified which is pre-stored in the chip to be verified;
a storage unit for storing the access information into a set resource pool, thereby generating an excitation resource pool for randomly extracting the access information therefrom and recording the extracted access information as excitation information;
the table item generating unit is used for inputting the excitation information and the table item content information into the chip to be verified for simulation so as to output a multi-stage table item to be matched;
the judging unit is used for judging whether the multi-level table item to be matched is matched with the object to be verified or not;
and the output unit is used for judging whether the output verification of the chip to be verified is successful or not if yes.
9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements the multi-level entry verification method of any one of claims 1 to 7 when the computer program is executed by the processor.
10. A computer readable storage medium storing a computer program, wherein the computer program when executed by a processor implements the steps of the multi-level entry verification method of any one of claims 1 to 7.
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